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@@ -1,10 +1,12 @@
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/*
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- *
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+ * $Id$
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+ *
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* simple locking test program
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* (no paralles stuff)
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*
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- * Compile with: gcc -D__CPU_i386 -O3 on x86 machines and
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- * gcc -mips2 -O2 -D__CPU_mips on mips machines.
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+ * Compile with: gcc -D__CPU_i386 -O3 -o mips_lock on x86 machines and
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+ * gcc -mips2 -O2 -D__CPU_mips -o mips_lock on mips machines.
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+ * gcc -O3 -D__CPU_alpha -o mips_lock on alphas
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* -- andrei
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*
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*
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@@ -20,7 +22,27 @@ int tsl(fl_lock_t* lock)
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{
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long val;
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-#ifdef __CPU_mips
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+#ifdef __CPU_alpha
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+ long tmp=0;
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+ /* lock low bit set to 1 when the lock is hold and to 0 otherwise */
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+ asm volatile(
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+ "1: ldl %0, %1 \n\t"
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+ " blbs %0, 2f \n\t" /* optimization if locked */
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+ " ldl_l %0, %1 \n\t"
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+ " blbs %0, 2f \n\t"
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+ " lda %2, 1 \n\t" /* or: or $31, 1, %2 ??? */
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+ " stl_c %2, %1 \n\t"
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+ " beq %2, 1b \n\t"
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+ " mb \n\t"
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+ "2: \n\t"
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+ :"=&r" (val), "=m"(*lock), "=r"(tmp)
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+ :"1"(*lock) /* warning on gcc 3.4: replace it with m or remove
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+ it and use +m in the input line ? */
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+ : "memory"
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+ );
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+
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+
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+#elif defined __CPU_mips
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long tmp=0;
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asm volatile(
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@@ -32,7 +54,7 @@ int tsl(fl_lock_t* lock)
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" nop \n\t"
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".set reorder\n\t"
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: "=&r" (tmp), "=&r" (val), "=m" (*lock)
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- : "0" (tmp), "2" (*lock)
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+ : "2" (*lock)
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: "cc"
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);
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#elif defined __CPU_i386
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@@ -51,7 +73,15 @@ int tsl(fl_lock_t* lock)
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void release_lock(fl_lock_t* lock)
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{
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-#ifdef __CPU_mips
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+#ifdef __CPU_alpha
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+ asm volatile(
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+ " mb \n\t"
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+ " stl $31, %0 \n\t"
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+ : "=m"(*lock)
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+ :
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+ : "memory" /* because of the mb */
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+ );
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+#elif defined __CPU_mips
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int tmp;
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tmp=0;
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asm volatile(
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