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- 64 bit warnings fixed

Andrei Pelinescu-Onciul před 20 roky
rodič
revize
7a046e1dc1
2 změnil soubory, kde provedl 38 přidání a 8 odebrání
  1. 2 2
      modules/tm/t_fifo.c
  2. 36 6
      test/mips_lock.c

+ 2 - 2
modules/tm/t_fifo.c

@@ -594,11 +594,11 @@ static inline char* append2buf( char *buf, int len, struct sip_msg *req,
 			if (ha->sval.s) {
 				avp_name.s=&ha->sval;
 				avp = search_first_avp( AVP_NAME_STR, avp_name, &avp_val);
-				DBG("AVP <%.*s>: %x\n",avp_name.s->len,avp_name.s->s,(unsigned int)avp);
+				DBG("AVP <%.*s>: %p\n",avp_name.s->len,avp_name.s->s, avp);
 			} else {
 				avp_name.n=ha->ival;
 				avp = search_first_avp( 0, avp_name, &avp_val);
-				DBG("AVP <%i>: %x\n",avp_name.n,(unsigned int)avp);
+				DBG("AVP <%i>: %p\n",avp_name.n, avp);
 			}
 			if (avp) {
 				if (avp->flags&AVP_VAL_STR) {

+ 36 - 6
test/mips_lock.c

@@ -1,10 +1,12 @@
 /*
- *
+ * $Id$
+ * 
  *  simple locking test program
  *  (no paralles stuff)
  * 
- *  Compile with: gcc -D__CPU_i386 -O3 on x86 machines and
- *                gcc -mips2 -O2 -D__CPU_mips  on mips machines.
+ *  Compile with: gcc -D__CPU_i386 -O3 -o mips_lock on x86 machines and
+ *                gcc -mips2 -O2 -D__CPU_mips  -o mips_lock on mips machines.
+ *                gcc -O3 -D__CPU_alpha -o mips_lock on alphas
  *  -- andrei
  *
  *  
@@ -20,7 +22,27 @@ int tsl(fl_lock_t* lock)
 {
 	long val;
 	
-#ifdef __CPU_mips
+#ifdef __CPU_alpha
+	long tmp=0;
+	/* lock low bit set to 1 when the lock is hold and to 0 otherwise */
+	asm volatile(
+		"1:  ldl %0, %1   \n\t"
+		"    blbs %0, 2f  \n\t"  /* optimization if locked */
+		"    ldl_l %0, %1 \n\t"
+		"    blbs %0, 2f  \n\t" 
+		"    lda %2, 1    \n\t"  /* or: or $31, 1, %2 ??? */
+		"    stl_c %2, %1 \n\t"
+		"    beq %2, 1b   \n\t"
+		"    mb           \n\t"
+		"2:               \n\t"
+		:"=&r" (val), "=m"(*lock), "=r"(tmp)
+		:"1"(*lock)  /* warning on gcc 3.4: replace it with m or remove
+						it and use +m in the input line ? */
+		: "memory"
+	);
+				
+				
+#elif defined __CPU_mips
 	long tmp=0;
 	
 	asm volatile(
@@ -32,7 +54,7 @@ int tsl(fl_lock_t* lock)
 		"    nop \n\t"
 		".set reorder\n\t"
 		: "=&r" (tmp), "=&r" (val), "=m" (*lock) 
-		: "0" (tmp), "2" (*lock) 
+		: "2" (*lock) 
 		: "cc"
 	);
 #elif defined __CPU_i386
@@ -51,7 +73,15 @@ int tsl(fl_lock_t* lock)
 
 void release_lock(fl_lock_t* lock)
 {
-#ifdef __CPU_mips
+#ifdef __CPU_alpha
+	asm volatile(
+			"    mb          \n\t"
+			"    stl $31, %0 \n\t"
+			: "=m"(*lock)
+			:
+			: "memory"  /* because of the mb */
+			);  
+#elif defined __CPU_mips
 	int tmp;
 	tmp=0;
 	asm volatile(