fastlock.h 2.8 KB

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  1. /*
  2. * fast arhitecture specific locking
  3. *
  4. * $Id$
  5. *
  6. *
  7. *
  8. * Copyright (C) 2001-2003 Fhg Fokus
  9. *
  10. * This file is part of ser, a free SIP server.
  11. *
  12. * ser is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version
  16. *
  17. * For a license to use the ser software under conditions
  18. * other than those described here, or to purchase support for this
  19. * software, please contact iptel.org by e-mail at the following addresses:
  20. * [email protected]
  21. *
  22. * ser is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30. */
  31. #ifndef fastlock_h
  32. #define fastlock_h
  33. #include <sched.h>
  34. typedef volatile int fl_lock_t;
  35. #define init_lock( l ) (l)=0
  36. /*test and set lock, ret 1 if lock held by someone else, 0 otherwise*/
  37. inline static int tsl(fl_lock_t* lock)
  38. {
  39. int val;
  40. #ifdef __i386
  41. #ifdef NOSMP
  42. val=0;
  43. asm volatile(
  44. " btsl $0, %1 \n\t"
  45. " adcl $0, %0 \n\t"
  46. : "=q" (val), "=m" (*lock) : "0"(val) : "memory", "cc" /* "cc" */
  47. );
  48. #else
  49. val=1;
  50. asm volatile(
  51. " xchg %b1, %0" : "=q" (val), "=m" (*lock) : "0" (val) : "memory"
  52. );
  53. #endif /*NOSMP*/
  54. #elif defined __sparc
  55. asm volatile(
  56. "ldstub [%1], %0 \n\t"
  57. #ifndef NOSMP
  58. "membar #StoreStore | #StoreLoad \n\t"
  59. #endif
  60. : "=r"(val) : "r"(lock):"memory"
  61. );
  62. #elif defined __arm__
  63. asm volatile(
  64. "# here \n\t"
  65. "swpb %0, %1, [%2] \n\t"
  66. : "=r" (val)
  67. : "r"(1), "r" (lock) : "memory"
  68. );
  69. #else
  70. #error "unknown arhitecture"
  71. #endif
  72. return val;
  73. }
  74. inline static void get_lock(fl_lock_t* lock)
  75. {
  76. #ifdef ADAPTIVE_WAIT
  77. int i=ADAPTIVE_WAIT_LOOPS;
  78. #endif
  79. while(tsl(lock)){
  80. #ifdef BUSY_WAIT
  81. #elif defined ADAPTIVE_WAIT
  82. if (i>0) i--;
  83. else sched_yield();
  84. #else
  85. sched_yield();
  86. #endif
  87. }
  88. }
  89. inline static void release_lock(fl_lock_t* lock)
  90. {
  91. #ifdef __i386
  92. char val;
  93. val=0;
  94. asm volatile(
  95. " movb $0, (%0)" : /*no output*/ : "r"(lock): "memory"
  96. /*" xchg %b0, %1" : "=q" (val), "=m" (*lock) : "0" (val) : "memory"*/
  97. );
  98. #elif defined __sparc
  99. asm volatile(
  100. #ifndef NOSMP
  101. "membar #LoadStore | #StoreStore \n\t" /*is this really needed?*/
  102. #endif
  103. "stb %%g0, [%0] \n\t"
  104. : /*no output*/
  105. : "r" (lock)
  106. : "memory"
  107. );
  108. #elif defined __arm__
  109. asm volatile(
  110. " str %0, [%1] \n\r"
  111. : /*no outputs*/
  112. : "r"(0), "r"(lock)
  113. : "memory"
  114. );
  115. #else
  116. #error "unknown arhitecture"
  117. #endif
  118. }
  119. #endif