Yay that works

lib/DxilPIXPasses/DxilDebugInstrumentation.cpp

@@ -972,8 +972,9 @@ bool DxilDebugInstrumentation::runOnModule(Module &M) {
       }
     }
 
+    int NewBlockCounter = 0;
     for (auto &InsertableEdge : InsertableEdges) {
-      auto *NewBlock = BasicBlock::Create(Ctx, "PIXDebug",
+      auto *NewBlock = BasicBlock::Create(Ctx, "PIXDebug" + std::to_string(NewBlockCounter++),
                                           InsertableEdge.first->getParent());
       IRBuilder<> Builder(NewBlock);
 
@@ -1014,8 +1015,6 @@ bool DxilDebugInstrumentation::runOnModule(Module &M) {
 
       // Add a branch to the new block to point to the current block
       Builder.CreateBr(&CurrentBlock);
-
-      //CurrentBlock.removePredecessor(PreviousBlock);
     }
   }
 

tools/clang/test/HLSLFileCheck/pix/DebugPhis.hlsl

@@ -1,14 +0,0 @@
-// RUN: %dxc -EFlowControlPS -Tps_6_0 %s -Od | %opt -S -dxil-annotate-with-virtual-regs -hlsl-dxil-debug-instrumentation | %FileCheck %s
-
-// CHECK: oh for fucks sake
-
-float4 FlowControlPS(in uint value : value ) : SV_Target
-{
-  float4 ret = float4(0, 0, 0, 0);
-  if (value > 1) {
-    ret = float4(0, 0, 0, 2);
-  } else {
-    ret = float4(0, 0, 0, 1);
-  }
-  return ret;
-}

tools/clang/test/HLSLFileCheck/pix/DebugPhisFor.hlsl

@@ -0,0 +1,59 @@
+// RUN: %dxc -EForLoopPS -Tps_6_0 %s -Od | %opt -S -dxil-annotate-with-virtual-regs -hlsl-dxil-debug-instrumentation | %FileCheck %s
+
+// Ensure that the pass added at the begining of the for body:
+// CHECK: br label %PIXDebug
+// CHECK: br label %PIXDebug
+// CHECK: br label %PIXDebug
+
+// Followed by lots of new pix debug blocks:
+
+// CHECK: PIXDebug
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78
+// CHECK: br label
+
+// CHECK: PIXDebug
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78
+// CHECK: br label
+
+// CHECK: PIXDebug
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78
+// CHECK: br label
+
+// CHECK: PIXDebug
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78
+// CHECK: br label
+
+// CHECK: PIXDebug
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78
+// CHECK: br label
+
+
+struct VS_OUTPUT_ENV {
+  float4 Pos : SV_Position;
+  float2 Tex : TEXCOORD0;
+};
+
+uint i32;
+
+float4 ForLoopPS(VS_OUTPUT_ENV input) : SV_Target {
+  float4 ret = float4(0, 0, 0, 0);
+  for (uint i = 0; i < abs(input.Tex.x * 200); ++i) {
+    ret.x += (float)i32;
+    if (i + i32 == 0) {
+      break;
+    }
+    ret.y += (float)i32;
+    if (i + i32 == 1) {
+      continue;
+    }
+    ret.z += (float)i32;
+    if (i + i32 == 2) {
+      break;
+    }
+    ret.w += (float)i32;
+    if (i + i32 == 3) {
+      continue;
+    }
+  }
+  return ret;
+}

tools/clang/test/HLSLFileCheck/pix/DebugPhisIfElse.hlsl

@@ -0,0 +1,27 @@
+// RUN: %dxc -EFlowControlPS -Tps_6_0 %s -Od | %opt -S -dxil-annotate-with-virtual-regs -hlsl-dxil-debug-instrumentation | %FileCheck %s
+
+// Ensure that the pass added a block at the end of this if/else:
+// CHECK: br label %PIXDebug
+// CHECK: br label %PIXDebug
+
+// Check that block 0 emits some debug info and returns where we expect:
+// CHECK: PIXDebug
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78
+// CHECK: br label
+
+// Check that block 1 emits some debug info and returns where we expect:
+// CHECK: PIXDebug
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78
+// CHECK: br label
+
+
+float4 FlowControlPS(in uint value : value ) : SV_Target
+{
+  float4 ret = float4(0, 0, 0, 0);
+  if (value > 1) {
+    ret = float4(0, 0, 0, 2);
+  } else {
+    ret = float4(0, 0, 0, 1);
+  }
+  return ret;
+}

tools/clang/test/HLSLFileCheck/pix/DebugPhisSwicth.hlsl

@@ -0,0 +1,40 @@
+// RUN: %dxc -EFlowControlPS -Tps_6_0 %s -Od | %opt -S -dxil-annotate-with-virtual-regs -hlsl-dxil-debug-instrumentation | %FileCheck %s
+
+// Check for a branch to a new block for each case:
+// CHECK: br label %PIXDebug
+// CHECK: br label %PIXDebug
+// CHECK: br label %PIXDebug
+
+// Check that three PIXDebug blocks emit some debug info and returns where we expect:
+// CHECK: PIXDebug
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78
+// CHECK: br label
+
+// Check that three PIXDebug blocks emit some debug info and returns where we expect:
+// CHECK: PIXDebug
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78
+// CHECK: br label
+
+// Check that three PIXDebug blocks emit some debug info and returns where we expect:
+// CHECK: PIXDebug
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78
+// CHECK: br label
+
+
+float4 FlowControlPS(in uint value : value ) : SV_Target
+{
+  float4 ret = float4(0, 0, 0, 0);
+  switch (value)
+  {
+  case 0:
+    ret = float4(1, 0, 0, 0);
+    break;
+  case 1:
+    ret = float4(2, 0, 0, 0);
+    break;
+  default:
+    ret = float4(3, 0, 0, 0);
+    break;
+  }
+  return ret;
+}