Procházet zdrojové kódy

PIX shader access tracking: SM6.3 resource access overloads (#2172)

(finally) updating PIX's shader access tracking code to add the SM6.3 overloads of the various resource-access opcodes.
The new test passes on debug and release.
Jeff Noyle před 6 roky
rodič
revize
6679de6506

+ 4 - 4
lib/DxilPIXPasses/DxilShaderAccessTracking.cpp

@@ -465,11 +465,11 @@ bool DxilShaderAccessTracking::runOnModule(Module &M)
       { DXIL::OpCode::SampleCmpLevelZero    , ShaderAccessFlags::Read   , true , f16f32 },
       { DXIL::OpCode::SampleCmpLevelZero    , ShaderAccessFlags::Read   , true , f16f32 },
       { DXIL::OpCode::TextureLoad           , ShaderAccessFlags::Read   , false, f16f32i16i32 },
       { DXIL::OpCode::TextureLoad           , ShaderAccessFlags::Read   , false, f16f32i16i32 },
       { DXIL::OpCode::TextureStore          , ShaderAccessFlags::Write  , false, f16f32i16i32 },
       { DXIL::OpCode::TextureStore          , ShaderAccessFlags::Write  , false, f16f32i16i32 },
-      { DXIL::OpCode::TextureGather         , ShaderAccessFlags::Read   , true , f32i32 }, // todo: SM6: f16f32i16i32 },
-      { DXIL::OpCode::TextureGatherCmp      , ShaderAccessFlags::Read   , false, f32i32 }, // todo: SM6: f16f32i16i32 },
+      { DXIL::OpCode::TextureGather         , ShaderAccessFlags::Read   , true , f16f32i16i32 },
+      { DXIL::OpCode::TextureGatherCmp      , ShaderAccessFlags::Read   , false, f16f32i16i32 },
       { DXIL::OpCode::BufferLoad            , ShaderAccessFlags::Read   , false, f32i32 },
       { DXIL::OpCode::BufferLoad            , ShaderAccessFlags::Read   , false, f32i32 },
-      { DXIL::OpCode::RawBufferLoad         , ShaderAccessFlags::Read   , false, f32i32 },
-      { DXIL::OpCode::RawBufferStore        , ShaderAccessFlags::Write  , false, f32i32 },
+      { DXIL::OpCode::RawBufferLoad         , ShaderAccessFlags::Read   , false, f16f32i16i32 },
+      { DXIL::OpCode::RawBufferStore        , ShaderAccessFlags::Write  , false, f16f32i16i32 },
       { DXIL::OpCode::BufferStore           , ShaderAccessFlags::Write  , false, f32i32 },
       { DXIL::OpCode::BufferStore           , ShaderAccessFlags::Write  , false, f32i32 },
       { DXIL::OpCode::BufferUpdateCounter   , ShaderAccessFlags::Counter, false, voidType },
       { DXIL::OpCode::BufferUpdateCounter   , ShaderAccessFlags::Counter, false, voidType },
       { DXIL::OpCode::AtomicBinOp           , ShaderAccessFlags::Write  , false, i32 },
       { DXIL::OpCode::AtomicBinOp           , ShaderAccessFlags::Write  , false, i32 },

+ 47 - 0
tools/clang/test/CodeGenHLSL/batch/pix/rawBufferStore.hlsl

@@ -0,0 +1,47 @@
+// RUN: %dxc -enable-16bit-types -Emain -Tcs_6_3 %s | %opt -S -hlsl-dxil-pix-shader-access-instrumentation,config=U0:2:10i0;.. | %FileCheck %s
+
+// Check that the expected PIX UAV read-tracking is emitted (the atomicBinOp "|= 1") followed by the expected raw read:
+
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78, %dx.types.Handle %PIX_CountUAV_Handle, i32 2, i32 8, i32 undef, i32 undef, i32 1)
+// CHECK: call %dx.types.ResRet.f32 @dx.op.rawBufferLoad.f32
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78, %dx.types.Handle %PIX_CountUAV_Handle, i32 2, i32 8, i32 undef, i32 undef, i32 1)
+// CHECK: call %dx.types.ResRet.i32 @dx.op.rawBufferLoad.i32
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78, %dx.types.Handle %PIX_CountUAV_Handle, i32 2, i32 8, i32 undef, i32 undef, i32 1)
+// CHECK: call %dx.types.ResRet.f16 @dx.op.rawBufferLoad.f16
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78, %dx.types.Handle %PIX_CountUAV_Handle, i32 2, i32 8, i32 undef, i32 undef, i32 1)
+// CHECK: call %dx.types.ResRet.i16 @dx.op.rawBufferLoad.i16
+
+// Now the writes with atomicBinOp "|=2":
+
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78, %dx.types.Handle %PIX_CountUAV_Handle, i32 2, i32 8, i32 undef, i32 undef, i32 2)
+// CHECK: call void @dx.op.rawBufferStore.f32
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78, %dx.types.Handle %PIX_CountUAV_Handle, i32 2, i32 8, i32 undef, i32 undef, i32 2)
+// CHECK: call void @dx.op.rawBufferStore.i32
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78, %dx.types.Handle %PIX_CountUAV_Handle, i32 2, i32 8, i32 undef, i32 undef, i32 2)
+// CHECK: call void @dx.op.rawBufferStore.f16
+// CHECK: call i32 @dx.op.atomicBinOp.i32(i32 78, %dx.types.Handle %PIX_CountUAV_Handle, i32 2, i32 8, i32 undef, i32 undef, i32 2)
+// CHECK: call void @dx.op.rawBufferStore.i16
+
+struct S
+{
+    float4 f4;
+    int4 i4;
+    half hf;
+    min16int hi;
+};
+
+RWStructuredBuffer<S> structuredUAV: register(u0);
+
+[RootSignature(
+    "DescriptorTable(UAV(u0, numDescriptors = 1, space = 0, offset = DESCRIPTOR_RANGE_OFFSET_APPEND))"
+)]
+[numthreads(1, 1, 1)]
+void main()
+{
+    S s = structuredUAV[0];
+    s.f4 += float4(1, 1, 1, 1);
+    s.i4 += int4(1, 1, 1, 1);
+    s.hi += 2;
+    s.hf += 3.;
+    structuredUAV[0] = s;
+}