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+//===- DxilConditionalMem2Reg.cpp - Mem2Reg that selectively promotes Allocas ----===//
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+//
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+// The LLVM Compiler Infrastructure
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+//
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+// This file is distributed under the University of Illinois Open Source
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+// License. See LICENSE.TXT for details.
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+//
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+//===----------------------------------------------------------------------===//
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+
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+#include "llvm/Pass.h"
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+#include "llvm/Analysis/AssumptionCache.h"
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+#include "llvm/Transforms/Scalar.h"
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+#include "llvm/Transforms/Utils/PromoteMemToReg.h"
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+#include "llvm/IR/Instructions.h"
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+#include "llvm/IR/IntrinsicInst.h"
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+#include "llvm/IR/Dominators.h"
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+#include "llvm/IR/IRBuilder.h"
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+#include "llvm/Support/raw_ostream.h"
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+#include "llvm/Support/Debug.h"
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+#include "llvm/IR/LegacyPassManager.h"
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+
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+#include "dxc/DXIL/DxilUtil.h"
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+#include "dxc/HLSL/HLModule.h"
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+#include "llvm/Analysis/DxilValueCache.h"
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+
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+using namespace llvm;
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+using namespace hlsl;
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+
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+static bool ContainsFloatingPointType(Type *Ty) {
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+ if (Ty->isFloatingPointTy()) {
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+ return true;
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+ }
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+ else if (Ty->isArrayTy()) {
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+ return ContainsFloatingPointType(Ty->getArrayElementType());
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+ }
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+ else if (Ty->isVectorTy()) {
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+ return ContainsFloatingPointType(Ty->getVectorElementType());
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+ }
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+ else if (Ty->isStructTy()) {
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+ for (unsigned i = 0, NumStructElms = Ty->getStructNumElements(); i < NumStructElms; i++) {
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+ if (ContainsFloatingPointType(Ty->getStructElementType(i)))
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+ return true;
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+ }
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+ }
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+ return false;
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+}
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+
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+static bool Mem2Reg(Function &F, DominatorTree &DT, AssumptionCache &AC) {
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+ BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function
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+ bool Changed = false;
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+ std::vector<AllocaInst*> Allocas;
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+ while (1) {
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+ Allocas.clear();
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+
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+ // Find allocas that are safe to promote, by looking at all instructions in
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+ // the entry node
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+ for (BasicBlock::iterator I = BB.begin(), E = --BB.end(); I != E; ++I)
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+ if (AllocaInst *AI = dyn_cast<AllocaInst>(I)) // Is it an alloca?
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+ if (isAllocaPromotable(AI) &&
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+ (!HLModule::HasPreciseAttributeWithMetadata(AI) || !ContainsFloatingPointType(AI->getAllocatedType())))
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+ Allocas.push_back(AI);
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+
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+ if (Allocas.empty()) break;
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+
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+ PromoteMemToReg(Allocas, DT, nullptr, &AC);
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+ Changed = true;
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+ }
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+
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+ return Changed;
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+}
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+
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+//
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+// Special Mem2Reg pass that conditionally promotes or transforms Alloca's.
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+//
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+// Anything marked 'dx.precise', will not be promoted because precise markers
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+// are not propagated to the dxil operations yet and will be lost if alloca
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+// is removed right now.
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+//
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+// Precise Allocas of vectors get scalarized here. It's important we do that
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+// before Scalarizer pass because promoting the allocas later than that will
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+// produce vector phi's (disallowed by the validator), which need another
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+// Scalarizer pass to clean up.
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+//
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+class DxilConditionalMem2Reg : public FunctionPass {
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+public:
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+ static char ID;
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+
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+ // Function overrides that resolve options when used for DxOpt
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+ void applyOptions(PassOptions O) override {
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+ GetPassOptionBool(O, "NoOpt", &NoOpt, false);
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+ }
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+ void dumpConfig(raw_ostream &OS) override {
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+ FunctionPass::dumpConfig(OS);
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+ OS << ",NoOpt=" << NoOpt;
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+ }
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+
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+ bool NoOpt = false;
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+ explicit DxilConditionalMem2Reg(bool NoOpt=false) : FunctionPass(ID), NoOpt(NoOpt)
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+ {
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+ initializeDxilConditionalMem2RegPass(*PassRegistry::getPassRegistry());
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+ }
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+
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+ void getAnalysisUsage(AnalysisUsage &AU) const override {
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+ AU.addRequired<DominatorTreeWrapperPass>();
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+ AU.addRequired<AssumptionCacheTracker>();
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+ AU.setPreservesCFG();
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+ }
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+
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+ // Collect and remove all instructions that use AI, but
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+ // give up if there are anything other than store, bitcast,
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+ // memcpy, or GEP.
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+ static bool TryRemoveUnusedAlloca(AllocaInst *AI) {
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+ std::vector<Instruction *> WorkList;
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+
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+ WorkList.push_back(AI);
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+
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+ for (unsigned i = 0; i < WorkList.size(); i++) {
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+ Instruction *I = WorkList[i];
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+
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+ for (User *U : I->users()) {
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+ Instruction *UI = cast<Instruction>(U);
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+
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+ unsigned Opcode = UI->getOpcode();
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+ if (Opcode == Instruction::BitCast ||
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+ Opcode == Instruction::GetElementPtr ||
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+ Opcode == Instruction::Store)
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+ {
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+ WorkList.push_back(UI);
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+ }
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+ else if (MemCpyInst *MC = dyn_cast<MemCpyInst>(UI)) {
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+ if (MC->getSource() == I) { // MC reads from our alloca
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+ return false;
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+ }
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+ WorkList.push_back(UI);
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+ }
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+ else { // Load? PHINode? Assume read.
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+ return false;
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+ }
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+ }
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+ }
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+
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+ // Remove all instructions
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+ for (auto It = WorkList.rbegin(), E = WorkList.rend(); It != E; It++) {
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+ Instruction *I = *It;
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+ I->eraseFromParent();
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+ }
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+
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+ return true;
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+ }
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+
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+ static bool RemoveAllUnusedAllocas(Function &F) {
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+ std::vector<AllocaInst *> Allocas;
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+ BasicBlock &EntryBB = *F.begin();
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+ for (auto It = EntryBB.begin(), E = EntryBB.end(); It != E;) {
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+ Instruction &I = *(It++);
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+ if (AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
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+ Allocas.push_back(AI);
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+ }
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+ }
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+
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+ bool Changed = false;
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+ for (AllocaInst *AI : Allocas) {
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+ Changed |= TryRemoveUnusedAlloca(AI);
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+ }
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+
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+ return Changed;
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+ }
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+
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+ //
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+ // Turns all allocas of vector types that are marked with 'dx.precise'
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+ // and turn them into scalars. For example:
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+ //
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+ // x = alloca <f32 x 4> !dx.precise
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+ //
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+ // becomes:
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+ //
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+ // x1 = alloca f32 !dx.precise
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+ // x2 = alloca f32 !dx.precise
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+ // x3 = alloca f32 !dx.precise
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+ // x4 = alloca f32 !dx.precise
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+ //
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+ // This function also replaces all stores and loads but leaves everything
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+ // else alone by generating insertelement and extractelement as appropriate.
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+ //
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+ static bool ScalarizePreciseVectorAlloca(Function &F) {
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+ BasicBlock *Entry = &*F.begin();
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+
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+ bool Changed = false;
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+ for (auto it = Entry->begin(); it != Entry->end();) {
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+ Instruction *I = &*(it++);
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+ AllocaInst *AI = dyn_cast<AllocaInst>(I);
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+ if (!AI || !AI->getAllocatedType()->isVectorTy()) continue;
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+ if (!HLModule::HasPreciseAttributeWithMetadata(AI)) continue;
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+
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+
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+ IRBuilder<> B(AI);
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+ VectorType *VTy = cast<VectorType>(AI->getAllocatedType());
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+ Type *ScalarTy = VTy->getVectorElementType();
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+
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+ const unsigned VectorSize = VTy->getVectorNumElements();
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+ SmallVector<AllocaInst *, 32> Elements;
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+
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+ for (unsigned i = 0; i < VectorSize; i++) {
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+ AllocaInst *Elem = B.CreateAlloca(ScalarTy);
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+ hlsl::DxilMDHelper::CopyMetadata(*Elem, *AI);
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+ Elements.push_back(Elem);
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+ }
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+
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+ for (auto it = AI->user_begin(); it != AI->user_end();) {
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+ User *U = *(it++);
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+ if (LoadInst *LI = dyn_cast<LoadInst>(U)) {
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+ B.SetInsertPoint(LI);
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+ Value *Vec = UndefValue::get(VTy);
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+ for (unsigned i = 0; i < VectorSize; i++) {
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+ LoadInst *Elem = B.CreateLoad(Elements[i]);
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+ hlsl::DxilMDHelper::CopyMetadata(*Elem, *LI);
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+ Vec = B.CreateInsertElement(Vec, Elem, i);
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+ }
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+
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+ LI->replaceAllUsesWith(Vec);
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+ LI->eraseFromParent();
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+ }
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+ else if (StoreInst *Store = dyn_cast<StoreInst>(U)) {
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+ B.SetInsertPoint(Store);
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+ Value *Vec = Store->getValueOperand();
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+ for (unsigned i = 0; i < VectorSize; i++) {
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+ Value *Elem = B.CreateExtractElement(Vec, i);
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+ StoreInst *ElemStore = B.CreateStore(Elem, Elements[i]);
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+ hlsl::DxilMDHelper::CopyMetadata(*ElemStore, *Store);
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+ }
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+ Store->eraseFromParent();
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+ }
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+ else {
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+ llvm_unreachable("Cannot handle non-store/load on precise vector allocas");
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+ }
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+ }
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+
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+ AI->eraseFromParent();
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+ Changed = true;
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+ }
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+ return Changed;
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+ }
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+
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+ bool runOnFunction(Function &F) override {
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+
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+
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+ DominatorTree *DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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+ AssumptionCache *AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
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+
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+ bool Changed = false;
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+
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+ Changed |= RemoveAllUnusedAllocas(F);
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+ Changed |= ScalarizePreciseVectorAlloca(F);
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+ Changed |= Mem2Reg(F, *DT, *AC);
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+
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+ return Changed;
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+ }
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+};
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+char DxilConditionalMem2Reg::ID;
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+
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+Pass *llvm::createDxilConditionalMem2RegPass(bool NoOpt) {
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+ return new DxilConditionalMem2Reg(NoOpt);
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+}
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+
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+INITIALIZE_PASS_BEGIN(DxilConditionalMem2Reg, "dxil-cond-mem2reg", "Dxil Conditional Mem2Reg", false, false)
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+INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
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+INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
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+INITIALIZE_PASS_END(DxilConditionalMem2Reg, "dxil-cond-mem2reg", "Dxil Conditional Mem2Reg", false, false)
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Adam Yang