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+; RUN: %dxv %s | FileCheck %s
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+
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+; CHECK: Recursion is not permitted
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+; CHECK: with parameter is not permitted
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+
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+; This test originally covered two validator error messages:
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+; 1. recursion not allowed
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+; 2. functions with parameters are not allowed
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+;
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+; The recursion error is now handled earlier in the pipeline, and so there
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+; is no coverage for error #2. But we do need the validator to check for this
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+; in case someone decides to remove this. So instead, we validate the assembly
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+; we would have had, which we can generate with this command:
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+;
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+; dxc -Vd -T ps_6_0 recursive.hlsl
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+;
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+
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+; void test_inout(inout float4 m, float4 a) {
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+; if (a.x > 1)
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+; test_inout(m, a-1);
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+; m = abs(m+a*a.yxxx);
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+; }
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+;
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+; float4 main(float4 a : A, float4 b:B) : SV_TARGET {
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+; float4 x = b;
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+; test_inout(x, a);
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+; return x;
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+; }
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+
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+;
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+; Input signature:
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+;
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+; Name Index Mask Register SysValue Format Used
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+; -------------------- ----- ------ -------- -------- ------- ------
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+; A 0 xyzw 0 NONE float
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+; B 0 xyzw 1 NONE float
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+;
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+;
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+; Output signature:
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+;
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+; Name Index Mask Register SysValue Format Used
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+; -------------------- ----- ------ -------- -------- ------- ------
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+; SV_Target 0 xyzw 0 TARGET float xyzw
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+;
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+;
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+; Pipeline Runtime Information:
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+;
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+; Pixel Shader
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+; DepthOutput=0
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+; SampleFrequency=0
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+;
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+;
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+; Input signature:
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+;
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+; Name Index InterpMode
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+; -------------------- ----- ----------------------
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+; A 0 linear
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+; B 0 linear
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+;
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+; Output signature:
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+;
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+; Name Index InterpMode
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+; -------------------- ----- ----------------------
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+; SV_Target 0
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+;
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+; Buffer Definitions:
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+;
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+;
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+; Resource Bindings:
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+;
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+; Name Type Format Dim ID HLSL Bind Count
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+; ------------------------------ ---------- ------- ----------- ------- -------------- ------
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+;
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+target datalayout = "e-m:e-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
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+target triple = "dxil-ms-dx"
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+
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+; Function Attrs: alwaysinline nounwind
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+define internal fastcc void @"\01?test_inout@@YAXAAV?$vector@M$03@@V1@@Z"(<4 x float>* nocapture dereferenceable(16) %m, <4 x float> %a) #0 {
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+entry:
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+ %a.i0 = extractelement <4 x float> %a, i32 0
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+ %a.i1 = extractelement <4 x float> %a, i32 1
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+ %a.i2 = extractelement <4 x float> %a, i32 2
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+ %a.i3 = extractelement <4 x float> %a, i32 3
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+ %0 = load <4 x float>, <4 x float>* %m, align 4
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+ %.i05 = extractelement <4 x float> %0, i32 0
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+ %.i16 = extractelement <4 x float> %0, i32 1
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+ %.i27 = extractelement <4 x float> %0, i32 2
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+ %.i38 = extractelement <4 x float> %0, i32 3
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+ %1 = alloca <4 x float>, align 4
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+ %cmp = fcmp ogt float %a.i0, 1.000000e+00
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+ br i1 %cmp, label %if.then, label %if.end
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+
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+if.then: ; preds = %entry
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+ store <4 x float> %0, <4 x float>* %1, align 4
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+ %sub.i0 = fadd float %a.i0, -1.000000e+00
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+ %sub.i1 = fadd float %a.i1, -1.000000e+00
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+ %sub.i2 = fadd float %a.i2, -1.000000e+00
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+ %sub.i3 = fadd float %a.i3, -1.000000e+00
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+ %sub.upto0 = insertelement <4 x float> undef, float %sub.i0, i32 0
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+ %sub.upto1 = insertelement <4 x float> %sub.upto0, float %sub.i1, i32 1
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+ %sub.upto2 = insertelement <4 x float> %sub.upto1, float %sub.i2, i32 2
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+ %sub = insertelement <4 x float> %sub.upto2, float %sub.i3, i32 3
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+ call fastcc void @"\01?test_inout@@YAXAAV?$vector@M$03@@V1@@Z"(<4 x float>* nonnull dereferenceable(16) %1, <4 x float> %sub)
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+ %2 = load <4 x float>, <4 x float>* %1, align 4
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+ %.i0 = extractelement <4 x float> %2, i32 0
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+ %.i1 = extractelement <4 x float> %2, i32 1
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+ %.i2 = extractelement <4 x float> %2, i32 2
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+ %.i3 = extractelement <4 x float> %2, i32 3
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+ br label %if.end
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+
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+if.end: ; preds = %if.then, %entry
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+ %.0.i0 = phi float [ %.i0, %if.then ], [ %.i05, %entry ]
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+ %.0.i1 = phi float [ %.i1, %if.then ], [ %.i16, %entry ]
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+ %.0.i2 = phi float [ %.i2, %if.then ], [ %.i27, %entry ]
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+ %.0.i3 = phi float [ %.i3, %if.then ], [ %.i38, %entry ]
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+ %mul.i0 = fmul float %a.i0, %a.i1
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+ %mul.i2 = fmul float %a.i2, %a.i0
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+ %mul.i3 = fmul float %a.i3, %a.i0
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+ %add.i0 = fadd float %mul.i0, %.0.i0
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+ %add.i1 = fadd float %mul.i0, %.0.i1
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+ %add.i2 = fadd float %mul.i2, %.0.i2
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+ %add.i3 = fadd float %mul.i3, %.0.i3
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+ %FAbs = call float @dx.op.unary.f32(i32 6, float %add.i0) ; FAbs(value)
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+ %3 = insertelement <4 x float> undef, float %FAbs, i64 0
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+ %FAbs2 = call float @dx.op.unary.f32(i32 6, float %add.i1) ; FAbs(value)
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+ %4 = insertelement <4 x float> %3, float %FAbs2, i64 1
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+ %FAbs3 = call float @dx.op.unary.f32(i32 6, float %add.i2) ; FAbs(value)
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+ %5 = insertelement <4 x float> %4, float %FAbs3, i64 2
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+ %FAbs4 = call float @dx.op.unary.f32(i32 6, float %add.i3) ; FAbs(value)
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+ %6 = insertelement <4 x float> %5, float %FAbs4, i64 3
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+ store <4 x float> %6, <4 x float>* %m, align 4
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+ ret void
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+}
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+
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+define void @main() {
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+entry:
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+ %0 = call float @dx.op.loadInput.f32(i32 4, i32 1, i32 0, i8 0, i32 undef) ; LoadInput(inputSigId,rowIndex,colIndex,gsVertexAxis)
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+ %1 = insertelement <4 x float> undef, float %0, i64 0
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+ %2 = call float @dx.op.loadInput.f32(i32 4, i32 1, i32 0, i8 1, i32 undef) ; LoadInput(inputSigId,rowIndex,colIndex,gsVertexAxis)
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+ %3 = insertelement <4 x float> %1, float %2, i64 1
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+ %4 = call float @dx.op.loadInput.f32(i32 4, i32 1, i32 0, i8 2, i32 undef) ; LoadInput(inputSigId,rowIndex,colIndex,gsVertexAxis)
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+ %5 = insertelement <4 x float> %3, float %4, i64 2
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+ %6 = call float @dx.op.loadInput.f32(i32 4, i32 1, i32 0, i8 3, i32 undef) ; LoadInput(inputSigId,rowIndex,colIndex,gsVertexAxis)
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+ %7 = insertelement <4 x float> %5, float %6, i64 3
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+ %8 = call float @dx.op.loadInput.f32(i32 4, i32 0, i32 0, i8 0, i32 undef) ; LoadInput(inputSigId,rowIndex,colIndex,gsVertexAxis)
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+ %9 = insertelement <4 x float> undef, float %8, i64 0
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+ %10 = call float @dx.op.loadInput.f32(i32 4, i32 0, i32 0, i8 1, i32 undef) ; LoadInput(inputSigId,rowIndex,colIndex,gsVertexAxis)
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+ %11 = insertelement <4 x float> %9, float %10, i64 1
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+ %12 = call float @dx.op.loadInput.f32(i32 4, i32 0, i32 0, i8 2, i32 undef) ; LoadInput(inputSigId,rowIndex,colIndex,gsVertexAxis)
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+ %13 = insertelement <4 x float> %11, float %12, i64 2
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+ %14 = call float @dx.op.loadInput.f32(i32 4, i32 0, i32 0, i8 3, i32 undef) ; LoadInput(inputSigId,rowIndex,colIndex,gsVertexAxis)
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+ %15 = insertelement <4 x float> %13, float %14, i64 3
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+ %16 = alloca <4 x float>, align 4
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+ store <4 x float> %7, <4 x float>* %16, align 4
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+ call fastcc void @"\01?test_inout@@YAXAAV?$vector@M$03@@V1@@Z"(<4 x float>* nonnull dereferenceable(16) %16, <4 x float> %15)
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+ %17 = load <4 x float>, <4 x float>* %16, align 4
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+ %18 = extractelement <4 x float> %17, i64 0
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+ call void @dx.op.storeOutput.f32(i32 5, i32 0, i32 0, i8 0, float %18) ; StoreOutput(outputtSigId,rowIndex,colIndex,value)
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+ %19 = extractelement <4 x float> %17, i64 1
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+ call void @dx.op.storeOutput.f32(i32 5, i32 0, i32 0, i8 1, float %19) ; StoreOutput(outputtSigId,rowIndex,colIndex,value)
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+ %20 = extractelement <4 x float> %17, i64 2
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+ call void @dx.op.storeOutput.f32(i32 5, i32 0, i32 0, i8 2, float %20) ; StoreOutput(outputtSigId,rowIndex,colIndex,value)
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+ %21 = extractelement <4 x float> %17, i64 3
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+ call void @dx.op.storeOutput.f32(i32 5, i32 0, i32 0, i8 3, float %21) ; StoreOutput(outputtSigId,rowIndex,colIndex,value)
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+ ret void
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+}
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+
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+; Function Attrs: nounwind readnone
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+declare float @dx.op.loadInput.f32(i32, i32, i32, i8, i32) #1
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+
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+; Function Attrs: nounwind
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+declare void @dx.op.storeOutput.f32(i32, i32, i32, i8, float) #2
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+
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+; Function Attrs: nounwind readnone
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+declare float @dx.op.unary.f32(i32, float) #1
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+
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+attributes #0 = { alwaysinline nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" }
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+attributes #1 = { nounwind readnone }
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+attributes #2 = { nounwind }
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+
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+!llvm.ident = !{!0}
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+!dx.version = !{!1}
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+!dx.shaderModel = !{!2}
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+!dx.typeAnnotations = !{!3}
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+!dx.entryPoints = !{!12}
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+
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+!0 = !{!"clang version 3.7 (tags/RELEASE_370/final)"}
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+!1 = !{i32 1, i32 0}
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+!2 = !{!"ps", i32 6, i32 0}
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+!3 = !{i32 1, void (<4 x float>*, <4 x float>)* @"\01?test_inout@@YAXAAV?$vector@M$03@@V1@@Z", !4, void ()* @main, !10}
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+!4 = !{!5, !7, !9}
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+!5 = !{i32 1, !6, !6}
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+!6 = !{}
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+!7 = !{i32 2, !8, !6}
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+!8 = !{i32 7, i32 9}
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+!9 = !{i32 0, !8, !6}
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+!10 = !{!11}
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+!11 = !{i32 0, !6, !6}
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+!12 = !{void ()* @main, !"main", !13, null, null}
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+!13 = !{!14, !18, null}
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+!14 = !{!15, !17}
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+!15 = !{i32 0, !"A", i8 9, i8 0, !16, i8 2, i32 1, i8 4, i32 0, i8 0, null}
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+!16 = !{i32 0}
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+!17 = !{i32 1, !"B", i8 9, i8 0, !16, i8 2, i32 1, i8 4, i32 1, i8 0, null}
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+!18 = !{!19}
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+!19 = !{i32 0, !"SV_Target", i8 9, i8 16, !16, i8 0, i32 1, i8 4, i32 0, i8 0, null}
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