ExtendingLLVM.rst 12 KB

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  1. ============================================================
  2. Extending LLVM: Adding instructions, intrinsics, types, etc.
  3. ============================================================
  4. Introduction and Warning
  5. ========================
  6. During the course of using LLVM, you may wish to customize it for your research
  7. project or for experimentation. At this point, you may realize that you need to
  8. add something to LLVM, whether it be a new fundamental type, a new intrinsic
  9. function, or a whole new instruction.
  10. When you come to this realization, stop and think. Do you really need to extend
  11. LLVM? Is it a new fundamental capability that LLVM does not support at its
  12. current incarnation or can it be synthesized from already pre-existing LLVM
  13. elements? If you are not sure, ask on the `LLVM-dev
  14. <http://lists.llvm.org/mailman/listinfo/llvm-dev>`_ list. The reason is that
  15. extending LLVM will get involved as you need to update all the different passes
  16. that you intend to use with your extension, and there are ``many`` LLVM analyses
  17. and transformations, so it may be quite a bit of work.
  18. Adding an `intrinsic function`_ is far easier than adding an
  19. instruction, and is transparent to optimization passes. If your added
  20. functionality can be expressed as a function call, an intrinsic function is the
  21. method of choice for LLVM extension.
  22. Before you invest a significant amount of effort into a non-trivial extension,
  23. **ask on the list** if what you are looking to do can be done with
  24. already-existing infrastructure, or if maybe someone else is already working on
  25. it. You will save yourself a lot of time and effort by doing so.
  26. .. _intrinsic function:
  27. Adding a new intrinsic function
  28. ===============================
  29. Adding a new intrinsic function to LLVM is much easier than adding a new
  30. instruction. Almost all extensions to LLVM should start as an intrinsic
  31. function and then be turned into an instruction if warranted.
  32. #. ``llvm/docs/LangRef.html``:
  33. Document the intrinsic. Decide whether it is code generator specific and
  34. what the restrictions are. Talk to other people about it so that you are
  35. sure it's a good idea.
  36. #. ``llvm/include/llvm/IR/Intrinsics*.td``:
  37. Add an entry for your intrinsic. Describe its memory access characteristics
  38. for optimization (this controls whether it will be DCE'd, CSE'd, etc). Note
  39. that any intrinsic using the ``llvm_int_ty`` type for an argument will
  40. be deemed by ``tblgen`` as overloaded and the corresponding suffix will
  41. be required on the intrinsic's name.
  42. #. ``llvm/lib/Analysis/ConstantFolding.cpp``:
  43. If it is possible to constant fold your intrinsic, add support to it in the
  44. ``canConstantFoldCallTo`` and ``ConstantFoldCall`` functions.
  45. #. ``llvm/test/*``:
  46. Add test cases for your test cases to the test suite
  47. Once the intrinsic has been added to the system, you must add code generator
  48. support for it. Generally you must do the following steps:
  49. Add support to the .td file for the target(s) of your choice in
  50. ``lib/Target/*/*.td``.
  51. This is usually a matter of adding a pattern to the .td file that matches the
  52. intrinsic, though it may obviously require adding the instructions you want to
  53. generate as well. There are lots of examples in the PowerPC and X86 backend
  54. to follow.
  55. Adding a new SelectionDAG node
  56. ==============================
  57. As with intrinsics, adding a new SelectionDAG node to LLVM is much easier than
  58. adding a new instruction. New nodes are often added to help represent
  59. instructions common to many targets. These nodes often map to an LLVM
  60. instruction (add, sub) or intrinsic (byteswap, population count). In other
  61. cases, new nodes have been added to allow many targets to perform a common task
  62. (converting between floating point and integer representation) or capture more
  63. complicated behavior in a single node (rotate).
  64. #. ``include/llvm/CodeGen/ISDOpcodes.h``:
  65. Add an enum value for the new SelectionDAG node.
  66. #. ``lib/CodeGen/SelectionDAG/SelectionDAG.cpp``:
  67. Add code to print the node to ``getOperationName``. If your new node can be
  68. evaluated at compile time when given constant arguments (such as an add of a
  69. constant with another constant), find the ``getNode`` method that takes the
  70. appropriate number of arguments, and add a case for your node to the switch
  71. statement that performs constant folding for nodes that take the same number
  72. of arguments as your new node.
  73. #. ``lib/CodeGen/SelectionDAG/LegalizeDAG.cpp``:
  74. Add code to `legalize, promote, and expand
  75. <CodeGenerator.html#selectiondag_legalize>`_ the node as necessary. At a
  76. minimum, you will need to add a case statement for your node in
  77. ``LegalizeOp`` which calls LegalizeOp on the node's operands, and returns a
  78. new node if any of the operands changed as a result of being legalized. It
  79. is likely that not all targets supported by the SelectionDAG framework will
  80. natively support the new node. In this case, you must also add code in your
  81. node's case statement in ``LegalizeOp`` to Expand your node into simpler,
  82. legal operations. The case for ``ISD::UREM`` for expanding a remainder into
  83. a divide, multiply, and a subtract is a good example.
  84. #. ``lib/CodeGen/SelectionDAG/LegalizeDAG.cpp``:
  85. If targets may support the new node being added only at certain sizes, you
  86. will also need to add code to your node's case statement in ``LegalizeOp``
  87. to Promote your node's operands to a larger size, and perform the correct
  88. operation. You will also need to add code to ``PromoteOp`` to do this as
  89. well. For a good example, see ``ISD::BSWAP``, which promotes its operand to
  90. a wider size, performs the byteswap, and then shifts the correct bytes right
  91. to emulate the narrower byteswap in the wider type.
  92. #. ``lib/CodeGen/SelectionDAG/LegalizeDAG.cpp``:
  93. Add a case for your node in ``ExpandOp`` to teach the legalizer how to
  94. perform the action represented by the new node on a value that has been split
  95. into high and low halves. This case will be used to support your node with a
  96. 64 bit operand on a 32 bit target.
  97. #. ``lib/CodeGen/SelectionDAG/DAGCombiner.cpp``:
  98. If your node can be combined with itself, or other existing nodes in a
  99. peephole-like fashion, add a visit function for it, and call that function
  100. from. There are several good examples for simple combines you can do;
  101. ``visitFABS`` and ``visitSRL`` are good starting places.
  102. #. ``lib/Target/PowerPC/PPCISelLowering.cpp``:
  103. Each target has an implementation of the ``TargetLowering`` class, usually in
  104. its own file (although some targets include it in the same file as the
  105. DAGToDAGISel). The default behavior for a target is to assume that your new
  106. node is legal for all types that are legal for that target. If this target
  107. does not natively support your node, then tell the target to either Promote
  108. it (if it is supported at a larger type) or Expand it. This will cause the
  109. code you wrote in ``LegalizeOp`` above to decompose your new node into other
  110. legal nodes for this target.
  111. #. ``lib/Target/TargetSelectionDAG.td``:
  112. Most current targets supported by LLVM generate code using the DAGToDAG
  113. method, where SelectionDAG nodes are pattern matched to target-specific
  114. nodes, which represent individual instructions. In order for the targets to
  115. match an instruction to your new node, you must add a def for that node to
  116. the list in this file, with the appropriate type constraints. Look at
  117. ``add``, ``bswap``, and ``fadd`` for examples.
  118. #. ``lib/Target/PowerPC/PPCInstrInfo.td``:
  119. Each target has a tablegen file that describes the target's instruction set.
  120. For targets that use the DAGToDAG instruction selection framework, add a
  121. pattern for your new node that uses one or more target nodes. Documentation
  122. for this is a bit sparse right now, but there are several decent examples.
  123. See the patterns for ``rotl`` in ``PPCInstrInfo.td``.
  124. #. TODO: document complex patterns.
  125. #. ``llvm/test/CodeGen/*``:
  126. Add test cases for your new node to the test suite.
  127. ``llvm/test/CodeGen/X86/bswap.ll`` is a good example.
  128. Adding a new instruction
  129. ========================
  130. .. warning::
  131. Adding instructions changes the bitcode format, and it will take some effort
  132. to maintain compatibility with the previous version. Only add an instruction
  133. if it is absolutely necessary.
  134. #. ``llvm/include/llvm/IR/Instruction.def``:
  135. add a number for your instruction and an enum name
  136. #. ``llvm/include/llvm/IR/Instructions.h``:
  137. add a definition for the class that will represent your instruction
  138. #. ``llvm/include/llvm/IR/InstVisitor.h``:
  139. add a prototype for a visitor to your new instruction type
  140. #. ``llvm/lib/AsmParser/LLLexer.cpp``:
  141. add a new token to parse your instruction from assembly text file
  142. #. ``llvm/lib/AsmParser/LLParser.cpp``:
  143. add the grammar on how your instruction can be read and what it will
  144. construct as a result
  145. #. ``llvm/lib/Bitcode/Reader/BitcodeReader.cpp``:
  146. add a case for your instruction and how it will be parsed from bitcode
  147. #. ``llvm/lib/Bitcode/Writer/BitcodeWriter.cpp``:
  148. add a case for your instruction and how it will be parsed from bitcode
  149. #. ``llvm/lib/IR/Instruction.cpp``:
  150. add a case for how your instruction will be printed out to assembly
  151. #. ``llvm/lib/IR/Instructions.cpp``:
  152. implement the class you defined in ``llvm/include/llvm/Instructions.h``
  153. #. Test your instruction
  154. #. ``llvm/lib/Target/*``:
  155. add support for your instruction to code generators, or add a lowering pass.
  156. #. ``llvm/test/*``:
  157. add your test cases to the test suite.
  158. Also, you need to implement (or modify) any analyses or passes that you want to
  159. understand this new instruction.
  160. Adding a new type
  161. =================
  162. .. warning::
  163. Adding new types changes the bitcode format, and will break compatibility with
  164. currently-existing LLVM installations. Only add new types if it is absolutely
  165. necessary.
  166. Adding a fundamental type
  167. -------------------------
  168. #. ``llvm/include/llvm/IR/Type.h``:
  169. add enum for the new type; add static ``Type*`` for this type
  170. #. ``llvm/lib/IR/Type.cpp`` and ``llvm/lib/IR/ValueTypes.cpp``:
  171. add mapping from ``TypeID`` => ``Type*``; initialize the static ``Type*``
  172. #. ``llvm/llvm/llvm-c/Core.cpp``:
  173. add enum ``LLVMTypeKind`` and modify
  174. ``LLVMTypeKind LLVMGetTypeKind(LLVMTypeRef Ty)`` for the new type
  175. #. ``llvm/include/llvm/IR/TypeBuilder.h``:
  176. add new class to represent new type in the hierarchy
  177. #. ``llvm/lib/AsmParser/LLLexer.cpp``:
  178. add ability to parse in the type from text assembly
  179. #. ``llvm/lib/AsmParser/LLParser.cpp``:
  180. add a token for that type
  181. #. ``llvm/lib/Bitcode/Writer/BitcodeWriter.cpp``:
  182. modify ``static void WriteTypeTable(const ValueEnumerator &VE,
  183. BitstreamWriter &Stream)`` to serialize your type
  184. #. ``llvm/lib/Bitcode/Reader/BitcodeReader.cpp``:
  185. modify ``bool BitcodeReader::ParseTypeType()`` to read your data type
  186. #. ``include/llvm/Bitcode/LLVMBitCodes.h``:
  187. add enum ``TypeCodes`` for the new type
  188. Adding a derived type
  189. ---------------------
  190. #. ``llvm/include/llvm/IR/Type.h``:
  191. add enum for the new type; add a forward declaration of the type also
  192. #. ``llvm/include/llvm/IR/DerivedTypes.h``:
  193. add new class to represent new class in the hierarchy; add forward
  194. declaration to the TypeMap value type
  195. #. ``llvm/lib/IR/Type.cpp`` and ``llvm/lib/IR/ValueTypes.cpp``:
  196. add support for derived type, notably `enum TypeID` and `is`, `get` methods.
  197. #. ``llvm/llvm/llvm-c/Core.cpp``:
  198. add enum ``LLVMTypeKind`` and modify
  199. `LLVMTypeKind LLVMGetTypeKind(LLVMTypeRef Ty)` for the new type
  200. #. ``llvm/include/llvm/IR/TypeBuilder.h``:
  201. add new class to represent new class in the hierarchy
  202. #. ``llvm/lib/AsmParser/LLLexer.cpp``:
  203. modify ``lltok::Kind LLLexer::LexIdentifier()`` to add ability to
  204. parse in the type from text assembly
  205. #. ``llvm/lib/Bitcode/Writer/BitcodeWriter.cpp``:
  206. modify ``static void WriteTypeTable(const ValueEnumerator &VE,
  207. BitstreamWriter &Stream)`` to serialize your type
  208. #. ``llvm/lib/Bitcode/Reader/BitcodeReader.cpp``:
  209. modify ``bool BitcodeReader::ParseTypeType()`` to read your data type
  210. #. ``include/llvm/Bitcode/LLVMBitCodes.h``:
  211. add enum ``TypeCodes`` for the new type
  212. #. ``llvm/lib/IR/AsmWriter.cpp``:
  213. modify ``void TypePrinting::print(Type *Ty, raw_ostream &OS)``
  214. to output the new derived type