aligned-altivec.ll 3.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131
  1. ; RUN: opt -S -instcombine < %s | FileCheck %s
  2. target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
  3. target triple = "powerpc64-unknown-linux-gnu"
  4. declare <4 x i32> @llvm.ppc.altivec.lvx(i8*) #1
  5. define <4 x i32> @test1(<4 x i32>* %h) #0 {
  6. entry:
  7. %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
  8. %hv = bitcast <4 x i32>* %h1 to i8*
  9. %vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv)
  10. ; CHECK-LABEL: @test1
  11. ; CHECK: @llvm.ppc.altivec.lvx
  12. ; CHECK: ret <4 x i32>
  13. %v0 = load <4 x i32>, <4 x i32>* %h, align 8
  14. %a = add <4 x i32> %v0, %vl
  15. ret <4 x i32> %a
  16. }
  17. define <4 x i32> @test1a(<4 x i32>* align 16 %h) #0 {
  18. entry:
  19. %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
  20. %hv = bitcast <4 x i32>* %h1 to i8*
  21. %vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv)
  22. ; CHECK-LABEL: @test1a
  23. ; CHECK-NOT: @llvm.ppc.altivec.lvx
  24. ; CHECK: ret <4 x i32>
  25. %v0 = load <4 x i32>, <4 x i32>* %h, align 8
  26. %a = add <4 x i32> %v0, %vl
  27. ret <4 x i32> %a
  28. }
  29. declare void @llvm.ppc.altivec.stvx(<4 x i32>, i8*) #0
  30. define <4 x i32> @test2(<4 x i32>* %h, <4 x i32> %d) #0 {
  31. entry:
  32. %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
  33. %hv = bitcast <4 x i32>* %h1 to i8*
  34. call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv)
  35. %v0 = load <4 x i32>, <4 x i32>* %h, align 8
  36. ret <4 x i32> %v0
  37. ; CHECK-LABEL: @test2
  38. ; CHECK: @llvm.ppc.altivec.stvx
  39. ; CHECK: ret <4 x i32>
  40. }
  41. define <4 x i32> @test2a(<4 x i32>* align 16 %h, <4 x i32> %d) #0 {
  42. entry:
  43. %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
  44. %hv = bitcast <4 x i32>* %h1 to i8*
  45. call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv)
  46. %v0 = load <4 x i32>, <4 x i32>* %h, align 8
  47. ret <4 x i32> %v0
  48. ; CHECK-LABEL: @test2
  49. ; CHECK-NOT: @llvm.ppc.altivec.stvx
  50. ; CHECK: ret <4 x i32>
  51. }
  52. declare <4 x i32> @llvm.ppc.altivec.lvxl(i8*) #1
  53. define <4 x i32> @test1l(<4 x i32>* %h) #0 {
  54. entry:
  55. %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
  56. %hv = bitcast <4 x i32>* %h1 to i8*
  57. %vl = call <4 x i32> @llvm.ppc.altivec.lvxl(i8* %hv)
  58. ; CHECK-LABEL: @test1l
  59. ; CHECK: @llvm.ppc.altivec.lvxl
  60. ; CHECK: ret <4 x i32>
  61. %v0 = load <4 x i32>, <4 x i32>* %h, align 8
  62. %a = add <4 x i32> %v0, %vl
  63. ret <4 x i32> %a
  64. }
  65. define <4 x i32> @test1la(<4 x i32>* align 16 %h) #0 {
  66. entry:
  67. %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
  68. %hv = bitcast <4 x i32>* %h1 to i8*
  69. %vl = call <4 x i32> @llvm.ppc.altivec.lvxl(i8* %hv)
  70. ; CHECK-LABEL: @test1la
  71. ; CHECK-NOT: @llvm.ppc.altivec.lvxl
  72. ; CHECK: ret <4 x i32>
  73. %v0 = load <4 x i32>, <4 x i32>* %h, align 8
  74. %a = add <4 x i32> %v0, %vl
  75. ret <4 x i32> %a
  76. }
  77. declare void @llvm.ppc.altivec.stvxl(<4 x i32>, i8*) #0
  78. define <4 x i32> @test2l(<4 x i32>* %h, <4 x i32> %d) #0 {
  79. entry:
  80. %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
  81. %hv = bitcast <4 x i32>* %h1 to i8*
  82. call void @llvm.ppc.altivec.stvxl(<4 x i32> %d, i8* %hv)
  83. %v0 = load <4 x i32>, <4 x i32>* %h, align 8
  84. ret <4 x i32> %v0
  85. ; CHECK-LABEL: @test2l
  86. ; CHECK: @llvm.ppc.altivec.stvxl
  87. ; CHECK: ret <4 x i32>
  88. }
  89. define <4 x i32> @test2la(<4 x i32>* align 16 %h, <4 x i32> %d) #0 {
  90. entry:
  91. %h1 = getelementptr <4 x i32>, <4 x i32>* %h, i64 1
  92. %hv = bitcast <4 x i32>* %h1 to i8*
  93. call void @llvm.ppc.altivec.stvxl(<4 x i32> %d, i8* %hv)
  94. %v0 = load <4 x i32>, <4 x i32>* %h, align 8
  95. ret <4 x i32> %v0
  96. ; CHECK-LABEL: @test2l
  97. ; CHECK-NOT: @llvm.ppc.altivec.stvxl
  98. ; CHECK: ret <4 x i32>
  99. }
  100. attributes #0 = { nounwind }
  101. attributes #1 = { nounwind readonly }