Home Explore Help
Sign In
O3DE
/
DirectXShaderCompiler
mirror of https://github.com/o3de/DirectXShaderCompiler
2
0
Fork 0
Files Issues 0 Wiki
Branch: master
Branches Tags
DirectXShaderCo...
/
test
/
CodeGen
/
NVPTX
/
surf-write-cuda.ll

surf-write-cuda.ll 1.5 KB
Permalink History Raw

123456789101112131415161718192021222324252627282930313233343536373839404142 
  1. ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=SM20
    2. 

  2. ; RUN: llc < %s -march=nvptx -mcpu=sm_30 | FileCheck %s --check-prefix=SM30
    3. 

  3. 

  4. target triple = "nvptx-unknown-cuda"
    5. 

  5. 

  6. declare void @llvm.nvvm.sust.b.1d.i32.trap(i64, i32, i32)
    7. 

  7. declare i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)*)
    8. 

  8. 

  9. 

  10. ; SM20-LABEL: .entry foo
    11. 

  11. ; SM30-LABEL: .entry foo
    12. 

  12. define void @foo(i64 %img, i32 %val, i32 %idx) {
    13. 

  13. ; SM20: ld.param.u64    %rd[[SURFREG:[0-9]+]], [foo_param_0];
    14. 

  14. ; SM20: sust.b.1d.b32.trap [%rd[[SURFREG]], {%r{{[0-9]+}}}], {%r{{[0-9]+}}}
    15. 

  15. ; SM30: ld.param.u64    %rd[[SURFREG:[0-9]+]], [foo_param_0];
    16. 

  16. ; SM30: sust.b.1d.b32.trap [%rd[[SURFREG]], {%r{{[0-9]+}}}], {%r{{[0-9]+}}}
    17. 

  17.   tail call void @llvm.nvvm.sust.b.1d.i32.trap(i64 %img, i32 %idx, i32 %val)
    18. 

  18.   ret void
    19. 

  19. }
    20. 

  20. 

  21. 

  22. @surf0 = internal addrspace(1) global i64 0, align 8
    23. 

  23. 

  24. 

  25. 

  26. ; SM20-LABEL: .entry bar
    27. 

  27. ; SM30-LABEL: .entry bar
    28. 

  28. define void @bar(i32 %val, i32 %idx) {
    29. 

  29. ; SM30: mov.u64 %rd[[SURFHANDLE:[0-9]+]], surf0
    30. 

  30.   %surfHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @surf0)
    31. 

  31. ; SM20: sust.b.1d.b32.trap [surf0, {%r{{[0-9]+}}}], {%r{{[0-9]+}}}
    32. 

  32. ; SM30: sust.b.1d.b32.trap [%rd[[SURFREG]], {%r{{[0-9]+}}}], {%r{{[0-9]+}}}
    33. 

  33.   tail call void @llvm.nvvm.sust.b.1d.i32.trap(i64 %surfHandle, i32 %idx, i32 %val)
    34. 

  34.   ret void
    35. 

  35. }
    36. 

  36. 

  37. 

  38. !nvvm.annotations = !{!1, !2, !3}
    39. 

  39. !1 = !{void (i64, i32, i32)* @foo, !"kernel", i32 1}
    40. 

  40. !2 = !{void (i32, i32)* @bar, !"kernel", i32 1}
    41. 

  41. !3 = !{i64 addrspace(1)* @surf0, !"surface", i32 1}
    42. 

  42.