refl1.ll 1.2 KB

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  1. ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
  2. target triple = "nvptx-nvidia-cuda"
  3. ; Function Attrs: nounwind
  4. ; CHECK: .entry foo
  5. define void @foo(float* nocapture %a) #0 {
  6. %val = load float, float* %a
  7. %tan = tail call fastcc float @__nv_fast_tanf(float %val)
  8. store float %tan, float* %a
  9. ret void
  10. }
  11. ; Function Attrs: nounwind readnone
  12. declare float @llvm.nvvm.sin.approx.ftz.f(float) #1
  13. ; Function Attrs: nounwind readnone
  14. declare float @llvm.nvvm.cos.approx.ftz.f(float) #1
  15. ; Function Attrs: nounwind readnone
  16. declare float @llvm.nvvm.div.approx.ftz.f(float, float) #1
  17. ; Function Attrs: alwaysinline inlinehint nounwind readnone
  18. ; CHECK: .func (.param .b32 func_retval0) __nv_fast_tanf
  19. define internal fastcc float @__nv_fast_tanf(float %a) #2 {
  20. entry:
  21. %0 = tail call float @llvm.nvvm.sin.approx.ftz.f(float %a)
  22. %1 = tail call float @llvm.nvvm.cos.approx.ftz.f(float %a)
  23. %2 = tail call float @llvm.nvvm.div.approx.ftz.f(float %0, float %1)
  24. ret float %2
  25. }
  26. attributes #0 = { nounwind }
  27. attributes #1 = { nounwind readnone }
  28. attributes #2 = { alwaysinline inlinehint nounwind readnone }
  29. !nvvm.annotations = !{!0}
  30. !0 = !{void (float*)* @foo, !"kernel", i32 1}