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@@ -520,10 +520,14 @@ bool X64Instr::GetIndexRegisterAndOffset(int* outRegister, int* outOffset)
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if ((form == llvm::X86II::MRMDestMem) || (form == llvm::X86II::MRMSrcMem) ||
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((form >= llvm::X86II::MRM0m) && (form <= llvm::X86II::MRM7m)))
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{
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- auto baseReg = mMCInst.getOperand(llvm::X86::AddrBaseReg);
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- auto scaleAmt = mMCInst.getOperand(llvm::X86::AddrScaleAmt);
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- auto indexReg = mMCInst.getOperand(llvm::X86::AddrIndexReg);
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- auto addrDisp = mMCInst.getOperand(llvm::X86::AddrDisp);
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+ int regOffset = 0;
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+ if (form == llvm::X86II::MRMSrcMem)
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+ regOffset = 1;
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+
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+ auto baseReg = mMCInst.getOperand(regOffset + llvm::X86::AddrBaseReg);
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+ auto scaleAmt = mMCInst.getOperand(regOffset + llvm::X86::AddrScaleAmt);
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+ auto indexReg = mMCInst.getOperand(regOffset + llvm::X86::AddrIndexReg);
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+ auto addrDisp = mMCInst.getOperand(regOffset + llvm::X86::AddrDisp);
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/*bool a = baseReg.isReg();
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bool b = scaleAmt.isImm();
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@@ -695,19 +699,35 @@ void X64Instr::MarkRegsUsed(Array<RegForm>& regsUsed, bool overrideForm)
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}
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}
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-uint64 X64Instr::GetTarget(X64CPURegisters* registers)
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+uint64 X64Instr::GetTarget(Debugger* debugger, X64CPURegisters* registers)
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{
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const MCInstrDesc &instDesc = mX64->mInstrInfo->get(mMCInst.getOpcode());
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if (mMCInst.getNumOperands() < 1)
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return 0;
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+ /*if ((debugger != NULL) && (registers != NULL))
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+ {
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+ int regNum = 0;
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+ int offset = 0;
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+ if (GetIndexRegisterAndOffset(®Num, &offset))
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+ {
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+ uint64 addr = registers->mIntRegsArray[regNum] + offset;
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+ uint64 val = 0;
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+ debugger->ReadMemory(addr, 8, &val);
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+ return val;
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+ }
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+ }*/
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+
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int opIdx = 0;
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auto operand = mMCInst.getOperand(0);
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- if ((instDesc.OpInfo[0].OperandType == MCOI::OPERAND_REGISTER) && (instDesc.OpInfo[4].OperandType == MCOI::OPERAND_MEMORY))
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+ if (mMCInst.getNumOperands() > 4)
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{
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- opIdx = 4;
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- operand = mMCInst.getOperand(opIdx);
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+ if ((instDesc.OpInfo[0].OperandType == MCOI::OPERAND_REGISTER) && (instDesc.OpInfo[4].OperandType == MCOI::OPERAND_MEMORY))
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+ {
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+ opIdx = 4;
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+ operand = mMCInst.getOperand(opIdx);
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+ }
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}
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if (operand.isImm())
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@@ -720,6 +740,72 @@ uint64 X64Instr::GetTarget(X64CPURegisters* registers)
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return 0;
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}
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+bool X64Instr::PartialSimulate(Debugger* debugger, X64CPURegisters* registers)
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+{
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+// const MCInstrDesc &instDesc = mX64->mInstrInfo->get(mMCInst.getOpcode());
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+//
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+// for (int i = 0; i < instDesc.NumOperands; i++)
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+// {
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+// auto regInfo = mMCInst.getOperand(i);
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+// NOP;
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+// }
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+//
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+// if (instDesc.getOpcode() == X86::MOV64rm)
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+// {
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+// auto form = (instDesc.TSFlags & llvm::X86II::FormMask);
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+//
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+// if ((form == llvm::X86II::MRMSrcMem) && (instDesc.NumOperands == 6))
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+// {
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+// auto destReg = mMCInst.getOperand(llvm::X86::AddrBaseReg);
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+// if (destReg.isReg())
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+// {
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+// int regNum = 0;
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+// int offset = 0;
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+// if (GetIndexRegisterAndOffset(®Num, &offset))
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+// {
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+// uint64 addr = registers->mIntRegsArray[regNum] + offset;
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+// uint64 val = 0;
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+// debugger->ReadMemory(addr, 8, &val);
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+//
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+// switch (destReg.getReg())
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+// {
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+//
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+// }
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+// }
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+// }
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+// }
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+//
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+//// if ((form == llvm::X86II::MRMDestMem) || (form == llvm::X86II::MRMSrcMem) ||
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+//// ((form >= llvm::X86II::MRM0m) && (form <= llvm::X86II::MRM7m)))
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+//// {
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+//// }
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+// }
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+//
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+// if (instDesc.getOpcode() == X86::XOR8rr)
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+// {
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+// if (instDesc.NumOperands == 3)
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+// {
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+// auto destReg = mMCInst.getOperand(0);
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+// auto srcReg = mMCInst.getOperand(1);
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+//
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+// if ((destReg.isReg()) && (srcReg.isReg()))
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+// {
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+// if (destReg.getReg() == srcReg.getReg())
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+// {
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+// switch (destReg.getReg())
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+// {
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+// case X86::AL:
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+// ((uint8*)®isters->mIntRegs.rax)[0] = 0;
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+// break;
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+// }
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+// }
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+// }
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+// }
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+// }
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+
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+ return false;
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+}
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+
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X64CPU::X64CPU() :
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mWarningStream(mWarningString),
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mCommentStream(mCommentString)
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