Remove unneeded snapshot preps for sunk stores.

src/lj_asm_arm.h

@@ -693,7 +693,7 @@ static void asm_newref(ASMState *as, IRIns *ir)
 {
   const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey];
   IRRef args[3];
-  if (ir->r == RID_SINK)  /* Sink newref. */
+  if (ir->r == RID_SINK)
     return;
   args[0] = ASMREF_L;     /* lua_State *L */
   args[1] = ir->op1;      /* GCtab *t     */
@@ -814,9 +814,7 @@ static void asm_fload(ASMState *as, IRIns *ir)
 
 static void asm_fstore(ASMState *as, IRIns *ir)
 {
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
-  } else {
+  if (ir->r != RID_SINK) {
     Reg src = ra_alloc1(as, ir->op2, RSET_GPR);
     IRIns *irf = IR(ir->op1);
     Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src));
@@ -838,9 +836,7 @@ static void asm_xload(ASMState *as, IRIns *ir)
 
 static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs)
 {
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
-  } else {
+  if (ir->r != RID_SINK) {
     Reg src = ra_alloc1(as, ir->op2, RSET_GPR);
     asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1,
 		 rset_exclude(RSET_GPR, src), ofs);
@@ -882,9 +878,7 @@ static void asm_ahuvload(ASMState *as, IRIns *ir)
 
 static void asm_ahustore(ASMState *as, IRIns *ir)
 {
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
-  } else {
+  if (ir->r != RID_SINK) {
     RegSet allow = RSET_GPR;
     Reg idx, src = RID_NONE, type = RID_NONE;
     int32_t ofs = 0;
@@ -1392,9 +1386,7 @@ static void asm_hiop(ASMState *as, IRIns *ir)
       asm_fpmin_max(as, ir-1, (ir-1)->o == IR_MIN ? CC_HI : CC_LO);
     return;
   } else if ((ir-1)->o == IR_XSTORE) {
-    if ((ir-1)->r == RID_SINK)
-      asm_snap_prep(as);
-    else
+    if ((ir-1)->r != RID_SINK)
       asm_xstore(as, ir, 4);
     return;
   }

src/lj_asm_mips.h

@@ -769,9 +769,7 @@ nolo:
 
 static void asm_newref(ASMState *as, IRIns *ir)
 {
-  if (ir->r == RID_SINK) {  /* Sink newref. */
-    return;
-  } else {
+  if (ir->r != RID_SINK) {
     const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey];
     IRRef args[3];
     args[0] = ASMREF_L;     /* lua_State *L */
@@ -893,10 +891,7 @@ static void asm_fload(ASMState *as, IRIns *ir)
 
 static void asm_fstore(ASMState *as, IRIns *ir)
 {
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
-    return;
-  } else {
+  if (ir->r != RID_SINK) {
     Reg src = ra_alloc1z(as, ir->op2, RSET_GPR);
     IRIns *irf = IR(ir->op1);
     Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src));
@@ -916,10 +911,7 @@ static void asm_xload(ASMState *as, IRIns *ir)
 
 static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs)
 {
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
-    return;
-  } else {
+  if (ir->r != RID_SINK) {
     Reg src = ra_alloc1z(as, ir->op2, irt_isfp(ir->t) ? RSET_FPR : RSET_GPR);
     asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1,
 		 rset_exclude(RSET_GPR, src), ofs);
@@ -956,10 +948,8 @@ static void asm_ahustore(ASMState *as, IRIns *ir)
   RegSet allow = RSET_GPR;
   Reg idx, src = RID_NONE, type = RID_NONE;
   int32_t ofs = 0;
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
+  if (ir->r == RID_SINK)
     return;
-  }
   if (irt_isnum(ir->t)) {
     src = ra_alloc1(as, ir->op2, RSET_FPR);
   } else {
@@ -1574,9 +1564,7 @@ static void asm_hiop(ASMState *as, IRIns *ir)
     return;
   } else if ((ir-1)->o == IR_XSTORE) {
     as->curins--;  /* Handle both stores here. */
-    if ((ir-1)->r == RID_SINK) {
-      asm_snap_prep(as);
-    } else {
+    if ((ir-1)->r != RID_SINK) {
       asm_xstore(as, ir, LJ_LE ? 4 : 0);
       asm_xstore(as, ir-1, LJ_LE ? 0 : 4);
     }

src/lj_asm_ppc.h

@@ -773,7 +773,7 @@ static void asm_newref(ASMState *as, IRIns *ir)
 {
   const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_tab_newkey];
   IRRef args[3];
-  if (ir->r == RID_SINK)  /* Sink newref. */
+  if (ir->r == RID_SINK)
     return;
   args[0] = ASMREF_L;     /* lua_State *L */
   args[1] = ir->op1;      /* GCtab *t     */
@@ -894,9 +894,7 @@ static void asm_fload(ASMState *as, IRIns *ir)
 
 static void asm_fstore(ASMState *as, IRIns *ir)
 {
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
-  } else {
+  if (ir->r != RID_SINK) {
     Reg src = ra_alloc1(as, ir->op2, RSET_GPR);
     IRIns *irf = IR(ir->op1);
     Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src));
@@ -918,10 +916,8 @@ static void asm_xload(ASMState *as, IRIns *ir)
 static void asm_xstore(ASMState *as, IRIns *ir, int32_t ofs)
 {
   IRIns *irb;
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
+  if (ir->r == RID_SINK)
     return;
-  }
   if (ofs == 0 && mayfuse(as, ir->op2) && (irb = IR(ir->op2))->o == IR_BSWAP &&
       ra_noreg(irb->r) && (irt_isint(ir->t) || irt_isu32(ir->t))) {
     /* Fuse BSWAP with XSTORE to stwbrx. */
@@ -978,10 +974,8 @@ static void asm_ahustore(ASMState *as, IRIns *ir)
   RegSet allow = RSET_GPR;
   Reg idx, src = RID_NONE, type = RID_NONE;
   int32_t ofs = AHUREF_LSX;
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
+  if (ir->r == RID_SINK)
     return;
-  }
   if (irt_isnum(ir->t)) {
     src = ra_alloc1(as, ir->op2, RSET_FPR);
   } else {
@@ -1761,9 +1755,7 @@ static void asm_hiop(ASMState *as, IRIns *ir)
     return;
   } else if ((ir-1)->o == IR_XSTORE) {
     as->curins--;  /* Handle both stores here. */
-    if ((ir-1)->r == RID_SINK) {
-      asm_snap_prep(as);
-    } else {
+    if ((ir-1)->r != RID_SINK) {
       asm_xstore(as, ir, 0);
       asm_xstore(as, ir-1, 4);
     }

src/lj_asm_x86.h

@@ -1155,7 +1155,7 @@ static void asm_newref(ASMState *as, IRIns *ir)
   IRRef args[3];
   IRIns *irkey;
   Reg tmp;
-  if (ir->r == RID_SINK)  /* Sink newref. */
+  if (ir->r == RID_SINK)
     return;
   args[0] = ASMREF_L;     /* lua_State *L */
   args[1] = ir->op1;      /* GCtab *t     */
@@ -1261,10 +1261,8 @@ static void asm_fxstore(ASMState *as, IRIns *ir)
   RegSet allow = RSET_GPR;
   Reg src = RID_NONE, osrc = RID_NONE;
   int32_t k = 0;
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
+  if (ir->r == RID_SINK)
     return;
-  }
   /* The IRT_I16/IRT_U16 stores should never be simplified for constant
   ** values since mov word [mem], imm16 has a length-changing prefix.
   */
@@ -1378,10 +1376,8 @@ static void asm_ahuvload(ASMState *as, IRIns *ir)
 
 static void asm_ahustore(ASMState *as, IRIns *ir)
 {
-  if (ir->r == RID_SINK) {  /* Sink store. */
-    asm_snap_prep(as);
+  if (ir->r == RID_SINK)
     return;
-  }
   if (irt_isnum(ir->t)) {
     Reg src = ra_alloc1(as, ir->op2, RSET_FPR);
     asm_fuseahuref(as, ir->op1, RSET_GPR);
@@ -2261,9 +2257,7 @@ static void asm_hiop(ASMState *as, IRIns *ir)
     asm_comp_int64(as, ir);
     return;
   } else if ((ir-1)->o == IR_XSTORE) {
-    if ((ir-1)->r == RID_SINK)
-      asm_snap_prep(as);
-    else
+    if ((ir-1)->r != RID_SINK)
       asm_fxstore(as, ir);
     return;
   }