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@@ -2211,6 +2211,7 @@ static void asm_comp_int64(ASMState *as, IRIns *ir)
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lefthi = asm_fuseload(as, ir->op1, allow);
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lefthi = asm_fuseload(as, ir->op1, allow);
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} else {
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} else {
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lefthi = ra_alloc1(as, ir->op1, allow);
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lefthi = ra_alloc1(as, ir->op1, allow);
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+ rset_clear(allow, lefthi);
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righthi = asm_fuseload(as, ir->op2, allow);
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righthi = asm_fuseload(as, ir->op2, allow);
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if (righthi == RID_MRM) {
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if (righthi == RID_MRM) {
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if (as->mrm.base != RID_NONE) rset_clear(allow, as->mrm.base);
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if (as->mrm.base != RID_NONE) rset_clear(allow, as->mrm.base);
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@@ -2226,13 +2227,8 @@ static void asm_comp_int64(ASMState *as, IRIns *ir)
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leftlo = asm_fuseload(as, (ir-1)->op1, allow);
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leftlo = asm_fuseload(as, (ir-1)->op1, allow);
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} else {
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} else {
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leftlo = ra_alloc1(as, (ir-1)->op1, allow);
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leftlo = ra_alloc1(as, (ir-1)->op1, allow);
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+ rset_clear(allow, leftlo);
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rightlo = asm_fuseload(as, (ir-1)->op2, allow);
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rightlo = asm_fuseload(as, (ir-1)->op2, allow);
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- if (rightlo == RID_MRM) {
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- if (as->mrm.base != RID_NONE) rset_clear(allow, as->mrm.base);
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- if (as->mrm.idx != RID_NONE) rset_clear(allow, as->mrm.idx);
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- } else {
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- rset_clear(allow, rightlo);
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- }
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}
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}
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/* All register allocations must be performed _before_ this point. */
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/* All register allocations must be performed _before_ this point. */
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