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MIPS/MIPS64: Fix TSETR barrier (again).

Mike Pall 7 years ago
parent
646148e747
commit
9c1b637898
2 changed files with 2 additions and 2 deletions
Unified View Show Diff Stats
  1. 1 1
      src/vm_mips.dasc
  2. 1 1
      src/vm_mips64.dasc

+ 1 - 1
src/vm_mips.dasc
View File 

@@ -4317,7 +4317,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
 
     |  ins_next2
 
     |  ins_next2
 
     |
 
     |
 
     |7:  // Possible table write barrier for the value. Skip valiswhite check.
 
     |7:  // Possible table write barrier for the value. Skip valiswhite check.
 
-    |  barrierback TAB:CARG2, TMP3, TMP0, <2
 
+    |  barrierback TAB:CARG2, TMP3, CRET1, <2
 
     break;
 
     break;
 
 
 
   case BC_TSETM:
 
   case BC_TSETM:

+ 1 - 1
src/vm_mips64.dasc
View File 

@@ -4263,7 +4263,7 @@ static void build_ins(BuildCtx *ctx, BCOp op, int defop)
 
     |  ins_next2
 
     |  ins_next2
 
     |
 
     |
 
     |7:  // Possible table write barrier for the value. Skip valiswhite check.
 
     |7:  // Possible table write barrier for the value. Skip valiswhite check.
 
-    |  barrierback TAB:CARG2, TMP3, TMP0, <2
 
+    |  barrierback TAB:CARG2, TMP3, CRET1, <2
 
     break;
 
     break;
 
 
 
   case BC_TSETM:
 
   case BC_TSETM: