Browse Source

Decouple SLOAD type and optional conversion.

Mike Pall 15 years ago
parent
commit
b3cf2c70f4
5 changed files with 36 additions and 26 deletions
  1. 11 5
      lib/dump.lua
  2. 7 6
      src/lj_asm.c
  3. 6 5
      src/lj_ir.h
  4. 1 1
      src/lj_jit.h
  5. 11 9
      src/lj_record.c

+ 11 - 5
lib/dump.lua

@@ -213,11 +213,17 @@ local colorize, irtype
 
 -- Lookup table to convert some literals into names.
 local litname = {
-  ["SLOAD "] = { [0] = "", "I", "R", "RI", "P", "PI", "PR", "PRI",
-		 "T", "IT", "RT", "RIT", "PT", "PIT", "PRT", "PRIT",
-		 "F", "IF", "RF", "RIF", "PF", "PIF", "PRF", "PRIF",
-		 "TF", "ITF", "RTF", "RITF", "PTF", "PITF", "PRTF", "PRITF",
-	       },
+  ["SLOAD "] = setmetatable({}, { __index = function(t, mode)
+    local s = ""
+    if band(mode, 1) ~= 0 then s = s.."P" end
+    if band(mode, 2) ~= 0 then s = s.."F" end
+    if band(mode, 4) ~= 0 then s = s.."T" end
+    if band(mode, 8) ~= 0 then s = s.."C" end
+    if band(mode, 16) ~= 0 then s = s.."R" end
+    if band(mode, 32) ~= 0 then s = s.."I" end
+    t[mode] = s
+    return s
+  end}),
   ["XLOAD "] = { [0] = "", "R", "U", "RU", },
   ["TOINT "] = { [0] = "check", "index", "", },
   ["FLOAD "] = vmdef.irfield,

+ 7 - 6
src/lj_asm.c

@@ -1290,8 +1290,8 @@ static Reg asm_fuseload(ASMState *as, IRRef ref, RegSet allow)
   } else if (mayfuse(as, ref)) {
     RegSet xallow = (allow & RSET_GPR) ? allow : RSET_GPR;
     if (ir->o == IR_SLOAD) {
-      if ((!irt_isint(ir->t) || (ir->op2 & IRSLOAD_FRAME)) &&
-	  !(ir->op2 & IRSLOAD_PARENT) && noconflict(as, ref, IR_RETF)) {
+      if (!(ir->op2 & (IRSLOAD_PARENT|IRSLOAD_CONVERT)) &&
+	  noconflict(as, ref, IR_RETF)) {
 	as->mrm.base = (uint8_t)ra_alloc1(as, REF_BASE, xallow);
 	as->mrm.ofs = 8*((int32_t)ir->op1-1) + ((ir->op2&IRSLOAD_FRAME)?4:0);
 	as->mrm.idx = RID_NONE;
@@ -2061,8 +2061,9 @@ static void asm_sload(ASMState *as, IRIns *ir)
   IRType1 t = ir->t;
   Reg base;
   lua_assert(!(ir->op2 & IRSLOAD_PARENT));  /* Handled by asm_head_side(). */
-  lua_assert(irt_isguard(ir->t) || !(ir->op2 & IRSLOAD_TYPECHECK));
-  if (irt_isint(t) && irt_isguard(t)) {
+  lua_assert(irt_isguard(t) || !(ir->op2 & IRSLOAD_TYPECHECK));
+  lua_assert(!irt_isint(t) || (ir->op2 & (IRSLOAD_CONVERT|IRSLOAD_FRAME)));
+  if ((ir->op2 & IRSLOAD_CONVERT) && irt_isguard(t)) {
     Reg left = ra_scratch(as, RSET_FPR);
     asm_tointg(as, ir, left);  /* Frees dest reg. Do this before base alloc. */
     base = ra_alloc1(as, REF_BASE, RSET_GPR);
@@ -2078,11 +2079,11 @@ static void asm_sload(ASMState *as, IRIns *ir)
     return;
 #endif
   } else if (ra_used(ir)) {
-    RegSet allow = irt_isnum(ir->t) ? RSET_FPR : RSET_GPR;
+    RegSet allow = irt_isnum(t) ? RSET_FPR : RSET_GPR;
     Reg dest = ra_dest(as, ir, allow);
     base = ra_alloc1(as, REF_BASE, RSET_GPR);
     lua_assert(irt_isnum(t) || irt_isint(t) || irt_isaddr(t));
-    if (irt_isint(t) && !(ir->op2 & IRSLOAD_FRAME))
+    if ((ir->op2 & IRSLOAD_CONVERT))
       emit_rmro(as, XO_CVTSD2SI, dest, base, ofs);
     else if (irt_isnum(t))
       emit_rmro(as, XMM_MOVRM(as), dest, base, ofs);

+ 6 - 5
src/lj_ir.h

@@ -190,11 +190,12 @@ IRFLDEF(FLENUM)
 } IRFieldID;
 
 /* SLOAD mode bits, stored in op2. */
-#define IRSLOAD_INHERIT		0x01	/* Inherited by exits/side traces. */
-#define IRSLOAD_READONLY	0x02	/* Read-only, omit slot store. */
-#define IRSLOAD_PARENT		0x04	/* Coalesce with parent trace. */
-#define IRSLOAD_TYPECHECK	0x08	/* Needs type check. */
-#define IRSLOAD_FRAME		0x10	/* Load hiword of frame. */
+#define IRSLOAD_PARENT		0x01	/* Coalesce with parent trace. */
+#define IRSLOAD_FRAME		0x02	/* Load hiword of frame. */
+#define IRSLOAD_TYPECHECK	0x04	/* Needs type check. */
+#define IRSLOAD_CONVERT		0x08	/* Number to integer conversion. */
+#define IRSLOAD_READONLY	0x10	/* Read-only, omit slot store. */
+#define IRSLOAD_INHERIT		0x20	/* Inherited by exits/side traces. */
 
 /* XLOAD mode, stored in op2. */
 #define IRXLOAD_READONLY	1	/* Load from read-only data. */

+ 1 - 1
src/lj_jit.h

@@ -218,7 +218,7 @@ typedef struct ScEvEntry {
   IRRef1 stop;		/* Constant stop reference. */
   IRRef1 step;		/* Constant step reference. */
   IRType1 t;		/* Scalar type. */
-  uint8_t dir;		/* Direction. 0: +, 1: -. */
+  uint8_t dir;		/* Direction. 1: +, 0: -. */
 } ScEvEntry;
 
 /* 128 bit SIMD constants. */

+ 11 - 9
src/lj_record.c

@@ -298,11 +298,11 @@ static TRef fori_arg(jit_State *J, const BCIns *fori, BCReg slot, IRType t)
   TRef tr = J->base[slot];
   if (!tr) {
     tr = find_kinit(J, fori, slot, t);
-    if (!tr) {
-      if (t == IRT_INT)
-	t |= IRT_GUARD;
-      tr = sloadt(J, (int32_t)slot, t, IRSLOAD_READONLY|IRSLOAD_INHERIT);
-    }
+    if (!tr)
+      tr = sloadt(J, (int32_t)slot,
+	     t == IRT_INT ? (IRT_INT|IRT_GUARD) : t,
+	     t == IRT_INT ? (IRSLOAD_CONVERT|IRSLOAD_READONLY|IRSLOAD_INHERIT) :
+			    (IRSLOAD_READONLY|IRSLOAD_INHERIT));
   }
   return tr;
 }
@@ -2512,6 +2512,7 @@ static void rec_setup_forl(jit_State *J, const BCIns *fori)
   cTValue *forbase = &J->L->base[ra];
   IRType t = (J->flags & JIT_F_OPT_NARROW) ? lj_opt_narrow_forl(forbase)
 					   : IRT_NUM;
+  TRef start;
   TRef stop = fori_arg(J, fori, ra+FORL_STOP, t);
   TRef step = fori_arg(J, fori, ra+FORL_STEP, t);
   int dir = (0 <= numV(&forbase[FORL_STEP]));
@@ -2548,10 +2549,11 @@ static void rec_setup_forl(jit_State *J, const BCIns *fori)
     emitir(IRTGI(dir ? IR_LE : IR_GE), stop, lj_ir_kint(J, k));
   }
   J->scev.start = tref_ref(find_kinit(J, fori, ra+FORL_IDX, IRT_INT));
-  if (t == IRT_INT && !J->scev.start)
-    t |= IRT_GUARD;
-  J->base[ra+FORL_EXT] = sloadt(J, (int32_t)(ra+FORL_IDX), t, IRSLOAD_INHERIT);
-  J->scev.idx = tref_ref(J->base[ra+FORL_EXT]);
+  start = sloadt(J, (int32_t)(ra+FORL_IDX),
+	    (t == IRT_INT && !J->scev.start) ? (IRT_INT|IRT_GUARD) : t,
+	    t == IRT_INT ? (IRSLOAD_CONVERT|IRSLOAD_INHERIT) : IRSLOAD_INHERIT);
+  J->base[ra+FORL_EXT] = start;
+  J->scev.idx = tref_ref(start);
   J->maxslot = ra+FORL_EXT+1;
 }