Jelajahi Sumber

[LoongArch64] Part-5:add loongarch support in some files for LoongArch64. (#21769)

lawn123 1 tahun lalu
induk
melakukan
c6cdaadb54

+ 22 - 2
configure.ac

@@ -4678,6 +4678,15 @@ case "$host" in
 		arch_target=riscv64
 		boehm_supported=false
 		;;
+	loongarch64-*)
+		TARGET=LOONGARCH64
+		AOT_SUPPORTED="yes"
+		BTLS_SUPPORTED=yes
+		BTLS_PLATFORM=loongarch64
+		arch_target=loongarch64
+		boehm_supported=false
+		AC_CHECK_HEADER(stdalign.h,[],[BTLS_SUPPORTED=no])
+		;;
 esac
 
 HOST=$TARGET
@@ -4852,6 +4861,10 @@ RISCV64)
 	AC_DEFINE([TARGET_RISCV], [1], [Target is RISC-V])
 	AC_DEFINE([TARGET_RISCV64], [1], [Target is 64-bit RISC-V])
 	;;
+LOONGARCH64)
+	AC_DEFINE(TARGET_LOONGARCH64, 1, [...])
+	arch_target=loongarch64
+	;;
 esac
 
 case "$TARGET" in
@@ -4909,11 +4922,14 @@ RISCV64)
 	AC_DEFINE([HOST_RISCV], [1], [Host is RISC-V])
 	AC_DEFINE([HOST_RISCV64], [1], [Host is 64-bit RISC-V])
 	;;
+LOONGARCH64)
+	AC_DEFINE(HOST_LOONGARCH64, 1, [...])
+	;;
 esac
 
 MONO_ARCH_GSHAREDVT_SUPPORTED=0
 case "$HOST" in
-X86 | AMD64 | ARM | ARM64)
+X86 | AMD64 | ARM | ARM64 | LOONGARCH64)
 	MONO_ARCH_GSHAREDVT_SUPPORTED=1 # keep in sync with mini-{x86,amd64,arm,arm64}.h
 	;;
 esac
@@ -4964,7 +4980,7 @@ fi
 dnl Use GCC atomic ops if they work on the target.
 if test x$GCC = "xyes"; then
 	case $TARGET in
-	X86 | AMD64 | ARM | ARM64 | ARM6432 | POWERPC | POWERPC64 | MIPS | S390X | SPARC | SPARC64 | RISCV32 | RISCV64)
+	X86 | AMD64 | ARM | ARM64 | ARM6432 | POWERPC | POWERPC64 | MIPS | S390X | SPARC | SPARC64 | RISCV32 | RISCV64 | LOONGARCH64)
 		AC_DEFINE(USE_GCC_ATOMIC_OPS, 1, [...])
 		;;
 	esac
@@ -6049,6 +6065,9 @@ if test "x$enable_btls" = "xyes"; then
 	riscv64)
 		btls_arch=riscv64
 		;;
+	loongarch64)
+		btls_arch=loongarch64
+		;;
 	*)
 		AC_MSG_ERROR(Invalid BTLS platform)
 	esac
@@ -6118,6 +6137,7 @@ AM_CONDITIONAL([HOST_RISCV], [test x$HOST = xRISCV32 -o x$HOST = xRISCV64])
 AM_CONDITIONAL([HOST_RISCV32], [test x$HOST = xRISCV32])
 AM_CONDITIONAL([HOST_RISCV64], [test x$HOST = xRISCV64])
 AM_CONDITIONAL(HOST_WASM, test x$HOST = xWASM)
+AM_CONDITIONAL(LOONGARCH64, test x$TARGET = xLOONGARCH64)
 
 AM_CONDITIONAL(CROSS_COMPILE, test "x$host" != "x$target")
 

+ 3 - 0
mono/metadata/mono-config.c

@@ -95,6 +95,9 @@
 #elif defined(TARGET_WASM)
 #define CONFIG_CPU "wasm"
 #define CONFIG_WORDSIZE "32"
+#elif defined(__loongarch64) || defined(TARGET_LOONGARCH64)
+#define CONFIG_CPU "loongarch64"
+#define CONFIG_WORDSIZE "64"
 #else
 #error Unknown CPU
 #define CONFIG_CPU "unknownCPU"

+ 9 - 2
mono/metadata/object-offsets.h

@@ -253,6 +253,13 @@ DECL_OFFSET(MonoLMF, fregs)
 #elif defined(TARGET_RISCV)
 DECL_OFFSET(MonoContext, gregs)
 DECL_OFFSET(MonoContext, fregs)
+#elif defined(TARGET_LOONGARCH64)
+DECL_OFFSET(MonoLMF, pc)
+DECL_OFFSET(MonoLMF, gregs)
+DECL_OFFSET(MonoLMF, lmf_addr)
+DECL_OFFSET (MonoContext, pc)
+DECL_OFFSET (MonoContext, regs)
+DECL_OFFSET (MonoContext, fregs)
 #endif
 
 // Shared architecture offfsets
@@ -289,11 +296,11 @@ DECL_OFFSET(GSharedVtCallInfo, ret_marshal)
 DECL_OFFSET(GSharedVtCallInfo, vret_slot)
 #endif
 
-#if defined(TARGET_AMD64) || defined(TARGET_ARM64)
+#if defined(TARGET_AMD64) || defined(TARGET_ARM64) || defined(TARGET_LOONGARCH64)
 DECL_OFFSET(SeqPointInfo, ss_tramp_addr)
 #endif
 
-#if defined(TARGET_AMD64) || defined(TARGET_ARM) || defined(TARGET_ARM64)
+#if defined(TARGET_AMD64) || defined(TARGET_ARM) || defined(TARGET_ARM64) || defined(TARGET_LOONGARCH64)
 DECL_OFFSET(SeqPointInfo, bp_addrs)
 
 DECL_OFFSET(CallContext, gregs)

+ 20 - 0
mono/mini/Makefile.am.in

@@ -352,6 +352,15 @@ amd64_sources = \
 	mini-amd64-gsharedvt.h	\
 	tramp-amd64-gsharedvt.c
 
+loongarch64_sources = \
+	mini-loongarch64.c		\
+	mini-loongarch64.h		\
+	exceptions-loongarch64.c	\
+	tramp-loongarch64.c		\
+	mini-loongarch64-gsharedvt.c	\
+	mini-loongarch64-gsharedvt.h	\
+	tramp-loongarch64-gsharedvt.c
+
 ppc_sources = \
 	mini-ppc.c		\
 	mini-ppc.h		\
@@ -615,6 +624,13 @@ target_define=TARGET_AMD64
 ARCH_FULLAOT_EXCLUDE=
 endif
 
+if LOONGARCH64
+arch_sources = $(loongarch64_sources)
+arch_built=cpu-loongarch64.h
+arch_define=__loongarch64
+target_define=TARGET_LOONGARCH64
+endif
+
 if POWERPC
 arch_sources = $(ppc_sources)
 arch_built=cpu-ppc.h
@@ -832,6 +848,9 @@ cpu-x86.h: mini-ops.h cpu-x86.md $(srcdir)/genmdesc.py
 cpu-amd64.h: mini-ops.h cpu-amd64.md $(srcdir)/genmdesc.py
 	$(GENMDESC_PRG) cpu-amd64.h amd64_desc $(srcdir)/cpu-amd64.md
 
+cpu-loongarch64.h: mini-ops.h cpu-loongarch64.md $(srcdir)/genmdesc.py
+	$(GENMDESC_PRG) cpu-loongarch64.h loongarch64_desc $(srcdir)/cpu-loongarch64.md
+
 cpu-ppc.h: mini-ops.h cpu-ppc.md $(srcdir)/genmdesc.py
 	$(GENMDESC_PRG) cpu-ppc.h ppcg4 $(srcdir)/cpu-ppc.md
 
@@ -1069,6 +1088,7 @@ EXTRA_DIST = TestDriver.cs \
 	$(wasm_sources) cpu-wasm.md 		\
 	$(x86_sources) cpu-x86.md 		\
 	$(amd64_sources) cpu-amd64.md 		\
+	$(loongarch64_sources) cpu-loongarch64.md 		\
 	$(ppc_sources) cpu-ppc.md cpu-ppc64.md 	\
 	$(arm_sources) cpu-arm.md 		\
 	$(arm64_sources) cpu-arm64.md 		\

+ 2 - 0
mono/mini/mini-arch.h

@@ -23,6 +23,8 @@
 #include "mini-arm.h"
 #elif defined(TARGET_ARM64)
 #include "mini-arm64.h"
+#elif defined(__loongarch64)
+#include "mini-loongarch64.h"
 #elif defined(__mips__)
 #include "mini-mips.h"
 #elif defined (TARGET_RISCV)

+ 1 - 1
mono/mini/mini-codegen.c

@@ -1151,7 +1151,7 @@ mono_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
 		desc_to_fixed_reg_inited = TRUE;
 
 		/* Validate the cpu description against the info in mini-ops.h */
-#if defined(TARGET_AMD64) || defined(TARGET_X86) || defined(TARGET_ARM) || defined(TARGET_ARM64) || defined (TARGET_RISCV)
+#if defined(TARGET_AMD64) || defined(TARGET_X86) || defined(TARGET_ARM) || defined(TARGET_ARM64) || defined (TARGET_RISCV) || defined (TARGET_LOONGARCH64)
 		for (i = OP_LOAD; i < OP_LAST; ++i) {
 			const char *ispec;
 

+ 2 - 0
mono/mini/mini-runtime.c

@@ -2004,6 +2004,8 @@ enum {
 	ELF_MACHINE = EM_RISCV,
 #elif HOST_MIPS
 	ELF_MACHINE = EM_MIPS,
+#elif HOST_LOONGARCH64
+	ELF_MACHINE = EM_LOONGARCH,
 #endif
 	JIT_CODE_LOAD = 0
 };

+ 4 - 0
mono/sgen/sgen-archdep.h

@@ -71,6 +71,10 @@
 
 #define REDZONE_SIZE	0
 
+#elif defined(__loongarch64)
+
+#define REDZONE_SIZE	0
+
 #endif
 
 #endif /* __MONO_SGENARCHDEP_H__ */

+ 4 - 0
mono/utils/Makefile.am

@@ -312,6 +312,10 @@ if RISCV
 arch_sources += mono-hwcap-riscv.c
 endif
 
+if LOONGARCH64
+arch_sources += mono-hwcap-loongarch64.c
+endif
+
 if HOST_WASM
 arch_sources += mono-hwcap-wasm.c
 endif

+ 1 - 0
mono/utils/freebsd-elf_common.h

@@ -170,6 +170,7 @@ typedef struct {
 #define EM_X86_64	62	/* Advanced Micro Devices x86-64 */
 #define	EM_AMD64	EM_X86_64	/* Advanced Micro Devices x86-64 (compat) */
 #define EM_RISCV	243	/* RISC-V. */
+#define EM_LOONGARCH	258	/* Loongson LOONGARCH. */
 
 /* Non-standard or deprecated. */
 #define EM_486		6	/* Intel i486. */

+ 16 - 0
mono/utils/mono-hwcap-loongarch64.c

@@ -0,0 +1,16 @@
+/**
+ * \file
+ *
+ * Authors:
+ *   Qiao Pengcheng ([email protected]), Liu An([email protected])
+ *
+ * Copyright (c) 2021 Loongson Technology, Inc
+ * Licensed under the MIT license. See LICENSE file in the project root for full license information.
+ */
+
+#include "mono/utils/mono-hwcap.h"
+
+void
+mono_hwcap_arch_init (void)
+{
+}