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@@ -1861,8 +1861,7 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
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// Handle ARM's multi-table intrinsics by splitting the table vector
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if (build_context.metrics.arch == TargetArch_arm64 && count > 16) {
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// ARM64 TBL2/TBL3/TBL4: Split table into multiple 16-byte vectors
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- LLVMTypeRef v16i8_type = LLVMVectorType(LLVMInt8TypeInContext(p->module->ctx), 16);
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- int num_tables = count / 16;
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+ int num_tables = cast(int)(count / 16);
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GB_ASSERT_MSG(count % 16 == 0, "ARM64 table size must be multiple of 16 bytes, got %lld bytes", count);
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GB_ASSERT_MSG(num_tables <= 4, "ARM64 NEON supports maximum 4 tables (tbl4), got %d tables for %lld-byte vector", num_tables, count);
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@@ -1890,8 +1889,7 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
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}
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} else if (build_context.metrics.arch == TargetArch_arm32 && count > 8) {
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// ARM32 VTBL2/VTBL3/VTBL4: Split table into multiple 8-byte vectors
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- LLVMTypeRef v8i8_type = LLVMVectorType(LLVMInt8TypeInContext(p->module->ctx), 8);
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- int num_tables = count / 8;
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+ int num_tables = cast(int)count / 8;
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GB_ASSERT_MSG(count % 8 == 0, "ARM32 table size must be multiple of 8 bytes, got %lld bytes", count);
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GB_ASSERT_MSG(num_tables <= 4, "ARM32 NEON supports maximum 4 tables (vtbl4), got %d tables for %lld-byte vector", num_tables, count);
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