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Rename `SIMD_IS_EMULATED` to capability-affirmative `HAS_HARDWARE_SIMD`

Feoramund 3 月之前
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45219f240e
共有 4 個文件被更改,包括 16 次插入15 次删除
  1. 9 8
      base/runtime/internal.odin
  2. 2 2
      core/bytes/bytes.odin
  3. 1 1
      core/crypto/_chacha20/simd128/chacha20_simd128.odin
  4. 4 4
      core/simd/simd.odin

+ 9 - 8
base/runtime/internal.odin

@@ -16,11 +16,12 @@ RUNTIME_REQUIRE :: false // !ODIN_TILDE
 @(private)
 __float16 :: f16 when __ODIN_LLVM_F16_SUPPORTED else u16
 
-SIMD_IS_EMULATED :: true when (ODIN_ARCH == .amd64 || ODIN_ARCH == .i386) && !intrinsics.has_target_feature("sse2") else
-	true when (ODIN_ARCH == .arm64 || ODIN_ARCH == .arm32) && !intrinsics.has_target_feature("neon") else
-	true when (ODIN_ARCH == .wasm64p32 || ODIN_ARCH == .wasm32) && !intrinsics.has_target_feature("simd128") else
-	true when (ODIN_ARCH == .riscv64) && !intrinsics.has_target_feature("v") else
-	false
+HAS_HARDWARE_SIMD :: false when (ODIN_ARCH == .amd64 || ODIN_ARCH == .i386) && !intrinsics.has_target_feature("sse2") else
+	false when (ODIN_ARCH == .arm64 || ODIN_ARCH == .arm32) && !intrinsics.has_target_feature("neon") else
+	false when (ODIN_ARCH == .wasm64p32 || ODIN_ARCH == .wasm32) && !intrinsics.has_target_feature("simd128") else
+	false when (ODIN_ARCH == .riscv64) && !intrinsics.has_target_feature("v") else
+	true
+
 
 @(private)
 byte_slice :: #force_inline proc "contextless" (data: rawptr, len: int) -> []byte #no_bounds_check {
@@ -241,7 +242,7 @@ memory_equal :: proc "contextless" (x, y: rawptr, n: int) -> bool {
 	m := uint(0)
 
 	if n >= 8 {
-		when !SIMD_IS_EMULATED {
+		when HAS_HARDWARE_SIMD {
 			// Avoid using 256-bit SIMD on platforms where its emulation is
 			// likely to be less than ideal.
 			when ODIN_ARCH == .amd64 && intrinsics.has_target_feature("avx2") {
@@ -295,7 +296,7 @@ memory_compare :: proc "contextless" (x, y: rawptr, n: int) -> int #no_bounds_ch
 	i := uint(0)
 	m := uint(0)
 
-	when !SIMD_IS_EMULATED {
+	when HAS_HARDWARE_SIMD {
 		when ODIN_ARCH == .amd64 && intrinsics.has_target_feature("avx2") {
 			m = n / 32 * 32
 			for /**/; i < m; i += 32 {
@@ -364,7 +365,7 @@ memory_compare_zero :: proc "contextless" (a: rawptr, n: int) -> int #no_bounds_
 	bytes := ([^]u8)(a)
 
 	if n >= 8 {
-		when !SIMD_IS_EMULATED {
+		when HAS_HARDWARE_SIMD {
 			when ODIN_ARCH == .amd64 && intrinsics.has_target_feature("avx2") {
 				scanner32: #simd[32]u8
 				m = n / 32 * 32

+ 2 - 2
core/bytes/bytes.odin

@@ -350,7 +350,7 @@ index_byte :: proc "contextless" (s: []byte, c: byte) -> (index: int) #no_bounds
 	}
 
 	c_vec: simd.u8x16 = c
-	when !simd.IS_EMULATED {
+	when simd.HAS_HARDWARE_SIMD {
 		// Note: While this is something that could also logically take
 		// advantage of AVX512, the various downclocking and power
 		// consumption related woes make premature to have a dedicated
@@ -485,7 +485,7 @@ last_index_byte :: proc "contextless" (s: []byte, c: byte) -> int #no_bounds_che
 	}
 
 	c_vec: simd.u8x16 = c
-	when !simd.IS_EMULATED {
+	when simd.HAS_HARDWARE_SIMD {
 		// Note: While this is something that could also logically take
 		// advantage of AVX512, the various downclocking and power
 		// consumption related woes make premature to have a dedicated

+ 1 - 1
core/crypto/_chacha20/simd128/chacha20_simd128.odin

@@ -39,7 +39,7 @@ when ODIN_ARCH == .arm64 || ODIN_ARCH == .arm32 {
 
 // Some targets lack runtime feature detection, and will flat out refuse
 // to load binaries that have unknown instructions.  This is distinct from
-// `simd.IS_EMULATED` as actually good designs support runtime feature
+// `simd.HAS_HARDWARE_SIMD` as actually good designs support runtime feature
 // detection and that constant establishes a baseline.
 //
 // See:

+ 4 - 4
core/simd/simd.odin

@@ -26,12 +26,12 @@ import "base:runtime"
 /*
 Check if SIMD is software-emulated on a target platform.
 
-This value is `false`, when the compile-time target has the hardware support for
-at 128-bit (or wider) SIMD. If the compile-time target lacks the hardware support
-for 128-bit SIMD, this value is `true`, and all SIMD operations will likely be
+This value is `true`, when the compile-time target has the hardware support for
+at least 128-bit (or wider) SIMD. If the compile-time target lacks the hardware support
+for 128-bit SIMD, this value is `false`, and all SIMD operations will likely be
 emulated.
 */
-IS_EMULATED :: runtime.SIMD_IS_EMULATED
+HAS_HARDWARE_SIMD :: runtime.HAS_HARDWARE_SIMD
 
 /*
 Vector of 16 `u8` lanes (128 bits).