add riscv to simd.IS_EMULATED

core/simd/simd.odin

@@ -8,6 +8,7 @@ import "base:intrinsics"
 IS_EMULATED :: true when (ODIN_ARCH == .amd64 || ODIN_ARCH == .i386) && !intrinsics.has_target_feature("sse2") else
 	true when (ODIN_ARCH == .arm64 || ODIN_ARCH == .arm32) && !intrinsics.has_target_feature("neon") else
 	true when (ODIN_ARCH == .wasm64p32 || ODIN_ARCH == .wasm32) && !intrinsics.has_target_feature("simd128") else
+	true when (ODIN_ARCH == .riscv64) && !intrinsics.has_target_feature("v") else
 	false
 
 // 128-bit vector aliases