cpu.odin 2.6 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394
  1. //+build i386, amd64
  2. package simd_x86
  3. import "core:intrinsics"
  4. // cpuid :: proc(ax, cx: u32) -> (eax, ebc, ecx, edx: u32) ---
  5. cpuid :: intrinsics.x86_cpuid
  6. // xgetbv :: proc(cx: u32) -> (eax, edx: u32) ---
  7. xgetbv :: intrinsics.x86_xgetbv
  8. CPU_Feature :: enum u64 {
  9. aes, // AES hardware implementation (AES NI)
  10. adx, // Multi-precision add-carry instruction extensions
  11. avx, // Advanced vector extension
  12. avx2, // Advanced vector extension 2
  13. bmi1, // Bit manipulation instruction set 1
  14. bmi2, // Bit manipulation instruction set 2
  15. erms, // Enhanced REP for MOVSB and STOSB
  16. fma, // Fused-multiply-add instructions
  17. os_xsave, // OS supports XSAVE/XRESTOR for saving/restoring XMM registers.
  18. pclmulqdq, // PCLMULQDQ instruction - most often used for AES-GCM
  19. popcnt, // Hamming weight instruction POPCNT.
  20. rdrand, // RDRAND instruction (on-chip random number generator)
  21. rdseed, // RDSEED instruction (on-chip random number generator)
  22. sse2, // Streaming SIMD extension 2 (always available on amd64)
  23. sse3, // Streaming SIMD extension 3
  24. ssse3, // Supplemental streaming SIMD extension 3
  25. sse41, // Streaming SIMD extension 4 and 4.1
  26. sse42, // Streaming SIMD extension 4 and 4.2
  27. }
  28. CPU_Features :: distinct bit_set[CPU_Feature; u64]
  29. cpu_features: Maybe(CPU_Features)
  30. @(init, private)
  31. init_cpu_features :: proc "c" () {
  32. is_set :: #force_inline proc "c" (hwc: u32, value: u32) -> bool {
  33. return hwc&value != 0
  34. }
  35. try_set :: #force_inline proc "c" (set: ^CPU_Features, feature: CPU_Feature, hwc: u32, value: u32) {
  36. if is_set(hwc, value) {
  37. set^ += {feature}
  38. }
  39. }
  40. max_id, _, _, _ := cpuid(0, 0)
  41. if max_id < 1 {
  42. return
  43. }
  44. set: CPU_Features
  45. _, _, ecx1, edx1 := cpuid(1, 0)
  46. try_set(&set, .sse2, 26, edx1)
  47. try_set(&set, .sse3, 0, ecx1)
  48. try_set(&set, .pclmulqdq, 1, ecx1)
  49. try_set(&set, .ssse3, 9, ecx1)
  50. try_set(&set, .fma, 12, ecx1)
  51. try_set(&set, .sse41, 19, ecx1)
  52. try_set(&set, .sse42, 20, ecx1)
  53. try_set(&set, .popcnt, 23, ecx1)
  54. try_set(&set, .aes, 25, ecx1)
  55. try_set(&set, .os_xsave, 27, ecx1)
  56. try_set(&set, .rdrand, 30, ecx1)
  57. os_supports_avx := false
  58. if .os_xsave in set {
  59. eax, _ := xgetbv(0)
  60. os_supports_avx = is_set(1, eax) && is_set(2, eax)
  61. }
  62. if os_supports_avx {
  63. try_set(&set, .avx, 28, ecx1)
  64. }
  65. if max_id < 7 {
  66. return
  67. }
  68. _, ebx7, _, _ := cpuid(7, 0)
  69. try_set(&set, .bmi1, 3, ebx7)
  70. if os_supports_avx {
  71. try_set(&set, .avx2, 5, ebx7)
  72. }
  73. try_set(&set, .bmi2, 8, ebx7)
  74. try_set(&set, .erms, 9, ebx7)
  75. try_set(&set, .rdseed, 18, ebx7)
  76. try_set(&set, .adx, 19, ebx7)
  77. cpu_features = set
  78. }