variance_avx2.c 32 KB

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  1. /*
  2. * Copyright (c) 2012 The WebM project authors. All Rights Reserved.
  3. *
  4. * Use of this source code is governed by a BSD-style license
  5. * that can be found in the LICENSE file in the root of the source
  6. * tree. An additional intellectual property rights grant can be found
  7. * in the file PATENTS. All contributing project authors may
  8. * be found in the AUTHORS file in the root of the source tree.
  9. */
  10. #include <immintrin.h> // AVX2
  11. #include "./vpx_dsp_rtcd.h"
  12. /* clang-format off */
  13. DECLARE_ALIGNED(32, static const uint8_t, bilinear_filters_avx2[512]) = {
  14. 16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16, 0,
  15. 16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16, 0, 16, 0,
  16. 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2,
  17. 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2,
  18. 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4,
  19. 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4,
  20. 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6,
  21. 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6,
  22. 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
  23. 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
  24. 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10,
  25. 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10, 6, 10,
  26. 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12,
  27. 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12, 4, 12,
  28. 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14,
  29. 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14, 2, 14,
  30. };
  31. /* clang-format on */
  32. void vpx_get16x16var_avx2(const unsigned char *src_ptr, int source_stride,
  33. const unsigned char *ref_ptr, int recon_stride,
  34. unsigned int *sse, int *sum) {
  35. unsigned int i, src_2strides, ref_2strides;
  36. __m256i sum_ref_src = _mm256_setzero_si256();
  37. __m256i madd_ref_src = _mm256_setzero_si256();
  38. // process two 16 byte locations in a 256 bit register
  39. src_2strides = source_stride << 1;
  40. ref_2strides = recon_stride << 1;
  41. for (i = 0; i < 8; ++i) {
  42. const __m256i zero_reg = _mm256_setzero_si256();
  43. const __m256i src0 =
  44. _mm256_castsi128_si256(_mm_loadu_si128((__m128i const *)(src_ptr)));
  45. const __m256i src = _mm256_inserti128_si256(
  46. src0, _mm_loadu_si128((__m128i const *)(src_ptr + source_stride)), 1);
  47. const __m256i ref0 =
  48. _mm256_castsi128_si256(_mm_loadu_si128((__m128i const *)(ref_ptr)));
  49. const __m256i ref = _mm256_inserti128_si256(
  50. ref0, _mm_loadu_si128((__m128i const *)(ref_ptr + recon_stride)), 1);
  51. const __m256i src_lo = _mm256_unpacklo_epi8(src, zero_reg);
  52. const __m256i src_hi = _mm256_unpackhi_epi8(src, zero_reg);
  53. const __m256i ref_lo = _mm256_unpacklo_epi8(ref, zero_reg);
  54. const __m256i ref_hi = _mm256_unpackhi_epi8(ref, zero_reg);
  55. const __m256i diff_lo = _mm256_sub_epi16(src_lo, ref_lo);
  56. const __m256i diff_hi = _mm256_sub_epi16(src_hi, ref_hi);
  57. const __m256i madd_lo = _mm256_madd_epi16(diff_lo, diff_lo);
  58. const __m256i madd_hi = _mm256_madd_epi16(diff_hi, diff_hi);
  59. const __m256i src_ref_diff_sum = _mm256_add_epi16(diff_lo, diff_hi);
  60. sum_ref_src = _mm256_add_epi16(sum_ref_src, src_ref_diff_sum);
  61. // add high to low
  62. madd_ref_src =
  63. _mm256_add_epi32(madd_ref_src, _mm256_add_epi32(madd_lo, madd_hi));
  64. src_ptr += src_2strides;
  65. ref_ptr += ref_2strides;
  66. }
  67. {
  68. const __m128i zero_reg = _mm_setzero_si128();
  69. // extract the low lane and add it to the high lane
  70. const __m128i sum_ref_src_128 =
  71. _mm_add_epi16(_mm256_castsi256_si128(sum_ref_src),
  72. _mm256_extractf128_si256(sum_ref_src, 1));
  73. const __m128i madd_ref_src_128 =
  74. _mm_add_epi32(_mm256_castsi256_si128(madd_ref_src),
  75. _mm256_extractf128_si256(madd_ref_src, 1));
  76. // 16 -> 32 sign extended
  77. const __m128i sum_lo =
  78. _mm_srai_epi32(_mm_unpacklo_epi16(zero_reg, sum_ref_src_128), 16);
  79. // 16 -> 32 sign extended
  80. const __m128i sum_hi =
  81. _mm_srai_epi32(_mm_unpackhi_epi16(zero_reg, sum_ref_src_128), 16);
  82. const __m128i sum_hl = _mm_add_epi32(sum_lo, sum_hi);
  83. const __m128i madd_lo = _mm_unpacklo_epi32(madd_ref_src_128, zero_reg);
  84. const __m128i madd_hi = _mm_unpackhi_epi32(madd_ref_src_128, zero_reg);
  85. const __m128i madd = _mm_add_epi32(madd_lo, madd_hi);
  86. const __m128i ex_sum_lo = _mm_unpacklo_epi32(sum_hl, zero_reg);
  87. const __m128i ex_sum_hi = _mm_unpackhi_epi32(sum_hl, zero_reg);
  88. const __m128i ex_sum = _mm_add_epi32(ex_sum_lo, ex_sum_hi);
  89. *((int *)sse) =
  90. _mm_cvtsi128_si32(_mm_add_epi32(madd, _mm_srli_si128(madd, 8)));
  91. *((int *)sum) =
  92. _mm_cvtsi128_si32(_mm_add_epi32(ex_sum, _mm_srli_si128(ex_sum, 8)));
  93. }
  94. }
  95. static void get32x16var_avx2(const unsigned char *src_ptr, int source_stride,
  96. const unsigned char *ref_ptr, int recon_stride,
  97. unsigned int *sse, int *sum) {
  98. unsigned int i;
  99. const __m256i zero_reg = _mm256_setzero_si256();
  100. __m256i sum_ref_src = _mm256_setzero_si256();
  101. __m256i madd_ref_src = _mm256_setzero_si256();
  102. // processing 32 elements in parallel
  103. for (i = 0; i < 16; i++) {
  104. const __m256i src = _mm256_loadu_si256((__m256i const *)(src_ptr));
  105. const __m256i ref = _mm256_loadu_si256((__m256i const *)(ref_ptr));
  106. const __m256i src_lo = _mm256_unpacklo_epi8(src, zero_reg);
  107. const __m256i src_hi = _mm256_unpackhi_epi8(src, zero_reg);
  108. const __m256i ref_lo = _mm256_unpacklo_epi8(ref, zero_reg);
  109. const __m256i ref_hi = _mm256_unpackhi_epi8(ref, zero_reg);
  110. const __m256i diff_lo = _mm256_sub_epi16(src_lo, ref_lo);
  111. const __m256i diff_hi = _mm256_sub_epi16(src_hi, ref_hi);
  112. const __m256i madd_lo = _mm256_madd_epi16(diff_lo, diff_lo);
  113. const __m256i madd_hi = _mm256_madd_epi16(diff_hi, diff_hi);
  114. // add high to low
  115. const __m256i diff_sum = _mm256_add_epi16(diff_lo, diff_hi);
  116. sum_ref_src = _mm256_add_epi16(sum_ref_src, diff_sum);
  117. // add high to low
  118. madd_ref_src =
  119. _mm256_add_epi32(madd_ref_src, _mm256_add_epi32(madd_lo, madd_hi));
  120. src_ptr += source_stride;
  121. ref_ptr += recon_stride;
  122. }
  123. {
  124. // 16 -> 32 sign extended
  125. const __m256i sum_lo =
  126. _mm256_srai_epi32(_mm256_unpacklo_epi16(zero_reg, sum_ref_src), 16);
  127. // 16 -> 32 sign extended
  128. const __m256i sum_hi =
  129. _mm256_srai_epi32(_mm256_unpackhi_epi16(zero_reg, sum_ref_src), 16);
  130. const __m256i sum_hl = _mm256_add_epi32(sum_lo, sum_hi);
  131. const __m256i madd_lo = _mm256_unpacklo_epi32(madd_ref_src, zero_reg);
  132. const __m256i madd_hi = _mm256_unpackhi_epi32(madd_ref_src, zero_reg);
  133. const __m256i madd = _mm256_add_epi32(madd_lo, madd_hi);
  134. const __m256i ex_sum_lo = _mm256_unpacklo_epi32(sum_hl, zero_reg);
  135. const __m256i ex_sum_hi = _mm256_unpackhi_epi32(sum_hl, zero_reg);
  136. const __m256i ex_sum = _mm256_add_epi32(ex_sum_lo, ex_sum_hi);
  137. // shift 8 bytes eight
  138. madd_ref_src = _mm256_srli_si256(madd, 8);
  139. sum_ref_src = _mm256_srli_si256(ex_sum, 8);
  140. madd_ref_src = _mm256_add_epi32(madd_ref_src, madd);
  141. sum_ref_src = _mm256_add_epi32(sum_ref_src, ex_sum);
  142. // extract the low lane and the high lane and add the results
  143. *((int *)sse) =
  144. _mm_cvtsi128_si32(_mm256_castsi256_si128(madd_ref_src)) +
  145. _mm_cvtsi128_si32(_mm256_extractf128_si256(madd_ref_src, 1));
  146. *((int *)sum) = _mm_cvtsi128_si32(_mm256_castsi256_si128(sum_ref_src)) +
  147. _mm_cvtsi128_si32(_mm256_extractf128_si256(sum_ref_src, 1));
  148. }
  149. }
  150. #define FILTER_SRC(filter) \
  151. /* filter the source */ \
  152. exp_src_lo = _mm256_maddubs_epi16(exp_src_lo, filter); \
  153. exp_src_hi = _mm256_maddubs_epi16(exp_src_hi, filter); \
  154. \
  155. /* add 8 to source */ \
  156. exp_src_lo = _mm256_add_epi16(exp_src_lo, pw8); \
  157. exp_src_hi = _mm256_add_epi16(exp_src_hi, pw8); \
  158. \
  159. /* divide source by 16 */ \
  160. exp_src_lo = _mm256_srai_epi16(exp_src_lo, 4); \
  161. exp_src_hi = _mm256_srai_epi16(exp_src_hi, 4);
  162. #define CALC_SUM_SSE_INSIDE_LOOP \
  163. /* expand each byte to 2 bytes */ \
  164. exp_dst_lo = _mm256_unpacklo_epi8(dst_reg, zero_reg); \
  165. exp_dst_hi = _mm256_unpackhi_epi8(dst_reg, zero_reg); \
  166. /* source - dest */ \
  167. exp_src_lo = _mm256_sub_epi16(exp_src_lo, exp_dst_lo); \
  168. exp_src_hi = _mm256_sub_epi16(exp_src_hi, exp_dst_hi); \
  169. /* caculate sum */ \
  170. *sum_reg = _mm256_add_epi16(*sum_reg, exp_src_lo); \
  171. exp_src_lo = _mm256_madd_epi16(exp_src_lo, exp_src_lo); \
  172. *sum_reg = _mm256_add_epi16(*sum_reg, exp_src_hi); \
  173. exp_src_hi = _mm256_madd_epi16(exp_src_hi, exp_src_hi); \
  174. /* calculate sse */ \
  175. *sse_reg = _mm256_add_epi32(*sse_reg, exp_src_lo); \
  176. *sse_reg = _mm256_add_epi32(*sse_reg, exp_src_hi);
  177. // final calculation to sum and sse
  178. #define CALC_SUM_AND_SSE \
  179. res_cmp = _mm256_cmpgt_epi16(zero_reg, sum_reg); \
  180. sse_reg_hi = _mm256_srli_si256(sse_reg, 8); \
  181. sum_reg_lo = _mm256_unpacklo_epi16(sum_reg, res_cmp); \
  182. sum_reg_hi = _mm256_unpackhi_epi16(sum_reg, res_cmp); \
  183. sse_reg = _mm256_add_epi32(sse_reg, sse_reg_hi); \
  184. sum_reg = _mm256_add_epi32(sum_reg_lo, sum_reg_hi); \
  185. \
  186. sse_reg_hi = _mm256_srli_si256(sse_reg, 4); \
  187. sum_reg_hi = _mm256_srli_si256(sum_reg, 8); \
  188. \
  189. sse_reg = _mm256_add_epi32(sse_reg, sse_reg_hi); \
  190. sum_reg = _mm256_add_epi32(sum_reg, sum_reg_hi); \
  191. *((int *)sse) = _mm_cvtsi128_si32(_mm256_castsi256_si128(sse_reg)) + \
  192. _mm_cvtsi128_si32(_mm256_extractf128_si256(sse_reg, 1)); \
  193. sum_reg_hi = _mm256_srli_si256(sum_reg, 4); \
  194. sum_reg = _mm256_add_epi32(sum_reg, sum_reg_hi); \
  195. sum = _mm_cvtsi128_si32(_mm256_castsi256_si128(sum_reg)) + \
  196. _mm_cvtsi128_si32(_mm256_extractf128_si256(sum_reg, 1));
  197. static INLINE void spv32_x0_y0(const uint8_t *src, int src_stride,
  198. const uint8_t *dst, int dst_stride,
  199. const uint8_t *sec, int sec_stride, int do_sec,
  200. int height, __m256i *sum_reg, __m256i *sse_reg) {
  201. const __m256i zero_reg = _mm256_setzero_si256();
  202. __m256i exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi;
  203. int i;
  204. for (i = 0; i < height; i++) {
  205. const __m256i dst_reg = _mm256_loadu_si256((__m256i const *)dst);
  206. const __m256i src_reg = _mm256_loadu_si256((__m256i const *)src);
  207. if (do_sec) {
  208. const __m256i sec_reg = _mm256_loadu_si256((__m256i const *)sec);
  209. const __m256i avg_reg = _mm256_avg_epu8(src_reg, sec_reg);
  210. exp_src_lo = _mm256_unpacklo_epi8(avg_reg, zero_reg);
  211. exp_src_hi = _mm256_unpackhi_epi8(avg_reg, zero_reg);
  212. sec += sec_stride;
  213. } else {
  214. exp_src_lo = _mm256_unpacklo_epi8(src_reg, zero_reg);
  215. exp_src_hi = _mm256_unpackhi_epi8(src_reg, zero_reg);
  216. }
  217. CALC_SUM_SSE_INSIDE_LOOP
  218. src += src_stride;
  219. dst += dst_stride;
  220. }
  221. }
  222. // (x == 0, y == 4) or (x == 4, y == 0). sstep determines the direction.
  223. static INLINE void spv32_half_zero(const uint8_t *src, int src_stride,
  224. const uint8_t *dst, int dst_stride,
  225. const uint8_t *sec, int sec_stride,
  226. int do_sec, int height, __m256i *sum_reg,
  227. __m256i *sse_reg, int sstep) {
  228. const __m256i zero_reg = _mm256_setzero_si256();
  229. __m256i exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi;
  230. int i;
  231. for (i = 0; i < height; i++) {
  232. const __m256i dst_reg = _mm256_loadu_si256((__m256i const *)dst);
  233. const __m256i src_0 = _mm256_loadu_si256((__m256i const *)src);
  234. const __m256i src_1 = _mm256_loadu_si256((__m256i const *)(src + sstep));
  235. const __m256i src_avg = _mm256_avg_epu8(src_0, src_1);
  236. if (do_sec) {
  237. const __m256i sec_reg = _mm256_loadu_si256((__m256i const *)sec);
  238. const __m256i avg_reg = _mm256_avg_epu8(src_avg, sec_reg);
  239. exp_src_lo = _mm256_unpacklo_epi8(avg_reg, zero_reg);
  240. exp_src_hi = _mm256_unpackhi_epi8(avg_reg, zero_reg);
  241. sec += sec_stride;
  242. } else {
  243. exp_src_lo = _mm256_unpacklo_epi8(src_avg, zero_reg);
  244. exp_src_hi = _mm256_unpackhi_epi8(src_avg, zero_reg);
  245. }
  246. CALC_SUM_SSE_INSIDE_LOOP
  247. src += src_stride;
  248. dst += dst_stride;
  249. }
  250. }
  251. static INLINE void spv32_x0_y4(const uint8_t *src, int src_stride,
  252. const uint8_t *dst, int dst_stride,
  253. const uint8_t *sec, int sec_stride, int do_sec,
  254. int height, __m256i *sum_reg, __m256i *sse_reg) {
  255. spv32_half_zero(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  256. height, sum_reg, sse_reg, src_stride);
  257. }
  258. static INLINE void spv32_x4_y0(const uint8_t *src, int src_stride,
  259. const uint8_t *dst, int dst_stride,
  260. const uint8_t *sec, int sec_stride, int do_sec,
  261. int height, __m256i *sum_reg, __m256i *sse_reg) {
  262. spv32_half_zero(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  263. height, sum_reg, sse_reg, 1);
  264. }
  265. static INLINE void spv32_x4_y4(const uint8_t *src, int src_stride,
  266. const uint8_t *dst, int dst_stride,
  267. const uint8_t *sec, int sec_stride, int do_sec,
  268. int height, __m256i *sum_reg, __m256i *sse_reg) {
  269. const __m256i zero_reg = _mm256_setzero_si256();
  270. const __m256i src_a = _mm256_loadu_si256((__m256i const *)src);
  271. const __m256i src_b = _mm256_loadu_si256((__m256i const *)(src + 1));
  272. __m256i prev_src_avg = _mm256_avg_epu8(src_a, src_b);
  273. __m256i exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi;
  274. int i;
  275. src += src_stride;
  276. for (i = 0; i < height; i++) {
  277. const __m256i dst_reg = _mm256_loadu_si256((__m256i const *)dst);
  278. const __m256i src_0 = _mm256_loadu_si256((__m256i const *)(src));
  279. const __m256i src_1 = _mm256_loadu_si256((__m256i const *)(src + 1));
  280. const __m256i src_avg = _mm256_avg_epu8(src_0, src_1);
  281. const __m256i current_avg = _mm256_avg_epu8(prev_src_avg, src_avg);
  282. prev_src_avg = src_avg;
  283. if (do_sec) {
  284. const __m256i sec_reg = _mm256_loadu_si256((__m256i const *)sec);
  285. const __m256i avg_reg = _mm256_avg_epu8(current_avg, sec_reg);
  286. exp_src_lo = _mm256_unpacklo_epi8(avg_reg, zero_reg);
  287. exp_src_hi = _mm256_unpackhi_epi8(avg_reg, zero_reg);
  288. sec += sec_stride;
  289. } else {
  290. exp_src_lo = _mm256_unpacklo_epi8(current_avg, zero_reg);
  291. exp_src_hi = _mm256_unpackhi_epi8(current_avg, zero_reg);
  292. }
  293. // save current source average
  294. CALC_SUM_SSE_INSIDE_LOOP
  295. dst += dst_stride;
  296. src += src_stride;
  297. }
  298. }
  299. // (x == 0, y == bil) or (x == 4, y == bil). sstep determines the direction.
  300. static INLINE void spv32_bilin_zero(const uint8_t *src, int src_stride,
  301. const uint8_t *dst, int dst_stride,
  302. const uint8_t *sec, int sec_stride,
  303. int do_sec, int height, __m256i *sum_reg,
  304. __m256i *sse_reg, int offset, int sstep) {
  305. const __m256i zero_reg = _mm256_setzero_si256();
  306. const __m256i pw8 = _mm256_set1_epi16(8);
  307. const __m256i filter = _mm256_load_si256(
  308. (__m256i const *)(bilinear_filters_avx2 + (offset << 5)));
  309. __m256i exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi;
  310. int i;
  311. for (i = 0; i < height; i++) {
  312. const __m256i dst_reg = _mm256_loadu_si256((__m256i const *)dst);
  313. const __m256i src_0 = _mm256_loadu_si256((__m256i const *)src);
  314. const __m256i src_1 = _mm256_loadu_si256((__m256i const *)(src + sstep));
  315. exp_src_lo = _mm256_unpacklo_epi8(src_0, src_1);
  316. exp_src_hi = _mm256_unpackhi_epi8(src_0, src_1);
  317. FILTER_SRC(filter)
  318. if (do_sec) {
  319. const __m256i sec_reg = _mm256_loadu_si256((__m256i const *)sec);
  320. const __m256i exp_src = _mm256_packus_epi16(exp_src_lo, exp_src_hi);
  321. const __m256i avg_reg = _mm256_avg_epu8(exp_src, sec_reg);
  322. sec += sec_stride;
  323. exp_src_lo = _mm256_unpacklo_epi8(avg_reg, zero_reg);
  324. exp_src_hi = _mm256_unpackhi_epi8(avg_reg, zero_reg);
  325. }
  326. CALC_SUM_SSE_INSIDE_LOOP
  327. src += src_stride;
  328. dst += dst_stride;
  329. }
  330. }
  331. static INLINE void spv32_x0_yb(const uint8_t *src, int src_stride,
  332. const uint8_t *dst, int dst_stride,
  333. const uint8_t *sec, int sec_stride, int do_sec,
  334. int height, __m256i *sum_reg, __m256i *sse_reg,
  335. int y_offset) {
  336. spv32_bilin_zero(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  337. height, sum_reg, sse_reg, y_offset, src_stride);
  338. }
  339. static INLINE void spv32_xb_y0(const uint8_t *src, int src_stride,
  340. const uint8_t *dst, int dst_stride,
  341. const uint8_t *sec, int sec_stride, int do_sec,
  342. int height, __m256i *sum_reg, __m256i *sse_reg,
  343. int x_offset) {
  344. spv32_bilin_zero(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  345. height, sum_reg, sse_reg, x_offset, 1);
  346. }
  347. static INLINE void spv32_x4_yb(const uint8_t *src, int src_stride,
  348. const uint8_t *dst, int dst_stride,
  349. const uint8_t *sec, int sec_stride, int do_sec,
  350. int height, __m256i *sum_reg, __m256i *sse_reg,
  351. int y_offset) {
  352. const __m256i zero_reg = _mm256_setzero_si256();
  353. const __m256i pw8 = _mm256_set1_epi16(8);
  354. const __m256i filter = _mm256_load_si256(
  355. (__m256i const *)(bilinear_filters_avx2 + (y_offset << 5)));
  356. const __m256i src_a = _mm256_loadu_si256((__m256i const *)src);
  357. const __m256i src_b = _mm256_loadu_si256((__m256i const *)(src + 1));
  358. __m256i prev_src_avg = _mm256_avg_epu8(src_a, src_b);
  359. __m256i exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi;
  360. int i;
  361. src += src_stride;
  362. for (i = 0; i < height; i++) {
  363. const __m256i dst_reg = _mm256_loadu_si256((__m256i const *)dst);
  364. const __m256i src_0 = _mm256_loadu_si256((__m256i const *)src);
  365. const __m256i src_1 = _mm256_loadu_si256((__m256i const *)(src + 1));
  366. const __m256i src_avg = _mm256_avg_epu8(src_0, src_1);
  367. exp_src_lo = _mm256_unpacklo_epi8(prev_src_avg, src_avg);
  368. exp_src_hi = _mm256_unpackhi_epi8(prev_src_avg, src_avg);
  369. prev_src_avg = src_avg;
  370. FILTER_SRC(filter)
  371. if (do_sec) {
  372. const __m256i sec_reg = _mm256_loadu_si256((__m256i const *)sec);
  373. const __m256i exp_src_avg = _mm256_packus_epi16(exp_src_lo, exp_src_hi);
  374. const __m256i avg_reg = _mm256_avg_epu8(exp_src_avg, sec_reg);
  375. exp_src_lo = _mm256_unpacklo_epi8(avg_reg, zero_reg);
  376. exp_src_hi = _mm256_unpackhi_epi8(avg_reg, zero_reg);
  377. sec += sec_stride;
  378. }
  379. CALC_SUM_SSE_INSIDE_LOOP
  380. dst += dst_stride;
  381. src += src_stride;
  382. }
  383. }
  384. static INLINE void spv32_xb_y4(const uint8_t *src, int src_stride,
  385. const uint8_t *dst, int dst_stride,
  386. const uint8_t *sec, int sec_stride, int do_sec,
  387. int height, __m256i *sum_reg, __m256i *sse_reg,
  388. int x_offset) {
  389. const __m256i zero_reg = _mm256_setzero_si256();
  390. const __m256i pw8 = _mm256_set1_epi16(8);
  391. const __m256i filter = _mm256_load_si256(
  392. (__m256i const *)(bilinear_filters_avx2 + (x_offset << 5)));
  393. const __m256i src_a = _mm256_loadu_si256((__m256i const *)src);
  394. const __m256i src_b = _mm256_loadu_si256((__m256i const *)(src + 1));
  395. __m256i exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi;
  396. __m256i src_reg, src_pack;
  397. int i;
  398. exp_src_lo = _mm256_unpacklo_epi8(src_a, src_b);
  399. exp_src_hi = _mm256_unpackhi_epi8(src_a, src_b);
  400. FILTER_SRC(filter)
  401. // convert each 16 bit to 8 bit to each low and high lane source
  402. src_pack = _mm256_packus_epi16(exp_src_lo, exp_src_hi);
  403. src += src_stride;
  404. for (i = 0; i < height; i++) {
  405. const __m256i dst_reg = _mm256_loadu_si256((__m256i const *)dst);
  406. const __m256i src_0 = _mm256_loadu_si256((__m256i const *)src);
  407. const __m256i src_1 = _mm256_loadu_si256((__m256i const *)(src + 1));
  408. exp_src_lo = _mm256_unpacklo_epi8(src_0, src_1);
  409. exp_src_hi = _mm256_unpackhi_epi8(src_0, src_1);
  410. FILTER_SRC(filter)
  411. src_reg = _mm256_packus_epi16(exp_src_lo, exp_src_hi);
  412. // average between previous pack to the current
  413. src_pack = _mm256_avg_epu8(src_pack, src_reg);
  414. if (do_sec) {
  415. const __m256i sec_reg = _mm256_loadu_si256((__m256i const *)sec);
  416. const __m256i avg_pack = _mm256_avg_epu8(src_pack, sec_reg);
  417. exp_src_lo = _mm256_unpacklo_epi8(avg_pack, zero_reg);
  418. exp_src_hi = _mm256_unpackhi_epi8(avg_pack, zero_reg);
  419. sec += sec_stride;
  420. } else {
  421. exp_src_lo = _mm256_unpacklo_epi8(src_pack, zero_reg);
  422. exp_src_hi = _mm256_unpackhi_epi8(src_pack, zero_reg);
  423. }
  424. CALC_SUM_SSE_INSIDE_LOOP
  425. src_pack = src_reg;
  426. dst += dst_stride;
  427. src += src_stride;
  428. }
  429. }
  430. static INLINE void spv32_xb_yb(const uint8_t *src, int src_stride,
  431. const uint8_t *dst, int dst_stride,
  432. const uint8_t *sec, int sec_stride, int do_sec,
  433. int height, __m256i *sum_reg, __m256i *sse_reg,
  434. int x_offset, int y_offset) {
  435. const __m256i zero_reg = _mm256_setzero_si256();
  436. const __m256i pw8 = _mm256_set1_epi16(8);
  437. const __m256i xfilter = _mm256_load_si256(
  438. (__m256i const *)(bilinear_filters_avx2 + (x_offset << 5)));
  439. const __m256i yfilter = _mm256_load_si256(
  440. (__m256i const *)(bilinear_filters_avx2 + (y_offset << 5)));
  441. const __m256i src_a = _mm256_loadu_si256((__m256i const *)src);
  442. const __m256i src_b = _mm256_loadu_si256((__m256i const *)(src + 1));
  443. __m256i exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi;
  444. __m256i prev_src_pack, src_pack;
  445. int i;
  446. exp_src_lo = _mm256_unpacklo_epi8(src_a, src_b);
  447. exp_src_hi = _mm256_unpackhi_epi8(src_a, src_b);
  448. FILTER_SRC(xfilter)
  449. // convert each 16 bit to 8 bit to each low and high lane source
  450. prev_src_pack = _mm256_packus_epi16(exp_src_lo, exp_src_hi);
  451. src += src_stride;
  452. for (i = 0; i < height; i++) {
  453. const __m256i dst_reg = _mm256_loadu_si256((__m256i const *)dst);
  454. const __m256i src_0 = _mm256_loadu_si256((__m256i const *)src);
  455. const __m256i src_1 = _mm256_loadu_si256((__m256i const *)(src + 1));
  456. exp_src_lo = _mm256_unpacklo_epi8(src_0, src_1);
  457. exp_src_hi = _mm256_unpackhi_epi8(src_0, src_1);
  458. FILTER_SRC(xfilter)
  459. src_pack = _mm256_packus_epi16(exp_src_lo, exp_src_hi);
  460. // merge previous pack to current pack source
  461. exp_src_lo = _mm256_unpacklo_epi8(prev_src_pack, src_pack);
  462. exp_src_hi = _mm256_unpackhi_epi8(prev_src_pack, src_pack);
  463. FILTER_SRC(yfilter)
  464. if (do_sec) {
  465. const __m256i sec_reg = _mm256_loadu_si256((__m256i const *)sec);
  466. const __m256i exp_src = _mm256_packus_epi16(exp_src_lo, exp_src_hi);
  467. const __m256i avg_reg = _mm256_avg_epu8(exp_src, sec_reg);
  468. exp_src_lo = _mm256_unpacklo_epi8(avg_reg, zero_reg);
  469. exp_src_hi = _mm256_unpackhi_epi8(avg_reg, zero_reg);
  470. sec += sec_stride;
  471. }
  472. prev_src_pack = src_pack;
  473. CALC_SUM_SSE_INSIDE_LOOP
  474. dst += dst_stride;
  475. src += src_stride;
  476. }
  477. }
  478. static INLINE int sub_pix_var32xh(const uint8_t *src, int src_stride,
  479. int x_offset, int y_offset,
  480. const uint8_t *dst, int dst_stride,
  481. const uint8_t *sec, int sec_stride,
  482. int do_sec, int height, unsigned int *sse) {
  483. const __m256i zero_reg = _mm256_setzero_si256();
  484. __m256i sum_reg = _mm256_setzero_si256();
  485. __m256i sse_reg = _mm256_setzero_si256();
  486. __m256i sse_reg_hi, res_cmp, sum_reg_lo, sum_reg_hi;
  487. int sum;
  488. // x_offset = 0 and y_offset = 0
  489. if (x_offset == 0) {
  490. if (y_offset == 0) {
  491. spv32_x0_y0(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  492. height, &sum_reg, &sse_reg);
  493. // x_offset = 0 and y_offset = 4
  494. } else if (y_offset == 4) {
  495. spv32_x0_y4(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  496. height, &sum_reg, &sse_reg);
  497. // x_offset = 0 and y_offset = bilin interpolation
  498. } else {
  499. spv32_x0_yb(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  500. height, &sum_reg, &sse_reg, y_offset);
  501. }
  502. // x_offset = 4 and y_offset = 0
  503. } else if (x_offset == 4) {
  504. if (y_offset == 0) {
  505. spv32_x4_y0(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  506. height, &sum_reg, &sse_reg);
  507. // x_offset = 4 and y_offset = 4
  508. } else if (y_offset == 4) {
  509. spv32_x4_y4(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  510. height, &sum_reg, &sse_reg);
  511. // x_offset = 4 and y_offset = bilin interpolation
  512. } else {
  513. spv32_x4_yb(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  514. height, &sum_reg, &sse_reg, y_offset);
  515. }
  516. // x_offset = bilin interpolation and y_offset = 0
  517. } else {
  518. if (y_offset == 0) {
  519. spv32_xb_y0(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  520. height, &sum_reg, &sse_reg, x_offset);
  521. // x_offset = bilin interpolation and y_offset = 4
  522. } else if (y_offset == 4) {
  523. spv32_xb_y4(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  524. height, &sum_reg, &sse_reg, x_offset);
  525. // x_offset = bilin interpolation and y_offset = bilin interpolation
  526. } else {
  527. spv32_xb_yb(src, src_stride, dst, dst_stride, sec, sec_stride, do_sec,
  528. height, &sum_reg, &sse_reg, x_offset, y_offset);
  529. }
  530. }
  531. CALC_SUM_AND_SSE
  532. return sum;
  533. }
  534. static unsigned int sub_pixel_variance32xh_avx2(
  535. const uint8_t *src, int src_stride, int x_offset, int y_offset,
  536. const uint8_t *dst, int dst_stride, int height, unsigned int *sse) {
  537. return sub_pix_var32xh(src, src_stride, x_offset, y_offset, dst, dst_stride,
  538. NULL, 0, 0, height, sse);
  539. }
  540. static unsigned int sub_pixel_avg_variance32xh_avx2(
  541. const uint8_t *src, int src_stride, int x_offset, int y_offset,
  542. const uint8_t *dst, int dst_stride, const uint8_t *sec, int sec_stride,
  543. int height, unsigned int *sse) {
  544. return sub_pix_var32xh(src, src_stride, x_offset, y_offset, dst, dst_stride,
  545. sec, sec_stride, 1, height, sse);
  546. }
  547. typedef void (*get_var_avx2)(const uint8_t *src, int src_stride,
  548. const uint8_t *ref, int ref_stride,
  549. unsigned int *sse, int *sum);
  550. static void variance_avx2(const uint8_t *src, int src_stride,
  551. const uint8_t *ref, int ref_stride, int w, int h,
  552. unsigned int *sse, int *sum, get_var_avx2 var_fn,
  553. int block_size) {
  554. int i, j;
  555. *sse = 0;
  556. *sum = 0;
  557. for (i = 0; i < h; i += 16) {
  558. for (j = 0; j < w; j += block_size) {
  559. unsigned int sse0;
  560. int sum0;
  561. var_fn(&src[src_stride * i + j], src_stride, &ref[ref_stride * i + j],
  562. ref_stride, &sse0, &sum0);
  563. *sse += sse0;
  564. *sum += sum0;
  565. }
  566. }
  567. }
  568. unsigned int vpx_variance16x16_avx2(const uint8_t *src, int src_stride,
  569. const uint8_t *ref, int ref_stride,
  570. unsigned int *sse) {
  571. int sum;
  572. variance_avx2(src, src_stride, ref, ref_stride, 16, 16, sse, &sum,
  573. vpx_get16x16var_avx2, 16);
  574. return *sse - (uint32_t)(((int64_t)sum * sum) >> 8);
  575. }
  576. unsigned int vpx_mse16x16_avx2(const uint8_t *src, int src_stride,
  577. const uint8_t *ref, int ref_stride,
  578. unsigned int *sse) {
  579. int sum;
  580. vpx_get16x16var_avx2(src, src_stride, ref, ref_stride, sse, &sum);
  581. return *sse;
  582. }
  583. unsigned int vpx_variance32x16_avx2(const uint8_t *src, int src_stride,
  584. const uint8_t *ref, int ref_stride,
  585. unsigned int *sse) {
  586. int sum;
  587. variance_avx2(src, src_stride, ref, ref_stride, 32, 16, sse, &sum,
  588. get32x16var_avx2, 32);
  589. return *sse - (uint32_t)(((int64_t)sum * sum) >> 9);
  590. }
  591. unsigned int vpx_variance32x32_avx2(const uint8_t *src, int src_stride,
  592. const uint8_t *ref, int ref_stride,
  593. unsigned int *sse) {
  594. int sum;
  595. variance_avx2(src, src_stride, ref, ref_stride, 32, 32, sse, &sum,
  596. get32x16var_avx2, 32);
  597. return *sse - (uint32_t)(((int64_t)sum * sum) >> 10);
  598. }
  599. unsigned int vpx_variance64x64_avx2(const uint8_t *src, int src_stride,
  600. const uint8_t *ref, int ref_stride,
  601. unsigned int *sse) {
  602. int sum;
  603. variance_avx2(src, src_stride, ref, ref_stride, 64, 64, sse, &sum,
  604. get32x16var_avx2, 32);
  605. return *sse - (uint32_t)(((int64_t)sum * sum) >> 12);
  606. }
  607. unsigned int vpx_variance64x32_avx2(const uint8_t *src, int src_stride,
  608. const uint8_t *ref, int ref_stride,
  609. unsigned int *sse) {
  610. int sum;
  611. variance_avx2(src, src_stride, ref, ref_stride, 64, 32, sse, &sum,
  612. get32x16var_avx2, 32);
  613. return *sse - (uint32_t)(((int64_t)sum * sum) >> 11);
  614. }
  615. unsigned int vpx_sub_pixel_variance64x64_avx2(const uint8_t *src,
  616. int src_stride, int x_offset,
  617. int y_offset, const uint8_t *dst,
  618. int dst_stride,
  619. unsigned int *sse) {
  620. unsigned int sse1;
  621. const int se1 = sub_pixel_variance32xh_avx2(
  622. src, src_stride, x_offset, y_offset, dst, dst_stride, 64, &sse1);
  623. unsigned int sse2;
  624. const int se2 =
  625. sub_pixel_variance32xh_avx2(src + 32, src_stride, x_offset, y_offset,
  626. dst + 32, dst_stride, 64, &sse2);
  627. const int se = se1 + se2;
  628. *sse = sse1 + sse2;
  629. return *sse - (uint32_t)(((int64_t)se * se) >> 12);
  630. }
  631. unsigned int vpx_sub_pixel_variance32x32_avx2(const uint8_t *src,
  632. int src_stride, int x_offset,
  633. int y_offset, const uint8_t *dst,
  634. int dst_stride,
  635. unsigned int *sse) {
  636. const int se = sub_pixel_variance32xh_avx2(
  637. src, src_stride, x_offset, y_offset, dst, dst_stride, 32, sse);
  638. return *sse - (uint32_t)(((int64_t)se * se) >> 10);
  639. }
  640. unsigned int vpx_sub_pixel_avg_variance64x64_avx2(
  641. const uint8_t *src, int src_stride, int x_offset, int y_offset,
  642. const uint8_t *dst, int dst_stride, unsigned int *sse, const uint8_t *sec) {
  643. unsigned int sse1;
  644. const int se1 = sub_pixel_avg_variance32xh_avx2(
  645. src, src_stride, x_offset, y_offset, dst, dst_stride, sec, 64, 64, &sse1);
  646. unsigned int sse2;
  647. const int se2 = sub_pixel_avg_variance32xh_avx2(
  648. src + 32, src_stride, x_offset, y_offset, dst + 32, dst_stride, sec + 32,
  649. 64, 64, &sse2);
  650. const int se = se1 + se2;
  651. *sse = sse1 + sse2;
  652. return *sse - (uint32_t)(((int64_t)se * se) >> 12);
  653. }
  654. unsigned int vpx_sub_pixel_avg_variance32x32_avx2(
  655. const uint8_t *src, int src_stride, int x_offset, int y_offset,
  656. const uint8_t *dst, int dst_stride, unsigned int *sse, const uint8_t *sec) {
  657. // Process 32 elements in parallel.
  658. const int se = sub_pixel_avg_variance32xh_avx2(
  659. src, src_stride, x_offset, y_offset, dst, dst_stride, sec, 32, 32, sse);
  660. return *sse - (uint32_t)(((int64_t)se * se) >> 10);
  661. }