lj_emit_ppc.h 7.0 KB

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  1. /*
  2. ** PPC instruction emitter.
  3. ** Copyright (C) 2005-2023 Mike Pall. See Copyright Notice in luajit.h
  4. */
  5. /* -- Emit basic instructions --------------------------------------------- */
  6. static void emit_tab(ASMState *as, PPCIns pi, Reg rt, Reg ra, Reg rb)
  7. {
  8. *--as->mcp = pi | PPCF_T(rt) | PPCF_A(ra) | PPCF_B(rb);
  9. }
  10. #define emit_asb(as, pi, ra, rs, rb) emit_tab(as, (pi), (rs), (ra), (rb))
  11. #define emit_as(as, pi, ra, rs) emit_tab(as, (pi), (rs), (ra), 0)
  12. #define emit_ab(as, pi, ra, rb) emit_tab(as, (pi), 0, (ra), (rb))
  13. static void emit_tai(ASMState *as, PPCIns pi, Reg rt, Reg ra, int32_t i)
  14. {
  15. *--as->mcp = pi | PPCF_T(rt) | PPCF_A(ra) | (i & 0xffff);
  16. }
  17. #define emit_ti(as, pi, rt, i) emit_tai(as, (pi), (rt), 0, (i))
  18. #define emit_ai(as, pi, ra, i) emit_tai(as, (pi), 0, (ra), (i))
  19. #define emit_asi(as, pi, ra, rs, i) emit_tai(as, (pi), (rs), (ra), (i))
  20. #define emit_fab(as, pi, rf, ra, rb) \
  21. emit_tab(as, (pi), (rf)&31, (ra)&31, (rb)&31)
  22. #define emit_fb(as, pi, rf, rb) emit_tab(as, (pi), (rf)&31, 0, (rb)&31)
  23. #define emit_fac(as, pi, rf, ra, rc) \
  24. emit_tab(as, (pi) | PPCF_C((rc) & 31), (rf)&31, (ra)&31, 0)
  25. #define emit_facb(as, pi, rf, ra, rc, rb) \
  26. emit_tab(as, (pi) | PPCF_C((rc) & 31), (rf)&31, (ra)&31, (rb)&31)
  27. #define emit_fai(as, pi, rf, ra, i) emit_tai(as, (pi), (rf)&31, (ra), (i))
  28. static void emit_rot(ASMState *as, PPCIns pi, Reg ra, Reg rs,
  29. int32_t n, int32_t b, int32_t e)
  30. {
  31. *--as->mcp = pi | PPCF_T(rs) | PPCF_A(ra) | PPCF_B(n) |
  32. PPCF_MB(b) | PPCF_ME(e);
  33. }
  34. static void emit_slwi(ASMState *as, Reg ra, Reg rs, int32_t n)
  35. {
  36. lj_assertA(n >= 0 && n < 32, "shift out or range");
  37. emit_rot(as, PPCI_RLWINM, ra, rs, n, 0, 31-n);
  38. }
  39. static void emit_rotlwi(ASMState *as, Reg ra, Reg rs, int32_t n)
  40. {
  41. lj_assertA(n >= 0 && n < 32, "shift out or range");
  42. emit_rot(as, PPCI_RLWINM, ra, rs, n, 0, 31);
  43. }
  44. /* -- Emit loads/stores --------------------------------------------------- */
  45. /* Prefer rematerialization of BASE/L from global_State over spills. */
  46. #define emit_canremat(ref) ((ref) <= REF_BASE)
  47. /* Try to find a one step delta relative to another constant. */
  48. static int emit_kdelta1(ASMState *as, Reg rd, int32_t i)
  49. {
  50. RegSet work = ~as->freeset & RSET_GPR;
  51. while (work) {
  52. Reg r = rset_picktop(work);
  53. IRRef ref = regcost_ref(as->cost[r]);
  54. lj_assertA(r != rd, "dest reg %d not free", rd);
  55. if (ref < ASMREF_L) {
  56. int32_t delta = i - (ra_iskref(ref) ? ra_krefk(as, ref) : IR(ref)->i);
  57. if (checki16(delta)) {
  58. emit_tai(as, PPCI_ADDI, rd, r, delta);
  59. return 1;
  60. }
  61. }
  62. rset_clear(work, r);
  63. }
  64. return 0; /* Failed. */
  65. }
  66. /* Load a 32 bit constant into a GPR. */
  67. static void emit_loadi(ASMState *as, Reg r, int32_t i)
  68. {
  69. if (checki16(i)) {
  70. emit_ti(as, PPCI_LI, r, i);
  71. } else {
  72. if ((i & 0xffff)) {
  73. int32_t jgl = i32ptr(J2G(as->J));
  74. if ((uint32_t)(i-jgl) < 65536) {
  75. emit_tai(as, PPCI_ADDI, r, RID_JGL, i-jgl-32768);
  76. return;
  77. } else if (emit_kdelta1(as, r, i)) {
  78. return;
  79. }
  80. emit_asi(as, PPCI_ORI, r, r, i);
  81. }
  82. emit_ti(as, PPCI_LIS, r, (i >> 16));
  83. }
  84. }
  85. #define emit_loada(as, r, addr) emit_loadi(as, (r), i32ptr((addr)))
  86. static Reg ra_allock(ASMState *as, intptr_t k, RegSet allow);
  87. /* Get/set from constant pointer. */
  88. static void emit_lsptr(ASMState *as, PPCIns pi, Reg r, void *p, RegSet allow)
  89. {
  90. int32_t jgl = i32ptr(J2G(as->J));
  91. int32_t i = i32ptr(p);
  92. Reg base;
  93. if ((uint32_t)(i-jgl) < 65536) {
  94. i = i-jgl-32768;
  95. base = RID_JGL;
  96. } else {
  97. base = ra_allock(as, i-(int16_t)i, allow);
  98. }
  99. emit_tai(as, pi, r, base, i);
  100. }
  101. #define emit_loadk64(as, r, ir) \
  102. emit_lsptr(as, PPCI_LFD, ((r) & 31), (void *)&ir_knum((ir))->u64, RSET_GPR)
  103. /* Get/set global_State fields. */
  104. static void emit_lsglptr(ASMState *as, PPCIns pi, Reg r, int32_t ofs)
  105. {
  106. emit_tai(as, pi, r, RID_JGL, ofs-32768);
  107. }
  108. #define emit_getgl(as, r, field) \
  109. emit_lsglptr(as, PPCI_LWZ, (r), (int32_t)offsetof(global_State, field))
  110. #define emit_setgl(as, r, field) \
  111. emit_lsglptr(as, PPCI_STW, (r), (int32_t)offsetof(global_State, field))
  112. /* Trace number is determined from per-trace exit stubs. */
  113. #define emit_setvmstate(as, i) UNUSED(i)
  114. /* -- Emit control-flow instructions -------------------------------------- */
  115. /* Label for internal jumps. */
  116. typedef MCode *MCLabel;
  117. /* Return label pointing to current PC. */
  118. #define emit_label(as) ((as)->mcp)
  119. static void emit_condbranch(ASMState *as, PPCIns pi, PPCCC cc, MCode *target)
  120. {
  121. MCode *p = --as->mcp;
  122. ptrdiff_t delta = (char *)target - (char *)p;
  123. lj_assertA(((delta + 0x8000) >> 16) == 0, "branch target out of range");
  124. pi ^= (delta & 0x8000) * (PPCF_Y/0x8000);
  125. *p = pi | PPCF_CC(cc) | ((uint32_t)delta & 0xffffu);
  126. }
  127. static void emit_jmp(ASMState *as, MCode *target)
  128. {
  129. MCode *p = --as->mcp;
  130. ptrdiff_t delta = (char *)target - (char *)p;
  131. *p = PPCI_B | (delta & 0x03fffffcu);
  132. }
  133. static void emit_call(ASMState *as, void *target)
  134. {
  135. MCode *p = --as->mcp;
  136. ptrdiff_t delta = (char *)target - (char *)p;
  137. if ((((delta>>2) + 0x00800000) >> 24) == 0) {
  138. *p = PPCI_BL | (delta & 0x03fffffcu);
  139. } else { /* Target out of range: need indirect call. Don't use arg reg. */
  140. RegSet allow = RSET_GPR & ~RSET_RANGE(RID_R0, REGARG_LASTGPR+1);
  141. Reg r = ra_allock(as, i32ptr(target), allow);
  142. *p = PPCI_BCTRL;
  143. p[-1] = PPCI_MTCTR | PPCF_T(r);
  144. as->mcp = p-1;
  145. }
  146. }
  147. /* -- Emit generic operations --------------------------------------------- */
  148. #define emit_mr(as, dst, src) \
  149. emit_asb(as, PPCI_MR, (dst), (src), (src))
  150. /* Generic move between two regs. */
  151. static void emit_movrr(ASMState *as, IRIns *ir, Reg dst, Reg src)
  152. {
  153. UNUSED(ir);
  154. if (dst < RID_MAX_GPR)
  155. emit_mr(as, dst, src);
  156. else
  157. emit_fb(as, PPCI_FMR, dst, src);
  158. }
  159. /* Generic load of register with base and (small) offset address. */
  160. static void emit_loadofs(ASMState *as, IRIns *ir, Reg r, Reg base, int32_t ofs)
  161. {
  162. if (r < RID_MAX_GPR)
  163. emit_tai(as, PPCI_LWZ, r, base, ofs);
  164. else
  165. emit_fai(as, irt_isnum(ir->t) ? PPCI_LFD : PPCI_LFS, r, base, ofs);
  166. }
  167. /* Generic store of register with base and (small) offset address. */
  168. static void emit_storeofs(ASMState *as, IRIns *ir, Reg r, Reg base, int32_t ofs)
  169. {
  170. if (r < RID_MAX_GPR)
  171. emit_tai(as, PPCI_STW, r, base, ofs);
  172. else
  173. emit_fai(as, irt_isnum(ir->t) ? PPCI_STFD : PPCI_STFS, r, base, ofs);
  174. }
  175. /* Emit a compare (for equality) with a constant operand. */
  176. static void emit_cmpi(ASMState *as, Reg r, int32_t k)
  177. {
  178. if (checki16(k)) {
  179. emit_ai(as, PPCI_CMPWI, r, k);
  180. } else if (checku16(k)) {
  181. emit_ai(as, PPCI_CMPLWI, r, k);
  182. } else {
  183. emit_ai(as, PPCI_CMPLWI, RID_TMP, k);
  184. emit_asi(as, PPCI_XORIS, RID_TMP, r, (k >> 16));
  185. }
  186. }
  187. /* Add offset to pointer. */
  188. static void emit_addptr(ASMState *as, Reg r, int32_t ofs)
  189. {
  190. if (ofs) {
  191. emit_tai(as, PPCI_ADDI, r, r, ofs);
  192. if (!checki16(ofs))
  193. emit_tai(as, PPCI_ADDIS, r, r, (ofs + 32768) >> 16);
  194. }
  195. }
  196. static void emit_spsub(ASMState *as, int32_t ofs)
  197. {
  198. if (ofs) {
  199. emit_tai(as, PPCI_STWU, RID_TMP, RID_SP, -ofs);
  200. emit_tai(as, PPCI_ADDI, RID_TMP, RID_SP,
  201. CFRAME_SIZE + (as->parent ? as->parent->spadjust : 0));
  202. }
  203. }