ARM auto-detection (unfinished)

core/AES.cpp

@@ -745,7 +745,7 @@ void AES::CTR::crypt(const void *const input, unsigned int len) noexcept
 #endif // ZT_AES_AESNI
 
 #ifdef ZT_AES_NEON
-	if (s_hasNeonAes) {
+	if (Utils::ARMCAP.aes) {
 		uint8x16_t dd = vld1q_u8(reinterpret_cast<uint8_t *>(_ctr));
 		const uint32x4_t one = {0,0,0,1};
 
@@ -1332,9 +1332,6 @@ void AES::_decrypt_aesni(const void *in, void *out) const noexcept
 
 #ifdef ZT_AES_NEON
 
-const bool AES::s_hasNeonAes = true;
-const bool AES::s_hasNeonGcm = true;
-
 #define ZT_INIT_ARMNEON_CRYPTO_SUBWORD(w) ((uint32_t)s_sbox[w & 0xffU] + ((uint32_t)s_sbox[(w >> 8U) & 0xffU] << 8U) + ((uint32_t)s_sbox[(w >> 16U) & 0xffU] << 16U) + ((uint32_t)s_sbox[(w >> 24U) & 0xffU] << 24U))
 #define ZT_INIT_ARMNEON_CRYPTO_ROTWORD(w) (((w) << 8U) | ((w) >> 24U))
 #define ZT_INIT_ARMNEON_CRYPTO_NK 8

core/AES.hpp

@@ -79,7 +79,7 @@ public:
 		}
 #endif
 #ifdef ZT_AES_NEON
-		if (s_hasNeonAes) {
+		if (Utils::ARMCAP.aes) {
 			_init_armneon_crypto(reinterpret_cast<const uint8_t *>(key));
 			return;
 		}
@@ -102,7 +102,7 @@ public:
 		}
 #endif
 #ifdef ZT_AES_NEON
-		if (s_hasNeonAes) {
+		if (Utils::ARMCAP.aes) {
 			_encrypt_armneon_crypto(in, out);
 			return;
 		}
@@ -125,7 +125,7 @@ public:
 		}
 #endif
 #ifdef ZT_AES_NEON
-		if (s_hasNeonAes) {
+		if (Utils::ARMCAP.aes) {
 			_decrypt_armneon_crypto(in, out);
 			return;
 		}
@@ -548,8 +548,6 @@ private:
 #endif
 
 #ifdef ZT_AES_NEON
-	static const bool s_hasNeonAes;
-	static const bool s_hasNeonGcm;
 	void _init_armneon_crypto(const uint8_t key[32]) noexcept;
 	void _encrypt_armneon_crypto(const void *const in, void *const out) const noexcept;
 	void _decrypt_armneon_crypto(const void *const in, void *const out) const noexcept;

core/Utils.cpp

@@ -17,11 +17,9 @@
 #include "SHA512.hpp"
 
 #ifdef __UNIX_LIKE__
-
 #include <unistd.h>
 #include <fcntl.h>
 #include <sys/uio.h>
-
 #endif
 
 #include <time.h>
@@ -31,10 +29,38 @@
 #include <wincrypt.h>
 #endif
 
+#if defined(ZT_ARCH_ARM_HAS_NEON) && defined(__LINUX__)
+#include <sys/auxv.h>
+#include <asm/hwcap.h>
+#endif
+
 namespace ZeroTier {
 
 namespace Utils {
 
+#ifdef ZT_ARCH_ARM_HAS_NEON
+ARMCapabilities::ARMCapabilities() noexcept
+{
+	if (sizeof(void *) == 4) {
+		const long hwcaps2 = getauxval(AT_HWCAP2);
+		this->aes = (hwcaps2 & HWCAP2_AES) != 0;
+		this->crc32 = (hwcaps2 & HWCAP2_CRC32) != 0;
+		this->pmull = (hwcaps2 & HWCAP2_PMULL) != 0;
+		this->sha1 = (hwcaps2 & HWCAP2_SHA1) != 0;
+		this->sha2 = (hwcaps2 & HWCAP2_SHA2) != 0;
+	} else {
+		const long hwcaps = getauxval(AT_HWCAP);
+		this->aes = (hwcaps & HWCAP_AES) != 0;
+		this->crc32 = (hwcaps & HWCAP_CRC32) != 0;
+		this->pmull = (hwcaps & HWCAP_PMULL) != 0;
+		this->sha1 = (hwcaps & HWCAP_SHA1) != 0;
+		this->sha2 = (hwcaps & HWCAP_SHA2) != 0;
+	}
+}
+
+const ARMCapabilities ARMCAP;
+#endif
+
 #ifdef ZT_ARCH_X64
 
 CPUIDRegisters::CPUIDRegisters() noexcept

core/Utils.hpp

@@ -56,6 +56,20 @@ namespace Utils {
 #define ZT_ROR32(x, r) (((x) >> (r)) | ((x) << (32 - (r))))
 #define ZT_ROL32(x, r) (((x) << (r)) | ((x) >> (32 - (r))))
 
+#ifdef ZT_ARCH_ARM_HAS_NEON
+struct ARMCapabilities
+{
+	ARMCapabilities() noexcept;
+
+	bool aes;
+	bool crc32;
+	bool pmull;
+	bool sha1;
+	bool sha2;
+};
+extern const ARMCapabilities ARMCAP;
+#endif
+
 #ifdef ZT_ARCH_X64
 struct CPUIDRegisters
 {