Updated spirv-headers.

3rdparty/spirv-headers/include/spirv/spir-v.xml

@@ -84,7 +84,8 @@
         <id value="31"  vendor="Google" tool="Skia SkSL" comment="Contact Ethan Nicholas, [email protected]"/>
         <id value="32"  vendor="TornadoVM" tool="SPIRV Beehive Toolkit" comment="https://github.com/beehive-lab/spirv-beehive-toolkit"/>
         <id value="33"  vendor="DragonJoker" tool="ShaderWriter" comment="Contact Sylvain Doremus, https://github.com/DragonJoker/ShaderWriter"/>
-        <unused start="34" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
+        <id value="34"  vendor="Rayan Hatout" tool="SPIRVSmith" comment="Contact Rayan Hatout [email protected], Repo https://github.com/rayanht/SPIRVSmith"/>
+        <unused start="35" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
     </ids>
 
     <!-- SECTION: SPIR-V Opcodes and Enumerants -->

3rdparty/spirv-headers/include/spirv/unified1/spirv.core.grammar.json

@@ -4183,6 +4183,21 @@
       "capabilities" : [ "SubgroupVoteKHR" ],
       "version" : "None"
     },
+    {
+      "opname" : "OpGroupNonUniformRotateKHR",
+      "class"  : "Group",
+      "opcode" : 4431,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdScope", "name" : "'Execution'" },
+        { "kind" : "IdRef", "name" : "'Value'" },
+        { "kind" : "IdRef", "name" : "'Delta'" },
+        { "kind" : "IdRef", "name" : "'ClusterSize'", "quantifier" : "?" }
+      ],
+      "capabilities" : [ "GroupNonUniformRotateKHR" ],
+      "version" : "None"
+    },
     {
       "opname" : "OpSubgroupReadInvocationKHR",
       "class"  : "Group",
@@ -9434,6 +9449,10 @@
         {
           "enumerant" : "CPP_for_OpenCL",
           "value" : 6
+        },
+        {
+          "enumerant" : "SYCL",
+          "value" : 7
         }
       ]
     },
@@ -10110,6 +10129,15 @@
           ],
           "capabilities" : [ "FPGAKernelAttributesINTEL" ],
           "version" : "None"
+        },
+        {
+          "enumerant" : "NamedBarrierCountINTEL",
+          "value" : 6417,
+          "parameters" : [
+            { "kind" : "LiteralInteger", "name" : "'Barrier Count'" }
+          ],
+          "capabilities" : [ "VectorComputeINTEL" ],
+          "version" : "None"
         }
       ]
     },
@@ -12588,6 +12616,13 @@
           "capabilities" : [ "ShaderSMBuiltinsNV" ],
           "extensions" : [ "SPV_NV_shader_sm_builtins" ],
           "version" : "None"
+        },
+        {
+          "enumerant" : "CullMaskKHR",
+          "value"  : 6021,
+          "capabilities" : [ "RayCullMaskKHR" ],
+          "extensions" : [ "SPV_KHR_ray_cull_mask" ],
+          "version" : "None"
         }
       ]
     },
@@ -13976,12 +14011,25 @@
           "extensions" : [ "SPV_KHR_integer_dot_product" ],
           "version" : "1.6"
         },
+        {
+          "enumerant" : "RayCullMaskKHR",
+          "value" : 6020,
+          "extensions" : [ "SPV_KHR_ray_cull_mask" ],
+          "version" : "None"
+        },
         {
           "enumerant" : "BitInstructions",
           "value" : 6025,
           "extensions" : [ "SPV_KHR_bit_instructions" ],
           "version" : "None"
         },
+        {
+          "enumerant" : "GroupNonUniformRotateKHR",
+          "value" : 6026,
+          "capabilities" : [ "GroupNonUniform" ],
+          "extensions" : [ "SPV_KHR_subgroup_rotate" ],
+          "version" : "None"
+        },
         {
           "enumerant" : "AtomicFloat32AddEXT",
           "value" : 6033,

3rdparty/spirv-headers/include/spirv/unified1/spirv.cs

@@ -62,6 +62,7 @@ namespace Spv
             OpenCL_CPP = 4,
             HLSL = 5,
             CPP_for_OpenCL = 6,
+            SYCL = 7,
         }
 
         public enum ExecutionModel
@@ -176,6 +177,7 @@ namespace Spv
             NoGlobalOffsetINTEL = 5895,
             NumSIMDWorkitemsINTEL = 5896,
             SchedulerTargetFmaxMhzINTEL = 5903,
+            NamedBarrierCountINTEL = 6417,
         }
 
         public enum StorageClass
@@ -673,6 +675,7 @@ namespace Spv
             SMCountNV = 5375,
             WarpIDNV = 5376,
             SMIDNV = 5377,
+            CullMaskKHR = 6021,
         }
 
         public enum SelectionControlShift
@@ -1080,7 +1083,9 @@ namespace Spv
             DotProductInput4x8BitPackedKHR = 6018,
             DotProduct = 6019,
             DotProductKHR = 6019,
+            RayCullMaskKHR = 6020,
             BitInstructions = 6025,
+            GroupNonUniformRotateKHR = 6026,
             AtomicFloat32AddEXT = 6033,
             AtomicFloat64AddEXT = 6034,
             LongConstantCompositeINTEL = 6089,
@@ -1546,6 +1551,7 @@ namespace Spv
             OpSubgroupAllKHR = 4428,
             OpSubgroupAnyKHR = 4429,
             OpSubgroupAllEqualKHR = 4430,
+            OpGroupNonUniformRotateKHR = 4431,
             OpSubgroupReadInvocationKHR = 4432,
             OpTraceRayKHR = 4445,
             OpExecuteCallableKHR = 4446,

3rdparty/spirv-headers/include/spirv/unified1/spirv.h

@@ -70,6 +70,7 @@ typedef enum SpvSourceLanguage_ {
     SpvSourceLanguageOpenCL_CPP = 4,
     SpvSourceLanguageHLSL = 5,
     SpvSourceLanguageCPP_for_OpenCL = 6,
+    SpvSourceLanguageSYCL = 7,
     SpvSourceLanguageMax = 0x7fffffff,
 } SpvSourceLanguage;
 
@@ -184,6 +185,7 @@ typedef enum SpvExecutionMode_ {
     SpvExecutionModeNoGlobalOffsetINTEL = 5895,
     SpvExecutionModeNumSIMDWorkitemsINTEL = 5896,
     SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
+    SpvExecutionModeNamedBarrierCountINTEL = 6417,
     SpvExecutionModeMax = 0x7fffffff,
 } SpvExecutionMode;
 
@@ -679,6 +681,7 @@ typedef enum SpvBuiltIn_ {
     SpvBuiltInSMCountNV = 5375,
     SpvBuiltInWarpIDNV = 5376,
     SpvBuiltInSMIDNV = 5377,
+    SpvBuiltInCullMaskKHR = 6021,
     SpvBuiltInMax = 0x7fffffff,
 } SpvBuiltIn;
 
@@ -1080,7 +1083,9 @@ typedef enum SpvCapability_ {
     SpvCapabilityDotProductInput4x8BitPackedKHR = 6018,
     SpvCapabilityDotProduct = 6019,
     SpvCapabilityDotProductKHR = 6019,
+    SpvCapabilityRayCullMaskKHR = 6020,
     SpvCapabilityBitInstructions = 6025,
+    SpvCapabilityGroupNonUniformRotateKHR = 6026,
     SpvCapabilityAtomicFloat32AddEXT = 6033,
     SpvCapabilityAtomicFloat64AddEXT = 6034,
     SpvCapabilityLongConstantCompositeINTEL = 6089,
@@ -1544,6 +1549,7 @@ typedef enum SpvOp_ {
     SpvOpSubgroupAllKHR = 4428,
     SpvOpSubgroupAnyKHR = 4429,
     SpvOpSubgroupAllEqualKHR = 4430,
+    SpvOpGroupNonUniformRotateKHR = 4431,
     SpvOpSubgroupReadInvocationKHR = 4432,
     SpvOpTraceRayKHR = 4445,
     SpvOpExecuteCallableKHR = 4446,
@@ -2222,6 +2228,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
     case SpvOpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
     case SpvOpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
     case SpvOpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
+    case SpvOpGroupNonUniformRotateKHR: *hasResult = true; *hasResultType = true; break;
     case SpvOpSubgroupReadInvocationKHR: *hasResult = true; *hasResultType = true; break;
     case SpvOpTraceRayKHR: *hasResult = false; *hasResultType = false; break;
     case SpvOpExecuteCallableKHR: *hasResult = false; *hasResultType = false; break;

3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp

@@ -66,6 +66,7 @@ enum SourceLanguage {
     SourceLanguageOpenCL_CPP = 4,
     SourceLanguageHLSL = 5,
     SourceLanguageCPP_for_OpenCL = 6,
+    SourceLanguageSYCL = 7,
     SourceLanguageMax = 0x7fffffff,
 };
 
@@ -180,6 +181,7 @@ enum ExecutionMode {
     ExecutionModeNoGlobalOffsetINTEL = 5895,
     ExecutionModeNumSIMDWorkitemsINTEL = 5896,
     ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
+    ExecutionModeNamedBarrierCountINTEL = 6417,
     ExecutionModeMax = 0x7fffffff,
 };
 
@@ -675,6 +677,7 @@ enum BuiltIn {
     BuiltInSMCountNV = 5375,
     BuiltInWarpIDNV = 5376,
     BuiltInSMIDNV = 5377,
+    BuiltInCullMaskKHR = 6021,
     BuiltInMax = 0x7fffffff,
 };
 
@@ -1076,7 +1079,9 @@ enum Capability {
     CapabilityDotProductInput4x8BitPackedKHR = 6018,
     CapabilityDotProduct = 6019,
     CapabilityDotProductKHR = 6019,
+    CapabilityRayCullMaskKHR = 6020,
     CapabilityBitInstructions = 6025,
+    CapabilityGroupNonUniformRotateKHR = 6026,
     CapabilityAtomicFloat32AddEXT = 6033,
     CapabilityAtomicFloat64AddEXT = 6034,
     CapabilityLongConstantCompositeINTEL = 6089,
@@ -1540,6 +1545,7 @@ enum Op {
     OpSubgroupAllKHR = 4428,
     OpSubgroupAnyKHR = 4429,
     OpSubgroupAllEqualKHR = 4430,
+    OpGroupNonUniformRotateKHR = 4431,
     OpSubgroupReadInvocationKHR = 4432,
     OpTraceRayKHR = 4445,
     OpExecuteCallableKHR = 4446,
@@ -2218,6 +2224,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
     case OpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
     case OpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
     case OpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
+    case OpGroupNonUniformRotateKHR: *hasResult = true; *hasResultType = true; break;
     case OpSubgroupReadInvocationKHR: *hasResult = true; *hasResultType = true; break;
     case OpTraceRayKHR: *hasResult = false; *hasResultType = false; break;
     case OpExecuteCallableKHR: *hasResult = false; *hasResultType = false; break;

3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp11

@@ -66,6 +66,7 @@ enum class SourceLanguage : unsigned {
     OpenCL_CPP = 4,
     HLSL = 5,
     CPP_for_OpenCL = 6,
+    SYCL = 7,
     Max = 0x7fffffff,
 };
 
@@ -180,6 +181,7 @@ enum class ExecutionMode : unsigned {
     NoGlobalOffsetINTEL = 5895,
     NumSIMDWorkitemsINTEL = 5896,
     SchedulerTargetFmaxMhzINTEL = 5903,
+    NamedBarrierCountINTEL = 6417,
     Max = 0x7fffffff,
 };
 
@@ -675,6 +677,7 @@ enum class BuiltIn : unsigned {
     SMCountNV = 5375,
     WarpIDNV = 5376,
     SMIDNV = 5377,
+    CullMaskKHR = 6021,
     Max = 0x7fffffff,
 };
 
@@ -1076,7 +1079,9 @@ enum class Capability : unsigned {
     DotProductInput4x8BitPackedKHR = 6018,
     DotProduct = 6019,
     DotProductKHR = 6019,
+    RayCullMaskKHR = 6020,
     BitInstructions = 6025,
+    GroupNonUniformRotateKHR = 6026,
     AtomicFloat32AddEXT = 6033,
     AtomicFloat64AddEXT = 6034,
     LongConstantCompositeINTEL = 6089,
@@ -1540,6 +1545,7 @@ enum class Op : unsigned {
     OpSubgroupAllKHR = 4428,
     OpSubgroupAnyKHR = 4429,
     OpSubgroupAllEqualKHR = 4430,
+    OpGroupNonUniformRotateKHR = 4431,
     OpSubgroupReadInvocationKHR = 4432,
     OpTraceRayKHR = 4445,
     OpExecuteCallableKHR = 4446,
@@ -2218,6 +2224,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
     case Op::OpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
     case Op::OpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
     case Op::OpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
+    case Op::OpGroupNonUniformRotateKHR: *hasResult = true; *hasResultType = true; break;
     case Op::OpSubgroupReadInvocationKHR: *hasResult = true; *hasResultType = true; break;
     case Op::OpTraceRayKHR: *hasResult = false; *hasResultType = false; break;
     case Op::OpExecuteCallableKHR: *hasResult = false; *hasResultType = false; break;

3rdparty/spirv-headers/include/spirv/unified1/spirv.json

@@ -72,7 +72,8 @@
                     "OpenCL_C": 3,
                     "OpenCL_CPP": 4,
                     "HLSL": 5,
-                    "CPP_for_OpenCL": 6
+                    "CPP_for_OpenCL": 6,
+                    "SYCL": 7
                 }
             },
             {
@@ -198,7 +199,8 @@
                     "MaxWorkDimINTEL": 5894,
                     "NoGlobalOffsetINTEL": 5895,
                     "NumSIMDWorkitemsINTEL": 5896,
-                    "SchedulerTargetFmaxMhzINTEL": 5903
+                    "SchedulerTargetFmaxMhzINTEL": 5903,
+                    "NamedBarrierCountINTEL": 6417
                 }
             },
             {
@@ -703,7 +705,8 @@
                     "WarpsPerSMNV": 5374,
                     "SMCountNV": 5375,
                     "WarpIDNV": 5376,
-                    "SMIDNV": 5377
+                    "SMIDNV": 5377,
+                    "CullMaskKHR": 6021
                 }
             },
             {
@@ -1058,7 +1061,9 @@
                     "DotProductInput4x8BitPackedKHR": 6018,
                     "DotProduct": 6019,
                     "DotProductKHR": 6019,
+                    "RayCullMaskKHR": 6020,
                     "BitInstructions": 6025,
+                    "GroupNonUniformRotateKHR": 6026,
                     "AtomicFloat32AddEXT": 6033,
                     "AtomicFloat64AddEXT": 6034,
                     "LongConstantCompositeINTEL": 6089,
@@ -1533,6 +1538,7 @@
                     "OpSubgroupAllKHR": 4428,
                     "OpSubgroupAnyKHR": 4429,
                     "OpSubgroupAllEqualKHR": 4430,
+                    "OpGroupNonUniformRotateKHR": 4431,
                     "OpSubgroupReadInvocationKHR": 4432,
                     "OpTraceRayKHR": 4445,
                     "OpExecuteCallableKHR": 4446,

3rdparty/spirv-headers/include/spirv/unified1/spirv.lua

@@ -57,6 +57,7 @@ spv = {
         OpenCL_CPP = 4,
         HLSL = 5,
         CPP_for_OpenCL = 6,
+        SYCL = 7,
     },
 
     ExecutionModel = {
@@ -167,6 +168,7 @@ spv = {
         NoGlobalOffsetINTEL = 5895,
         NumSIMDWorkitemsINTEL = 5896,
         SchedulerTargetFmaxMhzINTEL = 5903,
+        NamedBarrierCountINTEL = 6417,
     },
 
     StorageClass = {
@@ -647,6 +649,7 @@ spv = {
         SMCountNV = 5375,
         WarpIDNV = 5376,
         SMIDNV = 5377,
+        CullMaskKHR = 6021,
     },
 
     SelectionControlShift = {
@@ -1038,7 +1041,9 @@ spv = {
         DotProductInput4x8BitPackedKHR = 6018,
         DotProduct = 6019,
         DotProductKHR = 6019,
+        RayCullMaskKHR = 6020,
         BitInstructions = 6025,
+        GroupNonUniformRotateKHR = 6026,
         AtomicFloat32AddEXT = 6033,
         AtomicFloat64AddEXT = 6034,
         LongConstantCompositeINTEL = 6089,
@@ -1491,6 +1496,7 @@ spv = {
         OpSubgroupAllKHR = 4428,
         OpSubgroupAnyKHR = 4429,
         OpSubgroupAllEqualKHR = 4430,
+        OpGroupNonUniformRotateKHR = 4431,
         OpSubgroupReadInvocationKHR = 4432,
         OpTraceRayKHR = 4445,
         OpExecuteCallableKHR = 4446,

3rdparty/spirv-headers/include/spirv/unified1/spirv.py

@@ -57,6 +57,7 @@ spv = {
         'OpenCL_CPP' : 4,
         'HLSL' : 5,
         'CPP_for_OpenCL' : 6,
+        'SYCL' : 7,
     },
 
     'ExecutionModel' : {
@@ -167,6 +168,7 @@ spv = {
         'NoGlobalOffsetINTEL' : 5895,
         'NumSIMDWorkitemsINTEL' : 5896,
         'SchedulerTargetFmaxMhzINTEL' : 5903,
+        'NamedBarrierCountINTEL' : 6417,
     },
 
     'StorageClass' : {
@@ -647,6 +649,7 @@ spv = {
         'SMCountNV' : 5375,
         'WarpIDNV' : 5376,
         'SMIDNV' : 5377,
+        'CullMaskKHR' : 6021,
     },
 
     'SelectionControlShift' : {
@@ -1038,7 +1041,9 @@ spv = {
         'DotProductInput4x8BitPackedKHR' : 6018,
         'DotProduct' : 6019,
         'DotProductKHR' : 6019,
+        'RayCullMaskKHR' : 6020,
         'BitInstructions' : 6025,
+        'GroupNonUniformRotateKHR' : 6026,
         'AtomicFloat32AddEXT' : 6033,
         'AtomicFloat64AddEXT' : 6034,
         'LongConstantCompositeINTEL' : 6089,
@@ -1491,6 +1496,7 @@ spv = {
         'OpSubgroupAllKHR' : 4428,
         'OpSubgroupAnyKHR' : 4429,
         'OpSubgroupAllEqualKHR' : 4430,
+        'OpGroupNonUniformRotateKHR' : 4431,
         'OpSubgroupReadInvocationKHR' : 4432,
         'OpTraceRayKHR' : 4445,
         'OpExecuteCallableKHR' : 4446,

3rdparty/spirv-headers/include/spirv/unified1/spv.d

@@ -65,6 +65,7 @@ enum SourceLanguage : uint
     OpenCL_CPP = 4,
     HLSL = 5,
     CPP_for_OpenCL = 6,
+    SYCL = 7,
 }
 
 enum ExecutionModel : uint
@@ -179,6 +180,7 @@ enum ExecutionMode : uint
     NoGlobalOffsetINTEL = 5895,
     NumSIMDWorkitemsINTEL = 5896,
     SchedulerTargetFmaxMhzINTEL = 5903,
+    NamedBarrierCountINTEL = 6417,
 }
 
 enum StorageClass : uint
@@ -676,6 +678,7 @@ enum BuiltIn : uint
     SMCountNV = 5375,
     WarpIDNV = 5376,
     SMIDNV = 5377,
+    CullMaskKHR = 6021,
 }
 
 enum SelectionControlShift : uint
@@ -1083,7 +1086,9 @@ enum Capability : uint
     DotProductInput4x8BitPackedKHR = 6018,
     DotProduct = 6019,
     DotProductKHR = 6019,
+    RayCullMaskKHR = 6020,
     BitInstructions = 6025,
+    GroupNonUniformRotateKHR = 6026,
     AtomicFloat32AddEXT = 6033,
     AtomicFloat64AddEXT = 6034,
     LongConstantCompositeINTEL = 6089,
@@ -1549,6 +1554,7 @@ enum Op : uint
     OpSubgroupAllKHR = 4428,
     OpSubgroupAnyKHR = 4429,
     OpSubgroupAllEqualKHR = 4430,
+    OpGroupNonUniformRotateKHR = 4431,
     OpSubgroupReadInvocationKHR = 4432,
     OpTraceRayKHR = 4445,
     OpExecuteCallableKHR = 4446,