Updated glslang.

3rdparty/glslang/SPIRV/disassemble.cpp

@@ -353,10 +353,21 @@ void SpirvStream::disassembleInstruction(Id resultId, Id /*typeId*/, Op opCode,
         if (resultId != 0 && idDescriptor[resultId].size() == 0) {
             switch (opCode) {
             case OpTypeInt:
-                idDescriptor[resultId] = "int";
+                switch (stream[word]) {
+                case 8:  idDescriptor[resultId] = "int8_t"; break;
+                case 16: idDescriptor[resultId] = "int16_t"; break;
+                default: assert(0); // fallthrough
+                case 32: idDescriptor[resultId] = "int"; break;
+                case 64: idDescriptor[resultId] = "int64_t"; break;
+                }
                 break;
             case OpTypeFloat:
-                idDescriptor[resultId] = "float";
+                switch (stream[word]) {
+                case 16: idDescriptor[resultId] = "float16_t"; break;
+                default: assert(0); // fallthrough
+                case 32: idDescriptor[resultId] = "float"; break;
+                case 64: idDescriptor[resultId] = "float64_t"; break;
+                }
                 break;
             case OpTypeBool:
                 idDescriptor[resultId] = "bool";
@@ -368,8 +379,18 @@ void SpirvStream::disassembleInstruction(Id resultId, Id /*typeId*/, Op opCode,
                 idDescriptor[resultId] = "ptr";
                 break;
             case OpTypeVector:
-                if (idDescriptor[stream[word]].size() > 0)
+                if (idDescriptor[stream[word]].size() > 0) {
                     idDescriptor[resultId].append(idDescriptor[stream[word]].begin(), idDescriptor[stream[word]].begin() + 1);
+                    if (strstr(idDescriptor[stream[word]].c_str(), "8")) {
+                        idDescriptor[resultId].append("8");
+                    }
+                    if (strstr(idDescriptor[stream[word]].c_str(), "16")) {
+                        idDescriptor[resultId].append("16");
+                    }
+                    if (strstr(idDescriptor[stream[word]].c_str(), "64")) {
+                        idDescriptor[resultId].append("64");
+                    }
+                }
                 idDescriptor[resultId].append("vec");
                 switch (stream[word + 1]) {
                 case 2:   idDescriptor[resultId].append("2");   break;

3rdparty/glslang/Test/baseLegalResults/hlsl.partialFlattenLocal.vert.out

@@ -1,7 +1,7 @@
 hlsl.partialFlattenLocal.vert
 // Module Version 10000
 // Generated by (magic number): 80006
-// Id's are bound by 169
+// Id's are bound by 158
 
                               Capability Shader
                1:             ExtInstImport  "GLSL.std.450"
@@ -51,29 +51,29 @@ hlsl.partialFlattenLocal.vert
                               Store 137 38
                               Branch 100
              100:             Label
-             168:     21(int) Phi 25 5 119 106
-             105:    54(bool) SLessThan 168 31
+             157:     21(int) Phi 25 5 119 106
+             105:    54(bool) SLessThan 157 31
                               LoopMerge 101 106 None
                               BranchConditional 105 106 101
              106:               Label
-             138:     39(ptr)   AccessChain 133 168
+             138:     39(ptr)   AccessChain 133 157
              110:   18(fvec2)   Load 138
-             139:     34(ptr)   AccessChain 131 168
+             139:     34(ptr)   AccessChain 131 157
              112:   14(fvec3)   Load 139
              113:   18(fvec2)   VectorShuffle 112 112 0 1
              114:   18(fvec2)   FAdd 113 110
-             140:     34(ptr)   AccessChain 131 168
+             140:     34(ptr)   AccessChain 131 157
              116:   14(fvec3)   Load 140
              117:   14(fvec3)   VectorShuffle 116 114 3 4 2
                                 Store 140 117
-             119:     21(int)   IAdd 168 31
+             119:     21(int)   IAdd 157 31
                                 Branch 100
              101:             Label
              142:          17 Load 131
-             161:   14(fvec3) CompositeExtract 142 0
-             124:    6(float) CompositeExtract 161 0
-             125:    6(float) CompositeExtract 161 1
-             126:    6(float) CompositeExtract 161 2
+             156:   14(fvec3) CompositeExtract 142 0
+             124:    6(float) CompositeExtract 156 0
+             125:    6(float) CompositeExtract 156 1
+             126:    6(float) CompositeExtract 156 2
              127:    7(fvec4) CompositeConstruct 124 125 126 32
              128:    7(fvec4) FAdd 84 127
                               Store 86(@entryPointOutput) 128

3rdparty/glslang/Test/baseResults/cppPassMacroName.frag.out

@@ -1,33 +1,38 @@
 cppPassMacroName.frag
 Shader version: 100
 0:? Sequence
-0:5  Function Definition: main( ( global void)
-0:5    Function Parameters: 
-0:7    Sequence
-0:7      Sequence
-0:7        move second child to first child ( temp mediump int)
-0:7          'f1' ( temp mediump int)
-0:7          Constant:
-0:7            4 (const int)
-0:8      Sequence
-0:8        move second child to first child ( temp mediump int)
-0:8          'f2' ( temp mediump int)
-0:8          'f1' ( temp mediump int)
-0:9      Sequence
-0:9        move second child to first child ( temp mediump int)
-0:9          'f3' ( temp mediump int)
-0:9          Constant:
-0:9            9 (const int)
-0:10      Sequence
-0:10        move second child to first child ( temp mediump int)
-0:10          'f4' ( temp mediump int)
-0:10          Constant:
-0:10            1 (const int)
+0:9  Function Definition: main( ( global void)
+0:9    Function Parameters: 
+0:11    Sequence
 0:11      Sequence
 0:11        move second child to first child ( temp mediump int)
-0:11          'f5' ( temp mediump int)
+0:11          'f1' ( temp mediump int)
 0:11          Constant:
-0:11            5 (const int)
+0:11            4 (const int)
+0:12      Sequence
+0:12        move second child to first child ( temp mediump int)
+0:12          'f2' ( temp mediump int)
+0:12          'f1' ( temp mediump int)
+0:13      Sequence
+0:13        move second child to first child ( temp mediump int)
+0:13          'f3' ( temp mediump int)
+0:13          Constant:
+0:13            9 (const int)
+0:14      Sequence
+0:14        move second child to first child ( temp mediump int)
+0:14          'f4' ( temp mediump int)
+0:14          Constant:
+0:14            1 (const int)
+0:15      Sequence
+0:15        move second child to first child ( temp mediump int)
+0:15          'f5' ( temp mediump int)
+0:15          Constant:
+0:15            5 (const int)
+0:17      Sequence
+0:17        move second child to first child ( temp highp float)
+0:17          'fl_f5' ( temp highp float)
+0:17          Constant:
+0:17            0.460000
 0:?   Linker Objects
 
 
@@ -36,32 +41,37 @@ Linked fragment stage:
 
 Shader version: 100
 0:? Sequence
-0:5  Function Definition: main( ( global void)
-0:5    Function Parameters: 
-0:7    Sequence
-0:7      Sequence
-0:7        move second child to first child ( temp mediump int)
-0:7          'f1' ( temp mediump int)
-0:7          Constant:
-0:7            4 (const int)
-0:8      Sequence
-0:8        move second child to first child ( temp mediump int)
-0:8          'f2' ( temp mediump int)
-0:8          'f1' ( temp mediump int)
-0:9      Sequence
-0:9        move second child to first child ( temp mediump int)
-0:9          'f3' ( temp mediump int)
-0:9          Constant:
-0:9            9 (const int)
-0:10      Sequence
-0:10        move second child to first child ( temp mediump int)
-0:10          'f4' ( temp mediump int)
-0:10          Constant:
-0:10            1 (const int)
+0:9  Function Definition: main( ( global void)
+0:9    Function Parameters: 
+0:11    Sequence
 0:11      Sequence
 0:11        move second child to first child ( temp mediump int)
-0:11          'f5' ( temp mediump int)
+0:11          'f1' ( temp mediump int)
 0:11          Constant:
-0:11            5 (const int)
+0:11            4 (const int)
+0:12      Sequence
+0:12        move second child to first child ( temp mediump int)
+0:12          'f2' ( temp mediump int)
+0:12          'f1' ( temp mediump int)
+0:13      Sequence
+0:13        move second child to first child ( temp mediump int)
+0:13          'f3' ( temp mediump int)
+0:13          Constant:
+0:13            9 (const int)
+0:14      Sequence
+0:14        move second child to first child ( temp mediump int)
+0:14          'f4' ( temp mediump int)
+0:14          Constant:
+0:14            1 (const int)
+0:15      Sequence
+0:15        move second child to first child ( temp mediump int)
+0:15          'f5' ( temp mediump int)
+0:15          Constant:
+0:15            5 (const int)
+0:17      Sequence
+0:17        move second child to first child ( temp highp float)
+0:17          'fl_f5' ( temp highp float)
+0:17          Constant:
+0:17            0.460000
 0:?   Linker Objects
 

3rdparty/glslang/Test/baseResults/hlsl.cast.frag.out

@@ -9,8 +9,7 @@ gl_FragCoord origin is upper left
 0:3      Branch: Return with expression
 0:3        add ( temp 4-component vector of float)
 0:3          add ( temp 4-component vector of float)
-0:3            Construct vec4 ( temp 4-component vector of float)
-0:3              'input' ( in 4-component vector of float)
+0:3            'input' ( in 4-component vector of float)
 0:3            Convert int to float ( temp 4-component vector of float)
 0:3              Convert float to int ( temp 4-component vector of int)
 0:3                'input' ( in 4-component vector of float)
@@ -47,8 +46,7 @@ gl_FragCoord origin is upper left
 0:3      Branch: Return with expression
 0:3        add ( temp 4-component vector of float)
 0:3          add ( temp 4-component vector of float)
-0:3            Construct vec4 ( temp 4-component vector of float)
-0:3              'input' ( in 4-component vector of float)
+0:3            'input' ( in 4-component vector of float)
 0:3            Convert int to float ( temp 4-component vector of float)
 0:3              Convert float to int ( temp 4-component vector of int)
 0:3                'input' ( in 4-component vector of float)
@@ -73,62 +71,57 @@ gl_FragCoord origin is upper left
 
 // Module Version 10000
 // Generated by (magic number): 80006
-// Id's are bound by 39
+// Id's are bound by 34
 
                               Capability Shader
                1:             ExtInstImport  "GLSL.std.450"
                               MemoryModel Logical GLSL450
-                              EntryPoint Fragment 4  "PixelShaderFunction" 32 35
+                              EntryPoint Fragment 4  "PixelShaderFunction" 27 30
                               ExecutionMode 4 OriginUpperLeft
                               Source HLSL 500
                               Name 4  "PixelShaderFunction"
                               Name 11  "@PixelShaderFunction(vf4;"
                               Name 10  "input"
-                              Name 30  "input"
-                              Name 32  "input"
-                              Name 35  "@entryPointOutput"
-                              Name 36  "param"
-                              Decorate 32(input) Location 0
-                              Decorate 35(@entryPointOutput) Location 0
+                              Name 25  "input"
+                              Name 27  "input"
+                              Name 30  "@entryPointOutput"
+                              Name 31  "param"
+                              Decorate 27(input) Location 0
+                              Decorate 30(@entryPointOutput) Location 0
                2:             TypeVoid
                3:             TypeFunction 2
                6:             TypeFloat 32
                7:             TypeVector 6(float) 4
                8:             TypePointer Function 7(fvec4)
                9:             TypeFunction 7(fvec4) 8(ptr)
-              20:             TypeInt 32 1
-              21:             TypeVector 20(int) 4
-              25:    6(float) Constant 1067014160
-              26:    7(fvec4) ConstantComposite 25 25 25 25
-              31:             TypePointer Input 7(fvec4)
-       32(input):     31(ptr) Variable Input
-              34:             TypePointer Output 7(fvec4)
-35(@entryPointOutput):     34(ptr) Variable Output
+              15:             TypeInt 32 1
+              16:             TypeVector 15(int) 4
+              20:    6(float) Constant 1067014160
+              21:    7(fvec4) ConstantComposite 20 20 20 20
+              26:             TypePointer Input 7(fvec4)
+       27(input):     26(ptr) Variable Input
+              29:             TypePointer Output 7(fvec4)
+30(@entryPointOutput):     29(ptr) Variable Output
 4(PixelShaderFunction):           2 Function None 3
                5:             Label
-       30(input):      8(ptr) Variable Function
-       36(param):      8(ptr) Variable Function
-              33:    7(fvec4) Load 32(input)
-                              Store 30(input) 33
-              37:    7(fvec4) Load 30(input)
-                              Store 36(param) 37
-              38:    7(fvec4) FunctionCall 11(@PixelShaderFunction(vf4;) 36(param)
-                              Store 35(@entryPointOutput) 38
+       25(input):      8(ptr) Variable Function
+       31(param):      8(ptr) Variable Function
+              28:    7(fvec4) Load 27(input)
+                              Store 25(input) 28
+              32:    7(fvec4) Load 25(input)
+                              Store 31(param) 32
+              33:    7(fvec4) FunctionCall 11(@PixelShaderFunction(vf4;) 31(param)
+                              Store 30(@entryPointOutput) 33
                               Return
                               FunctionEnd
 11(@PixelShaderFunction(vf4;):    7(fvec4) Function None 9
        10(input):      8(ptr) FunctionParameter
               12:             Label
               13:    7(fvec4) Load 10(input)
-              14:    6(float) CompositeExtract 13 0
-              15:    6(float) CompositeExtract 13 1
-              16:    6(float) CompositeExtract 13 2
-              17:    6(float) CompositeExtract 13 3
-              18:    7(fvec4) CompositeConstruct 14 15 16 17
-              19:    7(fvec4) Load 10(input)
-              22:   21(ivec4) ConvertFToS 19
-              23:    7(fvec4) ConvertSToF 22
-              24:    7(fvec4) FAdd 18 23
-              27:    7(fvec4) FAdd 24 26
-                              ReturnValue 27
+              14:    7(fvec4) Load 10(input)
+              17:   16(ivec4) ConvertFToS 14
+              18:    7(fvec4) ConvertSToF 17
+              19:    7(fvec4) FAdd 13 18
+              22:    7(fvec4) FAdd 19 21
+                              ReturnValue 22
                               FunctionEnd

3rdparty/glslang/Test/baseResults/hlsl.intrinsics.double.frag.out

@@ -231,28 +231,28 @@ gl_FragCoord origin is upper left
                2:             TypeVoid
                3:             TypeFunction 2
                6:             TypeFloat 64
-               7:             TypePointer Function 6(float)
-               8:             TypeVector 6(float) 2
-               9:             TypePointer Function 8(fvec2)
-              10:             TypeVector 6(float) 3
-              11:             TypePointer Function 10(fvec3)
-              12:             TypeVector 6(float) 4
-              13:             TypePointer Function 12(fvec4)
+               7:             TypePointer Function 6(float64_t)
+               8:             TypeVector 6(float64_t) 2
+               9:             TypePointer Function 8(f64vec2)
+              10:             TypeVector 6(float64_t) 3
+              11:             TypePointer Function 10(f64vec3)
+              12:             TypeVector 6(float64_t) 4
+              13:             TypePointer Function 12(f64vec4)
               14:             TypeInt 32 0
               15:             TypePointer Function 14(int)
               16:             TypeFloat 32
               17:             TypeFunction 16(float) 7(ptr) 7(ptr) 7(ptr) 9(ptr) 11(ptr) 13(ptr) 15(ptr) 15(ptr)
               36:             TypeVector 14(int) 2
               39:   16(float) Constant 0
-              43:             TypePointer Input 6(float)
+              43:             TypePointer Input 6(float64_t)
       44(inDV1a):     43(ptr) Variable Input
       47(inDV1b):     43(ptr) Variable Input
       50(inDV1c):     43(ptr) Variable Input
-              53:             TypePointer Input 8(fvec2)
+              53:             TypePointer Input 8(f64vec2)
        54(inDV2):     53(ptr) Variable Input
-              57:             TypePointer Input 10(fvec3)
+              57:             TypePointer Input 10(f64vec3)
        58(inDV3):     57(ptr) Variable Input
-              61:             TypePointer Input 12(fvec4)
+              61:             TypePointer Input 12(f64vec4)
        62(inDV4):     61(ptr) Variable Input
               65:             TypePointer Input 14(int)
        66(inU1a):     65(ptr) Variable Input
@@ -277,33 +277,33 @@ gl_FragCoord origin is upper left
        83(param):     13(ptr) Variable Function
        85(param):     15(ptr) Variable Function
        87(param):     15(ptr) Variable Function
-              45:    6(float) Load 44(inDV1a)
+              45:6(float64_t) Load 44(inDV1a)
                               Store 42(inDV1a) 45
-              48:    6(float) Load 47(inDV1b)
+              48:6(float64_t) Load 47(inDV1b)
                               Store 46(inDV1b) 48
-              51:    6(float) Load 50(inDV1c)
+              51:6(float64_t) Load 50(inDV1c)
                               Store 49(inDV1c) 51
-              55:    8(fvec2) Load 54(inDV2)
+              55:  8(f64vec2) Load 54(inDV2)
                               Store 52(inDV2) 55
-              59:   10(fvec3) Load 58(inDV3)
+              59: 10(f64vec3) Load 58(inDV3)
                               Store 56(inDV3) 59
-              63:   12(fvec4) Load 62(inDV4)
+              63: 12(f64vec4) Load 62(inDV4)
                               Store 60(inDV4) 63
               67:     14(int) Load 66(inU1a)
                               Store 64(inU1a) 67
               70:     14(int) Load 69(inU1b)
                               Store 68(inU1b) 70
-              74:    6(float) Load 42(inDV1a)
+              74:6(float64_t) Load 42(inDV1a)
                               Store 73(param) 74
-              76:    6(float) Load 46(inDV1b)
+              76:6(float64_t) Load 46(inDV1b)
                               Store 75(param) 76
-              78:    6(float) Load 49(inDV1c)
+              78:6(float64_t) Load 49(inDV1c)
                               Store 77(param) 78
-              80:    8(fvec2) Load 52(inDV2)
+              80:  8(f64vec2) Load 52(inDV2)
                               Store 79(param) 80
-              82:   10(fvec3) Load 56(inDV3)
+              82: 10(f64vec3) Load 56(inDV3)
                               Store 81(param) 82
-              84:   12(fvec4) Load 60(inDV4)
+              84: 12(f64vec4) Load 60(inDV4)
                               Store 83(param) 84
               86:     14(int) Load 64(inU1a)
                               Store 85(param) 86
@@ -325,15 +325,15 @@ gl_FragCoord origin is upper left
               27:             Label
          28(r00):      7(ptr) Variable Function
          33(r01):      7(ptr) Variable Function
-              29:    6(float) Load 18(inDV1a)
-              30:    6(float) Load 19(inDV1b)
-              31:    6(float) Load 20(inDV1c)
-              32:    6(float) ExtInst 1(GLSL.std.450) 50(Fma) 29 30 31
+              29:6(float64_t) Load 18(inDV1a)
+              30:6(float64_t) Load 19(inDV1b)
+              31:6(float64_t) Load 20(inDV1c)
+              32:6(float64_t) ExtInst 1(GLSL.std.450) 50(Fma) 29 30 31
                               Store 28(r00) 32
               34:     14(int) Load 24(inU1a)
               35:     14(int) Load 25(inU1b)
               37:   36(ivec2) CompositeConstruct 34 35
-              38:    6(float) Bitcast 37
+              38:6(float64_t) Bitcast 37
                               Store 33(r01) 38
                               ReturnValue 39
                               FunctionEnd

3rdparty/glslang/Test/baseResults/hlsl.matType.frag.out

@@ -82,8 +82,8 @@ gl_FragCoord origin is upper left
               19:             TypeVector 6(float) 2
               20:             TypeMatrix 19(fvec2) 1
               21:             TypeFloat 64
-              22:             TypeVector 21(float) 3
-              23:             TypeMatrix 22(fvec3) 2
+              22:             TypeVector 21(float64_t) 3
+              23:             TypeMatrix 22(f64vec3) 2
               24:             TypeInt 32 1
               25:             TypeVector 24(int) 4
               26:             TypeMatrix 25(ivec4) 4

3rdparty/glslang/Test/baseResults/hlsl.overload.frag.out

@@ -937,7 +937,7 @@ gl_FragCoord origin is upper left
                2:             TypeVoid
                3:             TypeFunction 2
                6:             TypeFloat 64
-               7:             TypePointer Function 6(float)
+               7:             TypePointer Function 6(float64_t)
                8:             TypeBool
                9:             TypePointer Function 8(bool)
               10:             TypeFunction 2 7(ptr) 9(ptr)
@@ -967,8 +967,8 @@ gl_FragCoord origin is upper left
              113:             TypeVector 22(int) 3
              114:             TypePointer Function 113(ivec3)
              115:             TypeFunction 2 114(ptr)
-             125:             TypeVector 6(float) 3
-             126:             TypePointer Function 125(fvec3)
+             125:             TypeVector 6(float64_t) 3
+             126:             TypePointer Function 125(f64vec3)
              127:             TypeFunction 2 126(ptr)
              134:             TypeVector 15(int) 2
              135:             TypePointer Function 134(ivec2)
@@ -976,14 +976,14 @@ gl_FragCoord origin is upper left
              149:             TypeVector 29(float) 4
              150:             TypePointer Function 149(fvec4)
              151:             TypeFunction 149(fvec4) 150(ptr)
-             334:    6(float) Constant 0 0
+             334:6(float64_t) Constant 0 0
              339:     15(int) Constant 0
              348:   29(float) Constant 0
              353:     15(int) Constant 1
              373:     22(int) Constant 0
              374:     22(int) Constant 1
              394:   29(float) Constant 1065353216
-             414:    6(float) Constant 0 1072693248
+             414:6(float64_t) Constant 0 1072693248
              484:             TypeVector 22(int) 2
              494:             TypeVector 22(int) 4
              503:             TypeVector 8(bool) 3
@@ -1283,117 +1283,117 @@ gl_FragCoord origin is upper left
       497(param):     23(ptr) Variable Function
       500(param):      9(ptr) Variable Function
       506(param):      9(ptr) Variable Function
-             158:    6(float) Load 155(d)
+             158:6(float64_t) Load 155(d)
                               Store 157(param) 158
              160:     8(bool) Load 156(b)
                               Store 159(param) 160
              161:           2 FunctionCall 13(foo1(d1;b1;) 157(param) 159(param)
-             163:    6(float) Load 155(d)
+             163:6(float64_t) Load 155(d)
                               Store 162(param) 163
-             165:    6(float) Load 155(d)
+             165:6(float64_t) Load 155(d)
                               Store 164(param) 165
              166:           2 FunctionCall 39(foo1(d1;d1;) 162(param) 164(param)
-             169:    6(float) Load 155(d)
+             169:6(float64_t) Load 155(d)
                               Store 168(param) 169
              171:     15(int) Load 167(u)
                               Store 170(param) 171
              172:           2 FunctionCall 20(foo1(d1;u1;) 168(param) 170(param)
-             175:    6(float) Load 155(d)
+             175:6(float64_t) Load 155(d)
                               Store 174(param) 175
              177:     22(int) Load 173(i)
                               Store 176(param) 177
              178:           2 FunctionCall 27(foo1(d1;i1;) 174(param) 176(param)
-             181:    6(float) Load 155(d)
+             181:6(float64_t) Load 155(d)
                               Store 180(param) 181
              183:   29(float) Load 179(f)
                               Store 182(param) 183
              184:           2 FunctionCall 34(foo1(d1;f1;) 180(param) 182(param)
              185:   29(float) Load 179(f)
-             186:    6(float) FConvert 185
+             186:6(float64_t) FConvert 185
                               Store 187(param) 186
              189:     8(bool) Load 156(b)
                               Store 188(param) 189
              190:           2 FunctionCall 13(foo1(d1;b1;) 187(param) 188(param)
              191:   29(float) Load 179(f)
-             192:    6(float) FConvert 191
+             192:6(float64_t) FConvert 191
                               Store 193(param) 192
-             195:    6(float) Load 155(d)
+             195:6(float64_t) Load 155(d)
                               Store 194(param) 195
              196:           2 FunctionCall 39(foo1(d1;d1;) 193(param) 194(param)
              197:   29(float) Load 179(f)
-             198:    6(float) FConvert 197
+             198:6(float64_t) FConvert 197
                               Store 199(param) 198
              201:     15(int) Load 167(u)
                               Store 200(param) 201
              202:           2 FunctionCall 20(foo1(d1;u1;) 199(param) 200(param)
              203:   29(float) Load 179(f)
-             204:    6(float) FConvert 203
+             204:6(float64_t) FConvert 203
                               Store 205(param) 204
              207:     22(int) Load 173(i)
                               Store 206(param) 207
              208:           2 FunctionCall 27(foo1(d1;i1;) 205(param) 206(param)
              209:   29(float) Load 179(f)
-             210:    6(float) FConvert 209
+             210:6(float64_t) FConvert 209
                               Store 211(param) 210
              213:   29(float) Load 179(f)
                               Store 212(param) 213
              214:           2 FunctionCall 34(foo1(d1;f1;) 211(param) 212(param)
              215:     15(int) Load 167(u)
-             216:    6(float) ConvertUToF 215
+             216:6(float64_t) ConvertUToF 215
                               Store 217(param) 216
              219:     8(bool) Load 156(b)
                               Store 218(param) 219
              220:           2 FunctionCall 13(foo1(d1;b1;) 217(param) 218(param)
              221:     15(int) Load 167(u)
-             222:    6(float) ConvertUToF 221
+             222:6(float64_t) ConvertUToF 221
                               Store 223(param) 222
-             225:    6(float) Load 155(d)
+             225:6(float64_t) Load 155(d)
                               Store 224(param) 225
              226:           2 FunctionCall 39(foo1(d1;d1;) 223(param) 224(param)
              227:     15(int) Load 167(u)
-             228:    6(float) ConvertUToF 227
+             228:6(float64_t) ConvertUToF 227
                               Store 229(param) 228
              231:     15(int) Load 167(u)
                               Store 230(param) 231
              232:           2 FunctionCall 20(foo1(d1;u1;) 229(param) 230(param)
              233:     15(int) Load 167(u)
-             234:    6(float) ConvertUToF 233
+             234:6(float64_t) ConvertUToF 233
                               Store 235(param) 234
              237:     22(int) Load 173(i)
                               Store 236(param) 237
              238:           2 FunctionCall 27(foo1(d1;i1;) 235(param) 236(param)
              239:     15(int) Load 167(u)
-             240:    6(float) ConvertUToF 239
+             240:6(float64_t) ConvertUToF 239
                               Store 241(param) 240
              243:   29(float) Load 179(f)
                               Store 242(param) 243
              244:           2 FunctionCall 34(foo1(d1;f1;) 241(param) 242(param)
              245:     22(int) Load 173(i)
-             246:    6(float) ConvertSToF 245
+             246:6(float64_t) ConvertSToF 245
                               Store 247(param) 246
              249:     8(bool) Load 156(b)
                               Store 248(param) 249
              250:           2 FunctionCall 13(foo1(d1;b1;) 247(param) 248(param)
              251:     22(int) Load 173(i)
-             252:    6(float) ConvertSToF 251
+             252:6(float64_t) ConvertSToF 251
                               Store 253(param) 252
-             255:    6(float) Load 155(d)
+             255:6(float64_t) Load 155(d)
                               Store 254(param) 255
              256:           2 FunctionCall 39(foo1(d1;d1;) 253(param) 254(param)
              257:     22(int) Load 173(i)
-             258:    6(float) ConvertSToF 257
+             258:6(float64_t) ConvertSToF 257
                               Store 259(param) 258
              261:     15(int) Load 167(u)
                               Store 260(param) 261
              262:           2 FunctionCall 20(foo1(d1;u1;) 259(param) 260(param)
              263:     22(int) Load 173(i)
-             264:    6(float) ConvertSToF 263
+             264:6(float64_t) ConvertSToF 263
                               Store 265(param) 264
              267:     22(int) Load 173(i)
                               Store 266(param) 267
              268:           2 FunctionCall 27(foo1(d1;i1;) 265(param) 266(param)
              269:     22(int) Load 173(i)
-             270:    6(float) ConvertSToF 269
+             270:6(float64_t) ConvertSToF 269
                               Store 271(param) 270
              273:   29(float) Load 179(f)
                               Store 272(param) 273
@@ -1407,7 +1407,7 @@ gl_FragCoord origin is upper left
              281:     15(int) Load 167(u)
              282:     22(int) Bitcast 281
                               Store 283(param) 282
-             285:    6(float) Load 155(d)
+             285:6(float64_t) Load 155(d)
                               Store 284(param) 285
              286:           2 FunctionCall 64(foo2(i1;d1;) 283(param) 284(param)
              287:     15(int) Load 167(u)
@@ -1435,7 +1435,7 @@ gl_FragCoord origin is upper left
              309:           2 FunctionCall 44(foo2(i1;b1;) 305(param) 307(param)
              311:     22(int) Load 173(i)
                               Store 310(param) 311
-             313:    6(float) Load 155(d)
+             313:6(float64_t) Load 155(d)
                               Store 312(param) 313
              314:           2 FunctionCall 64(foo2(i1;d1;) 310(param) 312(param)
              316:     22(int) Load 173(i)
@@ -1456,7 +1456,7 @@ gl_FragCoord origin is upper left
              331:     8(bool) Load 156(b)
                               Store 330(param) 331
              332:           2 FunctionCall 68(foo3(b1;) 330(param)
-             333:    6(float) Load 155(d)
+             333:6(float64_t) Load 155(d)
              335:     8(bool) FOrdNotEqual 333 334
                               Store 336(param) 335
              337:           2 FunctionCall 68(foo3(b1;) 336(param)
@@ -1476,7 +1476,7 @@ gl_FragCoord origin is upper left
              354:     15(int) Select 352 353 339
                               Store 355(param) 354
              356:           2 FunctionCall 72(foo4(u1;) 355(param)
-             357:    6(float) Load 155(d)
+             357:6(float64_t) Load 155(d)
              358:     15(int) ConvertFToU 357
                               Store 359(param) 358
              360:           2 FunctionCall 72(foo4(u1;) 359(param)
@@ -1495,7 +1495,7 @@ gl_FragCoord origin is upper left
              375:     22(int) Select 372 374 373
                               Store 376(param) 375
              377:           2 FunctionCall 76(foo5(i1;) 376(param)
-             378:    6(float) Load 155(d)
+             378:6(float64_t) Load 155(d)
              379:     22(int) ConvertFToS 378
                               Store 380(param) 379
              381:           2 FunctionCall 76(foo5(i1;) 380(param)
@@ -1514,7 +1514,7 @@ gl_FragCoord origin is upper left
              395:   29(float) Select 393 394 348
                               Store 396(param) 395
              397:           2 FunctionCall 80(foo6(f1;) 396(param)
-             398:    6(float) Load 155(d)
+             398:6(float64_t) Load 155(d)
              399:   29(float) FConvert 398
                               Store 400(param) 399
              401:           2 FunctionCall 80(foo6(f1;) 400(param)
@@ -1530,22 +1530,22 @@ gl_FragCoord origin is upper left
                               Store 410(param) 411
              412:           2 FunctionCall 80(foo6(f1;) 410(param)
              413:     8(bool) Load 156(b)
-             415:    6(float) Select 413 414 334
+             415:6(float64_t) Select 413 414 334
                               Store 416(param) 415
              417:           2 FunctionCall 84(foo7(d1;) 416(param)
-             419:    6(float) Load 155(d)
+             419:6(float64_t) Load 155(d)
                               Store 418(param) 419
              420:           2 FunctionCall 84(foo7(d1;) 418(param)
              421:     15(int) Load 167(u)
-             422:    6(float) ConvertUToF 421
+             422:6(float64_t) ConvertUToF 421
                               Store 423(param) 422
              424:           2 FunctionCall 84(foo7(d1;) 423(param)
              425:     22(int) Load 173(i)
-             426:    6(float) ConvertSToF 425
+             426:6(float64_t) ConvertSToF 425
                               Store 427(param) 426
              428:           2 FunctionCall 84(foo7(d1;) 427(param)
              429:   29(float) Load 179(f)
-             430:    6(float) FConvert 429
+             430:6(float64_t) FConvert 429
                               Store 431(param) 430
              432:           2 FunctionCall 84(foo7(d1;) 431(param)
              433:     8(bool) Load 156(b)
@@ -1568,7 +1568,7 @@ gl_FragCoord origin is upper left
              450:     15(int) ConvertFToU 449
                               Store 451(param) 450
              452:           2 FunctionCall 96(foo9(u1;) 451(param)
-             453:    6(float) Load 155(d)
+             453:6(float64_t) Load 155(d)
              454:     15(int) ConvertFToU 453
                               Store 455(param) 454
              456:           2 FunctionCall 96(foo9(u1;) 455(param)
@@ -1580,7 +1580,7 @@ gl_FragCoord origin is upper left
              462:     22(int) ConvertFToS 461
                               Store 463(param) 462
              464:           2 FunctionCall 102(foo10(i1;) 463(param)
-             465:    6(float) Load 155(d)
+             465:6(float64_t) Load 155(d)
              466:     22(int) ConvertFToS 465
                               Store 467(param) 466
              468:           2 FunctionCall 102(foo10(i1;) 467(param)
@@ -1589,12 +1589,12 @@ gl_FragCoord origin is upper left
                               Store 471(param) 470
              472:           2 FunctionCall 120(foo11(u1;) 471(param)
              473:   29(float) Load 179(f)
-             474:    6(float) FConvert 473
+             474:6(float64_t) FConvert 473
                               Store 475(param) 474
              476:           2 FunctionCall 111(foo11(d1;) 475(param)
              477:   29(float) Load 179(f)
              478:  104(fvec3) CompositeConstruct 477 477 477
-             479:  125(fvec3) FConvert 478
+             479:125(f64vec3) FConvert 478
                               Store 480(param) 479
              481:           2 FunctionCall 129(foo12(vd3;) 480(param)
              482:     22(int) Load 173(i)

3rdparty/glslang/Test/baseResults/hlsl.promotions.frag.out

@@ -1715,18 +1715,18 @@ gl_FragCoord origin is upper left
               29:             TypePointer Function 28(bvec3)
               30:             TypeFunction 2 29(ptr)
               34:             TypeFloat 64
-              35:             TypeVector 34(float) 3
-              36:             TypePointer Function 35(fvec3)
+              35:             TypeVector 34(float64_t) 3
+              36:             TypePointer Function 35(f64vec3)
               37:             TypeFunction 2 36(ptr)
               41:             TypeFunction 7(fvec3) 8(ptr)
               54:             TypeFunction 14(ivec3) 15(ptr)
               67:             TypeFunction 21(ivec3) 22(ptr)
               80:             TypeFunction 28(bvec3) 29(ptr)
-              93:             TypeFunction 35(fvec3) 36(ptr)
+              93:             TypeFunction 35(f64vec3) 36(ptr)
              106:             TypeVector 6(float) 4
   107(PS_OUTPUT):             TypeStruct 106(fvec4)
              108:             TypeFunction 107(PS_OUTPUT)
-    111($Global):             TypeStruct 14(ivec3) 21(ivec3) 7(fvec3) 21(ivec3) 35(fvec3) 13(int) 20(int) 6(float) 20(int) 34(float)
+    111($Global):             TypeStruct 14(ivec3) 21(ivec3) 7(fvec3) 21(ivec3) 35(f64vec3) 13(int) 20(int) 6(float) 20(int) 34(float64_t)
              112:             TypePointer Uniform 111($Global)
              113:    112(ptr) Variable Uniform
              114:     13(int) Constant 0
@@ -1741,24 +1741,24 @@ gl_FragCoord origin is upper left
              142:    7(fvec3) ConstantComposite 140 140 140
              143:    7(fvec3) ConstantComposite 141 141 141
              151:     13(int) Constant 4
-             152:             TypePointer Uniform 35(fvec3)
+             152:             TypePointer Uniform 35(f64vec3)
              172:   14(ivec3) ConstantComposite 114 114 114
              173:   14(ivec3) ConstantComposite 134 134 134
              181:     13(int) Constant 2
              182:             TypePointer Uniform 7(fvec3)
              218:     20(int) Constant 1
              219:   21(ivec3) ConstantComposite 218 218 218
-             261:   34(float) Constant 0 0
-             262:   35(fvec3) ConstantComposite 261 261 261
-             288:   34(float) Constant 0 1072693248
-             289:   35(fvec3) ConstantComposite 288 288 288
+             261:34(float64_t) Constant 0 0
+             262: 35(f64vec3) ConstantComposite 261 261 261
+             288:34(float64_t) Constant 0 1072693248
+             289: 35(f64vec3) ConstantComposite 288 288 288
              473:     13(int) Constant 5
              474:             TypePointer Uniform 13(int)
              480:     13(int) Constant 6
              481:             TypePointer Uniform 20(int)
              488:     13(int) Constant 8
              494:     13(int) Constant 9
-             495:             TypePointer Uniform 34(float)
+             495:             TypePointer Uniform 34(float64_t)
              514:     13(int) Constant 7
              515:             TypePointer Uniform 6(float)
              574:             TypePointer Function 13(int)
@@ -1841,11 +1841,11 @@ gl_FragCoord origin is upper left
            51(p):      8(ptr) FunctionParameter
               53:             Label
              153:    152(ptr) AccessChain 113 151
-             154:   35(fvec3) Load 153
+             154: 35(f64vec3) Load 153
              155:    7(fvec3) FConvert 154
                               Store 51(p) 155
              156:    152(ptr) AccessChain 113 151
-             157:   35(fvec3) Load 156
+             157: 35(f64vec3) Load 156
              158:    7(fvec3) FConvert 157
                               ReturnValue 158
                               FunctionEnd
@@ -1891,11 +1891,11 @@ gl_FragCoord origin is upper left
            64(p):     15(ptr) FunctionParameter
               66:             Label
              191:    152(ptr) AccessChain 113 151
-             192:   35(fvec3) Load 191
+             192: 35(f64vec3) Load 191
              193:   14(ivec3) ConvertFToS 192
                               Store 64(p) 193
              194:    152(ptr) AccessChain 113 151
-             195:   35(fvec3) Load 194
+             195: 35(f64vec3) Load 194
              196:   14(ivec3) ConvertFToS 195
                               ReturnValue 196
                               FunctionEnd
@@ -1941,11 +1941,11 @@ gl_FragCoord origin is upper left
            77(p):     22(ptr) FunctionParameter
               79:             Label
              227:    152(ptr) AccessChain 113 151
-             228:   35(fvec3) Load 227
+             228: 35(f64vec3) Load 227
              229:   21(ivec3) ConvertFToU 228
                               Store 77(p) 229
              230:    152(ptr) AccessChain 113 151
-             231:   35(fvec3) Load 230
+             231: 35(f64vec3) Load 230
              232:   21(ivec3) ConvertFToU 231
                               ReturnValue 232
                               FunctionEnd
@@ -1989,62 +1989,62 @@ gl_FragCoord origin is upper left
            90(p):     29(ptr) FunctionParameter
               92:             Label
              259:    152(ptr) AccessChain 113 151
-             260:   35(fvec3) Load 259
+             260: 35(f64vec3) Load 259
              263:   28(bvec3) FOrdNotEqual 260 262
                               Store 90(p) 263
              264:    152(ptr) AccessChain 113 151
-             265:   35(fvec3) Load 264
+             265: 35(f64vec3) Load 264
              266:   28(bvec3) FOrdNotEqual 265 262
                               ReturnValue 266
                               FunctionEnd
-95(Fn_R_D3I(vd3;):   35(fvec3) Function None 93
+95(Fn_R_D3I(vd3;): 35(f64vec3) Function None 93
            94(p):     36(ptr) FunctionParameter
               96:             Label
              269:    115(ptr) AccessChain 113 114
              270:   14(ivec3) Load 269
-             271:   35(fvec3) ConvertSToF 270
+             271: 35(f64vec3) ConvertSToF 270
                               Store 94(p) 271
              272:    115(ptr) AccessChain 113 114
              273:   14(ivec3) Load 272
-             274:   35(fvec3) ConvertSToF 273
+             274: 35(f64vec3) ConvertSToF 273
                               ReturnValue 274
                               FunctionEnd
-98(Fn_R_D3U(vd3;):   35(fvec3) Function None 93
+98(Fn_R_D3U(vd3;): 35(f64vec3) Function None 93
            97(p):     36(ptr) FunctionParameter
               99:             Label
              277:    125(ptr) AccessChain 113 124
              278:   21(ivec3) Load 277
-             279:   35(fvec3) ConvertUToF 278
+             279: 35(f64vec3) ConvertUToF 278
                               Store 97(p) 279
              280:    125(ptr) AccessChain 113 124
              281:   21(ivec3) Load 280
-             282:   35(fvec3) ConvertUToF 281
+             282: 35(f64vec3) ConvertUToF 281
                               ReturnValue 282
                               FunctionEnd
-101(Fn_R_D3B(vd3;):   35(fvec3) Function None 93
+101(Fn_R_D3B(vd3;): 35(f64vec3) Function None 93
           100(p):     36(ptr) FunctionParameter
              102:             Label
              285:    125(ptr) AccessChain 113 134
              286:   21(ivec3) Load 285
              287:   28(bvec3) INotEqual 286 138
-             290:   35(fvec3) Select 287 289 262
+             290: 35(f64vec3) Select 287 289 262
                               Store 100(p) 290
              291:    125(ptr) AccessChain 113 134
              292:   21(ivec3) Load 291
              293:   28(bvec3) INotEqual 292 138
-             294:   35(fvec3) Select 293 289 262
+             294: 35(f64vec3) Select 293 289 262
                               ReturnValue 294
                               FunctionEnd
-104(Fn_R_D3F(vd3;):   35(fvec3) Function None 93
+104(Fn_R_D3F(vd3;): 35(f64vec3) Function None 93
           103(p):     36(ptr) FunctionParameter
              105:             Label
              297:    182(ptr) AccessChain 113 181
              298:    7(fvec3) Load 297
-             299:   35(fvec3) FConvert 298
+             299: 35(f64vec3) FConvert 298
                               Store 103(p) 299
              300:    182(ptr) AccessChain 113 181
              301:    7(fvec3) Load 300
-             302:   35(fvec3) FConvert 301
+             302: 35(f64vec3) FConvert 301
                               ReturnValue 302
                               FunctionEnd
      109(@main():107(PS_OUTPUT) Function None 108
@@ -2087,7 +2087,7 @@ gl_FragCoord origin is upper left
              317:    7(fvec3) ConvertUToF 316
                               Store 314(r02) 317
              319:    152(ptr) AccessChain 113 151
-             320:   35(fvec3) Load 319
+             320: 35(f64vec3) Load 319
              321:    7(fvec3) FConvert 320
                               Store 318(r03) 321
              323:    125(ptr) AccessChain 113 134
@@ -2104,7 +2104,7 @@ gl_FragCoord origin is upper left
              334:   14(ivec3) ConvertFToS 333
                               Store 331(r12) 334
              336:    152(ptr) AccessChain 113 151
-             337:   35(fvec3) Load 336
+             337: 35(f64vec3) Load 336
              338:   14(ivec3) ConvertFToS 337
                               Store 335(r13) 338
              340:    125(ptr) AccessChain 113 134
@@ -2121,7 +2121,7 @@ gl_FragCoord origin is upper left
              351:   21(ivec3) ConvertFToU 350
                               Store 348(r22) 351
              353:    152(ptr) AccessChain 113 151
-             354:   35(fvec3) Load 353
+             354: 35(f64vec3) Load 353
              355:   21(ivec3) ConvertFToU 354
                               Store 352(r23) 355
              357:    115(ptr) AccessChain 113 114
@@ -2137,25 +2137,25 @@ gl_FragCoord origin is upper left
              367:   28(bvec3) FOrdNotEqual 366 142
                               Store 364(r32) 367
              369:    152(ptr) AccessChain 113 151
-             370:   35(fvec3) Load 369
+             370: 35(f64vec3) Load 369
              371:   28(bvec3) FOrdNotEqual 370 262
                               Store 368(r33) 371
              373:    115(ptr) AccessChain 113 114
              374:   14(ivec3) Load 373
-             375:   35(fvec3) ConvertSToF 374
+             375: 35(f64vec3) ConvertSToF 374
                               Store 372(r40) 375
              377:    125(ptr) AccessChain 113 124
              378:   21(ivec3) Load 377
-             379:   35(fvec3) ConvertUToF 378
+             379: 35(f64vec3) ConvertUToF 378
                               Store 376(r41) 379
              381:    182(ptr) AccessChain 113 181
              382:    7(fvec3) Load 381
-             383:   35(fvec3) FConvert 382
+             383: 35(f64vec3) FConvert 382
                               Store 380(r42) 383
              385:    125(ptr) AccessChain 113 134
              386:   21(ivec3) Load 385
              387:   28(bvec3) INotEqual 386 138
-             388:   35(fvec3) Select 387 289 262
+             388: 35(f64vec3) Select 387 289 262
                               Store 384(r43) 388
              389:    115(ptr) AccessChain 113 114
              390:   14(ivec3) Load 389
@@ -2177,7 +2177,7 @@ gl_FragCoord origin is upper left
              404:    7(fvec3) FMul 403 402
                               Store 314(r02) 404
              405:    152(ptr) AccessChain 113 151
-             406:   35(fvec3) Load 405
+             406: 35(f64vec3) Load 405
              407:    7(fvec3) FConvert 406
              408:    7(fvec3) Load 318(r03)
              409:    7(fvec3) FMul 408 407
@@ -2202,7 +2202,7 @@ gl_FragCoord origin is upper left
              425:   14(ivec3) IMul 424 423
                               Store 331(r12) 425
              426:    152(ptr) AccessChain 113 151
-             427:   35(fvec3) Load 426
+             427: 35(f64vec3) Load 426
              428:   14(ivec3) ConvertFToS 427
              429:   14(ivec3) Load 335(r13)
              430:   14(ivec3) IMul 429 428
@@ -2227,35 +2227,35 @@ gl_FragCoord origin is upper left
              446:   21(ivec3) IMul 445 444
                               Store 348(r22) 446
              447:    152(ptr) AccessChain 113 151
-             448:   35(fvec3) Load 447
+             448: 35(f64vec3) Load 447
              449:   21(ivec3) ConvertFToU 448
              450:   21(ivec3) Load 352(r23)
              451:   21(ivec3) IMul 450 449
                               Store 352(r23) 451
              452:    115(ptr) AccessChain 113 114
              453:   14(ivec3) Load 452
-             454:   35(fvec3) ConvertSToF 453
-             455:   35(fvec3) Load 372(r40)
-             456:   35(fvec3) FMul 455 454
+             454: 35(f64vec3) ConvertSToF 453
+             455: 35(f64vec3) Load 372(r40)
+             456: 35(f64vec3) FMul 455 454
                               Store 372(r40) 456
              457:    125(ptr) AccessChain 113 124
              458:   21(ivec3) Load 457
-             459:   35(fvec3) ConvertUToF 458
-             460:   35(fvec3) Load 376(r41)
-             461:   35(fvec3) FMul 460 459
+             459: 35(f64vec3) ConvertUToF 458
+             460: 35(f64vec3) Load 376(r41)
+             461: 35(f64vec3) FMul 460 459
                               Store 376(r41) 461
              462:    182(ptr) AccessChain 113 181
              463:    7(fvec3) Load 462
-             464:   35(fvec3) FConvert 463
-             465:   35(fvec3) Load 380(r42)
-             466:   35(fvec3) FMul 465 464
+             464: 35(f64vec3) FConvert 463
+             465: 35(f64vec3) Load 380(r42)
+             466: 35(f64vec3) FMul 465 464
                               Store 380(r42) 466
              467:    125(ptr) AccessChain 113 134
              468:   21(ivec3) Load 467
              469:   28(bvec3) INotEqual 468 138
-             470:   35(fvec3) Select 469 289 262
-             471:   35(fvec3) Load 384(r43)
-             472:   35(fvec3) FMul 471 470
+             470: 35(f64vec3) Select 469 289 262
+             471: 35(f64vec3) Load 384(r43)
+             472: 35(f64vec3) FMul 471 470
                               Store 384(r43) 472
              475:    474(ptr) AccessChain 113 473
              476:     13(int) Load 475
@@ -2277,7 +2277,7 @@ gl_FragCoord origin is upper left
              493:    7(fvec3) VectorTimesScalar 492 491
                               Store 314(r02) 493
              496:    495(ptr) AccessChain 113 494
-             497:   34(float) Load 496
+             497:34(float64_t) Load 496
              498:    6(float) FConvert 497
              499:    7(fvec3) Load 318(r03)
              500:    7(fvec3) VectorTimesScalar 499 498
@@ -2305,7 +2305,7 @@ gl_FragCoord origin is upper left
              521:   14(ivec3) IMul 519 520
                               Store 331(r12) 521
              522:    495(ptr) AccessChain 113 494
-             523:   34(float) Load 522
+             523:34(float64_t) Load 522
              524:     13(int) ConvertFToS 523
              525:   14(ivec3) Load 335(r13)
              526:   14(ivec3) CompositeConstruct 524 524 524
@@ -2334,7 +2334,7 @@ gl_FragCoord origin is upper left
              546:   21(ivec3) IMul 544 545
                               Store 348(r22) 546
              547:    495(ptr) AccessChain 113 494
-             548:   34(float) Load 547
+             548:34(float64_t) Load 547
              549:     20(int) ConvertFToU 548
              550:   21(ivec3) Load 352(r23)
              551:   21(ivec3) CompositeConstruct 549 549 549
@@ -2342,28 +2342,28 @@ gl_FragCoord origin is upper left
                               Store 352(r23) 552
              553:    474(ptr) AccessChain 113 473
              554:     13(int) Load 553
-             555:   34(float) ConvertSToF 554
-             556:   35(fvec3) Load 372(r40)
-             557:   35(fvec3) VectorTimesScalar 556 555
+             555:34(float64_t) ConvertSToF 554
+             556: 35(f64vec3) Load 372(r40)
+             557: 35(f64vec3) VectorTimesScalar 556 555
                               Store 372(r40) 557
              558:    481(ptr) AccessChain 113 488
              559:     20(int) Load 558
-             560:   34(float) ConvertUToF 559
-             561:   35(fvec3) Load 376(r41)
-             562:   35(fvec3) VectorTimesScalar 561 560
+             560:34(float64_t) ConvertUToF 559
+             561: 35(f64vec3) Load 376(r41)
+             562: 35(f64vec3) VectorTimesScalar 561 560
                               Store 376(r41) 562
              563:    515(ptr) AccessChain 113 514
              564:    6(float) Load 563
-             565:   34(float) FConvert 564
-             566:   35(fvec3) Load 380(r42)
-             567:   35(fvec3) VectorTimesScalar 566 565
+             565:34(float64_t) FConvert 564
+             566: 35(f64vec3) Load 380(r42)
+             567: 35(f64vec3) VectorTimesScalar 566 565
                               Store 380(r42) 567
              568:    481(ptr) AccessChain 113 480
              569:     20(int) Load 568
              570:    27(bool) INotEqual 569 137
-             571:   34(float) Select 570 288 261
-             572:   35(fvec3) Load 384(r43)
-             573:   35(fvec3) VectorTimesScalar 572 571
+             571:34(float64_t) Select 570 288 261
+             572: 35(f64vec3) Load 384(r43)
+             573: 35(f64vec3) VectorTimesScalar 572 571
                               Store 384(r43) 573
                               Store 575(c1) 124
                               Store 576(c2) 124

3rdparty/glslang/Test/baseResults/hlsl.self_cast.frag.out

@@ -0,0 +1,130 @@
+hlsl.self_cast.frag
+Shader version: 500
+gl_FragCoord origin is upper left
+0:? Sequence
+0:5  Function Definition: @main( ( temp void)
+0:5    Function Parameters: 
+0:?     Sequence
+0:?       Sequence
+0:8        Sequence
+0:8          move second child to first child ( temp structure{})
+0:8            'b' ( temp structure{})
+0:8            'a' ( temp structure{})
+0:?       Sequence
+0:13        Sequence
+0:13          move second child to first child ( temp structure{ temp float f})
+0:13            'b' ( temp structure{ temp float f})
+0:13            'a' ( temp structure{ temp float f})
+0:?       Sequence
+0:18        Sequence
+0:18          move second child to first child ( temp 2-element array of structure{})
+0:18            'b' ( temp 2-element array of structure{})
+0:18            'a' ( temp 2-element array of structure{})
+0:?       Sequence
+0:23        Sequence
+0:23          move second child to first child ( temp 2-element array of structure{ temp float f})
+0:23            'b' ( temp 2-element array of structure{ temp float f})
+0:23            'a' ( temp 2-element array of structure{ temp float f})
+0:5  Function Definition: main( ( temp void)
+0:5    Function Parameters: 
+0:?     Sequence
+0:5      Function Call: @main( ( temp void)
+0:?   Linker Objects
+
+
+Linked fragment stage:
+
+
+Shader version: 500
+gl_FragCoord origin is upper left
+0:? Sequence
+0:5  Function Definition: @main( ( temp void)
+0:5    Function Parameters: 
+0:?     Sequence
+0:?       Sequence
+0:8        Sequence
+0:8          move second child to first child ( temp structure{})
+0:8            'b' ( temp structure{})
+0:8            'a' ( temp structure{})
+0:?       Sequence
+0:13        Sequence
+0:13          move second child to first child ( temp structure{ temp float f})
+0:13            'b' ( temp structure{ temp float f})
+0:13            'a' ( temp structure{ temp float f})
+0:?       Sequence
+0:18        Sequence
+0:18          move second child to first child ( temp 2-element array of structure{})
+0:18            'b' ( temp 2-element array of structure{})
+0:18            'a' ( temp 2-element array of structure{})
+0:?       Sequence
+0:23        Sequence
+0:23          move second child to first child ( temp 2-element array of structure{ temp float f})
+0:23            'b' ( temp 2-element array of structure{ temp float f})
+0:23            'a' ( temp 2-element array of structure{ temp float f})
+0:5  Function Definition: main( ( temp void)
+0:5    Function Parameters: 
+0:?     Sequence
+0:5      Function Call: @main( ( temp void)
+0:?   Linker Objects
+
+// Module Version 10000
+// Generated by (magic number): 80006
+// Id's are bound by 32
+
+                              Capability Shader
+               1:             ExtInstImport  "GLSL.std.450"
+                              MemoryModel Logical GLSL450
+                              EntryPoint Fragment 4  "main"
+                              ExecutionMode 4 OriginUpperLeft
+                              Source HLSL 500
+                              Name 4  "main"
+                              Name 6  "@main("
+                              Name 8  "Test0"
+                              Name 10  "b"
+                              Name 11  "a"
+                              Name 14  "Test1"
+                              MemberName 14(Test1) 0  "f"
+                              Name 16  "b"
+                              Name 17  "a"
+                              Name 23  "b"
+                              Name 24  "a"
+                              Name 28  "b"
+                              Name 29  "a"
+               2:             TypeVoid
+               3:             TypeFunction 2
+        8(Test0):             TypeStruct
+               9:             TypePointer Function 8(Test0)
+              13:             TypeFloat 32
+       14(Test1):             TypeStruct 13(float)
+              15:             TypePointer Function 14(Test1)
+              19:             TypeInt 32 0
+              20:     19(int) Constant 2
+              21:             TypeArray 8(Test0) 20
+              22:             TypePointer Function 21
+              26:             TypeArray 14(Test1) 20
+              27:             TypePointer Function 26
+         4(main):           2 Function None 3
+               5:             Label
+              31:           2 FunctionCall 6(@main()
+                              Return
+                              FunctionEnd
+       6(@main():           2 Function None 3
+               7:             Label
+           10(b):      9(ptr) Variable Function
+           11(a):      9(ptr) Variable Function
+           16(b):     15(ptr) Variable Function
+           17(a):     15(ptr) Variable Function
+           23(b):     22(ptr) Variable Function
+           24(a):     22(ptr) Variable Function
+           28(b):     27(ptr) Variable Function
+           29(a):     27(ptr) Variable Function
+              12:    8(Test0) Load 11(a)
+                              Store 10(b) 12
+              18:   14(Test1) Load 17(a)
+                              Store 16(b) 18
+              25:          21 Load 24(a)
+                              Store 23(b) 25
+              30:          26 Load 29(a)
+                              Store 28(b) 30
+                              Return
+                              FunctionEnd

3rdparty/glslang/Test/baseResults/hlsl.shapeConv.frag.out

@@ -40,8 +40,7 @@ gl_FragCoord origin is upper left
 0:10      move second child to first child ( temp 3-component vector of float)
 0:10        'u' ( temp 3-component vector of float)
 0:10        Construct vec3 ( temp 3-component vector of float)
-0:10          Construct float ( temp float)
-0:10            'f' ( in float)
+0:10          'f' ( in float)
 0:11      Sequence
 0:11        move second child to first child ( temp 2-component vector of float)
 0:11          'w' ( temp 2-component vector of float)
@@ -203,8 +202,7 @@ gl_FragCoord origin is upper left
 0:10      move second child to first child ( temp 3-component vector of float)
 0:10        'u' ( temp 3-component vector of float)
 0:10        Construct vec3 ( temp 3-component vector of float)
-0:10          Construct float ( temp float)
-0:10            'f' ( in float)
+0:10          'f' ( in float)
 0:11      Sequence
 0:11        move second child to first child ( temp 2-component vector of float)
 0:11          'w' ( temp 2-component vector of float)

3rdparty/glslang/Test/baseResults/hlsl.templatetypes.frag.out

@@ -571,8 +571,8 @@ gl_FragCoord origin is upper left
               28:     25(int) Constant 1
               29:             TypePointer Function 6(float)
               31:             TypeFloat 64
-              32:             TypePointer Function 31(float)
-              34:   31(float) Constant 0 1072693248
+              32:             TypePointer Function 31(float64_t)
+              34:31(float64_t) Constant 0 1072693248
               35:             TypeInt 32 0
               36:             TypePointer Function 35(int)
               38:     35(int) Constant 1
@@ -587,10 +587,10 @@ gl_FragCoord origin is upper left
               49:             TypeVector 6(float) 2
               50:             TypePointer Function 49(fvec2)
               52:   49(fvec2) ConstantComposite 13 14
-              53:             TypeVector 31(float) 2
-              54:             TypePointer Function 53(fvec2)
-              56:   31(float) Constant 0 1073741824
-              57:   53(fvec2) ConstantComposite 34 56
+              53:             TypeVector 31(float64_t) 2
+              54:             TypePointer Function 53(f64vec2)
+              56:31(float64_t) Constant 0 1073741824
+              57: 53(f64vec2) ConstantComposite 34 56
               58:             TypeVector 35(int) 2
               59:             TypePointer Function 58(ivec2)
               61:     35(int) Constant 2
@@ -605,10 +605,10 @@ gl_FragCoord origin is upper left
               72:             TypeVector 6(float) 3
               73:             TypePointer Function 72(fvec3)
               75:   72(fvec3) ConstantComposite 13 14 15
-              76:             TypeVector 31(float) 3
-              77:             TypePointer Function 76(fvec3)
-              79:   31(float) Constant 0 1074266112
-              80:   76(fvec3) ConstantComposite 34 56 79
+              76:             TypeVector 31(float64_t) 3
+              77:             TypePointer Function 76(f64vec3)
+              79:31(float64_t) Constant 0 1074266112
+              80: 76(f64vec3) ConstantComposite 34 56 79
               81:             TypeVector 35(int) 3
               82:             TypePointer Function 81(ivec3)
               84:     35(int) Constant 3
@@ -620,10 +620,10 @@ gl_FragCoord origin is upper left
               91:             TypePointer Function 90(ivec4)
               93:     25(int) Constant 4
               94:   90(ivec4) ConstantComposite 28 47 70 93
-              96:             TypeVector 31(float) 4
-              97:             TypePointer Function 96(fvec4)
-              99:   31(float) Constant 0 1074790400
-             100:   96(fvec4) ConstantComposite 34 56 79 99
+              96:             TypeVector 31(float64_t) 4
+              97:             TypePointer Function 96(f64vec4)
+              99:31(float64_t) Constant 0 1074790400
+             100: 96(f64vec4) ConstantComposite 34 56 79 99
              101:             TypeVector 35(int) 4
              102:             TypePointer Function 101(ivec4)
              104:     35(int) Constant 4

3rdparty/glslang/Test/baseResults/hlsl.wavebroadcast.comp.out

@@ -2346,8 +2346,8 @@ local_size = (32, 16, 1)
               16:             TypeFloat 32
               17:             TypeVector 16(float) 4
               18:             TypeFloat 64
-              19:             TypeVector 18(float) 4
-       20(Types):             TypeStruct 13(ivec4) 15(ivec4) 17(fvec4) 19(fvec4)
+              19:             TypeVector 18(float64_t) 4
+       20(Types):             TypeStruct 13(ivec4) 15(ivec4) 17(fvec4) 19(f64vec4)
               21:             TypeRuntimeArray 20(Types)
         22(data):             TypeStruct 21
               23:             TypePointer Uniform 22(data)
@@ -2371,10 +2371,10 @@ local_size = (32, 16, 1)
              137:             TypeVector 16(float) 2
              149:             TypeVector 16(float) 3
              159:     14(int) Constant 3
-             162:             TypePointer Uniform 19(fvec4)
-             171:             TypePointer Uniform 18(float)
-             180:             TypeVector 18(float) 2
-             192:             TypeVector 18(float) 3
+             162:             TypePointer Uniform 19(f64vec4)
+             171:             TypePointer Uniform 18(float64_t)
+             180:             TypeVector 18(float64_t) 2
+             192:             TypeVector 18(float64_t) 3
              353:             TypePointer Input 7(ivec3)
         354(dti):    353(ptr) Variable Input
        4(CSMain):           2 Function None 3
@@ -2522,8 +2522,8 @@ local_size = (32, 16, 1)
              160:     27(ptr) AccessChain 10(dti) 26
              161:      6(int) Load 160
              163:    162(ptr) AccessChain 24(data) 25 161 159
-             164:   19(fvec4) Load 163
-             165:   19(fvec4) GroupNonUniformBroadcastFirst 36 164
+             164: 19(f64vec4) Load 163
+             165: 19(f64vec4) GroupNonUniformBroadcastFirst 36 164
              166:    162(ptr) AccessChain 24(data) 25 158 159
                               Store 166 165
              167:     27(ptr) AccessChain 10(dti) 26
@@ -2531,8 +2531,8 @@ local_size = (32, 16, 1)
              169:     27(ptr) AccessChain 10(dti) 26
              170:      6(int) Load 169
              172:    171(ptr) AccessChain 24(data) 25 170 159 26
-             173:   18(float) Load 172
-             174:   18(float) GroupNonUniformBroadcastFirst 36 173
+             173:18(float64_t) Load 172
+             174:18(float64_t) GroupNonUniformBroadcastFirst 36 173
              175:    171(ptr) AccessChain 24(data) 25 168 159 26
                               Store 175 174
              176:     27(ptr) AccessChain 10(dti) 26
@@ -2540,24 +2540,24 @@ local_size = (32, 16, 1)
              178:     27(ptr) AccessChain 10(dti) 26
              179:      6(int) Load 178
              181:    162(ptr) AccessChain 24(data) 25 179 159
-             182:   19(fvec4) Load 181
-             183:  180(fvec2) VectorShuffle 182 182 0 1
-             184:  180(fvec2) GroupNonUniformBroadcastFirst 36 183
+             182: 19(f64vec4) Load 181
+             183:180(f64vec2) VectorShuffle 182 182 0 1
+             184:180(f64vec2) GroupNonUniformBroadcastFirst 36 183
              185:    162(ptr) AccessChain 24(data) 25 177 159
-             186:   19(fvec4) Load 185
-             187:   19(fvec4) VectorShuffle 186 184 4 5 2 3
+             186: 19(f64vec4) Load 185
+             187: 19(f64vec4) VectorShuffle 186 184 4 5 2 3
                               Store 185 187
              188:     27(ptr) AccessChain 10(dti) 26
              189:      6(int) Load 188
              190:     27(ptr) AccessChain 10(dti) 26
              191:      6(int) Load 190
              193:    162(ptr) AccessChain 24(data) 25 191 159
-             194:   19(fvec4) Load 193
-             195:  192(fvec3) VectorShuffle 194 194 0 1 2
-             196:  192(fvec3) GroupNonUniformBroadcastFirst 36 195
+             194: 19(f64vec4) Load 193
+             195:192(f64vec3) VectorShuffle 194 194 0 1 2
+             196:192(f64vec3) GroupNonUniformBroadcastFirst 36 195
              197:    162(ptr) AccessChain 24(data) 25 189 159
-             198:   19(fvec4) Load 197
-             199:   19(fvec4) VectorShuffle 198 196 4 5 6 3
+             198: 19(f64vec4) Load 197
+             199: 19(f64vec4) VectorShuffle 198 196 4 5 6 3
                               Store 197 199
              200:     27(ptr) AccessChain 10(dti) 26
              201:      6(int) Load 200
@@ -2690,8 +2690,8 @@ local_size = (32, 16, 1)
              316:     27(ptr) AccessChain 10(dti) 26
              317:      6(int) Load 316
              318:    162(ptr) AccessChain 24(data) 25 317 159
-             319:   19(fvec4) Load 318
-             320:   19(fvec4) GroupNonUniformBroadcastFirst 36 319
+             319: 19(f64vec4) Load 318
+             320: 19(f64vec4) GroupNonUniformBroadcastFirst 36 319
              321:    162(ptr) AccessChain 24(data) 25 315 159
                               Store 321 320
              322:     27(ptr) AccessChain 10(dti) 26
@@ -2699,8 +2699,8 @@ local_size = (32, 16, 1)
              324:     27(ptr) AccessChain 10(dti) 26
              325:      6(int) Load 324
              326:    171(ptr) AccessChain 24(data) 25 325 159 26
-             327:   18(float) Load 326
-             328:   18(float) GroupNonUniformBroadcastFirst 36 327
+             327:18(float64_t) Load 326
+             328:18(float64_t) GroupNonUniformBroadcastFirst 36 327
              329:    171(ptr) AccessChain 24(data) 25 323 159 26
                               Store 329 328
              330:     27(ptr) AccessChain 10(dti) 26
@@ -2708,24 +2708,24 @@ local_size = (32, 16, 1)
              332:     27(ptr) AccessChain 10(dti) 26
              333:      6(int) Load 332
              334:    162(ptr) AccessChain 24(data) 25 333 159
-             335:   19(fvec4) Load 334
-             336:  180(fvec2) VectorShuffle 335 335 0 1
-             337:  180(fvec2) GroupNonUniformBroadcastFirst 36 336
+             335: 19(f64vec4) Load 334
+             336:180(f64vec2) VectorShuffle 335 335 0 1
+             337:180(f64vec2) GroupNonUniformBroadcastFirst 36 336
              338:    162(ptr) AccessChain 24(data) 25 331 159
-             339:   19(fvec4) Load 338
-             340:   19(fvec4) VectorShuffle 339 337 4 5 2 3
+             339: 19(f64vec4) Load 338
+             340: 19(f64vec4) VectorShuffle 339 337 4 5 2 3
                               Store 338 340
              341:     27(ptr) AccessChain 10(dti) 26
              342:      6(int) Load 341
              343:     27(ptr) AccessChain 10(dti) 26
              344:      6(int) Load 343
              345:    162(ptr) AccessChain 24(data) 25 344 159
-             346:   19(fvec4) Load 345
-             347:  192(fvec3) VectorShuffle 346 346 0 1 2
-             348:  192(fvec3) GroupNonUniformBroadcastFirst 36 347
+             346: 19(f64vec4) Load 345
+             347:192(f64vec3) VectorShuffle 346 346 0 1 2
+             348:192(f64vec3) GroupNonUniformBroadcastFirst 36 347
              349:    162(ptr) AccessChain 24(data) 25 342 159
-             350:   19(fvec4) Load 349
-             351:   19(fvec4) VectorShuffle 350 348 4 5 6 3
+             350: 19(f64vec4) Load 349
+             351: 19(f64vec4) VectorShuffle 350 348 4 5 6 3
                               Store 349 351
                               Return
                               FunctionEnd

3rdparty/glslang/Test/baseResults/hlsl.waveprefix.comp.out

@@ -2370,8 +2370,8 @@ local_size = (32, 16, 1)
               16:             TypeFloat 32
               17:             TypeVector 16(float) 4
               18:             TypeFloat 64
-              19:             TypeVector 18(float) 4
-       20(Types):             TypeStruct 13(ivec4) 15(ivec4) 17(fvec4) 19(fvec4)
+              19:             TypeVector 18(float64_t) 4
+       20(Types):             TypeStruct 13(ivec4) 15(ivec4) 17(fvec4) 19(f64vec4)
               21:             TypeRuntimeArray 20(Types)
         22(data):             TypeStruct 21
               23:             TypePointer Uniform 22(data)
@@ -2394,10 +2394,10 @@ local_size = (32, 16, 1)
              136:             TypeVector 16(float) 2
              148:             TypeVector 16(float) 3
              158:     14(int) Constant 3
-             161:             TypePointer Uniform 19(fvec4)
-             170:             TypePointer Uniform 18(float)
-             179:             TypeVector 18(float) 2
-             191:             TypeVector 18(float) 3
+             161:             TypePointer Uniform 19(f64vec4)
+             170:             TypePointer Uniform 18(float64_t)
+             179:             TypeVector 18(float64_t) 2
+             191:             TypeVector 18(float64_t) 3
              357:             TypeBool
              363:             TypePointer Input 7(ivec3)
         364(dti):    363(ptr) Variable Input
@@ -2546,8 +2546,8 @@ local_size = (32, 16, 1)
              159:     27(ptr) AccessChain 10(dti) 26
              160:      6(int) Load 159
              162:    161(ptr) AccessChain 24(data) 25 160 158
-             163:   19(fvec4) Load 162
-             164:   19(fvec4) GroupNonUniformFAdd 35 InclusiveScan 163
+             163: 19(f64vec4) Load 162
+             164: 19(f64vec4) GroupNonUniformFAdd 35 InclusiveScan 163
              165:    161(ptr) AccessChain 24(data) 25 157 158
                               Store 165 164
              166:     27(ptr) AccessChain 10(dti) 26
@@ -2555,8 +2555,8 @@ local_size = (32, 16, 1)
              168:     27(ptr) AccessChain 10(dti) 26
              169:      6(int) Load 168
              171:    170(ptr) AccessChain 24(data) 25 169 158 26
-             172:   18(float) Load 171
-             173:   18(float) GroupNonUniformFAdd 35 InclusiveScan 172
+             172:18(float64_t) Load 171
+             173:18(float64_t) GroupNonUniformFAdd 35 InclusiveScan 172
              174:    170(ptr) AccessChain 24(data) 25 167 158 26
                               Store 174 173
              175:     27(ptr) AccessChain 10(dti) 26
@@ -2564,24 +2564,24 @@ local_size = (32, 16, 1)
              177:     27(ptr) AccessChain 10(dti) 26
              178:      6(int) Load 177
              180:    161(ptr) AccessChain 24(data) 25 178 158
-             181:   19(fvec4) Load 180
-             182:  179(fvec2) VectorShuffle 181 181 0 1
-             183:  179(fvec2) GroupNonUniformFAdd 35 InclusiveScan 182
+             181: 19(f64vec4) Load 180
+             182:179(f64vec2) VectorShuffle 181 181 0 1
+             183:179(f64vec2) GroupNonUniformFAdd 35 InclusiveScan 182
              184:    161(ptr) AccessChain 24(data) 25 176 158
-             185:   19(fvec4) Load 184
-             186:   19(fvec4) VectorShuffle 185 183 4 5 2 3
+             185: 19(f64vec4) Load 184
+             186: 19(f64vec4) VectorShuffle 185 183 4 5 2 3
                               Store 184 186
              187:     27(ptr) AccessChain 10(dti) 26
              188:      6(int) Load 187
              189:     27(ptr) AccessChain 10(dti) 26
              190:      6(int) Load 189
              192:    161(ptr) AccessChain 24(data) 25 190 158
-             193:   19(fvec4) Load 192
-             194:  191(fvec3) VectorShuffle 193 193 0 1 2
-             195:  191(fvec3) GroupNonUniformFAdd 35 InclusiveScan 194
+             193: 19(f64vec4) Load 192
+             194:191(f64vec3) VectorShuffle 193 193 0 1 2
+             195:191(f64vec3) GroupNonUniformFAdd 35 InclusiveScan 194
              196:    161(ptr) AccessChain 24(data) 25 188 158
-             197:   19(fvec4) Load 196
-             198:   19(fvec4) VectorShuffle 197 195 4 5 6 3
+             197: 19(f64vec4) Load 196
+             198: 19(f64vec4) VectorShuffle 197 195 4 5 6 3
                               Store 196 198
              199:     27(ptr) AccessChain 10(dti) 26
              200:      6(int) Load 199
@@ -2714,8 +2714,8 @@ local_size = (32, 16, 1)
              315:     27(ptr) AccessChain 10(dti) 26
              316:      6(int) Load 315
              317:    161(ptr) AccessChain 24(data) 25 316 158
-             318:   19(fvec4) Load 317
-             319:   19(fvec4) GroupNonUniformFMul 35 InclusiveScan 318
+             318: 19(f64vec4) Load 317
+             319: 19(f64vec4) GroupNonUniformFMul 35 InclusiveScan 318
              320:    161(ptr) AccessChain 24(data) 25 314 158
                               Store 320 319
              321:     27(ptr) AccessChain 10(dti) 26
@@ -2723,8 +2723,8 @@ local_size = (32, 16, 1)
              323:     27(ptr) AccessChain 10(dti) 26
              324:      6(int) Load 323
              325:    170(ptr) AccessChain 24(data) 25 324 158 26
-             326:   18(float) Load 325
-             327:   18(float) GroupNonUniformFMul 35 InclusiveScan 326
+             326:18(float64_t) Load 325
+             327:18(float64_t) GroupNonUniformFMul 35 InclusiveScan 326
              328:    170(ptr) AccessChain 24(data) 25 322 158 26
                               Store 328 327
              329:     27(ptr) AccessChain 10(dti) 26
@@ -2732,24 +2732,24 @@ local_size = (32, 16, 1)
              331:     27(ptr) AccessChain 10(dti) 26
              332:      6(int) Load 331
              333:    161(ptr) AccessChain 24(data) 25 332 158
-             334:   19(fvec4) Load 333
-             335:  179(fvec2) VectorShuffle 334 334 0 1
-             336:  179(fvec2) GroupNonUniformFMul 35 InclusiveScan 335
+             334: 19(f64vec4) Load 333
+             335:179(f64vec2) VectorShuffle 334 334 0 1
+             336:179(f64vec2) GroupNonUniformFMul 35 InclusiveScan 335
              337:    161(ptr) AccessChain 24(data) 25 330 158
-             338:   19(fvec4) Load 337
-             339:   19(fvec4) VectorShuffle 338 336 4 5 2 3
+             338: 19(f64vec4) Load 337
+             339: 19(f64vec4) VectorShuffle 338 336 4 5 2 3
                               Store 337 339
              340:     27(ptr) AccessChain 10(dti) 26
              341:      6(int) Load 340
              342:     27(ptr) AccessChain 10(dti) 26
              343:      6(int) Load 342
              344:    161(ptr) AccessChain 24(data) 25 343 158
-             345:   19(fvec4) Load 344
-             346:  191(fvec3) VectorShuffle 345 345 0 1 2
-             347:  191(fvec3) GroupNonUniformFMul 35 InclusiveScan 346
+             345: 19(f64vec4) Load 344
+             346:191(f64vec3) VectorShuffle 345 345 0 1 2
+             347:191(f64vec3) GroupNonUniformFMul 35 InclusiveScan 346
              348:    161(ptr) AccessChain 24(data) 25 341 158
-             349:   19(fvec4) Load 348
-             350:   19(fvec4) VectorShuffle 349 347 4 5 6 3
+             349: 19(f64vec4) Load 348
+             350: 19(f64vec4) VectorShuffle 349 347 4 5 6 3
                               Store 348 350
              351:     27(ptr) AccessChain 10(dti) 26
              352:      6(int) Load 351

3rdparty/glslang/Test/baseResults/hlsl.wavequad.comp.out

@@ -8073,8 +8073,8 @@ local_size = (32, 16, 1)
               16:             TypeFloat 32
               17:             TypeVector 16(float) 4
               18:             TypeFloat 64
-              19:             TypeVector 18(float) 4
-       20(Types):             TypeStruct 13(ivec4) 15(ivec4) 17(fvec4) 19(fvec4)
+              19:             TypeVector 18(float64_t) 4
+       20(Types):             TypeStruct 13(ivec4) 15(ivec4) 17(fvec4) 19(f64vec4)
               21:             TypeRuntimeArray 20(Types)
         22(data):             TypeStruct 21
               23:             TypePointer Uniform 22(data)
@@ -8097,10 +8097,10 @@ local_size = (32, 16, 1)
              136:             TypeVector 16(float) 2
              148:             TypeVector 16(float) 3
              158:     14(int) Constant 3
-             161:             TypePointer Uniform 19(fvec4)
-             170:             TypePointer Uniform 18(float)
-             179:             TypeVector 18(float) 2
-             191:             TypeVector 18(float) 3
+             161:             TypePointer Uniform 19(f64vec4)
+             170:             TypePointer Uniform 18(float64_t)
+             179:             TypeVector 18(float64_t) 2
+             191:             TypeVector 18(float64_t) 3
              205:      6(int) Constant 1
              358:      6(int) Constant 2
             1114:             TypePointer Input 7(ivec3)
@@ -8250,8 +8250,8 @@ local_size = (32, 16, 1)
              159:     27(ptr) AccessChain 10(dti) 26
              160:      6(int) Load 159
              162:    161(ptr) AccessChain 24(data) 25 160 158
-             163:   19(fvec4) Load 162
-             164:   19(fvec4) GroupNonUniformQuadBroadcast 35 163 26
+             163: 19(f64vec4) Load 162
+             164: 19(f64vec4) GroupNonUniformQuadBroadcast 35 163 26
              165:    161(ptr) AccessChain 24(data) 25 157 158
                               Store 165 164
              166:     27(ptr) AccessChain 10(dti) 26
@@ -8259,8 +8259,8 @@ local_size = (32, 16, 1)
              168:     27(ptr) AccessChain 10(dti) 26
              169:      6(int) Load 168
              171:    170(ptr) AccessChain 24(data) 25 169 158 26
-             172:   18(float) Load 171
-             173:   18(float) GroupNonUniformQuadBroadcast 35 172 26
+             172:18(float64_t) Load 171
+             173:18(float64_t) GroupNonUniformQuadBroadcast 35 172 26
              174:    170(ptr) AccessChain 24(data) 25 167 158 26
                               Store 174 173
              175:     27(ptr) AccessChain 10(dti) 26
@@ -8268,24 +8268,24 @@ local_size = (32, 16, 1)
              177:     27(ptr) AccessChain 10(dti) 26
              178:      6(int) Load 177
              180:    161(ptr) AccessChain 24(data) 25 178 158
-             181:   19(fvec4) Load 180
-             182:  179(fvec2) VectorShuffle 181 181 0 1
-             183:  179(fvec2) GroupNonUniformQuadBroadcast 35 182 26
+             181: 19(f64vec4) Load 180
+             182:179(f64vec2) VectorShuffle 181 181 0 1
+             183:179(f64vec2) GroupNonUniformQuadBroadcast 35 182 26
              184:    161(ptr) AccessChain 24(data) 25 176 158
-             185:   19(fvec4) Load 184
-             186:   19(fvec4) VectorShuffle 185 183 4 5 2 3
+             185: 19(f64vec4) Load 184
+             186: 19(f64vec4) VectorShuffle 185 183 4 5 2 3
                               Store 184 186
              187:     27(ptr) AccessChain 10(dti) 26
              188:      6(int) Load 187
              189:     27(ptr) AccessChain 10(dti) 26
              190:      6(int) Load 189
              192:    161(ptr) AccessChain 24(data) 25 190 158
-             193:   19(fvec4) Load 192
-             194:  191(fvec3) VectorShuffle 193 193 0 1 2
-             195:  191(fvec3) GroupNonUniformQuadBroadcast 35 194 26
+             193: 19(f64vec4) Load 192
+             194:191(f64vec3) VectorShuffle 193 193 0 1 2
+             195:191(f64vec3) GroupNonUniformQuadBroadcast 35 194 26
              196:    161(ptr) AccessChain 24(data) 25 188 158
-             197:   19(fvec4) Load 196
-             198:   19(fvec4) VectorShuffle 197 195 4 5 6 3
+             197: 19(f64vec4) Load 196
+             198: 19(f64vec4) VectorShuffle 197 195 4 5 6 3
                               Store 196 198
              199:     27(ptr) AccessChain 10(dti) 26
              200:      6(int) Load 199
@@ -8418,8 +8418,8 @@ local_size = (32, 16, 1)
              316:     27(ptr) AccessChain 10(dti) 26
              317:      6(int) Load 316
              318:    161(ptr) AccessChain 24(data) 25 317 158
-             319:   19(fvec4) Load 318
-             320:   19(fvec4) GroupNonUniformQuadBroadcast 35 319 205
+             319: 19(f64vec4) Load 318
+             320: 19(f64vec4) GroupNonUniformQuadBroadcast 35 319 205
              321:    161(ptr) AccessChain 24(data) 25 315 158
                               Store 321 320
              322:     27(ptr) AccessChain 10(dti) 26
@@ -8427,8 +8427,8 @@ local_size = (32, 16, 1)
              324:     27(ptr) AccessChain 10(dti) 26
              325:      6(int) Load 324
              326:    170(ptr) AccessChain 24(data) 25 325 158 26
-             327:   18(float) Load 326
-             328:   18(float) GroupNonUniformQuadBroadcast 35 327 205
+             327:18(float64_t) Load 326
+             328:18(float64_t) GroupNonUniformQuadBroadcast 35 327 205
              329:    170(ptr) AccessChain 24(data) 25 323 158 26
                               Store 329 328
              330:     27(ptr) AccessChain 10(dti) 26
@@ -8436,24 +8436,24 @@ local_size = (32, 16, 1)
              332:     27(ptr) AccessChain 10(dti) 26
              333:      6(int) Load 332
              334:    161(ptr) AccessChain 24(data) 25 333 158
-             335:   19(fvec4) Load 334
-             336:  179(fvec2) VectorShuffle 335 335 0 1
-             337:  179(fvec2) GroupNonUniformQuadBroadcast 35 336 205
+             335: 19(f64vec4) Load 334
+             336:179(f64vec2) VectorShuffle 335 335 0 1
+             337:179(f64vec2) GroupNonUniformQuadBroadcast 35 336 205
              338:    161(ptr) AccessChain 24(data) 25 331 158
-             339:   19(fvec4) Load 338
-             340:   19(fvec4) VectorShuffle 339 337 4 5 2 3
+             339: 19(f64vec4) Load 338
+             340: 19(f64vec4) VectorShuffle 339 337 4 5 2 3
                               Store 338 340
              341:     27(ptr) AccessChain 10(dti) 26
              342:      6(int) Load 341
              343:     27(ptr) AccessChain 10(dti) 26
              344:      6(int) Load 343
              345:    161(ptr) AccessChain 24(data) 25 344 158
-             346:   19(fvec4) Load 345
-             347:  191(fvec3) VectorShuffle 346 346 0 1 2
-             348:  191(fvec3) GroupNonUniformQuadBroadcast 35 347 205
+             346: 19(f64vec4) Load 345
+             347:191(f64vec3) VectorShuffle 346 346 0 1 2
+             348:191(f64vec3) GroupNonUniformQuadBroadcast 35 347 205
              349:    161(ptr) AccessChain 24(data) 25 342 158
-             350:   19(fvec4) Load 349
-             351:   19(fvec4) VectorShuffle 350 348 4 5 6 3
+             350: 19(f64vec4) Load 349
+             351: 19(f64vec4) VectorShuffle 350 348 4 5 6 3
                               Store 349 351
              352:     27(ptr) AccessChain 10(dti) 26
              353:      6(int) Load 352
@@ -8586,8 +8586,8 @@ local_size = (32, 16, 1)
              469:     27(ptr) AccessChain 10(dti) 26
              470:      6(int) Load 469
              471:    161(ptr) AccessChain 24(data) 25 470 158
-             472:   19(fvec4) Load 471
-             473:   19(fvec4) GroupNonUniformQuadBroadcast 35 472 358
+             472: 19(f64vec4) Load 471
+             473: 19(f64vec4) GroupNonUniformQuadBroadcast 35 472 358
              474:    161(ptr) AccessChain 24(data) 25 468 158
                               Store 474 473
              475:     27(ptr) AccessChain 10(dti) 26
@@ -8595,8 +8595,8 @@ local_size = (32, 16, 1)
              477:     27(ptr) AccessChain 10(dti) 26
              478:      6(int) Load 477
              479:    170(ptr) AccessChain 24(data) 25 478 158 26
-             480:   18(float) Load 479
-             481:   18(float) GroupNonUniformQuadBroadcast 35 480 358
+             480:18(float64_t) Load 479
+             481:18(float64_t) GroupNonUniformQuadBroadcast 35 480 358
              482:    170(ptr) AccessChain 24(data) 25 476 158 26
                               Store 482 481
              483:     27(ptr) AccessChain 10(dti) 26
@@ -8604,24 +8604,24 @@ local_size = (32, 16, 1)
              485:     27(ptr) AccessChain 10(dti) 26
              486:      6(int) Load 485
              487:    161(ptr) AccessChain 24(data) 25 486 158
-             488:   19(fvec4) Load 487
-             489:  179(fvec2) VectorShuffle 488 488 0 1
-             490:  179(fvec2) GroupNonUniformQuadBroadcast 35 489 358
+             488: 19(f64vec4) Load 487
+             489:179(f64vec2) VectorShuffle 488 488 0 1
+             490:179(f64vec2) GroupNonUniformQuadBroadcast 35 489 358
              491:    161(ptr) AccessChain 24(data) 25 484 158
-             492:   19(fvec4) Load 491
-             493:   19(fvec4) VectorShuffle 492 490 4 5 2 3
+             492: 19(f64vec4) Load 491
+             493: 19(f64vec4) VectorShuffle 492 490 4 5 2 3
                               Store 491 493
              494:     27(ptr) AccessChain 10(dti) 26
              495:      6(int) Load 494
              496:     27(ptr) AccessChain 10(dti) 26
              497:      6(int) Load 496
              498:    161(ptr) AccessChain 24(data) 25 497 158
-             499:   19(fvec4) Load 498
-             500:  191(fvec3) VectorShuffle 499 499 0 1 2
-             501:  191(fvec3) GroupNonUniformQuadBroadcast 35 500 358
+             499: 19(f64vec4) Load 498
+             500:191(f64vec3) VectorShuffle 499 499 0 1 2
+             501:191(f64vec3) GroupNonUniformQuadBroadcast 35 500 358
              502:    161(ptr) AccessChain 24(data) 25 495 158
-             503:   19(fvec4) Load 502
-             504:   19(fvec4) VectorShuffle 503 501 4 5 6 3
+             503: 19(f64vec4) Load 502
+             504: 19(f64vec4) VectorShuffle 503 501 4 5 6 3
                               Store 502 504
              505:     27(ptr) AccessChain 10(dti) 26
              506:      6(int) Load 505
@@ -8754,8 +8754,8 @@ local_size = (32, 16, 1)
              621:     27(ptr) AccessChain 10(dti) 26
              622:      6(int) Load 621
              623:    161(ptr) AccessChain 24(data) 25 622 158
-             624:   19(fvec4) Load 623
-             625:   19(fvec4) GroupNonUniformQuadBroadcast 35 624 35
+             624: 19(f64vec4) Load 623
+             625: 19(f64vec4) GroupNonUniformQuadBroadcast 35 624 35
              626:    161(ptr) AccessChain 24(data) 25 620 158
                               Store 626 625
              627:     27(ptr) AccessChain 10(dti) 26
@@ -8763,8 +8763,8 @@ local_size = (32, 16, 1)
              629:     27(ptr) AccessChain 10(dti) 26
              630:      6(int) Load 629
              631:    170(ptr) AccessChain 24(data) 25 630 158 26
-             632:   18(float) Load 631
-             633:   18(float) GroupNonUniformQuadBroadcast 35 632 35
+             632:18(float64_t) Load 631
+             633:18(float64_t) GroupNonUniformQuadBroadcast 35 632 35
              634:    170(ptr) AccessChain 24(data) 25 628 158 26
                               Store 634 633
              635:     27(ptr) AccessChain 10(dti) 26
@@ -8772,24 +8772,24 @@ local_size = (32, 16, 1)
              637:     27(ptr) AccessChain 10(dti) 26
              638:      6(int) Load 637
              639:    161(ptr) AccessChain 24(data) 25 638 158
-             640:   19(fvec4) Load 639
-             641:  179(fvec2) VectorShuffle 640 640 0 1
-             642:  179(fvec2) GroupNonUniformQuadBroadcast 35 641 35
+             640: 19(f64vec4) Load 639
+             641:179(f64vec2) VectorShuffle 640 640 0 1
+             642:179(f64vec2) GroupNonUniformQuadBroadcast 35 641 35
              643:    161(ptr) AccessChain 24(data) 25 636 158
-             644:   19(fvec4) Load 643
-             645:   19(fvec4) VectorShuffle 644 642 4 5 2 3
+             644: 19(f64vec4) Load 643
+             645: 19(f64vec4) VectorShuffle 644 642 4 5 2 3
                               Store 643 645
              646:     27(ptr) AccessChain 10(dti) 26
              647:      6(int) Load 646
              648:     27(ptr) AccessChain 10(dti) 26
              649:      6(int) Load 648
              650:    161(ptr) AccessChain 24(data) 25 649 158
-             651:   19(fvec4) Load 650
-             652:  191(fvec3) VectorShuffle 651 651 0 1 2
-             653:  191(fvec3) GroupNonUniformQuadBroadcast 35 652 35
+             651: 19(f64vec4) Load 650
+             652:191(f64vec3) VectorShuffle 651 651 0 1 2
+             653:191(f64vec3) GroupNonUniformQuadBroadcast 35 652 35
              654:    161(ptr) AccessChain 24(data) 25 647 158
-             655:   19(fvec4) Load 654
-             656:   19(fvec4) VectorShuffle 655 653 4 5 6 3
+             655: 19(f64vec4) Load 654
+             656: 19(f64vec4) VectorShuffle 655 653 4 5 6 3
                               Store 654 656
              657:     27(ptr) AccessChain 10(dti) 26
              658:      6(int) Load 657
@@ -8922,8 +8922,8 @@ local_size = (32, 16, 1)
              773:     27(ptr) AccessChain 10(dti) 26
              774:      6(int) Load 773
              775:    161(ptr) AccessChain 24(data) 25 774 158
-             776:   19(fvec4) Load 775
-             777:   19(fvec4) GroupNonUniformQuadSwap 35 776 26
+             776: 19(f64vec4) Load 775
+             777: 19(f64vec4) GroupNonUniformQuadSwap 35 776 26
              778:    161(ptr) AccessChain 24(data) 25 772 158
                               Store 778 777
              779:     27(ptr) AccessChain 10(dti) 26
@@ -8931,8 +8931,8 @@ local_size = (32, 16, 1)
              781:     27(ptr) AccessChain 10(dti) 26
              782:      6(int) Load 781
              783:    170(ptr) AccessChain 24(data) 25 782 158 26
-             784:   18(float) Load 783
-             785:   18(float) GroupNonUniformQuadSwap 35 784 26
+             784:18(float64_t) Load 783
+             785:18(float64_t) GroupNonUniformQuadSwap 35 784 26
              786:    170(ptr) AccessChain 24(data) 25 780 158 26
                               Store 786 785
              787:     27(ptr) AccessChain 10(dti) 26
@@ -8940,24 +8940,24 @@ local_size = (32, 16, 1)
              789:     27(ptr) AccessChain 10(dti) 26
              790:      6(int) Load 789
              791:    161(ptr) AccessChain 24(data) 25 790 158
-             792:   19(fvec4) Load 791
-             793:  179(fvec2) VectorShuffle 792 792 0 1
-             794:  179(fvec2) GroupNonUniformQuadSwap 35 793 26
+             792: 19(f64vec4) Load 791
+             793:179(f64vec2) VectorShuffle 792 792 0 1
+             794:179(f64vec2) GroupNonUniformQuadSwap 35 793 26
              795:    161(ptr) AccessChain 24(data) 25 788 158
-             796:   19(fvec4) Load 795
-             797:   19(fvec4) VectorShuffle 796 794 4 5 2 3
+             796: 19(f64vec4) Load 795
+             797: 19(f64vec4) VectorShuffle 796 794 4 5 2 3
                               Store 795 797
              798:     27(ptr) AccessChain 10(dti) 26
              799:      6(int) Load 798
              800:     27(ptr) AccessChain 10(dti) 26
              801:      6(int) Load 800
              802:    161(ptr) AccessChain 24(data) 25 801 158
-             803:   19(fvec4) Load 802
-             804:  191(fvec3) VectorShuffle 803 803 0 1 2
-             805:  191(fvec3) GroupNonUniformQuadSwap 35 804 26
+             803: 19(f64vec4) Load 802
+             804:191(f64vec3) VectorShuffle 803 803 0 1 2
+             805:191(f64vec3) GroupNonUniformQuadSwap 35 804 26
              806:    161(ptr) AccessChain 24(data) 25 799 158
-             807:   19(fvec4) Load 806
-             808:   19(fvec4) VectorShuffle 807 805 4 5 6 3
+             807: 19(f64vec4) Load 806
+             808: 19(f64vec4) VectorShuffle 807 805 4 5 6 3
                               Store 806 808
              809:     27(ptr) AccessChain 10(dti) 26
              810:      6(int) Load 809
@@ -9090,8 +9090,8 @@ local_size = (32, 16, 1)
              925:     27(ptr) AccessChain 10(dti) 26
              926:      6(int) Load 925
              927:    161(ptr) AccessChain 24(data) 25 926 158
-             928:   19(fvec4) Load 927
-             929:   19(fvec4) GroupNonUniformQuadSwap 35 928 205
+             928: 19(f64vec4) Load 927
+             929: 19(f64vec4) GroupNonUniformQuadSwap 35 928 205
              930:    161(ptr) AccessChain 24(data) 25 924 158
                               Store 930 929
              931:     27(ptr) AccessChain 10(dti) 26
@@ -9099,8 +9099,8 @@ local_size = (32, 16, 1)
              933:     27(ptr) AccessChain 10(dti) 26
              934:      6(int) Load 933
              935:    170(ptr) AccessChain 24(data) 25 934 158 26
-             936:   18(float) Load 935
-             937:   18(float) GroupNonUniformQuadSwap 35 936 205
+             936:18(float64_t) Load 935
+             937:18(float64_t) GroupNonUniformQuadSwap 35 936 205
              938:    170(ptr) AccessChain 24(data) 25 932 158 26
                               Store 938 937
              939:     27(ptr) AccessChain 10(dti) 26
@@ -9108,24 +9108,24 @@ local_size = (32, 16, 1)
              941:     27(ptr) AccessChain 10(dti) 26
              942:      6(int) Load 941
              943:    161(ptr) AccessChain 24(data) 25 942 158
-             944:   19(fvec4) Load 943
-             945:  179(fvec2) VectorShuffle 944 944 0 1
-             946:  179(fvec2) GroupNonUniformQuadSwap 35 945 205
+             944: 19(f64vec4) Load 943
+             945:179(f64vec2) VectorShuffle 944 944 0 1
+             946:179(f64vec2) GroupNonUniformQuadSwap 35 945 205
              947:    161(ptr) AccessChain 24(data) 25 940 158
-             948:   19(fvec4) Load 947
-             949:   19(fvec4) VectorShuffle 948 946 4 5 2 3
+             948: 19(f64vec4) Load 947
+             949: 19(f64vec4) VectorShuffle 948 946 4 5 2 3
                               Store 947 949
              950:     27(ptr) AccessChain 10(dti) 26
              951:      6(int) Load 950
              952:     27(ptr) AccessChain 10(dti) 26
              953:      6(int) Load 952
              954:    161(ptr) AccessChain 24(data) 25 953 158
-             955:   19(fvec4) Load 954
-             956:  191(fvec3) VectorShuffle 955 955 0 1 2
-             957:  191(fvec3) GroupNonUniformQuadSwap 35 956 205
+             955: 19(f64vec4) Load 954
+             956:191(f64vec3) VectorShuffle 955 955 0 1 2
+             957:191(f64vec3) GroupNonUniformQuadSwap 35 956 205
              958:    161(ptr) AccessChain 24(data) 25 951 158
-             959:   19(fvec4) Load 958
-             960:   19(fvec4) VectorShuffle 959 957 4 5 6 3
+             959: 19(f64vec4) Load 958
+             960: 19(f64vec4) VectorShuffle 959 957 4 5 6 3
                               Store 958 960
              961:     27(ptr) AccessChain 10(dti) 26
              962:      6(int) Load 961
@@ -9258,8 +9258,8 @@ local_size = (32, 16, 1)
             1077:     27(ptr) AccessChain 10(dti) 26
             1078:      6(int) Load 1077
             1079:    161(ptr) AccessChain 24(data) 25 1078 158
-            1080:   19(fvec4) Load 1079
-            1081:   19(fvec4) GroupNonUniformQuadSwap 35 1080 358
+            1080: 19(f64vec4) Load 1079
+            1081: 19(f64vec4) GroupNonUniformQuadSwap 35 1080 358
             1082:    161(ptr) AccessChain 24(data) 25 1076 158
                               Store 1082 1081
             1083:     27(ptr) AccessChain 10(dti) 26
@@ -9267,8 +9267,8 @@ local_size = (32, 16, 1)
             1085:     27(ptr) AccessChain 10(dti) 26
             1086:      6(int) Load 1085
             1087:    170(ptr) AccessChain 24(data) 25 1086 158 26
-            1088:   18(float) Load 1087
-            1089:   18(float) GroupNonUniformQuadSwap 35 1088 358
+            1088:18(float64_t) Load 1087
+            1089:18(float64_t) GroupNonUniformQuadSwap 35 1088 358
             1090:    170(ptr) AccessChain 24(data) 25 1084 158 26
                               Store 1090 1089
             1091:     27(ptr) AccessChain 10(dti) 26
@@ -9276,24 +9276,24 @@ local_size = (32, 16, 1)
             1093:     27(ptr) AccessChain 10(dti) 26
             1094:      6(int) Load 1093
             1095:    161(ptr) AccessChain 24(data) 25 1094 158
-            1096:   19(fvec4) Load 1095
-            1097:  179(fvec2) VectorShuffle 1096 1096 0 1
-            1098:  179(fvec2) GroupNonUniformQuadSwap 35 1097 358
+            1096: 19(f64vec4) Load 1095
+            1097:179(f64vec2) VectorShuffle 1096 1096 0 1
+            1098:179(f64vec2) GroupNonUniformQuadSwap 35 1097 358
             1099:    161(ptr) AccessChain 24(data) 25 1092 158
-            1100:   19(fvec4) Load 1099
-            1101:   19(fvec4) VectorShuffle 1100 1098 4 5 2 3
+            1100: 19(f64vec4) Load 1099
+            1101: 19(f64vec4) VectorShuffle 1100 1098 4 5 2 3
                               Store 1099 1101
             1102:     27(ptr) AccessChain 10(dti) 26
             1103:      6(int) Load 1102
             1104:     27(ptr) AccessChain 10(dti) 26
             1105:      6(int) Load 1104
             1106:    161(ptr) AccessChain 24(data) 25 1105 158
-            1107:   19(fvec4) Load 1106
-            1108:  191(fvec3) VectorShuffle 1107 1107 0 1 2
-            1109:  191(fvec3) GroupNonUniformQuadSwap 35 1108 358
+            1107: 19(f64vec4) Load 1106
+            1108:191(f64vec3) VectorShuffle 1107 1107 0 1 2
+            1109:191(f64vec3) GroupNonUniformQuadSwap 35 1108 358
             1110:    161(ptr) AccessChain 24(data) 25 1103 158
-            1111:   19(fvec4) Load 1110
-            1112:   19(fvec4) VectorShuffle 1111 1109 4 5 6 3
+            1111: 19(f64vec4) Load 1110
+            1112: 19(f64vec4) VectorShuffle 1111 1109 4 5 6 3
                               Store 1110 1112
                               Return
                               FunctionEnd

3rdparty/glslang/Test/baseResults/hlsl.wavereduction.comp.out

@@ -6234,8 +6234,8 @@ local_size = (32, 16, 1)
               16:             TypeFloat 32
               17:             TypeVector 16(float) 4
               18:             TypeFloat 64
-              19:             TypeVector 18(float) 4
-       20(Types):             TypeStruct 13(ivec4) 15(ivec4) 17(fvec4) 19(fvec4)
+              19:             TypeVector 18(float64_t) 4
+       20(Types):             TypeStruct 13(ivec4) 15(ivec4) 17(fvec4) 19(f64vec4)
               21:             TypeRuntimeArray 20(Types)
         22(data):             TypeStruct 21
               23:             TypePointer Uniform 22(data)
@@ -6258,10 +6258,10 @@ local_size = (32, 16, 1)
              136:             TypeVector 16(float) 2
              148:             TypeVector 16(float) 3
              158:     14(int) Constant 3
-             161:             TypePointer Uniform 19(fvec4)
-             170:             TypePointer Uniform 18(float)
-             179:             TypeVector 18(float) 2
-             191:             TypeVector 18(float) 3
+             161:             TypePointer Uniform 19(f64vec4)
+             170:             TypePointer Uniform 18(float64_t)
+             179:             TypeVector 18(float64_t) 2
+             191:             TypeVector 18(float64_t) 3
              889:             TypeBool
              895:             TypePointer Input 7(ivec3)
         896(dti):    895(ptr) Variable Input
@@ -6410,8 +6410,8 @@ local_size = (32, 16, 1)
              159:     27(ptr) AccessChain 10(dti) 26
              160:      6(int) Load 159
              162:    161(ptr) AccessChain 24(data) 25 160 158
-             163:   19(fvec4) Load 162
-             164:   19(fvec4) GroupNonUniformFAdd 35 Reduce 163
+             163: 19(f64vec4) Load 162
+             164: 19(f64vec4) GroupNonUniformFAdd 35 Reduce 163
              165:    161(ptr) AccessChain 24(data) 25 157 158
                               Store 165 164
              166:     27(ptr) AccessChain 10(dti) 26
@@ -6419,8 +6419,8 @@ local_size = (32, 16, 1)
              168:     27(ptr) AccessChain 10(dti) 26
              169:      6(int) Load 168
              171:    170(ptr) AccessChain 24(data) 25 169 158 26
-             172:   18(float) Load 171
-             173:   18(float) GroupNonUniformFAdd 35 Reduce 172
+             172:18(float64_t) Load 171
+             173:18(float64_t) GroupNonUniformFAdd 35 Reduce 172
              174:    170(ptr) AccessChain 24(data) 25 167 158 26
                               Store 174 173
              175:     27(ptr) AccessChain 10(dti) 26
@@ -6428,24 +6428,24 @@ local_size = (32, 16, 1)
              177:     27(ptr) AccessChain 10(dti) 26
              178:      6(int) Load 177
              180:    161(ptr) AccessChain 24(data) 25 178 158
-             181:   19(fvec4) Load 180
-             182:  179(fvec2) VectorShuffle 181 181 0 1
-             183:  179(fvec2) GroupNonUniformFAdd 35 Reduce 182
+             181: 19(f64vec4) Load 180
+             182:179(f64vec2) VectorShuffle 181 181 0 1
+             183:179(f64vec2) GroupNonUniformFAdd 35 Reduce 182
              184:    161(ptr) AccessChain 24(data) 25 176 158
-             185:   19(fvec4) Load 184
-             186:   19(fvec4) VectorShuffle 185 183 4 5 2 3
+             185: 19(f64vec4) Load 184
+             186: 19(f64vec4) VectorShuffle 185 183 4 5 2 3
                               Store 184 186
              187:     27(ptr) AccessChain 10(dti) 26
              188:      6(int) Load 187
              189:     27(ptr) AccessChain 10(dti) 26
              190:      6(int) Load 189
              192:    161(ptr) AccessChain 24(data) 25 190 158
-             193:   19(fvec4) Load 192
-             194:  191(fvec3) VectorShuffle 193 193 0 1 2
-             195:  191(fvec3) GroupNonUniformFAdd 35 Reduce 194
+             193: 19(f64vec4) Load 192
+             194:191(f64vec3) VectorShuffle 193 193 0 1 2
+             195:191(f64vec3) GroupNonUniformFAdd 35 Reduce 194
              196:    161(ptr) AccessChain 24(data) 25 188 158
-             197:   19(fvec4) Load 196
-             198:   19(fvec4) VectorShuffle 197 195 4 5 6 3
+             197: 19(f64vec4) Load 196
+             198: 19(f64vec4) VectorShuffle 197 195 4 5 6 3
                               Store 196 198
              199:     27(ptr) AccessChain 10(dti) 26
              200:      6(int) Load 199
@@ -6578,8 +6578,8 @@ local_size = (32, 16, 1)
              315:     27(ptr) AccessChain 10(dti) 26
              316:      6(int) Load 315
              317:    161(ptr) AccessChain 24(data) 25 316 158
-             318:   19(fvec4) Load 317
-             319:   19(fvec4) GroupNonUniformFMul 35 Reduce 318
+             318: 19(f64vec4) Load 317
+             319: 19(f64vec4) GroupNonUniformFMul 35 Reduce 318
              320:    161(ptr) AccessChain 24(data) 25 314 158
                               Store 320 319
              321:     27(ptr) AccessChain 10(dti) 26
@@ -6587,8 +6587,8 @@ local_size = (32, 16, 1)
              323:     27(ptr) AccessChain 10(dti) 26
              324:      6(int) Load 323
              325:    170(ptr) AccessChain 24(data) 25 324 158 26
-             326:   18(float) Load 325
-             327:   18(float) GroupNonUniformFMul 35 Reduce 326
+             326:18(float64_t) Load 325
+             327:18(float64_t) GroupNonUniformFMul 35 Reduce 326
              328:    170(ptr) AccessChain 24(data) 25 322 158 26
                               Store 328 327
              329:     27(ptr) AccessChain 10(dti) 26
@@ -6596,24 +6596,24 @@ local_size = (32, 16, 1)
              331:     27(ptr) AccessChain 10(dti) 26
              332:      6(int) Load 331
              333:    161(ptr) AccessChain 24(data) 25 332 158
-             334:   19(fvec4) Load 333
-             335:  179(fvec2) VectorShuffle 334 334 0 1
-             336:  179(fvec2) GroupNonUniformFMul 35 Reduce 335
+             334: 19(f64vec4) Load 333
+             335:179(f64vec2) VectorShuffle 334 334 0 1
+             336:179(f64vec2) GroupNonUniformFMul 35 Reduce 335
              337:    161(ptr) AccessChain 24(data) 25 330 158
-             338:   19(fvec4) Load 337
-             339:   19(fvec4) VectorShuffle 338 336 4 5 2 3
+             338: 19(f64vec4) Load 337
+             339: 19(f64vec4) VectorShuffle 338 336 4 5 2 3
                               Store 337 339
              340:     27(ptr) AccessChain 10(dti) 26
              341:      6(int) Load 340
              342:     27(ptr) AccessChain 10(dti) 26
              343:      6(int) Load 342
              344:    161(ptr) AccessChain 24(data) 25 343 158
-             345:   19(fvec4) Load 344
-             346:  191(fvec3) VectorShuffle 345 345 0 1 2
-             347:  191(fvec3) GroupNonUniformFMul 35 Reduce 346
+             345: 19(f64vec4) Load 344
+             346:191(f64vec3) VectorShuffle 345 345 0 1 2
+             347:191(f64vec3) GroupNonUniformFMul 35 Reduce 346
              348:    161(ptr) AccessChain 24(data) 25 341 158
-             349:   19(fvec4) Load 348
-             350:   19(fvec4) VectorShuffle 349 347 4 5 6 3
+             349: 19(f64vec4) Load 348
+             350: 19(f64vec4) VectorShuffle 349 347 4 5 6 3
                               Store 348 350
              351:     27(ptr) AccessChain 10(dti) 26
              352:      6(int) Load 351
@@ -6746,8 +6746,8 @@ local_size = (32, 16, 1)
              467:     27(ptr) AccessChain 10(dti) 26
              468:      6(int) Load 467
              469:    161(ptr) AccessChain 24(data) 25 468 158
-             470:   19(fvec4) Load 469
-             471:   19(fvec4) GroupNonUniformFMin 35 Reduce 470
+             470: 19(f64vec4) Load 469
+             471: 19(f64vec4) GroupNonUniformFMin 35 Reduce 470
              472:    161(ptr) AccessChain 24(data) 25 466 158
                               Store 472 471
              473:     27(ptr) AccessChain 10(dti) 26
@@ -6755,8 +6755,8 @@ local_size = (32, 16, 1)
              475:     27(ptr) AccessChain 10(dti) 26
              476:      6(int) Load 475
              477:    170(ptr) AccessChain 24(data) 25 476 158 26
-             478:   18(float) Load 477
-             479:   18(float) GroupNonUniformFMin 35 Reduce 478
+             478:18(float64_t) Load 477
+             479:18(float64_t) GroupNonUniformFMin 35 Reduce 478
              480:    170(ptr) AccessChain 24(data) 25 474 158 26
                               Store 480 479
              481:     27(ptr) AccessChain 10(dti) 26
@@ -6764,24 +6764,24 @@ local_size = (32, 16, 1)
              483:     27(ptr) AccessChain 10(dti) 26
              484:      6(int) Load 483
              485:    161(ptr) AccessChain 24(data) 25 484 158
-             486:   19(fvec4) Load 485
-             487:  179(fvec2) VectorShuffle 486 486 0 1
-             488:  179(fvec2) GroupNonUniformFMin 35 Reduce 487
+             486: 19(f64vec4) Load 485
+             487:179(f64vec2) VectorShuffle 486 486 0 1
+             488:179(f64vec2) GroupNonUniformFMin 35 Reduce 487
              489:    161(ptr) AccessChain 24(data) 25 482 158
-             490:   19(fvec4) Load 489
-             491:   19(fvec4) VectorShuffle 490 488 4 5 2 3
+             490: 19(f64vec4) Load 489
+             491: 19(f64vec4) VectorShuffle 490 488 4 5 2 3
                               Store 489 491
              492:     27(ptr) AccessChain 10(dti) 26
              493:      6(int) Load 492
              494:     27(ptr) AccessChain 10(dti) 26
              495:      6(int) Load 494
              496:    161(ptr) AccessChain 24(data) 25 495 158
-             497:   19(fvec4) Load 496
-             498:  191(fvec3) VectorShuffle 497 497 0 1 2
-             499:  191(fvec3) GroupNonUniformFMin 35 Reduce 498
+             497: 19(f64vec4) Load 496
+             498:191(f64vec3) VectorShuffle 497 497 0 1 2
+             499:191(f64vec3) GroupNonUniformFMin 35 Reduce 498
              500:    161(ptr) AccessChain 24(data) 25 493 158
-             501:   19(fvec4) Load 500
-             502:   19(fvec4) VectorShuffle 501 499 4 5 6 3
+             501: 19(f64vec4) Load 500
+             502: 19(f64vec4) VectorShuffle 501 499 4 5 6 3
                               Store 500 502
              503:     27(ptr) AccessChain 10(dti) 26
              504:      6(int) Load 503
@@ -6914,8 +6914,8 @@ local_size = (32, 16, 1)
              619:     27(ptr) AccessChain 10(dti) 26
              620:      6(int) Load 619
              621:    161(ptr) AccessChain 24(data) 25 620 158
-             622:   19(fvec4) Load 621
-             623:   19(fvec4) GroupNonUniformFMax 35 Reduce 622
+             622: 19(f64vec4) Load 621
+             623: 19(f64vec4) GroupNonUniformFMax 35 Reduce 622
              624:    161(ptr) AccessChain 24(data) 25 618 158
                               Store 624 623
              625:     27(ptr) AccessChain 10(dti) 26
@@ -6923,8 +6923,8 @@ local_size = (32, 16, 1)
              627:     27(ptr) AccessChain 10(dti) 26
              628:      6(int) Load 627
              629:    170(ptr) AccessChain 24(data) 25 628 158 26
-             630:   18(float) Load 629
-             631:   18(float) GroupNonUniformFMax 35 Reduce 630
+             630:18(float64_t) Load 629
+             631:18(float64_t) GroupNonUniformFMax 35 Reduce 630
              632:    170(ptr) AccessChain 24(data) 25 626 158 26
                               Store 632 631
              633:     27(ptr) AccessChain 10(dti) 26
@@ -6932,24 +6932,24 @@ local_size = (32, 16, 1)
              635:     27(ptr) AccessChain 10(dti) 26
              636:      6(int) Load 635
              637:    161(ptr) AccessChain 24(data) 25 636 158
-             638:   19(fvec4) Load 637
-             639:  179(fvec2) VectorShuffle 638 638 0 1
-             640:  179(fvec2) GroupNonUniformFMax 35 Reduce 639
+             638: 19(f64vec4) Load 637
+             639:179(f64vec2) VectorShuffle 638 638 0 1
+             640:179(f64vec2) GroupNonUniformFMax 35 Reduce 639
              641:    161(ptr) AccessChain 24(data) 25 634 158
-             642:   19(fvec4) Load 641
-             643:   19(fvec4) VectorShuffle 642 640 4 5 2 3
+             642: 19(f64vec4) Load 641
+             643: 19(f64vec4) VectorShuffle 642 640 4 5 2 3
                               Store 641 643
              644:     27(ptr) AccessChain 10(dti) 26
              645:      6(int) Load 644
              646:     27(ptr) AccessChain 10(dti) 26
              647:      6(int) Load 646
              648:    161(ptr) AccessChain 24(data) 25 647 158
-             649:   19(fvec4) Load 648
-             650:  191(fvec3) VectorShuffle 649 649 0 1 2
-             651:  191(fvec3) GroupNonUniformFMax 35 Reduce 650
+             649: 19(f64vec4) Load 648
+             650:191(f64vec3) VectorShuffle 649 649 0 1 2
+             651:191(f64vec3) GroupNonUniformFMax 35 Reduce 650
              652:    161(ptr) AccessChain 24(data) 25 645 158
-             653:   19(fvec4) Load 652
-             654:   19(fvec4) VectorShuffle 653 651 4 5 6 3
+             653: 19(f64vec4) Load 652
+             654: 19(f64vec4) VectorShuffle 653 651 4 5 6 3
                               Store 652 654
              655:     27(ptr) AccessChain 10(dti) 26
              656:      6(int) Load 655

3rdparty/glslang/Test/baseResults/hlsl.wavevote.comp.out

@@ -238,7 +238,7 @@ local_size = (32, 16, 1)
                8:             TypePointer Function 7(ivec3)
                9:             TypeFunction 2 8(ptr)
               13:             TypeInt 64 0
-              14:             TypeRuntimeArray 13(int)
+              14:             TypeRuntimeArray 13(int64_t)
         15(data):             TypeStruct 14
               16:             TypePointer Uniform 15(data)
         17(data):     16(ptr) Variable Uniform
@@ -249,8 +249,8 @@ local_size = (32, 16, 1)
               26:             TypeBool
               28:      6(int) Constant 3
               30:             TypeVector 6(int) 4
-              32:             TypeVector 13(int) 4
-              35:             TypePointer Uniform 13(int)
+              32:             TypeVector 13(int64_t) 4
+              35:             TypePointer Uniform 13(int64_t)
               37:      6(int) Constant 1
               48:      6(int) Constant 2
               69:             TypePointer Input 7(ivec3)
@@ -276,8 +276,8 @@ local_size = (32, 16, 1)
               27:    26(bool) IEqual 25 20
               29:    26(bool) GroupNonUniformAny 28 27
               31:   30(ivec4) GroupNonUniformBallot 28 29
-              33:   32(ivec4) UConvert 31
-              34:     13(int) CompositeExtract 33 0
+              33: 32(i64vec4) UConvert 31
+              34: 13(int64_t) CompositeExtract 33 0
               36:     35(ptr) AccessChain 17(data) 19 23
                               Store 36 34
               38:     21(ptr) AccessChain 10(dti) 37
@@ -287,8 +287,8 @@ local_size = (32, 16, 1)
               42:    26(bool) IEqual 41 20
               43:    26(bool) GroupNonUniformAll 28 42
               44:   30(ivec4) GroupNonUniformBallot 28 43
-              45:   32(ivec4) UConvert 44
-              46:     13(int) CompositeExtract 45 0
+              45: 32(i64vec4) UConvert 44
+              46: 13(int64_t) CompositeExtract 45 0
               47:     35(ptr) AccessChain 17(data) 19 39
                               Store 47 46
               49:     21(ptr) AccessChain 10(dti) 48
@@ -298,8 +298,8 @@ local_size = (32, 16, 1)
               53:    26(bool) IEqual 52 20
               54:    26(bool) GroupNonUniformAllEqual 28 53
               55:   30(ivec4) GroupNonUniformBallot 28 54
-              56:   32(ivec4) UConvert 55
-              57:     13(int) CompositeExtract 56 0
+              56: 32(i64vec4) UConvert 55
+              57: 13(int64_t) CompositeExtract 56 0
               58:     35(ptr) AccessChain 17(data) 19 50
                               Store 58 57
               59:     21(ptr) AccessChain 10(dti) 48
@@ -308,8 +308,8 @@ local_size = (32, 16, 1)
               62:      6(int) Load 61
               63:    26(bool) GroupNonUniformAllEqual 28 62
               64:   30(ivec4) GroupNonUniformBallot 28 63
-              65:   32(ivec4) UConvert 64
-              66:     13(int) CompositeExtract 65 0
+              65: 32(i64vec4) UConvert 64
+              66: 13(int64_t) CompositeExtract 65 0
               67:     35(ptr) AccessChain 17(data) 19 60
                               Store 67 66
                               Return

3rdparty/glslang/Test/baseResults/lineContinuation.vert.out

@@ -66,7 +66,7 @@ ERROR: node is still EOpNull!
 0:74    move second child to first child ( temp highp float)
 0:74      'funkyf' ( global highp float)
 0:75      Constant:
-0:75        12300000000000000.000000
+0:75        1.2300000000000e+16
 0:85  Sequence
 0:84    move second child to first child ( temp highp int)
 0:84      'funkyh' ( global highp int)
@@ -200,7 +200,7 @@ ERROR: node is still EOpNull!
 0:74    move second child to first child ( temp highp float)
 0:74      'funkyf' ( global highp float)
 0:75      Constant:
-0:75        12300000000000000.000000
+0:75        1.2300000000000e+16
 0:85  Sequence
 0:84    move second child to first child ( temp highp int)
 0:84      'funkyh' ( global highp int)

3rdparty/glslang/Test/baseResults/numeral.frag.out

@@ -330,7 +330,7 @@ ERROR: node is still EOpNull!
 0:73        move second child to first child ( temp float)
 0:73          'g6' ( temp float)
 0:73          Constant:
-0:73            0.000005
+0:73            5.0000000000000e-06
 0:74      Sequence
 0:74        move second child to first child ( temp float)
 0:74          'g7' ( temp float)
@@ -739,7 +739,7 @@ ERROR: node is still EOpNull!
 0:73        move second child to first child ( temp float)
 0:73          'g6' ( temp float)
 0:73          Constant:
-0:73            0.000005
+0:73            5.0000000000000e-06
 0:74      Sequence
 0:74        move second child to first child ( temp float)
 0:74          'g7' ( temp float)

3rdparty/glslang/Test/baseResults/remap.hlsl.templatetypes.none.frag.out

@@ -68,8 +68,8 @@ remap.hlsl.templatetypes.none.frag
               29:     26(int) Constant 1
               30:             TypePointer Function 6(float)
               32:             TypeFloat 64
-              33:             TypePointer Function 32(float)
-              35:   32(float) Constant 0 1072693248
+              33:             TypePointer Function 32(float64_t)
+              35:32(float64_t) Constant 0 1072693248
               36:             TypeInt 32 0
               37:             TypePointer Function 36(int)
               39:     36(int) Constant 1
@@ -84,10 +84,10 @@ remap.hlsl.templatetypes.none.frag
               50:             TypeVector 6(float) 2
               51:             TypePointer Function 50(fvec2)
               53:   50(fvec2) ConstantComposite 14 15
-              54:             TypeVector 32(float) 2
-              55:             TypePointer Function 54(fvec2)
-              57:   32(float) Constant 0 1073741824
-              58:   54(fvec2) ConstantComposite 35 57
+              54:             TypeVector 32(float64_t) 2
+              55:             TypePointer Function 54(f64vec2)
+              57:32(float64_t) Constant 0 1073741824
+              58: 54(f64vec2) ConstantComposite 35 57
               59:             TypeVector 36(int) 2
               60:             TypePointer Function 59(ivec2)
               62:     36(int) Constant 2
@@ -102,10 +102,10 @@ remap.hlsl.templatetypes.none.frag
               73:             TypeVector 6(float) 3
               74:             TypePointer Function 73(fvec3)
               76:   73(fvec3) ConstantComposite 14 15 16
-              77:             TypeVector 32(float) 3
-              78:             TypePointer Function 77(fvec3)
-              80:   32(float) Constant 0 1074266112
-              81:   77(fvec3) ConstantComposite 35 57 80
+              77:             TypeVector 32(float64_t) 3
+              78:             TypePointer Function 77(f64vec3)
+              80:32(float64_t) Constant 0 1074266112
+              81: 77(f64vec3) ConstantComposite 35 57 80
               82:             TypeVector 36(int) 3
               83:             TypePointer Function 82(ivec3)
               85:     36(int) Constant 3
@@ -117,10 +117,10 @@ remap.hlsl.templatetypes.none.frag
               92:             TypePointer Function 91(ivec4)
               94:     26(int) Constant 4
               95:   91(ivec4) ConstantComposite 29 48 71 94
-              97:             TypeVector 32(float) 4
-              98:             TypePointer Function 97(fvec4)
-             100:   32(float) Constant 0 1074790400
-             101:   97(fvec4) ConstantComposite 35 57 80 100
+              97:             TypeVector 32(float64_t) 4
+              98:             TypePointer Function 97(f64vec4)
+             100:32(float64_t) Constant 0 1074790400
+             101: 97(f64vec4) ConstantComposite 35 57 80 100
              102:             TypeVector 36(int) 4
              103:             TypePointer Function 102(ivec4)
              105:     36(int) Constant 4

3rdparty/glslang/Test/baseResults/remap.literal64.none.spv.out

@@ -8,7 +8,7 @@ remap.literal64.none.spv
                1:             TypeVoid
                2:             TypeInt 64 1
                3:             TypeFunction 1
-               4:      2(int) Constant 0 0
+               4:  2(int64_t) Constant 0 0
                5:           1 Function None 3
                6:             Label
                               SelectionMerge 7 None

3rdparty/glslang/Test/baseResults/spv.atomicInt64.comp.out

@@ -33,29 +33,29 @@ spv.atomicInt64.comp
                2:             TypeVoid
                3:             TypeFunction 2
                6:             TypeInt 64 1
-               7:             TypePointer Function 6(int)
-               9:      6(int) Constant 0 0
+               7:             TypePointer Function 6(int64_t)
+               9:  6(int64_t) Constant 0 0
               10:             TypeInt 64 0
-              11:             TypePointer Function 10(int)
-              13:     10(int) Constant 0 0
-      14(Buffer):             TypeStruct 6(int) 10(int)
+              11:             TypePointer Function 10(int64_t)
+              13: 10(int64_t) Constant 0 0
+      14(Buffer):             TypeStruct 6(int64_t) 10(int64_t)
               15:             TypePointer Uniform 14(Buffer)
          16(buf):     15(ptr) Variable Uniform
               17:             TypeInt 32 1
               18:     17(int) Constant 0
-              19:             TypePointer Uniform 6(int)
-              21:      6(int) Constant 4294967272 4294967295
+              19:             TypePointer Uniform 6(int64_t)
+              21:  6(int64_t) Constant 4294967272 4294967295
               22:             TypeInt 32 0
               23:     22(int) Constant 1
               24:     22(int) Constant 0
               28:     17(int) Constant 1
-              29:             TypePointer Uniform 10(int)
-              31:     10(int) Constant 15 240
-      84(Struct):             TypeStruct 6(int) 10(int)
+              29:             TypePointer Uniform 10(int64_t)
+              31: 10(int64_t) Constant 15 240
+      84(Struct):             TypeStruct 6(int64_t) 10(int64_t)
               85:             TypePointer Workgroup 84(Struct)
            86(s):     85(ptr) Variable Workgroup
-              87:             TypePointer Workgroup 6(int)
-              92:             TypePointer Workgroup 10(int)
+              87:             TypePointer Workgroup 6(int64_t)
+              92:             TypePointer Workgroup 10(int64_t)
              146:             TypeVector 22(int) 3
              147:     22(int) Constant 16
              148:  146(ivec3) ConstantComposite 147 147 23
@@ -66,149 +66,149 @@ spv.atomicInt64.comp
                               Store 8(i64) 9
                               Store 12(u64) 13
               20:     19(ptr) AccessChain 16(buf) 18
-              25:      6(int) AtomicSMin 20 23 24 21
-              26:      6(int) Load 8(i64)
-              27:      6(int) IAdd 26 25
+              25:  6(int64_t) AtomicSMin 20 23 24 21
+              26:  6(int64_t) Load 8(i64)
+              27:  6(int64_t) IAdd 26 25
                               Store 8(i64) 27
               30:     29(ptr) AccessChain 16(buf) 28
-              32:     10(int) AtomicUMin 30 23 24 31
-              33:     10(int) Load 12(u64)
-              34:     10(int) IAdd 33 32
+              32: 10(int64_t) AtomicUMin 30 23 24 31
+              33: 10(int64_t) Load 12(u64)
+              34: 10(int64_t) IAdd 33 32
                               Store 12(u64) 34
               35:     19(ptr) AccessChain 16(buf) 18
-              36:      6(int) AtomicSMax 35 23 24 21
-              37:      6(int) Load 8(i64)
-              38:      6(int) IAdd 37 36
+              36:  6(int64_t) AtomicSMax 35 23 24 21
+              37:  6(int64_t) Load 8(i64)
+              38:  6(int64_t) IAdd 37 36
                               Store 8(i64) 38
               39:     29(ptr) AccessChain 16(buf) 28
-              40:     10(int) AtomicUMax 39 23 24 31
-              41:     10(int) Load 12(u64)
-              42:     10(int) IAdd 41 40
+              40: 10(int64_t) AtomicUMax 39 23 24 31
+              41: 10(int64_t) Load 12(u64)
+              42: 10(int64_t) IAdd 41 40
                               Store 12(u64) 42
               43:     19(ptr) AccessChain 16(buf) 18
-              44:      6(int) AtomicAnd 43 23 24 21
-              45:      6(int) Load 8(i64)
-              46:      6(int) IAdd 45 44
+              44:  6(int64_t) AtomicAnd 43 23 24 21
+              45:  6(int64_t) Load 8(i64)
+              46:  6(int64_t) IAdd 45 44
                               Store 8(i64) 46
               47:     29(ptr) AccessChain 16(buf) 28
-              48:     10(int) AtomicAnd 47 23 24 31
-              49:     10(int) Load 12(u64)
-              50:     10(int) IAdd 49 48
+              48: 10(int64_t) AtomicAnd 47 23 24 31
+              49: 10(int64_t) Load 12(u64)
+              50: 10(int64_t) IAdd 49 48
                               Store 12(u64) 50
               51:     19(ptr) AccessChain 16(buf) 18
-              52:      6(int) AtomicOr 51 23 24 21
-              53:      6(int) Load 8(i64)
-              54:      6(int) IAdd 53 52
+              52:  6(int64_t) AtomicOr 51 23 24 21
+              53:  6(int64_t) Load 8(i64)
+              54:  6(int64_t) IAdd 53 52
                               Store 8(i64) 54
               55:     29(ptr) AccessChain 16(buf) 28
-              56:     10(int) AtomicOr 55 23 24 31
-              57:     10(int) Load 12(u64)
-              58:     10(int) IAdd 57 56
+              56: 10(int64_t) AtomicOr 55 23 24 31
+              57: 10(int64_t) Load 12(u64)
+              58: 10(int64_t) IAdd 57 56
                               Store 12(u64) 58
               59:     19(ptr) AccessChain 16(buf) 18
-              60:      6(int) AtomicXor 59 23 24 21
-              61:      6(int) Load 8(i64)
-              62:      6(int) IAdd 61 60
+              60:  6(int64_t) AtomicXor 59 23 24 21
+              61:  6(int64_t) Load 8(i64)
+              62:  6(int64_t) IAdd 61 60
                               Store 8(i64) 62
               63:     29(ptr) AccessChain 16(buf) 28
-              64:     10(int) AtomicXor 63 23 24 31
-              65:     10(int) Load 12(u64)
-              66:     10(int) IAdd 65 64
+              64: 10(int64_t) AtomicXor 63 23 24 31
+              65: 10(int64_t) Load 12(u64)
+              66: 10(int64_t) IAdd 65 64
                               Store 12(u64) 66
               67:     19(ptr) AccessChain 16(buf) 18
-              68:      6(int) AtomicIAdd 67 23 24 21
-              69:      6(int) Load 8(i64)
-              70:      6(int) IAdd 69 68
+              68:  6(int64_t) AtomicIAdd 67 23 24 21
+              69:  6(int64_t) Load 8(i64)
+              70:  6(int64_t) IAdd 69 68
                               Store 8(i64) 70
               71:     19(ptr) AccessChain 16(buf) 18
-              72:      6(int) AtomicExchange 71 23 24 21
-              73:      6(int) Load 8(i64)
-              74:      6(int) IAdd 73 72
+              72:  6(int64_t) AtomicExchange 71 23 24 21
+              73:  6(int64_t) Load 8(i64)
+              74:  6(int64_t) IAdd 73 72
                               Store 8(i64) 74
               75:     19(ptr) AccessChain 16(buf) 18
-              76:      6(int) Load 8(i64)
-              77:      6(int) AtomicCompareExchange 75 23 24 24 76 21
-              78:      6(int) Load 8(i64)
-              79:      6(int) IAdd 78 77
+              76:  6(int64_t) Load 8(i64)
+              77:  6(int64_t) AtomicCompareExchange 75 23 24 24 76 21
+              78:  6(int64_t) Load 8(i64)
+              79:  6(int64_t) IAdd 78 77
                               Store 8(i64) 79
-              80:      6(int) Load 8(i64)
+              80:  6(int64_t) Load 8(i64)
               81:     19(ptr) AccessChain 16(buf) 18
                               Store 81 80
-              82:     10(int) Load 12(u64)
+              82: 10(int64_t) Load 12(u64)
               83:     29(ptr) AccessChain 16(buf) 28
                               Store 83 82
                               Store 8(i64) 9
                               Store 12(u64) 13
               88:     87(ptr) AccessChain 86(s) 18
-              89:      6(int) AtomicSMin 88 23 24 21
-              90:      6(int) Load 8(i64)
-              91:      6(int) IAdd 90 89
+              89:  6(int64_t) AtomicSMin 88 23 24 21
+              90:  6(int64_t) Load 8(i64)
+              91:  6(int64_t) IAdd 90 89
                               Store 8(i64) 91
               93:     92(ptr) AccessChain 86(s) 28
-              94:     10(int) AtomicUMin 93 23 24 31
-              95:     10(int) Load 12(u64)
-              96:     10(int) IAdd 95 94
+              94: 10(int64_t) AtomicUMin 93 23 24 31
+              95: 10(int64_t) Load 12(u64)
+              96: 10(int64_t) IAdd 95 94
                               Store 12(u64) 96
               97:     87(ptr) AccessChain 86(s) 18
-              98:      6(int) AtomicSMax 97 23 24 21
-              99:      6(int) Load 8(i64)
-             100:      6(int) IAdd 99 98
+              98:  6(int64_t) AtomicSMax 97 23 24 21
+              99:  6(int64_t) Load 8(i64)
+             100:  6(int64_t) IAdd 99 98
                               Store 8(i64) 100
              101:     92(ptr) AccessChain 86(s) 28
-             102:     10(int) AtomicUMax 101 23 24 31
-             103:     10(int) Load 12(u64)
-             104:     10(int) IAdd 103 102
+             102: 10(int64_t) AtomicUMax 101 23 24 31
+             103: 10(int64_t) Load 12(u64)
+             104: 10(int64_t) IAdd 103 102
                               Store 12(u64) 104
              105:     87(ptr) AccessChain 86(s) 18
-             106:      6(int) AtomicAnd 105 23 24 21
-             107:      6(int) Load 8(i64)
-             108:      6(int) IAdd 107 106
+             106:  6(int64_t) AtomicAnd 105 23 24 21
+             107:  6(int64_t) Load 8(i64)
+             108:  6(int64_t) IAdd 107 106
                               Store 8(i64) 108
              109:     92(ptr) AccessChain 86(s) 28
-             110:     10(int) AtomicAnd 109 23 24 31
-             111:     10(int) Load 12(u64)
-             112:     10(int) IAdd 111 110
+             110: 10(int64_t) AtomicAnd 109 23 24 31
+             111: 10(int64_t) Load 12(u64)
+             112: 10(int64_t) IAdd 111 110
                               Store 12(u64) 112
              113:     87(ptr) AccessChain 86(s) 18
-             114:      6(int) AtomicOr 113 23 24 21
-             115:      6(int) Load 8(i64)
-             116:      6(int) IAdd 115 114
+             114:  6(int64_t) AtomicOr 113 23 24 21
+             115:  6(int64_t) Load 8(i64)
+             116:  6(int64_t) IAdd 115 114
                               Store 8(i64) 116
              117:     92(ptr) AccessChain 86(s) 28
-             118:     10(int) AtomicOr 117 23 24 31
-             119:     10(int) Load 12(u64)
-             120:     10(int) IAdd 119 118
+             118: 10(int64_t) AtomicOr 117 23 24 31
+             119: 10(int64_t) Load 12(u64)
+             120: 10(int64_t) IAdd 119 118
                               Store 12(u64) 120
              121:     87(ptr) AccessChain 86(s) 18
-             122:      6(int) AtomicXor 121 23 24 21
-             123:      6(int) Load 8(i64)
-             124:      6(int) IAdd 123 122
+             122:  6(int64_t) AtomicXor 121 23 24 21
+             123:  6(int64_t) Load 8(i64)
+             124:  6(int64_t) IAdd 123 122
                               Store 8(i64) 124
              125:     92(ptr) AccessChain 86(s) 28
-             126:     10(int) AtomicXor 125 23 24 31
-             127:     10(int) Load 12(u64)
-             128:     10(int) IAdd 127 126
+             126: 10(int64_t) AtomicXor 125 23 24 31
+             127: 10(int64_t) Load 12(u64)
+             128: 10(int64_t) IAdd 127 126
                               Store 12(u64) 128
              129:     87(ptr) AccessChain 86(s) 18
-             130:      6(int) AtomicIAdd 129 23 24 21
-             131:      6(int) Load 8(i64)
-             132:      6(int) IAdd 131 130
+             130:  6(int64_t) AtomicIAdd 129 23 24 21
+             131:  6(int64_t) Load 8(i64)
+             132:  6(int64_t) IAdd 131 130
                               Store 8(i64) 132
              133:     87(ptr) AccessChain 86(s) 18
-             134:      6(int) AtomicExchange 133 23 24 21
-             135:      6(int) Load 8(i64)
-             136:      6(int) IAdd 135 134
+             134:  6(int64_t) AtomicExchange 133 23 24 21
+             135:  6(int64_t) Load 8(i64)
+             136:  6(int64_t) IAdd 135 134
                               Store 8(i64) 136
              137:     87(ptr) AccessChain 86(s) 18
-             138:      6(int) Load 8(i64)
-             139:      6(int) AtomicCompareExchange 137 23 24 24 138 21
-             140:      6(int) Load 8(i64)
-             141:      6(int) IAdd 140 139
+             138:  6(int64_t) Load 8(i64)
+             139:  6(int64_t) AtomicCompareExchange 137 23 24 24 138 21
+             140:  6(int64_t) Load 8(i64)
+             141:  6(int64_t) IAdd 140 139
                               Store 8(i64) 141
-             142:      6(int) Load 8(i64)
+             142:  6(int64_t) Load 8(i64)
              143:     87(ptr) AccessChain 86(s) 18
                               Store 143 142
-             144:     10(int) Load 12(u64)
+             144: 10(int64_t) Load 12(u64)
              145:     92(ptr) AccessChain 86(s) 28
                               Store 145 144
                               Return

3rdparty/glslang/Test/baseResults/spv.double.comp.out

@@ -34,13 +34,13 @@ spv.double.comp
                3:             TypeFunction 2
                6:             TypeFloat 32
                7:             TypeFloat 64
-      8(bufName):             TypeStruct 6(float) 7(float)
+      8(bufName):             TypeStruct 6(float) 7(float64_t)
                9:             TypePointer Uniform 8(bufName)
      10(bufInst):      9(ptr) Variable Uniform
               11:             TypeInt 32 1
               12:     11(int) Constant 1
-              13:    7(float) Constant 1413754136 1074340347
-              14:             TypePointer Uniform 7(float)
+              13:7(float64_t) Constant 1413754136 1074340347
+              14:             TypePointer Uniform 7(float64_t)
               16:     11(int) Constant 0
               17:    6(float) Constant 1095307129
               18:             TypePointer Uniform 6(float)
@@ -51,19 +51,19 @@ spv.double.comp
               25:             TypePointer Input 24(ivec3)
 26(gl_GlobalInvocationID):     25(ptr) Variable Input
               27:             TypeVector 23(int) 2
-              31:             TypePointer Function 7(float)
+              31:             TypePointer Function 7(float64_t)
 33(gl_LocalInvocationID):     25(ptr) Variable Input
               37:     11(int) Constant 8
               40:             TypeVector 6(float) 2
               42:    6(float) Constant 1090519040
-              47:             TypeVector 7(float) 4
-              48:             TypePointer Function 47(fvec4)
-              50:    7(float) Constant 2576980378 1071225241
-              51:    7(float) Constant 2576980378 1070176665
-              52:    7(float) Constant 858993459 1070805811
-              53:   47(fvec4) ConstantComposite 50 51 52 50
-              55:    7(float) Constant 0 1072693248
-              56:    7(float) Constant 3229815407 1074340298
+              47:             TypeVector 7(float64_t) 4
+              48:             TypePointer Function 47(f64vec4)
+              50:7(float64_t) Constant 2576980378 1071225241
+              51:7(float64_t) Constant 2576980378 1070176665
+              52:7(float64_t) Constant 858993459 1070805811
+              53: 47(f64vec4) ConstantComposite 50 51 52 50
+              55:7(float64_t) Constant 0 1072693248
+              56:7(float64_t) Constant 3229815407 1074340298
               57:             TypeImage 6(float) 2D nonsampled format:Unknown
               58:             TypePointer UniformConstant 57
      59(destTex):     58(ptr) Variable UniformConstant
@@ -90,7 +90,7 @@ spv.double.comp
               43:   40(fvec2) CompositeConstruct 42 42
               44:   40(fvec2) FDiv 41 43
               45:    6(float) ExtInst 1(GLSL.std.450) 66(Length) 44
-              46:    7(float) FConvert 45
+              46:7(float64_t) FConvert 45
                               Store 32(localCoef) 46
                               Store 49(aa) 53
                               Store 54(globalCoef) 55

3rdparty/glslang/Test/baseResults/spv.explicittypes.frag.out

@@ -140,13 +140,13 @@ spv.explicittypes.frag
                2:             TypeVoid
                3:             TypeFunction 2
               16:             TypeInt 64 1
-              17:             TypePointer Function 16(int)
+              17:             TypePointer Function 16(int64_t)
               19:             TypeInt 32 0
               20:     19(int) Constant 3
-              21:             TypeArray 16(int) 20
-              22:     16(int) Constant 4008636143 4008636142
-              23:     16(int) Constant 4294967295 4294967295
-              24:     16(int) Constant 0 1
+              21:             TypeArray 16(int64_t) 20
+              22: 16(int64_t) Constant 4008636143 4008636142
+              23: 16(int64_t) Constant 4294967295 4294967295
+              24: 16(int64_t) Constant 0 1
               25:          21 ConstantComposite 22 23 24
     26(Uniforms):             TypeStruct 19(int)
               27:             TypePointer Uniform 26(Uniforms)
@@ -156,11 +156,11 @@ spv.explicittypes.frag
               31:             TypePointer Uniform 19(int)
               34:             TypePointer Function 21
               38:             TypeInt 64 0
-              39:             TypePointer Function 38(int)
-              41:             TypeArray 38(int) 20
-              42:     38(int) Constant 4294967295 4294967295
-              43:     38(int) Constant 0 1
-              44:     38(int) Constant 4294967295 1
+              39:             TypePointer Function 38(int64_t)
+              41:             TypeArray 38(int64_t) 20
+              42: 38(int64_t) Constant 4294967295 4294967295
+              43: 38(int64_t) Constant 0 1
+              44: 38(int64_t) Constant 4294967295 1
               45:          41 ConstantComposite 42 43 44
               48:             TypePointer Function 41
               52:             TypePointer Function 29(int)
@@ -177,78 +177,78 @@ spv.explicittypes.frag
               70:          67 ConstantComposite 68 68 69
               73:             TypePointer Function 67
               77:             TypeInt 16 1
-              78:             TypePointer Function 77(int)
-              80:             TypeArray 77(int) 20
-              81:     77(int) Constant 4294962927
-              82:     77(int) Constant 4294967295
-              83:     77(int) Constant 16384
+              78:             TypePointer Function 77(int16_t)
+              80:             TypeArray 77(int16_t) 20
+              81: 77(int16_t) Constant 4294962927
+              82: 77(int16_t) Constant 4294967295
+              83: 77(int16_t) Constant 16384
               84:          80 ConstantComposite 81 82 83
               87:             TypePointer Function 80
               91:             TypeInt 16 0
-              92:             TypePointer Function 91(int)
-              94:             TypeArray 91(int) 20
-              95:     91(int) Constant 65535
-              96:     91(int) Constant 32767
+              92:             TypePointer Function 91(int16_t)
+              94:             TypeArray 91(int16_t) 20
+              95: 91(int16_t) Constant 65535
+              96: 91(int16_t) Constant 32767
               97:          94 ConstantComposite 95 95 96
              100:             TypePointer Function 94
              104:             TypeInt 8 1
-             105:             TypePointer Function 104(int)
-             107:             TypeArray 104(int) 20
-             108:    104(int) Constant 4294967279
-             109:    104(int) Constant 4294967295
-             110:    104(int) Constant 0
+             105:             TypePointer Function 104(int8_t)
+             107:             TypeArray 104(int8_t) 20
+             108: 104(int8_t) Constant 4294967279
+             109: 104(int8_t) Constant 4294967295
+             110: 104(int8_t) Constant 0
              111:         107 ConstantComposite 108 109 110
              114:             TypePointer Function 107
              118:             TypeInt 8 0
-             119:             TypePointer Function 118(int)
-             121:             TypeArray 118(int) 20
-             122:    118(int) Constant 255
-             123:    118(int) Constant 127
+             119:             TypePointer Function 118(int8_t)
+             121:             TypeArray 118(int8_t) 20
+             122: 118(int8_t) Constant 255
+             123: 118(int8_t) Constant 127
              124:         121 ConstantComposite 122 122 123
              127:             TypePointer Function 121
-             131:             TypeVector 118(int) 2
-             132:             TypePointer Function 131(ivec2)
-             134:             TypeVector 104(int) 2
-             135:             TypePointer Function 134(ivec2)
-             139:             TypeVector 77(int) 2
-             140:             TypePointer Function 139(ivec2)
+             131:             TypeVector 118(int8_t) 2
+             132:             TypePointer Function 131(i8vec2)
+             134:             TypeVector 104(int8_t) 2
+             135:             TypePointer Function 134(i8vec2)
+             139:             TypeVector 77(int16_t) 2
+             140:             TypePointer Function 139(i16vec2)
              147:             TypeVector 29(int) 2
              148:             TypePointer Function 147(ivec2)
              155:             TypeVector 19(int) 2
              156:             TypePointer Function 155(ivec2)
-             161:             TypeVector 16(int) 2
-             162:             TypePointer Function 161(ivec2)
-             166:             TypeVector 38(int) 2
-             167:             TypePointer Function 166(ivec2)
+             161:             TypeVector 16(int64_t) 2
+             162:             TypePointer Function 161(i64vec2)
+             166:             TypeVector 38(int64_t) 2
+             167:             TypePointer Function 166(i64vec2)
              179:             TypeFloat 16
-             180:             TypeVector 179(float) 2
-             181:             TypePointer Function 180(fvec2)
+             180:             TypeVector 179(float16_t) 2
+             181:             TypePointer Function 180(f16vec2)
              185:             TypeFloat 32
              186:             TypeVector 185(float) 2
              187:             TypePointer Function 186(fvec2)
              191:             TypeFloat 64
-             192:             TypeVector 191(float) 2
-             193:             TypePointer Function 192(fvec2)
-             220:             TypeVector 91(int) 2
-             221:             TypePointer Function 220(ivec2)
+             192:             TypeVector 191(float64_t) 2
+             193:             TypePointer Function 192(f64vec2)
+             220:             TypeVector 91(int16_t) 2
+             221:             TypePointer Function 220(i16vec2)
              249:             TypeBool
              250:             TypeVector 249(bool) 2
              251:             TypePointer Function 250(bvec2)
-             254:    104(int) Constant 1
-             255:  134(ivec2) ConstantComposite 110 110
-             256:  134(ivec2) ConstantComposite 254 254
-             259:    118(int) Constant 0
-             260:    118(int) Constant 1
-             261:  131(ivec2) ConstantComposite 259 259
-             262:  131(ivec2) ConstantComposite 260 260
-             365:     77(int) Constant 0
-             366:     77(int) Constant 1
-             367:  139(ivec2) ConstantComposite 365 365
-             368:  139(ivec2) ConstantComposite 366 366
-             371:     91(int) Constant 0
-             372:     91(int) Constant 1
-             373:  220(ivec2) ConstantComposite 371 371
-             374:  220(ivec2) ConstantComposite 372 372
+             254: 104(int8_t) Constant 1
+             255: 134(i8vec2) ConstantComposite 110 110
+             256: 134(i8vec2) ConstantComposite 254 254
+             259: 118(int8_t) Constant 0
+             260: 118(int8_t) Constant 1
+             261: 131(i8vec2) ConstantComposite 259 259
+             262: 131(i8vec2) ConstantComposite 260 260
+             365: 77(int16_t) Constant 0
+             366: 77(int16_t) Constant 1
+             367:139(i16vec2) ConstantComposite 365 365
+             368:139(i16vec2) ConstantComposite 366 366
+             371: 91(int16_t) Constant 0
+             372: 91(int16_t) Constant 1
+             373:220(i16vec2) ConstantComposite 371 371
+             374:220(i16vec2) ConstantComposite 372 372
              467:     29(int) Constant 1
              468:  147(ivec2) ConstantComposite 30 30
              469:  147(ivec2) ConstantComposite 467 467
@@ -256,23 +256,23 @@ spv.explicittypes.frag
              473:     19(int) Constant 1
              474:  155(ivec2) ConstantComposite 472 472
              475:  155(ivec2) ConstantComposite 473 473
-             550:     16(int) Constant 0 0
-             551:     16(int) Constant 1 0
-             552:  161(ivec2) ConstantComposite 550 550
-             553:  161(ivec2) ConstantComposite 551 551
-             556:     38(int) Constant 0 0
-             557:     38(int) Constant 1 0
-             558:  166(ivec2) ConstantComposite 556 556
-             559:  166(ivec2) ConstantComposite 557 557
-             565:             TypeVector 77(int) 3
-             566:             TypeVector 77(int) 4
-             567:             TypeVector 91(int) 3
-             568:             TypeVector 91(int) 4
+             550: 16(int64_t) Constant 0 0
+             551: 16(int64_t) Constant 1 0
+             552:161(i64vec2) ConstantComposite 550 550
+             553:161(i64vec2) ConstantComposite 551 551
+             556: 38(int64_t) Constant 0 0
+             557: 38(int64_t) Constant 1 0
+             558:166(i64vec2) ConstantComposite 556 556
+             559:166(i64vec2) ConstantComposite 557 557
+             565:             TypeVector 77(int16_t) 3
+             566:             TypeVector 77(int16_t) 4
+             567:             TypeVector 91(int16_t) 3
+             568:             TypeVector 91(int16_t) 4
              569:             TypeVector 29(int) 3
              570:             TypeVector 29(int) 4
              571:             TypeVector 19(int) 3
              572:             TypeVector 19(int) 4
-      573(Block):             TypeStruct 77(int) 139(ivec2) 565(ivec3) 566(ivec4) 91(int) 220(ivec2) 567(ivec3) 568(ivec4) 29(int) 147(ivec2) 569(ivec3) 570(ivec4) 19(int) 155(ivec2) 571(ivec3) 572(ivec4)
+      573(Block):             TypeStruct 77(int16_t) 139(i16vec2) 565(i16vec3) 566(i16vec4) 91(int16_t) 220(i16vec2) 567(i16vec3) 568(i16vec4) 29(int) 147(ivec2) 569(ivec3) 570(ivec4) 19(int) 155(ivec2) 571(ivec3) 572(ivec4)
              574:             TypePointer Uniform 573(Block)
       575(block):    574(ptr) Variable Uniform
          4(main):           2 Function None 3
@@ -301,13 +301,13 @@ spv.explicittypes.frag
               33:     19(int) Load 32
                               Store 35(indexable) 25
               36:     17(ptr) AccessChain 35(indexable) 33
-              37:     16(int) Load 36
+              37: 16(int64_t) Load 36
                               Store 18(i64) 37
               46:     31(ptr) AccessChain 28 30
               47:     19(int) Load 46
                               Store 49(indexable) 45
               50:     39(ptr) AccessChain 49(indexable) 47
-              51:     38(int) Load 50
+              51: 38(int64_t) Load 50
                               Store 40(u64) 51
               59:     31(ptr) AccessChain 28 30
               60:     19(int) Load 59
@@ -325,25 +325,25 @@ spv.explicittypes.frag
               86:     19(int) Load 85
                               Store 88(indexable) 84
               89:     78(ptr) AccessChain 88(indexable) 86
-              90:     77(int) Load 89
+              90: 77(int16_t) Load 89
                               Store 79(i16) 90
               98:     31(ptr) AccessChain 28 30
               99:     19(int) Load 98
                               Store 101(indexable) 97
              102:     92(ptr) AccessChain 101(indexable) 99
-             103:     91(int) Load 102
+             103: 91(int16_t) Load 102
                               Store 93(u16) 103
              112:     31(ptr) AccessChain 28 30
              113:     19(int) Load 112
                               Store 115(indexable) 111
              116:    105(ptr) AccessChain 115(indexable) 113
-             117:    104(int) Load 116
+             117: 104(int8_t) Load 116
                               Store 106(i8) 117
              125:     31(ptr) AccessChain 28 30
              126:     19(int) Load 125
                               Store 128(indexable) 124
              129:    119(ptr) AccessChain 128(indexable) 126
-             130:    118(int) Load 129
+             130: 118(int8_t) Load 129
                               Store 120(u8) 130
                               Return
                               FunctionEnd
@@ -361,133 +361,133 @@ spv.explicittypes.frag
        194(f64v):    193(ptr) Variable Function
        222(u16v):    221(ptr) Variable Function
          252(bv):    251(ptr) Variable Function
-             137:  134(ivec2) Load 136(i8v)
-             138:  131(ivec2) Bitcast 137
+             137: 134(i8vec2) Load 136(i8v)
+             138: 131(i8vec2) Bitcast 137
                               Store 133(u8v) 138
-             142:  134(ivec2) Load 136(i8v)
-             143:  139(ivec2) SConvert 142
+             142: 134(i8vec2) Load 136(i8v)
+             143:139(i16vec2) SConvert 142
                               Store 141(i16v) 143
-             144:  131(ivec2) Load 133(u8v)
-             145:  139(ivec2) UConvert 144
-             146:  139(ivec2) Bitcast 145
+             144: 131(i8vec2) Load 133(u8v)
+             145:139(i16vec2) UConvert 144
+             146:139(i16vec2) Bitcast 145
                               Store 141(i16v) 146
-             150:  134(ivec2) Load 136(i8v)
+             150: 134(i8vec2) Load 136(i8v)
              151:  147(ivec2) SConvert 150
                               Store 149(i32v) 151
-             152:  131(ivec2) Load 133(u8v)
+             152: 131(i8vec2) Load 133(u8v)
              153:  147(ivec2) UConvert 152
              154:  147(ivec2) Bitcast 153
                               Store 149(i32v) 154
-             158:  134(ivec2) Load 136(i8v)
+             158: 134(i8vec2) Load 136(i8v)
              159:  147(ivec2) SConvert 158
              160:  155(ivec2) Bitcast 159
                               Store 157(u32v) 160
-             164:  134(ivec2) Load 136(i8v)
-             165:  161(ivec2) SConvert 164
+             164: 134(i8vec2) Load 136(i8v)
+             165:161(i64vec2) SConvert 164
                               Store 163(i64v) 165
-             169:  134(ivec2) Load 136(i8v)
-             170:  161(ivec2) SConvert 169
-             171:  166(ivec2) Bitcast 170
+             169: 134(i8vec2) Load 136(i8v)
+             170:161(i64vec2) SConvert 169
+             171:166(i64vec2) Bitcast 170
                               Store 168(u64v) 171
-             172:  131(ivec2) Load 133(u8v)
+             172: 131(i8vec2) Load 133(u8v)
              173:  155(ivec2) UConvert 172
                               Store 157(u32v) 173
-             174:  131(ivec2) Load 133(u8v)
-             175:  161(ivec2) UConvert 174
-             176:  161(ivec2) Bitcast 175
+             174: 131(i8vec2) Load 133(u8v)
+             175:161(i64vec2) UConvert 174
+             176:161(i64vec2) Bitcast 175
                               Store 163(i64v) 176
-             177:  131(ivec2) Load 133(u8v)
-             178:  166(ivec2) UConvert 177
+             177: 131(i8vec2) Load 133(u8v)
+             178:166(i64vec2) UConvert 177
                               Store 168(u64v) 178
-             183:  134(ivec2) Load 136(i8v)
-             184:  180(fvec2) ConvertSToF 183
+             183: 134(i8vec2) Load 136(i8v)
+             184:180(f16vec2) ConvertSToF 183
                               Store 182(f16v) 184
-             189:  134(ivec2) Load 136(i8v)
+             189: 134(i8vec2) Load 136(i8v)
              190:  186(fvec2) ConvertSToF 189
                               Store 188(f32v) 190
-             195:  134(ivec2) Load 136(i8v)
-             196:  192(fvec2) ConvertSToF 195
+             195: 134(i8vec2) Load 136(i8v)
+             196:192(f64vec2) ConvertSToF 195
                               Store 194(f64v) 196
-             197:  131(ivec2) Load 133(u8v)
-             198:  180(fvec2) ConvertUToF 197
+             197: 131(i8vec2) Load 133(u8v)
+             198:180(f16vec2) ConvertUToF 197
                               Store 182(f16v) 198
-             199:  131(ivec2) Load 133(u8v)
+             199: 131(i8vec2) Load 133(u8v)
              200:  186(fvec2) ConvertUToF 199
                               Store 188(f32v) 200
-             201:  131(ivec2) Load 133(u8v)
-             202:  192(fvec2) ConvertUToF 201
+             201: 131(i8vec2) Load 133(u8v)
+             202:192(f64vec2) ConvertUToF 201
                               Store 194(f64v) 202
-             203:  131(ivec2) Load 133(u8v)
-             204:  134(ivec2) Bitcast 203
+             203: 131(i8vec2) Load 133(u8v)
+             204: 134(i8vec2) Bitcast 203
                               Store 136(i8v) 204
-             205:  134(ivec2) Load 136(i8v)
-             206:  139(ivec2) SConvert 205
+             205: 134(i8vec2) Load 136(i8v)
+             206:139(i16vec2) SConvert 205
                               Store 141(i16v) 206
-             207:  131(ivec2) Load 133(u8v)
-             208:  139(ivec2) UConvert 207
-             209:  139(ivec2) Bitcast 208
+             207: 131(i8vec2) Load 133(u8v)
+             208:139(i16vec2) UConvert 207
+             209:139(i16vec2) Bitcast 208
                               Store 141(i16v) 209
-             210:  134(ivec2) Load 136(i8v)
+             210: 134(i8vec2) Load 136(i8v)
              211:  147(ivec2) SConvert 210
                               Store 149(i32v) 211
-             212:  131(ivec2) Load 133(u8v)
+             212: 131(i8vec2) Load 133(u8v)
              213:  147(ivec2) UConvert 212
              214:  147(ivec2) Bitcast 213
                               Store 149(i32v) 214
-             215:  134(ivec2) Load 136(i8v)
-             216:  161(ivec2) SConvert 215
+             215: 134(i8vec2) Load 136(i8v)
+             216:161(i64vec2) SConvert 215
                               Store 163(i64v) 216
-             217:  134(ivec2) Load 136(i8v)
-             218:  161(ivec2) SConvert 217
-             219:  166(ivec2) Bitcast 218
+             217: 134(i8vec2) Load 136(i8v)
+             218:161(i64vec2) SConvert 217
+             219:166(i64vec2) Bitcast 218
                               Store 168(u64v) 219
-             223:  134(ivec2) Load 136(i8v)
-             224:  139(ivec2) SConvert 223
-             225:  220(ivec2) Bitcast 224
+             223: 134(i8vec2) Load 136(i8v)
+             224:139(i16vec2) SConvert 223
+             225:220(i16vec2) Bitcast 224
                               Store 222(u16v) 225
-             226:  131(ivec2) Load 133(u8v)
-             227:  220(ivec2) UConvert 226
+             226: 131(i8vec2) Load 133(u8v)
+             227:220(i16vec2) UConvert 226
                               Store 222(u16v) 227
-             228:  131(ivec2) Load 133(u8v)
+             228: 131(i8vec2) Load 133(u8v)
              229:  155(ivec2) UConvert 228
                               Store 157(u32v) 229
-             230:  131(ivec2) Load 133(u8v)
-             231:  161(ivec2) UConvert 230
-             232:  161(ivec2) Bitcast 231
+             230: 131(i8vec2) Load 133(u8v)
+             231:161(i64vec2) UConvert 230
+             232:161(i64vec2) Bitcast 231
                               Store 163(i64v) 232
-             233:  131(ivec2) Load 133(u8v)
-             234:  161(ivec2) UConvert 233
-             235:  161(ivec2) Bitcast 234
-             236:  166(ivec2) Bitcast 235
+             233: 131(i8vec2) Load 133(u8v)
+             234:161(i64vec2) UConvert 233
+             235:161(i64vec2) Bitcast 234
+             236:166(i64vec2) Bitcast 235
                               Store 168(u64v) 236
-             237:  134(ivec2) Load 136(i8v)
-             238:  180(fvec2) ConvertSToF 237
+             237: 134(i8vec2) Load 136(i8v)
+             238:180(f16vec2) ConvertSToF 237
                               Store 182(f16v) 238
-             239:  134(ivec2) Load 136(i8v)
+             239: 134(i8vec2) Load 136(i8v)
              240:  186(fvec2) ConvertSToF 239
                               Store 188(f32v) 240
-             241:  134(ivec2) Load 136(i8v)
-             242:  192(fvec2) ConvertSToF 241
+             241: 134(i8vec2) Load 136(i8v)
+             242:192(f64vec2) ConvertSToF 241
                               Store 194(f64v) 242
-             243:  131(ivec2) Load 133(u8v)
-             244:  180(fvec2) ConvertUToF 243
+             243: 131(i8vec2) Load 133(u8v)
+             244:180(f16vec2) ConvertUToF 243
                               Store 182(f16v) 244
-             245:  131(ivec2) Load 133(u8v)
+             245: 131(i8vec2) Load 133(u8v)
              246:  186(fvec2) ConvertUToF 245
                               Store 188(f32v) 246
-             247:  131(ivec2) Load 133(u8v)
-             248:  192(fvec2) ConvertUToF 247
+             247: 131(i8vec2) Load 133(u8v)
+             248:192(f64vec2) ConvertUToF 247
                               Store 194(f64v) 248
              253:  250(bvec2) Load 252(bv)
-             257:  134(ivec2) Select 253 256 255
+             257: 134(i8vec2) Select 253 256 255
                               Store 136(i8v) 257
              258:  250(bvec2) Load 252(bv)
-             263:  131(ivec2) Select 258 262 261
+             263: 131(i8vec2) Select 258 262 261
                               Store 133(u8v) 263
-             264:  134(ivec2) Load 136(i8v)
+             264: 134(i8vec2) Load 136(i8v)
              265:  250(bvec2) INotEqual 264 261
                               Store 252(bv) 265
-             266:  131(ivec2) Load 133(u8v)
+             266: 131(i8vec2) Load 133(u8v)
              267:  250(bvec2) INotEqual 266 261
                               Store 252(bv) 267
                               Return
@@ -506,135 +506,135 @@ spv.explicittypes.frag
         347(i8v):    135(ptr) Variable Function
         353(u8v):    132(ptr) Variable Function
          363(bv):    251(ptr) Variable Function
-             270:  139(ivec2) Load 269(i16v)
+             270:139(i16vec2) Load 269(i16v)
              271:  147(ivec2) SConvert 270
                               Store 268(i32v) 271
-             273:  220(ivec2) Load 272(u16v)
+             273:220(i16vec2) Load 272(u16v)
              274:  147(ivec2) UConvert 273
              275:  147(ivec2) Bitcast 274
                               Store 268(i32v) 275
-             276:  139(ivec2) Load 269(i16v)
-             277:  220(ivec2) Bitcast 276
+             276:139(i16vec2) Load 269(i16v)
+             277:220(i16vec2) Bitcast 276
                               Store 272(u16v) 277
-             279:  139(ivec2) Load 269(i16v)
+             279:139(i16vec2) Load 269(i16v)
              280:  147(ivec2) SConvert 279
              281:  155(ivec2) Bitcast 280
                               Store 278(u32v) 281
-             283:  139(ivec2) Load 269(i16v)
-             284:  161(ivec2) SConvert 283
+             283:139(i16vec2) Load 269(i16v)
+             284:161(i64vec2) SConvert 283
                               Store 282(i64v) 284
-             286:  139(ivec2) Load 269(i16v)
-             287:  161(ivec2) SConvert 286
-             288:  166(ivec2) Bitcast 287
+             286:139(i16vec2) Load 269(i16v)
+             287:161(i64vec2) SConvert 286
+             288:166(i64vec2) Bitcast 287
                               Store 285(u64v) 288
-             289:  220(ivec2) Load 272(u16v)
+             289:220(i16vec2) Load 272(u16v)
              290:  155(ivec2) UConvert 289
                               Store 278(u32v) 290
-             291:  220(ivec2) Load 272(u16v)
-             292:  161(ivec2) UConvert 291
-             293:  161(ivec2) Bitcast 292
+             291:220(i16vec2) Load 272(u16v)
+             292:161(i64vec2) UConvert 291
+             293:161(i64vec2) Bitcast 292
                               Store 282(i64v) 293
-             294:  220(ivec2) Load 272(u16v)
-             295:  166(ivec2) UConvert 294
+             294:220(i16vec2) Load 272(u16v)
+             295:166(i64vec2) UConvert 294
                               Store 285(u64v) 295
-             297:  139(ivec2) Load 269(i16v)
-             298:  180(fvec2) ConvertSToF 297
+             297:139(i16vec2) Load 269(i16v)
+             298:180(f16vec2) ConvertSToF 297
                               Store 296(f16v) 298
-             300:  139(ivec2) Load 269(i16v)
+             300:139(i16vec2) Load 269(i16v)
              301:  186(fvec2) ConvertSToF 300
                               Store 299(f32v) 301
-             303:  139(ivec2) Load 269(i16v)
-             304:  192(fvec2) ConvertSToF 303
+             303:139(i16vec2) Load 269(i16v)
+             304:192(f64vec2) ConvertSToF 303
                               Store 302(f64v) 304
-             305:  220(ivec2) Load 272(u16v)
-             306:  180(fvec2) ConvertUToF 305
+             305:220(i16vec2) Load 272(u16v)
+             306:180(f16vec2) ConvertUToF 305
                               Store 296(f16v) 306
-             307:  220(ivec2) Load 272(u16v)
+             307:220(i16vec2) Load 272(u16v)
              308:  186(fvec2) ConvertUToF 307
                               Store 299(f32v) 308
-             309:  220(ivec2) Load 272(u16v)
-             310:  192(fvec2) ConvertUToF 309
+             309:220(i16vec2) Load 272(u16v)
+             310:192(f64vec2) ConvertUToF 309
                               Store 302(f64v) 310
-             311:  139(ivec2) Load 269(i16v)
+             311:139(i16vec2) Load 269(i16v)
              312:  147(ivec2) SConvert 311
                               Store 268(i32v) 312
-             313:  220(ivec2) Load 272(u16v)
+             313:220(i16vec2) Load 272(u16v)
              314:  147(ivec2) UConvert 313
              315:  147(ivec2) Bitcast 314
                               Store 268(i32v) 315
-             316:  139(ivec2) Load 269(i16v)
-             317:  220(ivec2) Bitcast 316
+             316:139(i16vec2) Load 269(i16v)
+             317:220(i16vec2) Bitcast 316
                               Store 272(u16v) 317
-             318:  139(ivec2) Load 269(i16v)
+             318:139(i16vec2) Load 269(i16v)
              319:  147(ivec2) SConvert 318
              320:  155(ivec2) Bitcast 319
                               Store 278(u32v) 320
-             321:  139(ivec2) Load 269(i16v)
-             322:  161(ivec2) SConvert 321
+             321:139(i16vec2) Load 269(i16v)
+             322:161(i64vec2) SConvert 321
                               Store 282(i64v) 322
-             323:  139(ivec2) Load 269(i16v)
-             324:  161(ivec2) SConvert 323
-             325:  166(ivec2) Bitcast 324
+             323:139(i16vec2) Load 269(i16v)
+             324:161(i64vec2) SConvert 323
+             325:166(i64vec2) Bitcast 324
                               Store 285(u64v) 325
-             326:  220(ivec2) Load 272(u16v)
+             326:220(i16vec2) Load 272(u16v)
              327:  155(ivec2) UConvert 326
                               Store 278(u32v) 327
-             328:  220(ivec2) Load 272(u16v)
-             329:  161(ivec2) UConvert 328
-             330:  161(ivec2) Bitcast 329
+             328:220(i16vec2) Load 272(u16v)
+             329:161(i64vec2) UConvert 328
+             330:161(i64vec2) Bitcast 329
                               Store 282(i64v) 330
-             331:  220(ivec2) Load 272(u16v)
-             332:  161(ivec2) UConvert 331
-             333:  161(ivec2) Bitcast 332
-             334:  166(ivec2) Bitcast 333
+             331:220(i16vec2) Load 272(u16v)
+             332:161(i64vec2) UConvert 331
+             333:161(i64vec2) Bitcast 332
+             334:166(i64vec2) Bitcast 333
                               Store 285(u64v) 334
-             335:  139(ivec2) Load 269(i16v)
-             336:  180(fvec2) ConvertSToF 335
+             335:139(i16vec2) Load 269(i16v)
+             336:180(f16vec2) ConvertSToF 335
                               Store 296(f16v) 336
-             337:  139(ivec2) Load 269(i16v)
+             337:139(i16vec2) Load 269(i16v)
              338:  186(fvec2) ConvertSToF 337
                               Store 299(f32v) 338
-             339:  139(ivec2) Load 269(i16v)
-             340:  192(fvec2) ConvertSToF 339
+             339:139(i16vec2) Load 269(i16v)
+             340:192(f64vec2) ConvertSToF 339
                               Store 302(f64v) 340
-             341:  220(ivec2) Load 272(u16v)
-             342:  180(fvec2) ConvertUToF 341
+             341:220(i16vec2) Load 272(u16v)
+             342:180(f16vec2) ConvertUToF 341
                               Store 296(f16v) 342
-             343:  220(ivec2) Load 272(u16v)
+             343:220(i16vec2) Load 272(u16v)
              344:  186(fvec2) ConvertUToF 343
                               Store 299(f32v) 344
-             345:  220(ivec2) Load 272(u16v)
-             346:  192(fvec2) ConvertUToF 345
+             345:220(i16vec2) Load 272(u16v)
+             346:192(f64vec2) ConvertUToF 345
                               Store 302(f64v) 346
-             348:  139(ivec2) Load 269(i16v)
-             349:  134(ivec2) SConvert 348
+             348:139(i16vec2) Load 269(i16v)
+             349: 134(i8vec2) SConvert 348
                               Store 347(i8v) 349
-             350:  220(ivec2) Load 272(u16v)
-             351:  134(ivec2) UConvert 350
-             352:  134(ivec2) Bitcast 351
+             350:220(i16vec2) Load 272(u16v)
+             351: 134(i8vec2) UConvert 350
+             352: 134(i8vec2) Bitcast 351
                               Store 347(i8v) 352
-             354:  139(ivec2) Load 269(i16v)
-             355:  134(ivec2) SConvert 354
-             356:  131(ivec2) Bitcast 355
+             354:139(i16vec2) Load 269(i16v)
+             355: 134(i8vec2) SConvert 354
+             356: 131(i8vec2) Bitcast 355
                               Store 353(u8v) 356
-             357:  220(ivec2) Load 272(u16v)
-             358:  131(ivec2) UConvert 357
+             357:220(i16vec2) Load 272(u16v)
+             358: 131(i8vec2) UConvert 357
                               Store 353(u8v) 358
-             359:  220(ivec2) Load 272(u16v)
-             360:  131(ivec2) UConvert 359
-             361:  139(ivec2) UConvert 360
-             362:  139(ivec2) Bitcast 361
+             359:220(i16vec2) Load 272(u16v)
+             360: 131(i8vec2) UConvert 359
+             361:139(i16vec2) UConvert 360
+             362:139(i16vec2) Bitcast 361
                               Store 269(i16v) 362
              364:  250(bvec2) Load 363(bv)
-             369:  139(ivec2) Select 364 368 367
+             369:139(i16vec2) Select 364 368 367
                               Store 269(i16v) 369
              370:  250(bvec2) Load 363(bv)
-             375:  220(ivec2) Select 370 374 373
+             375:220(i16vec2) Select 370 374 373
                               Store 272(u16v) 375
-             376:  139(ivec2) Load 269(i16v)
+             376:139(i16vec2) Load 269(i16v)
              377:  250(bvec2) INotEqual 376 373
                               Store 363(bv) 377
-             378:  220(ivec2) Load 272(u16v)
+             378:220(i16vec2) Load 272(u16v)
              379:  250(bvec2) INotEqual 378 373
                               Store 363(bv) 379
                               Return
@@ -657,44 +657,44 @@ spv.explicittypes.frag
              383:  155(ivec2) Bitcast 382
                               Store 380(u32v) 383
              385:  147(ivec2) Load 381(i32v)
-             386:  161(ivec2) SConvert 385
+             386:161(i64vec2) SConvert 385
                               Store 384(i64v) 386
              388:  147(ivec2) Load 381(i32v)
-             389:  161(ivec2) SConvert 388
-             390:  166(ivec2) Bitcast 389
+             389:161(i64vec2) SConvert 388
+             390:166(i64vec2) Bitcast 389
                               Store 387(u64v) 390
              391:  155(ivec2) Load 380(u32v)
-             392:  161(ivec2) UConvert 391
-             393:  161(ivec2) Bitcast 392
+             392:161(i64vec2) UConvert 391
+             393:161(i64vec2) Bitcast 392
                               Store 384(i64v) 393
              394:  155(ivec2) Load 380(u32v)
-             395:  166(ivec2) UConvert 394
+             395:166(i64vec2) UConvert 394
                               Store 387(u64v) 395
              397:  147(ivec2) Load 381(i32v)
              398:  186(fvec2) ConvertSToF 397
                               Store 396(f32v) 398
              400:  147(ivec2) Load 381(i32v)
-             401:  192(fvec2) ConvertSToF 400
+             401:192(f64vec2) ConvertSToF 400
                               Store 399(f64v) 401
              402:  155(ivec2) Load 380(u32v)
              403:  186(fvec2) ConvertUToF 402
                               Store 396(f32v) 403
              404:  155(ivec2) Load 380(u32v)
-             405:  192(fvec2) ConvertUToF 404
+             405:192(f64vec2) ConvertUToF 404
                               Store 399(f64v) 405
              407:  147(ivec2) Load 381(i32v)
-             408:  134(ivec2) SConvert 407
+             408: 134(i8vec2) SConvert 407
                               Store 406(i8v) 408
              409:  155(ivec2) Load 380(u32v)
-             410:  134(ivec2) UConvert 409
-             411:  134(ivec2) Bitcast 410
+             410: 134(i8vec2) UConvert 409
+             411: 134(i8vec2) Bitcast 410
                               Store 406(i8v) 411
              413:  147(ivec2) Load 381(i32v)
-             414:  139(ivec2) SConvert 413
+             414:139(i16vec2) SConvert 413
                               Store 412(i16v) 414
              415:  155(ivec2) Load 380(u32v)
-             416:  139(ivec2) UConvert 415
-             417:  139(ivec2) Bitcast 416
+             416:139(i16vec2) UConvert 415
+             417:139(i16vec2) Bitcast 416
                               Store 412(i16v) 417
              418:  147(ivec2) Load 381(i32v)
              419:     29(int) CompositeExtract 418 0
@@ -705,25 +705,25 @@ spv.explicittypes.frag
              423:  147(ivec2) Bitcast 422
                               Store 381(i32v) 423
              424:  147(ivec2) Load 381(i32v)
-             425:  161(ivec2) SConvert 424
+             425:161(i64vec2) SConvert 424
                               Store 384(i64v) 425
              426:  155(ivec2) Load 380(u32v)
-             427:  161(ivec2) UConvert 426
-             428:  161(ivec2) Bitcast 427
+             427:161(i64vec2) UConvert 426
+             428:161(i64vec2) Bitcast 427
                               Store 384(i64v) 428
              430:  147(ivec2) Load 381(i32v)
-             431:  134(ivec2) SConvert 430
-             432:  131(ivec2) Bitcast 431
+             431: 134(i8vec2) SConvert 430
+             432: 131(i8vec2) Bitcast 431
                               Store 429(u8v) 432
              433:  155(ivec2) Load 380(u32v)
-             434:  131(ivec2) UConvert 433
+             434: 131(i8vec2) UConvert 433
                               Store 429(u8v) 434
              436:  147(ivec2) Load 381(i32v)
-             437:  139(ivec2) SConvert 436
-             438:  220(ivec2) Bitcast 437
+             437:139(i16vec2) SConvert 436
+             438:220(i16vec2) Bitcast 437
                               Store 435(u16v) 438
              439:  155(ivec2) Load 380(u32v)
-             440:  220(ivec2) UConvert 439
+             440:220(i16vec2) UConvert 439
                               Store 435(u16v) 440
              441:  147(ivec2) Load 381(i32v)
              442:  155(ivec2) Bitcast 441
@@ -734,29 +734,29 @@ spv.explicittypes.frag
              446:  155(ivec2) CompositeConstruct 444 445
                               Store 380(u32v) 446
              447:  147(ivec2) Load 381(i32v)
-             448:  161(ivec2) SConvert 447
-             449:  166(ivec2) Bitcast 448
+             448:161(i64vec2) SConvert 447
+             449:166(i64vec2) Bitcast 448
                               Store 387(u64v) 449
              450:  155(ivec2) Load 380(u32v)
-             451:  166(ivec2) UConvert 450
+             451:166(i64vec2) UConvert 450
                               Store 387(u64v) 451
              453:  147(ivec2) Load 381(i32v)
-             454:  180(fvec2) ConvertSToF 453
+             454:180(f16vec2) ConvertSToF 453
                               Store 452(f16v) 454
              455:  147(ivec2) Load 381(i32v)
              456:  186(fvec2) ConvertSToF 455
                               Store 396(f32v) 456
              457:  147(ivec2) Load 381(i32v)
-             458:  192(fvec2) ConvertSToF 457
+             458:192(f64vec2) ConvertSToF 457
                               Store 399(f64v) 458
              459:  155(ivec2) Load 380(u32v)
-             460:  180(fvec2) ConvertUToF 459
+             460:180(f16vec2) ConvertUToF 459
                               Store 452(f16v) 460
              461:  155(ivec2) Load 380(u32v)
              462:  186(fvec2) ConvertUToF 461
                               Store 396(f32v) 462
              463:  155(ivec2) Load 380(u32v)
-             464:  192(fvec2) ConvertUToF 463
+             464:192(f64vec2) ConvertUToF 463
                               Store 399(f64v) 464
              466:  250(bvec2) Load 465(bv)
              470:  147(ivec2) Select 466 469 468
@@ -786,96 +786,96 @@ spv.explicittypes.frag
        534(f16v):    181(ptr) Variable Function
        537(f32v):    187(ptr) Variable Function
          548(bv):    251(ptr) Variable Function
-             483:  161(ivec2) Load 482(i64v)
-             484:  166(ivec2) Bitcast 483
+             483:161(i64vec2) Load 482(i64v)
+             484:166(i64vec2) Bitcast 483
                               Store 481(u64v) 484
-             486:  161(ivec2) Load 482(i64v)
-             487:  192(fvec2) ConvertSToF 486
+             486:161(i64vec2) Load 482(i64v)
+             487:192(f64vec2) ConvertSToF 486
                               Store 485(f64v) 487
-             488:  166(ivec2) Load 481(u64v)
-             489:  192(fvec2) ConvertUToF 488
+             488:166(i64vec2) Load 481(u64v)
+             489:192(f64vec2) ConvertUToF 488
                               Store 485(f64v) 489
-             491:  161(ivec2) Load 482(i64v)
-             492:  134(ivec2) SConvert 491
+             491:161(i64vec2) Load 482(i64v)
+             492: 134(i8vec2) SConvert 491
                               Store 490(i8v) 492
-             493:  166(ivec2) Load 481(u64v)
-             494:  134(ivec2) UConvert 493
-             495:  134(ivec2) Bitcast 494
+             493:166(i64vec2) Load 481(u64v)
+             494: 134(i8vec2) UConvert 493
+             495: 134(i8vec2) Bitcast 494
                               Store 490(i8v) 495
-             497:  161(ivec2) Load 482(i64v)
-             498:  139(ivec2) SConvert 497
+             497:161(i64vec2) Load 482(i64v)
+             498:139(i16vec2) SConvert 497
                               Store 496(i16v) 498
-             499:  166(ivec2) Load 481(u64v)
-             500:  139(ivec2) UConvert 499
-             501:  139(ivec2) Bitcast 500
+             499:166(i64vec2) Load 481(u64v)
+             500:139(i16vec2) UConvert 499
+             501:139(i16vec2) Bitcast 500
                               Store 496(i16v) 501
-             503:  161(ivec2) Load 482(i64v)
+             503:161(i64vec2) Load 482(i64v)
              504:  147(ivec2) SConvert 503
                               Store 502(i32v) 504
-             505:  166(ivec2) Load 481(u64v)
+             505:166(i64vec2) Load 481(u64v)
              506:  147(ivec2) UConvert 505
              507:  147(ivec2) Bitcast 506
                               Store 502(i32v) 507
-             508:  166(ivec2) Load 481(u64v)
-             509:  161(ivec2) Bitcast 508
+             508:166(i64vec2) Load 481(u64v)
+             509:161(i64vec2) Bitcast 508
                               Store 482(i64v) 509
-             511:  161(ivec2) Load 482(i64v)
-             512:  134(ivec2) SConvert 511
-             513:  131(ivec2) Bitcast 512
+             511:161(i64vec2) Load 482(i64v)
+             512: 134(i8vec2) SConvert 511
+             513: 131(i8vec2) Bitcast 512
                               Store 510(u8v) 513
-             514:  166(ivec2) Load 481(u64v)
-             515:  131(ivec2) UConvert 514
+             514:166(i64vec2) Load 481(u64v)
+             515: 131(i8vec2) UConvert 514
                               Store 510(u8v) 515
-             517:  161(ivec2) Load 482(i64v)
-             518:  139(ivec2) SConvert 517
-             519:  220(ivec2) Bitcast 518
+             517:161(i64vec2) Load 482(i64v)
+             518:139(i16vec2) SConvert 517
+             519:220(i16vec2) Bitcast 518
                               Store 516(u16v) 519
-             520:  166(ivec2) Load 481(u64v)
-             521:  220(ivec2) UConvert 520
+             520:166(i64vec2) Load 481(u64v)
+             521:220(i16vec2) UConvert 520
                               Store 516(u16v) 521
-             523:  161(ivec2) Load 482(i64v)
+             523:161(i64vec2) Load 482(i64v)
              524:  147(ivec2) SConvert 523
              525:  155(ivec2) Bitcast 524
                               Store 522(u32v) 525
-             526:  166(ivec2) Load 481(u64v)
+             526:166(i64vec2) Load 481(u64v)
              527:  155(ivec2) UConvert 526
                               Store 522(u32v) 527
-             528:  161(ivec2) Load 482(i64v)
-             529:  166(ivec2) Bitcast 528
+             528:161(i64vec2) Load 482(i64v)
+             529:166(i64vec2) Bitcast 528
                               Store 481(u64v) 529
-             530:  166(ivec2) Load 481(u64v)
-             531:     38(int) CompositeExtract 530 0
-             532:     38(int) CompositeExtract 530 1
-             533:  166(ivec2) CompositeConstruct 531 532
+             530:166(i64vec2) Load 481(u64v)
+             531: 38(int64_t) CompositeExtract 530 0
+             532: 38(int64_t) CompositeExtract 530 1
+             533:166(i64vec2) CompositeConstruct 531 532
                               Store 481(u64v) 533
-             535:  161(ivec2) Load 482(i64v)
-             536:  180(fvec2) ConvertSToF 535
+             535:161(i64vec2) Load 482(i64v)
+             536:180(f16vec2) ConvertSToF 535
                               Store 534(f16v) 536
-             538:  161(ivec2) Load 482(i64v)
+             538:161(i64vec2) Load 482(i64v)
              539:  186(fvec2) ConvertSToF 538
                               Store 537(f32v) 539
-             540:  161(ivec2) Load 482(i64v)
-             541:  192(fvec2) ConvertSToF 540
+             540:161(i64vec2) Load 482(i64v)
+             541:192(f64vec2) ConvertSToF 540
                               Store 485(f64v) 541
-             542:  166(ivec2) Load 481(u64v)
-             543:  180(fvec2) ConvertUToF 542
+             542:166(i64vec2) Load 481(u64v)
+             543:180(f16vec2) ConvertUToF 542
                               Store 534(f16v) 543
-             544:  166(ivec2) Load 481(u64v)
+             544:166(i64vec2) Load 481(u64v)
              545:  186(fvec2) ConvertUToF 544
                               Store 537(f32v) 545
-             546:  166(ivec2) Load 481(u64v)
-             547:  192(fvec2) ConvertUToF 546
+             546:166(i64vec2) Load 481(u64v)
+             547:192(f64vec2) ConvertUToF 546
                               Store 485(f64v) 547
              549:  250(bvec2) Load 548(bv)
-             554:  161(ivec2) Select 549 553 552
+             554:161(i64vec2) Select 549 553 552
                               Store 482(i64v) 554
              555:  250(bvec2) Load 548(bv)
-             560:  166(ivec2) Select 555 559 558
+             560:166(i64vec2) Select 555 559 558
                               Store 481(u64v) 560
-             561:  161(ivec2) Load 482(i64v)
+             561:161(i64vec2) Load 482(i64v)
              562:  250(bvec2) INotEqual 561 558
                               Store 548(bv) 562
-             563:  166(ivec2) Load 481(u64v)
+             563:166(i64vec2) Load 481(u64v)
              564:  250(bvec2) INotEqual 563 558
                               Store 548(bv) 564
                               Return

3rdparty/glslang/Test/baseResults/spv.float16.frag.out

@@ -156,86 +156,86 @@ spv.float16.frag
                2:             TypeVoid
                3:             TypeFunction 2
               28:             TypeFloat 16
-              29:             TypeVector 28(float) 2
-              30:             TypePointer Function 29(fvec2)
-              32:   28(float) Constant 16
+              29:             TypeVector 28(float16_t) 2
+              30:             TypePointer Function 29(f16vec2)
+              32:28(float16_t) Constant 16
               33:             TypeInt 32 0
               34:     33(int) Constant 0
-              35:             TypePointer Function 28(float)
-              37:   28(float) Constant 46080
-              38:   28(float) Constant 10158
-              39:   29(fvec2) ConstantComposite 37 38
-              56:   28(float) Constant 15360
-              62:             TypeMatrix 29(fvec2) 2
+              35:             TypePointer Function 28(float16_t)
+              37:28(float16_t) Constant 46080
+              38:28(float16_t) Constant 10158
+              39: 29(f16vec2) ConstantComposite 37 38
+              56:28(float16_t) Constant 15360
+              62:             TypeMatrix 29(f16vec2) 2
               63:             TypePointer Function 62
               90:     33(int) Constant 1
              109:             TypeBool
              110:             TypePointer Function 109(bool)
-             151:             TypeVector 28(float) 3
-             152:             TypePointer Function 151(fvec3)
+             151:             TypeVector 28(float16_t) 3
+             152:             TypePointer Function 151(f16vec3)
              154:             TypeVector 109(bool) 3
              155:             TypePointer Function 154(bvec3)
-             158:   28(float) Constant 0
-             159:  151(fvec3) ConstantComposite 158 158 158
-             160:  151(fvec3) ConstantComposite 56 56 56
+             158:28(float16_t) Constant 0
+             159:151(f16vec3) ConstantComposite 158 158 158
+             160:151(f16vec3) ConstantComposite 56 56 56
              164:             TypeFloat 32
              165:             TypeVector 164(float) 3
              166:             TypePointer Function 165(fvec3)
              172:             TypeFloat 64
-             173:             TypeVector 172(float) 3
-             174:             TypePointer Function 173(fvec3)
+             173:             TypeVector 172(float64_t) 3
+             174:             TypePointer Function 173(f64vec3)
              183:             TypeInt 32 1
              184:             TypeVector 183(int) 3
              185:             TypePointer Function 184(ivec3)
              191:             TypeVector 33(int) 3
              192:             TypePointer Function 191(ivec3)
              198:             TypeInt 64 1
-             199:             TypeVector 198(int) 3
-             200:             TypePointer Function 199(ivec3)
+             199:             TypeVector 198(int64_t) 3
+             200:             TypePointer Function 199(i64vec3)
              206:             TypeInt 64 0
-             207:             TypeVector 206(int) 3
-             208:             TypePointer Function 207(ivec3)
-             214:             TypeVector 28(float) 4
-             215:             TypePointer Function 214(fvec4)
-    364(ResType):             TypeStruct 151(fvec3) 184(ivec3)
+             207:             TypeVector 206(int64_t) 3
+             208:             TypePointer Function 207(i64vec3)
+             214:             TypeVector 28(float16_t) 4
+             215:             TypePointer Function 214(f16vec4)
+    364(ResType):             TypeStruct 151(f16vec3) 184(ivec3)
              371:             TypePointer Function 33(int)
-             406:             TypeMatrix 151(fvec3) 2
+             406:             TypeMatrix 151(f16vec3) 2
              407:             TypePointer Function 406
-             425:             TypeMatrix 29(fvec2) 3
+             425:             TypeMatrix 29(f16vec2) 3
              426:             TypePointer Function 425
-             431:             TypeMatrix 151(fvec3) 3
+             431:             TypeMatrix 151(f16vec3) 3
              432:             TypePointer Function 431
-             436:             TypeMatrix 214(fvec4) 4
+             436:             TypeMatrix 214(f16vec4) 4
              437:             TypePointer Function 436
-             464:             TypePointer Input 151(fvec3)
+             464:             TypePointer Input 151(f16vec3)
       465(if16v):    464(ptr) Variable Input
-             466:             TypePointer Input 28(float)
+             466:             TypePointer Input 28(float16_t)
              503:    183(int) Constant 1
-             508:   28(float) Constant 14336
-             509:   29(fvec2) ConstantComposite 508 508
+             508:28(float16_t) Constant 14336
+             509: 29(f16vec2) ConstantComposite 508 508
              511:     33(int) Constant 2
-             512:             TypeArray 28(float) 511
+             512:             TypeArray 28(float16_t) 511
              513:             TypeArray 406 511
-          514(S):             TypeStruct 28(float) 29(fvec2) 151(fvec3)
+          514(S):             TypeStruct 28(float16_t) 29(f16vec2) 151(f16vec3)
              515:             TypeArray 514(S) 511
-         516(B1):             TypeStruct 28(float) 29(fvec2) 151(fvec3) 512 406 513 514(S) 515
+         516(B1):             TypeStruct 28(float16_t) 29(f16vec2) 151(f16vec3) 512 406 513 514(S) 515
              517:             TypePointer Uniform 516(B1)
              518:    517(ptr) Variable Uniform
-             519:             TypeArray 28(float) 511
+             519:             TypeArray 28(float16_t) 511
              520:             TypeArray 406 511
-          521(S):             TypeStruct 28(float) 29(fvec2) 151(fvec3)
+          521(S):             TypeStruct 28(float16_t) 29(f16vec2) 151(f16vec3)
              522:             TypeArray 521(S) 511
-         523(B2):             TypeStruct 28(float) 29(fvec2) 151(fvec3) 519 406 520 521(S) 522
+         523(B2):             TypeStruct 28(float16_t) 29(f16vec2) 151(f16vec3) 519 406 520 521(S) 522
              524:             TypePointer Uniform 523(B2)
              525:    524(ptr) Variable Uniform
-       526(sf16):   28(float) SpecConstant 12288
+       526(sf16):28(float16_t) SpecConstant 12288
          527(sf):  164(float) SpecConstant 1048576000
-         528(sd):  172(float) SpecConstant 0 1071644672
+         528(sd):172(float64_t) SpecConstant 0 1071644672
              529:  164(float) SpecConstantOp 115 526(sf16)
              530:  164(float) SpecConstantOp 115 526(sf16)
-             531:  172(float) SpecConstantOp 115 530
-             532:   28(float) SpecConstantOp 115 527(sf)
-             533:   28(float) SpecConstantOp 115 528(sd)
+             531:172(float64_t) SpecConstantOp 115 530
+             532:28(float16_t) SpecConstantOp 115 527(sf)
+             533:28(float16_t) SpecConstantOp 115 528(sd)
          4(main):           2 Function None 3
                5:             Label
                               Return
@@ -245,8 +245,8 @@ spv.float16.frag
         31(f16v):     30(ptr) Variable Function
               36:     35(ptr) AccessChain 31(f16v) 34
                               Store 36 32
-              40:   29(fvec2) Load 31(f16v)
-              41:   29(fvec2) FAdd 40 39
+              40: 29(f16vec2) Load 31(f16v)
+              41: 29(f16vec2) FAdd 40 39
                               Store 31(f16v) 41
                               Return
                               FunctionEnd
@@ -256,125 +256,125 @@ spv.float16.frag
         64(f16m):     63(ptr) Variable Function
          87(f16):     35(ptr) Variable Function
           111(b):    110(ptr) Variable Function
-              43:   29(fvec2) Load 42(f16v)
-              44:   29(fvec2) Load 42(f16v)
-              45:   29(fvec2) FAdd 44 43
+              43: 29(f16vec2) Load 42(f16v)
+              44: 29(f16vec2) Load 42(f16v)
+              45: 29(f16vec2) FAdd 44 43
                               Store 42(f16v) 45
-              46:   29(fvec2) Load 42(f16v)
-              47:   29(fvec2) Load 42(f16v)
-              48:   29(fvec2) FSub 47 46
+              46: 29(f16vec2) Load 42(f16v)
+              47: 29(f16vec2) Load 42(f16v)
+              48: 29(f16vec2) FSub 47 46
                               Store 42(f16v) 48
-              49:   29(fvec2) Load 42(f16v)
-              50:   29(fvec2) Load 42(f16v)
-              51:   29(fvec2) FMul 50 49
+              49: 29(f16vec2) Load 42(f16v)
+              50: 29(f16vec2) Load 42(f16v)
+              51: 29(f16vec2) FMul 50 49
                               Store 42(f16v) 51
-              52:   29(fvec2) Load 42(f16v)
-              53:   29(fvec2) Load 42(f16v)
-              54:   29(fvec2) FDiv 53 52
+              52: 29(f16vec2) Load 42(f16v)
+              53: 29(f16vec2) Load 42(f16v)
+              54: 29(f16vec2) FDiv 53 52
                               Store 42(f16v) 54
-              55:   29(fvec2) Load 42(f16v)
-              57:   29(fvec2) CompositeConstruct 56 56
-              58:   29(fvec2) FAdd 55 57
+              55: 29(f16vec2) Load 42(f16v)
+              57: 29(f16vec2) CompositeConstruct 56 56
+              58: 29(f16vec2) FAdd 55 57
                               Store 42(f16v) 58
-              59:   29(fvec2) Load 42(f16v)
-              60:   29(fvec2) CompositeConstruct 56 56
-              61:   29(fvec2) FSub 59 60
+              59: 29(f16vec2) Load 42(f16v)
+              60: 29(f16vec2) CompositeConstruct 56 56
+              61: 29(f16vec2) FSub 59 60
                               Store 42(f16v) 61
               65:          62 Load 64(f16m)
-              66:   29(fvec2) CompositeConstruct 56 56
-              67:   29(fvec2) CompositeExtract 65 0
-              68:   29(fvec2) FAdd 67 66
-              69:   29(fvec2) CompositeExtract 65 1
-              70:   29(fvec2) FAdd 69 66
+              66: 29(f16vec2) CompositeConstruct 56 56
+              67: 29(f16vec2) CompositeExtract 65 0
+              68: 29(f16vec2) FAdd 67 66
+              69: 29(f16vec2) CompositeExtract 65 1
+              70: 29(f16vec2) FAdd 69 66
               71:          62 CompositeConstruct 68 70
                               Store 64(f16m) 71
               72:          62 Load 64(f16m)
-              73:   29(fvec2) CompositeConstruct 56 56
-              74:   29(fvec2) CompositeExtract 72 0
-              75:   29(fvec2) FSub 74 73
-              76:   29(fvec2) CompositeExtract 72 1
-              77:   29(fvec2) FSub 76 73
+              73: 29(f16vec2) CompositeConstruct 56 56
+              74: 29(f16vec2) CompositeExtract 72 0
+              75: 29(f16vec2) FSub 74 73
+              76: 29(f16vec2) CompositeExtract 72 1
+              77: 29(f16vec2) FSub 76 73
               78:          62 CompositeConstruct 75 77
                               Store 64(f16m) 78
-              79:   29(fvec2) Load 42(f16v)
-              80:   29(fvec2) FNegate 79
+              79: 29(f16vec2) Load 42(f16v)
+              80: 29(f16vec2) FNegate 79
                               Store 42(f16v) 80
               81:          62 Load 64(f16m)
-              82:   29(fvec2) CompositeExtract 81 0
-              83:   29(fvec2) FNegate 82
-              84:   29(fvec2) CompositeExtract 81 1
-              85:   29(fvec2) FNegate 84
+              82: 29(f16vec2) CompositeExtract 81 0
+              83: 29(f16vec2) FNegate 82
+              84: 29(f16vec2) CompositeExtract 81 1
+              85: 29(f16vec2) FNegate 84
               86:          62 CompositeConstruct 83 85
                               Store 64(f16m) 86
               88:     35(ptr) AccessChain 42(f16v) 34
-              89:   28(float) Load 88
+              89:28(float16_t) Load 88
               91:     35(ptr) AccessChain 42(f16v) 90
-              92:   28(float) Load 91
-              93:   28(float) FAdd 89 92
+              92:28(float16_t) Load 91
+              93:28(float16_t) FAdd 89 92
                               Store 87(f16) 93
               94:     35(ptr) AccessChain 42(f16v) 34
-              95:   28(float) Load 94
+              95:28(float16_t) Load 94
               96:     35(ptr) AccessChain 42(f16v) 90
-              97:   28(float) Load 96
-              98:   28(float) FSub 95 97
+              97:28(float16_t) Load 96
+              98:28(float16_t) FSub 95 97
                               Store 87(f16) 98
               99:     35(ptr) AccessChain 42(f16v) 34
-             100:   28(float) Load 99
+             100:28(float16_t) Load 99
              101:     35(ptr) AccessChain 42(f16v) 90
-             102:   28(float) Load 101
-             103:   28(float) FMul 100 102
+             102:28(float16_t) Load 101
+             103:28(float16_t) FMul 100 102
                               Store 87(f16) 103
              104:     35(ptr) AccessChain 42(f16v) 34
-             105:   28(float) Load 104
+             105:28(float16_t) Load 104
              106:     35(ptr) AccessChain 42(f16v) 90
-             107:   28(float) Load 106
-             108:   28(float) FDiv 105 107
+             107:28(float16_t) Load 106
+             108:28(float16_t) FDiv 105 107
                               Store 87(f16) 108
              112:     35(ptr) AccessChain 42(f16v) 34
-             113:   28(float) Load 112
-             114:   28(float) Load 87(f16)
+             113:28(float16_t) Load 112
+             114:28(float16_t) Load 87(f16)
              115:   109(bool) FOrdNotEqual 113 114
                               Store 111(b) 115
              116:     35(ptr) AccessChain 42(f16v) 90
-             117:   28(float) Load 116
-             118:   28(float) Load 87(f16)
+             117:28(float16_t) Load 116
+             118:28(float16_t) Load 87(f16)
              119:   109(bool) FOrdEqual 117 118
                               Store 111(b) 119
              120:     35(ptr) AccessChain 42(f16v) 34
-             121:   28(float) Load 120
-             122:   28(float) Load 87(f16)
+             121:28(float16_t) Load 120
+             122:28(float16_t) Load 87(f16)
              123:   109(bool) FOrdGreaterThan 121 122
                               Store 111(b) 123
              124:     35(ptr) AccessChain 42(f16v) 90
-             125:   28(float) Load 124
-             126:   28(float) Load 87(f16)
+             125:28(float16_t) Load 124
+             126:28(float16_t) Load 87(f16)
              127:   109(bool) FOrdLessThan 125 126
                               Store 111(b) 127
              128:     35(ptr) AccessChain 42(f16v) 34
-             129:   28(float) Load 128
-             130:   28(float) Load 87(f16)
+             129:28(float16_t) Load 128
+             130:28(float16_t) Load 87(f16)
              131:   109(bool) FOrdGreaterThanEqual 129 130
                               Store 111(b) 131
              132:     35(ptr) AccessChain 42(f16v) 90
-             133:   28(float) Load 132
-             134:   28(float) Load 87(f16)
+             133:28(float16_t) Load 132
+             134:28(float16_t) Load 87(f16)
              135:   109(bool) FOrdLessThanEqual 133 134
                               Store 111(b) 135
-             136:   29(fvec2) Load 42(f16v)
-             137:   28(float) Load 87(f16)
-             138:   29(fvec2) VectorTimesScalar 136 137
+             136: 29(f16vec2) Load 42(f16v)
+             137:28(float16_t) Load 87(f16)
+             138: 29(f16vec2) VectorTimesScalar 136 137
                               Store 42(f16v) 138
              139:          62 Load 64(f16m)
-             140:   28(float) Load 87(f16)
+             140:28(float16_t) Load 87(f16)
              141:          62 MatrixTimesScalar 139 140
                               Store 64(f16m) 141
              142:          62 Load 64(f16m)
-             143:   29(fvec2) Load 42(f16v)
-             144:   29(fvec2) MatrixTimesVector 142 143
+             143: 29(f16vec2) Load 42(f16v)
+             144: 29(f16vec2) MatrixTimesVector 142 143
                               Store 42(f16v) 144
-             145:   29(fvec2) Load 42(f16v)
+             145: 29(f16vec2) Load 42(f16v)
              146:          62 Load 64(f16m)
-             147:   29(fvec2) VectorTimesMatrix 145 146
+             147: 29(f16vec2) VectorTimesMatrix 145 146
                               Store 42(f16v) 147
              148:          62 Load 64(f16m)
              149:          62 Load 64(f16m)
@@ -393,49 +393,49 @@ spv.float16.frag
        201(i64v):    200(ptr) Variable Function
        209(u64v):    208(ptr) Variable Function
              157:  154(bvec3) Load 156(bv)
-             161:  151(fvec3) Select 157 160 159
+             161:151(f16vec3) Select 157 160 159
                               Store 153(f16v) 161
-             162:  151(fvec3) Load 153(f16v)
+             162:151(f16vec3) Load 153(f16v)
              163:  154(bvec3) FOrdNotEqual 162 159
                               Store 156(bv) 163
              168:  165(fvec3) Load 167(fv)
-             169:  151(fvec3) FConvert 168
+             169:151(f16vec3) FConvert 168
                               Store 153(f16v) 169
-             170:  151(fvec3) Load 153(f16v)
+             170:151(f16vec3) Load 153(f16v)
              171:  165(fvec3) FConvert 170
                               Store 167(fv) 171
-             176:  173(fvec3) Load 175(dv)
-             177:  151(fvec3) FConvert 176
+             176:173(f64vec3) Load 175(dv)
+             177:151(f16vec3) FConvert 176
                               Store 153(f16v) 177
-             178:  173(fvec3) Load 175(dv)
-             179:  172(float) CompositeExtract 178 0
-             180:  172(float) CompositeExtract 178 1
-             181:  172(float) CompositeExtract 178 2
-             182:  173(fvec3) CompositeConstruct 179 180 181
+             178:173(f64vec3) Load 175(dv)
+             179:172(float64_t) CompositeExtract 178 0
+             180:172(float64_t) CompositeExtract 178 1
+             181:172(float64_t) CompositeExtract 178 2
+             182:173(f64vec3) CompositeConstruct 179 180 181
                               Store 175(dv) 182
              187:  184(ivec3) Load 186(iv)
-             188:  151(fvec3) ConvertSToF 187
+             188:151(f16vec3) ConvertSToF 187
                               Store 153(f16v) 188
-             189:  151(fvec3) Load 153(f16v)
+             189:151(f16vec3) Load 153(f16v)
              190:  184(ivec3) ConvertFToS 189
                               Store 186(iv) 190
              194:  191(ivec3) Load 193(uv)
-             195:  151(fvec3) ConvertUToF 194
+             195:151(f16vec3) ConvertUToF 194
                               Store 153(f16v) 195
-             196:  151(fvec3) Load 153(f16v)
+             196:151(f16vec3) Load 153(f16v)
              197:  191(ivec3) ConvertFToU 196
                               Store 193(uv) 197
-             202:  199(ivec3) Load 201(i64v)
-             203:  151(fvec3) ConvertSToF 202
+             202:199(i64vec3) Load 201(i64v)
+             203:151(f16vec3) ConvertSToF 202
                               Store 153(f16v) 203
-             204:  151(fvec3) Load 153(f16v)
-             205:  199(ivec3) ConvertFToS 204
+             204:151(f16vec3) Load 153(f16v)
+             205:199(i64vec3) ConvertFToS 204
                               Store 201(i64v) 205
-             210:  207(ivec3) Load 209(u64v)
-             211:  151(fvec3) ConvertUToF 210
+             210:207(i64vec3) Load 209(u64v)
+             211:151(f16vec3) ConvertUToF 210
                               Store 153(f16v) 211
-             212:  151(fvec3) Load 153(f16v)
-             213:  207(ivec3) ConvertFToU 212
+             212:151(f16vec3) Load 153(f16v)
+             213:207(i64vec3) ConvertFToU 212
                               Store 209(u64v) 213
                               Return
                               FunctionEnd
@@ -443,51 +443,51 @@ spv.float16.frag
               13:             Label
       216(f16v2):    215(ptr) Variable Function
       217(f16v1):    215(ptr) Variable Function
-             218:  214(fvec4) Load 217(f16v1)
-             219:  214(fvec4) ExtInst 1(GLSL.std.450) 11(Radians) 218
+             218:214(f16vec4) Load 217(f16v1)
+             219:214(f16vec4) ExtInst 1(GLSL.std.450) 11(Radians) 218
                               Store 216(f16v2) 219
-             220:  214(fvec4) Load 217(f16v1)
-             221:  214(fvec4) ExtInst 1(GLSL.std.450) 12(Degrees) 220
+             220:214(f16vec4) Load 217(f16v1)
+             221:214(f16vec4) ExtInst 1(GLSL.std.450) 12(Degrees) 220
                               Store 216(f16v2) 221
-             222:  214(fvec4) Load 217(f16v1)
-             223:  214(fvec4) ExtInst 1(GLSL.std.450) 13(Sin) 222
+             222:214(f16vec4) Load 217(f16v1)
+             223:214(f16vec4) ExtInst 1(GLSL.std.450) 13(Sin) 222
                               Store 216(f16v2) 223
-             224:  214(fvec4) Load 217(f16v1)
-             225:  214(fvec4) ExtInst 1(GLSL.std.450) 14(Cos) 224
+             224:214(f16vec4) Load 217(f16v1)
+             225:214(f16vec4) ExtInst 1(GLSL.std.450) 14(Cos) 224
                               Store 216(f16v2) 225
-             226:  214(fvec4) Load 217(f16v1)
-             227:  214(fvec4) ExtInst 1(GLSL.std.450) 15(Tan) 226
+             226:214(f16vec4) Load 217(f16v1)
+             227:214(f16vec4) ExtInst 1(GLSL.std.450) 15(Tan) 226
                               Store 216(f16v2) 227
-             228:  214(fvec4) Load 217(f16v1)
-             229:  214(fvec4) ExtInst 1(GLSL.std.450) 16(Asin) 228
+             228:214(f16vec4) Load 217(f16v1)
+             229:214(f16vec4) ExtInst 1(GLSL.std.450) 16(Asin) 228
                               Store 216(f16v2) 229
-             230:  214(fvec4) Load 217(f16v1)
-             231:  214(fvec4) ExtInst 1(GLSL.std.450) 17(Acos) 230
+             230:214(f16vec4) Load 217(f16v1)
+             231:214(f16vec4) ExtInst 1(GLSL.std.450) 17(Acos) 230
                               Store 216(f16v2) 231
-             232:  214(fvec4) Load 217(f16v1)
-             233:  214(fvec4) Load 216(f16v2)
-             234:  214(fvec4) ExtInst 1(GLSL.std.450) 25(Atan2) 232 233
+             232:214(f16vec4) Load 217(f16v1)
+             233:214(f16vec4) Load 216(f16v2)
+             234:214(f16vec4) ExtInst 1(GLSL.std.450) 25(Atan2) 232 233
                               Store 216(f16v2) 234
-             235:  214(fvec4) Load 217(f16v1)
-             236:  214(fvec4) ExtInst 1(GLSL.std.450) 18(Atan) 235
+             235:214(f16vec4) Load 217(f16v1)
+             236:214(f16vec4) ExtInst 1(GLSL.std.450) 18(Atan) 235
                               Store 216(f16v2) 236
-             237:  214(fvec4) Load 217(f16v1)
-             238:  214(fvec4) ExtInst 1(GLSL.std.450) 19(Sinh) 237
+             237:214(f16vec4) Load 217(f16v1)
+             238:214(f16vec4) ExtInst 1(GLSL.std.450) 19(Sinh) 237
                               Store 216(f16v2) 238
-             239:  214(fvec4) Load 217(f16v1)
-             240:  214(fvec4) ExtInst 1(GLSL.std.450) 20(Cosh) 239
+             239:214(f16vec4) Load 217(f16v1)
+             240:214(f16vec4) ExtInst 1(GLSL.std.450) 20(Cosh) 239
                               Store 216(f16v2) 240
-             241:  214(fvec4) Load 217(f16v1)
-             242:  214(fvec4) ExtInst 1(GLSL.std.450) 21(Tanh) 241
+             241:214(f16vec4) Load 217(f16v1)
+             242:214(f16vec4) ExtInst 1(GLSL.std.450) 21(Tanh) 241
                               Store 216(f16v2) 242
-             243:  214(fvec4) Load 217(f16v1)
-             244:  214(fvec4) ExtInst 1(GLSL.std.450) 22(Asinh) 243
+             243:214(f16vec4) Load 217(f16v1)
+             244:214(f16vec4) ExtInst 1(GLSL.std.450) 22(Asinh) 243
                               Store 216(f16v2) 244
-             245:  214(fvec4) Load 217(f16v1)
-             246:  214(fvec4) ExtInst 1(GLSL.std.450) 23(Acosh) 245
+             245:214(f16vec4) Load 217(f16v1)
+             246:214(f16vec4) ExtInst 1(GLSL.std.450) 23(Acosh) 245
                               Store 216(f16v2) 246
-             247:  214(fvec4) Load 217(f16v1)
-             248:  214(fvec4) ExtInst 1(GLSL.std.450) 24(Atanh) 247
+             247:214(f16vec4) Load 217(f16v1)
+             248:214(f16vec4) ExtInst 1(GLSL.std.450) 24(Atanh) 247
                               Store 216(f16v2) 248
                               Return
                               FunctionEnd
@@ -495,27 +495,27 @@ spv.float16.frag
               15:             Label
       249(f16v2):     30(ptr) Variable Function
       250(f16v1):     30(ptr) Variable Function
-             251:   29(fvec2) Load 250(f16v1)
-             252:   29(fvec2) Load 249(f16v2)
-             253:   29(fvec2) ExtInst 1(GLSL.std.450) 26(Pow) 251 252
+             251: 29(f16vec2) Load 250(f16v1)
+             252: 29(f16vec2) Load 249(f16v2)
+             253: 29(f16vec2) ExtInst 1(GLSL.std.450) 26(Pow) 251 252
                               Store 249(f16v2) 253
-             254:   29(fvec2) Load 250(f16v1)
-             255:   29(fvec2) ExtInst 1(GLSL.std.450) 27(Exp) 254
+             254: 29(f16vec2) Load 250(f16v1)
+             255: 29(f16vec2) ExtInst 1(GLSL.std.450) 27(Exp) 254
                               Store 249(f16v2) 255
-             256:   29(fvec2) Load 250(f16v1)
-             257:   29(fvec2) ExtInst 1(GLSL.std.450) 28(Log) 256
+             256: 29(f16vec2) Load 250(f16v1)
+             257: 29(f16vec2) ExtInst 1(GLSL.std.450) 28(Log) 256
                               Store 249(f16v2) 257
-             258:   29(fvec2) Load 250(f16v1)
-             259:   29(fvec2) ExtInst 1(GLSL.std.450) 29(Exp2) 258
+             258: 29(f16vec2) Load 250(f16v1)
+             259: 29(f16vec2) ExtInst 1(GLSL.std.450) 29(Exp2) 258
                               Store 249(f16v2) 259
-             260:   29(fvec2) Load 250(f16v1)
-             261:   29(fvec2) ExtInst 1(GLSL.std.450) 30(Log2) 260
+             260: 29(f16vec2) Load 250(f16v1)
+             261: 29(f16vec2) ExtInst 1(GLSL.std.450) 30(Log2) 260
                               Store 249(f16v2) 261
-             262:   29(fvec2) Load 250(f16v1)
-             263:   29(fvec2) ExtInst 1(GLSL.std.450) 31(Sqrt) 262
+             262: 29(f16vec2) Load 250(f16v1)
+             263: 29(f16vec2) ExtInst 1(GLSL.std.450) 31(Sqrt) 262
                               Store 249(f16v2) 263
-             264:   29(fvec2) Load 250(f16v1)
-             265:   29(fvec2) ExtInst 1(GLSL.std.450) 32(InverseSqrt) 264
+             264: 29(f16vec2) Load 250(f16v1)
+             265: 29(f16vec2) ExtInst 1(GLSL.std.450) 32(InverseSqrt) 264
                               Store 249(f16v2) 265
                               Return
                               FunctionEnd
@@ -528,132 +528,132 @@ spv.float16.frag
          332(bv):    155(ptr) Variable Function
           353(b):    110(ptr) Variable Function
          363(iv):    185(ptr) Variable Function
-             268:  151(fvec3) Load 267(f16v1)
-             269:  151(fvec3) ExtInst 1(GLSL.std.450) 4(FAbs) 268
+             268:151(f16vec3) Load 267(f16v1)
+             269:151(f16vec3) ExtInst 1(GLSL.std.450) 4(FAbs) 268
                               Store 266(f16v2) 269
-             270:  151(fvec3) Load 267(f16v1)
-             271:  151(fvec3) ExtInst 1(GLSL.std.450) 6(FSign) 270
+             270:151(f16vec3) Load 267(f16v1)
+             271:151(f16vec3) ExtInst 1(GLSL.std.450) 6(FSign) 270
                               Store 266(f16v2) 271
-             272:  151(fvec3) Load 267(f16v1)
-             273:  151(fvec3) ExtInst 1(GLSL.std.450) 8(Floor) 272
+             272:151(f16vec3) Load 267(f16v1)
+             273:151(f16vec3) ExtInst 1(GLSL.std.450) 8(Floor) 272
                               Store 266(f16v2) 273
-             274:  151(fvec3) Load 267(f16v1)
-             275:  151(fvec3) ExtInst 1(GLSL.std.450) 3(Trunc) 274
+             274:151(f16vec3) Load 267(f16v1)
+             275:151(f16vec3) ExtInst 1(GLSL.std.450) 3(Trunc) 274
                               Store 266(f16v2) 275
-             276:  151(fvec3) Load 267(f16v1)
-             277:  151(fvec3) ExtInst 1(GLSL.std.450) 1(Round) 276
+             276:151(f16vec3) Load 267(f16v1)
+             277:151(f16vec3) ExtInst 1(GLSL.std.450) 1(Round) 276
                               Store 266(f16v2) 277
-             278:  151(fvec3) Load 267(f16v1)
-             279:  151(fvec3) ExtInst 1(GLSL.std.450) 2(RoundEven) 278
+             278:151(f16vec3) Load 267(f16v1)
+             279:151(f16vec3) ExtInst 1(GLSL.std.450) 2(RoundEven) 278
                               Store 266(f16v2) 279
-             280:  151(fvec3) Load 267(f16v1)
-             281:  151(fvec3) ExtInst 1(GLSL.std.450) 9(Ceil) 280
+             280:151(f16vec3) Load 267(f16v1)
+             281:151(f16vec3) ExtInst 1(GLSL.std.450) 9(Ceil) 280
                               Store 266(f16v2) 281
-             282:  151(fvec3) Load 267(f16v1)
-             283:  151(fvec3) ExtInst 1(GLSL.std.450) 10(Fract) 282
+             282:151(f16vec3) Load 267(f16v1)
+             283:151(f16vec3) ExtInst 1(GLSL.std.450) 10(Fract) 282
                               Store 266(f16v2) 283
-             284:  151(fvec3) Load 267(f16v1)
-             285:  151(fvec3) Load 266(f16v2)
-             286:  151(fvec3) FMod 284 285
+             284:151(f16vec3) Load 267(f16v1)
+             285:151(f16vec3) Load 266(f16v2)
+             286:151(f16vec3) FMod 284 285
                               Store 266(f16v2) 286
-             287:  151(fvec3) Load 267(f16v1)
-             289:   28(float) Load 288(f16)
-             290:  151(fvec3) CompositeConstruct 289 289 289
-             291:  151(fvec3) FMod 287 290
+             287:151(f16vec3) Load 267(f16v1)
+             289:28(float16_t) Load 288(f16)
+             290:151(f16vec3) CompositeConstruct 289 289 289
+             291:151(f16vec3) FMod 287 290
                               Store 266(f16v2) 291
-             293:  151(fvec3) Load 267(f16v1)
-             294:  151(fvec3) ExtInst 1(GLSL.std.450) 35(Modf) 293 266(f16v2)
+             293:151(f16vec3) Load 267(f16v1)
+             294:151(f16vec3) ExtInst 1(GLSL.std.450) 35(Modf) 293 266(f16v2)
                               Store 292(f16v3) 294
-             295:  151(fvec3) Load 267(f16v1)
-             296:  151(fvec3) Load 266(f16v2)
-             297:  151(fvec3) ExtInst 1(GLSL.std.450) 37(FMin) 295 296
+             295:151(f16vec3) Load 267(f16v1)
+             296:151(f16vec3) Load 266(f16v2)
+             297:151(f16vec3) ExtInst 1(GLSL.std.450) 37(FMin) 295 296
                               Store 292(f16v3) 297
-             298:  151(fvec3) Load 267(f16v1)
-             299:   28(float) Load 288(f16)
-             300:  151(fvec3) CompositeConstruct 299 299 299
-             301:  151(fvec3) ExtInst 1(GLSL.std.450) 37(FMin) 298 300
+             298:151(f16vec3) Load 267(f16v1)
+             299:28(float16_t) Load 288(f16)
+             300:151(f16vec3) CompositeConstruct 299 299 299
+             301:151(f16vec3) ExtInst 1(GLSL.std.450) 37(FMin) 298 300
                               Store 292(f16v3) 301
-             302:  151(fvec3) Load 267(f16v1)
-             303:  151(fvec3) Load 266(f16v2)
-             304:  151(fvec3) ExtInst 1(GLSL.std.450) 40(FMax) 302 303
+             302:151(f16vec3) Load 267(f16v1)
+             303:151(f16vec3) Load 266(f16v2)
+             304:151(f16vec3) ExtInst 1(GLSL.std.450) 40(FMax) 302 303
                               Store 292(f16v3) 304
-             305:  151(fvec3) Load 267(f16v1)
-             306:   28(float) Load 288(f16)
-             307:  151(fvec3) CompositeConstruct 306 306 306
-             308:  151(fvec3) ExtInst 1(GLSL.std.450) 40(FMax) 305 307
+             305:151(f16vec3) Load 267(f16v1)
+             306:28(float16_t) Load 288(f16)
+             307:151(f16vec3) CompositeConstruct 306 306 306
+             308:151(f16vec3) ExtInst 1(GLSL.std.450) 40(FMax) 305 307
                               Store 292(f16v3) 308
-             309:  151(fvec3) Load 267(f16v1)
-             310:   28(float) Load 288(f16)
+             309:151(f16vec3) Load 267(f16v1)
+             310:28(float16_t) Load 288(f16)
              311:     35(ptr) AccessChain 266(f16v2) 34
-             312:   28(float) Load 311
-             313:  151(fvec3) CompositeConstruct 310 310 310
-             314:  151(fvec3) CompositeConstruct 312 312 312
-             315:  151(fvec3) ExtInst 1(GLSL.std.450) 43(FClamp) 309 313 314
+             312:28(float16_t) Load 311
+             313:151(f16vec3) CompositeConstruct 310 310 310
+             314:151(f16vec3) CompositeConstruct 312 312 312
+             315:151(f16vec3) ExtInst 1(GLSL.std.450) 43(FClamp) 309 313 314
                               Store 292(f16v3) 315
-             316:  151(fvec3) Load 267(f16v1)
-             317:  151(fvec3) Load 266(f16v2)
-             318:   28(float) Load 288(f16)
-             319:  151(fvec3) CompositeConstruct 318 318 318
-             320:  151(fvec3) ExtInst 1(GLSL.std.450) 43(FClamp) 316 317 319
+             316:151(f16vec3) Load 267(f16v1)
+             317:151(f16vec3) Load 266(f16v2)
+             318:28(float16_t) Load 288(f16)
+             319:151(f16vec3) CompositeConstruct 318 318 318
+             320:151(f16vec3) ExtInst 1(GLSL.std.450) 43(FClamp) 316 317 319
                               Store 292(f16v3) 320
-             321:  151(fvec3) Load 267(f16v1)
-             322:  151(fvec3) Load 266(f16v2)
-             323:   28(float) Load 288(f16)
-             324:  151(fvec3) CompositeConstruct 323 323 323
-             325:  151(fvec3) ExtInst 1(GLSL.std.450) 46(FMix) 321 322 324
+             321:151(f16vec3) Load 267(f16v1)
+             322:151(f16vec3) Load 266(f16v2)
+             323:28(float16_t) Load 288(f16)
+             324:151(f16vec3) CompositeConstruct 323 323 323
+             325:151(f16vec3) ExtInst 1(GLSL.std.450) 46(FMix) 321 322 324
                               Store 292(f16v3) 325
-             326:  151(fvec3) Load 267(f16v1)
-             327:  151(fvec3) Load 266(f16v2)
-             328:  151(fvec3) Load 292(f16v3)
-             329:  151(fvec3) ExtInst 1(GLSL.std.450) 46(FMix) 326 327 328
+             326:151(f16vec3) Load 267(f16v1)
+             327:151(f16vec3) Load 266(f16v2)
+             328:151(f16vec3) Load 292(f16v3)
+             329:151(f16vec3) ExtInst 1(GLSL.std.450) 46(FMix) 326 327 328
                               Store 292(f16v3) 329
-             330:  151(fvec3) Load 267(f16v1)
-             331:  151(fvec3) Load 266(f16v2)
+             330:151(f16vec3) Load 267(f16v1)
+             331:151(f16vec3) Load 266(f16v2)
              333:  154(bvec3) Load 332(bv)
-             334:  151(fvec3) Select 333 331 330
+             334:151(f16vec3) Select 333 331 330
                               Store 292(f16v3) 334
-             335:  151(fvec3) Load 267(f16v1)
-             336:  151(fvec3) Load 266(f16v2)
-             337:  151(fvec3) ExtInst 1(GLSL.std.450) 48(Step) 335 336
+             335:151(f16vec3) Load 267(f16v1)
+             336:151(f16vec3) Load 266(f16v2)
+             337:151(f16vec3) ExtInst 1(GLSL.std.450) 48(Step) 335 336
                               Store 292(f16v3) 337
-             338:   28(float) Load 288(f16)
-             339:  151(fvec3) Load 292(f16v3)
-             340:  151(fvec3) CompositeConstruct 338 338 338
-             341:  151(fvec3) ExtInst 1(GLSL.std.450) 48(Step) 340 339
+             338:28(float16_t) Load 288(f16)
+             339:151(f16vec3) Load 292(f16v3)
+             340:151(f16vec3) CompositeConstruct 338 338 338
+             341:151(f16vec3) ExtInst 1(GLSL.std.450) 48(Step) 340 339
                               Store 292(f16v3) 341
-             342:  151(fvec3) Load 267(f16v1)
-             343:  151(fvec3) Load 266(f16v2)
-             344:  151(fvec3) Load 292(f16v3)
-             345:  151(fvec3) ExtInst 1(GLSL.std.450) 49(SmoothStep) 342 343 344
+             342:151(f16vec3) Load 267(f16v1)
+             343:151(f16vec3) Load 266(f16v2)
+             344:151(f16vec3) Load 292(f16v3)
+             345:151(f16vec3) ExtInst 1(GLSL.std.450) 49(SmoothStep) 342 343 344
                               Store 292(f16v3) 345
-             346:   28(float) Load 288(f16)
+             346:28(float16_t) Load 288(f16)
              347:     35(ptr) AccessChain 267(f16v1) 34
-             348:   28(float) Load 347
-             349:  151(fvec3) Load 266(f16v2)
-             350:  151(fvec3) CompositeConstruct 346 346 346
-             351:  151(fvec3) CompositeConstruct 348 348 348
-             352:  151(fvec3) ExtInst 1(GLSL.std.450) 49(SmoothStep) 350 351 349
+             348:28(float16_t) Load 347
+             349:151(f16vec3) Load 266(f16v2)
+             350:151(f16vec3) CompositeConstruct 346 346 346
+             351:151(f16vec3) CompositeConstruct 348 348 348
+             352:151(f16vec3) ExtInst 1(GLSL.std.450) 49(SmoothStep) 350 351 349
                               Store 292(f16v3) 352
-             354:   28(float) Load 288(f16)
+             354:28(float16_t) Load 288(f16)
              355:   109(bool) IsNan 354
                               Store 353(b) 355
-             356:  151(fvec3) Load 267(f16v1)
+             356:151(f16vec3) Load 267(f16v1)
              357:  154(bvec3) IsInf 356
                               Store 332(bv) 357
-             358:  151(fvec3) Load 267(f16v1)
-             359:  151(fvec3) Load 266(f16v2)
-             360:  151(fvec3) Load 292(f16v3)
-             361:  151(fvec3) ExtInst 1(GLSL.std.450) 50(Fma) 358 359 360
+             358:151(f16vec3) Load 267(f16v1)
+             359:151(f16vec3) Load 266(f16v2)
+             360:151(f16vec3) Load 292(f16v3)
+             361:151(f16vec3) ExtInst 1(GLSL.std.450) 50(Fma) 358 359 360
                               Store 292(f16v3) 361
-             362:  151(fvec3) Load 267(f16v1)
+             362:151(f16vec3) Load 267(f16v1)
              365:364(ResType) ExtInst 1(GLSL.std.450) 52(FrexpStruct) 362
              366:  184(ivec3) CompositeExtract 365 1
                               Store 363(iv) 366
-             367:  151(fvec3) CompositeExtract 365 0
+             367:151(f16vec3) CompositeExtract 365 0
                               Store 266(f16v2) 367
-             368:  151(fvec3) Load 267(f16v1)
+             368:151(f16vec3) Load 267(f16v1)
              369:  184(ivec3) Load 363(iv)
-             370:  151(fvec3) ExtInst 1(GLSL.std.450) 53(Ldexp) 368 369
+             370:151(f16vec3) ExtInst 1(GLSL.std.450) 53(Ldexp) 368 369
                               Store 266(f16v2) 370
                               Return
                               FunctionEnd
@@ -661,11 +661,11 @@ spv.float16.frag
               19:             Label
           372(u):    371(ptr) Variable Function
        373(f16v):     30(ptr) Variable Function
-             374:   29(fvec2) Load 373(f16v)
+             374: 29(f16vec2) Load 373(f16v)
              375:     33(int) Bitcast 374
                               Store 372(u) 375
              376:     33(int) Load 372(u)
-             377:   29(fvec2) Bitcast 376
+             377: 29(f16vec2) Bitcast 376
                               Store 373(f16v) 377
                               Return
                               FunctionEnd
@@ -675,37 +675,37 @@ spv.float16.frag
       379(f16v1):    152(ptr) Variable Function
       383(f16v2):    152(ptr) Variable Function
       389(f16v3):    152(ptr) Variable Function
-             380:  151(fvec3) Load 379(f16v1)
-             381:   28(float) ExtInst 1(GLSL.std.450) 66(Length) 380
+             380:151(f16vec3) Load 379(f16v1)
+             381:28(float16_t) ExtInst 1(GLSL.std.450) 66(Length) 380
                               Store 378(f16) 381
-             382:  151(fvec3) Load 379(f16v1)
-             384:  151(fvec3) Load 383(f16v2)
-             385:   28(float) ExtInst 1(GLSL.std.450) 67(Distance) 382 384
+             382:151(f16vec3) Load 379(f16v1)
+             384:151(f16vec3) Load 383(f16v2)
+             385:28(float16_t) ExtInst 1(GLSL.std.450) 67(Distance) 382 384
                               Store 378(f16) 385
-             386:  151(fvec3) Load 379(f16v1)
-             387:  151(fvec3) Load 383(f16v2)
-             388:   28(float) Dot 386 387
+             386:151(f16vec3) Load 379(f16v1)
+             387:151(f16vec3) Load 383(f16v2)
+             388:28(float16_t) Dot 386 387
                               Store 378(f16) 388
-             390:  151(fvec3) Load 379(f16v1)
-             391:  151(fvec3) Load 383(f16v2)
-             392:  151(fvec3) ExtInst 1(GLSL.std.450) 68(Cross) 390 391
+             390:151(f16vec3) Load 379(f16v1)
+             391:151(f16vec3) Load 383(f16v2)
+             392:151(f16vec3) ExtInst 1(GLSL.std.450) 68(Cross) 390 391
                               Store 389(f16v3) 392
-             393:  151(fvec3) Load 379(f16v1)
-             394:  151(fvec3) ExtInst 1(GLSL.std.450) 69(Normalize) 393
+             393:151(f16vec3) Load 379(f16v1)
+             394:151(f16vec3) ExtInst 1(GLSL.std.450) 69(Normalize) 393
                               Store 383(f16v2) 394
-             395:  151(fvec3) Load 379(f16v1)
-             396:  151(fvec3) Load 383(f16v2)
-             397:  151(fvec3) Load 389(f16v3)
-             398:  151(fvec3) ExtInst 1(GLSL.std.450) 70(FaceForward) 395 396 397
+             395:151(f16vec3) Load 379(f16v1)
+             396:151(f16vec3) Load 383(f16v2)
+             397:151(f16vec3) Load 389(f16v3)
+             398:151(f16vec3) ExtInst 1(GLSL.std.450) 70(FaceForward) 395 396 397
                               Store 389(f16v3) 398
-             399:  151(fvec3) Load 379(f16v1)
-             400:  151(fvec3) Load 383(f16v2)
-             401:  151(fvec3) ExtInst 1(GLSL.std.450) 71(Reflect) 399 400
+             399:151(f16vec3) Load 379(f16v1)
+             400:151(f16vec3) Load 383(f16v2)
+             401:151(f16vec3) ExtInst 1(GLSL.std.450) 71(Reflect) 399 400
                               Store 389(f16v3) 401
-             402:  151(fvec3) Load 379(f16v1)
-             403:  151(fvec3) Load 383(f16v2)
-             404:   28(float) Load 378(f16)
-             405:  151(fvec3) ExtInst 1(GLSL.std.450) 72(Refract) 402 403 404
+             402:151(f16vec3) Load 379(f16v1)
+             403:151(f16vec3) Load 383(f16v2)
+             404:28(float16_t) Load 378(f16)
+             405:151(f16vec3) ExtInst 1(GLSL.std.450) 72(Refract) 402 403 404
                               Store 389(f16v3) 405
                               Return
                               FunctionEnd
@@ -723,23 +723,23 @@ spv.float16.frag
       439(f16m7):    437(ptr) Variable Function
              410:         406 Load 409(f16m1)
              412:         406 Load 411(f16m2)
-             413:  151(fvec3) CompositeExtract 410 0
-             414:  151(fvec3) CompositeExtract 412 0
-             415:  151(fvec3) FMul 413 414
-             416:  151(fvec3) CompositeExtract 410 1
-             417:  151(fvec3) CompositeExtract 412 1
-             418:  151(fvec3) FMul 416 417
+             413:151(f16vec3) CompositeExtract 410 0
+             414:151(f16vec3) CompositeExtract 412 0
+             415:151(f16vec3) FMul 413 414
+             416:151(f16vec3) CompositeExtract 410 1
+             417:151(f16vec3) CompositeExtract 412 1
+             418:151(f16vec3) FMul 416 417
              419:         406 CompositeConstruct 415 418
                               Store 408(f16m3) 419
-             421:  151(fvec3) Load 420(f16v1)
-             423:   29(fvec2) Load 422(f16v2)
+             421:151(f16vec3) Load 420(f16v1)
+             423: 29(f16vec2) Load 422(f16v2)
              424:         406 OuterProduct 421 423
                               Store 409(f16m1) 424
              428:         406 Load 409(f16m1)
              429:         425 Transpose 428
                               Store 427(f16m4) 429
              434:         431 Load 433(f16m5)
-             435:   28(float) ExtInst 1(GLSL.std.450) 33(Determinant) 434
+             435:28(float16_t) ExtInst 1(GLSL.std.450) 33(Determinant) 434
                               Store 430(f16) 435
              440:         436 Load 439(f16m7)
              441:         436 ExtInst 1(GLSL.std.450) 34(MatrixInverse) 440
@@ -751,28 +751,28 @@ spv.float16.frag
          442(bv):    155(ptr) Variable Function
       443(f16v1):    152(ptr) Variable Function
       445(f16v2):    152(ptr) Variable Function
-             444:  151(fvec3) Load 443(f16v1)
-             446:  151(fvec3) Load 445(f16v2)
+             444:151(f16vec3) Load 443(f16v1)
+             446:151(f16vec3) Load 445(f16v2)
              447:  154(bvec3) FOrdLessThan 444 446
                               Store 442(bv) 447
-             448:  151(fvec3) Load 443(f16v1)
-             449:  151(fvec3) Load 445(f16v2)
+             448:151(f16vec3) Load 443(f16v1)
+             449:151(f16vec3) Load 445(f16v2)
              450:  154(bvec3) FOrdLessThanEqual 448 449
                               Store 442(bv) 450
-             451:  151(fvec3) Load 443(f16v1)
-             452:  151(fvec3) Load 445(f16v2)
+             451:151(f16vec3) Load 443(f16v1)
+             452:151(f16vec3) Load 445(f16v2)
              453:  154(bvec3) FOrdGreaterThan 451 452
                               Store 442(bv) 453
-             454:  151(fvec3) Load 443(f16v1)
-             455:  151(fvec3) Load 445(f16v2)
+             454:151(f16vec3) Load 443(f16v1)
+             455:151(f16vec3) Load 445(f16v2)
              456:  154(bvec3) FOrdGreaterThanEqual 454 455
                               Store 442(bv) 456
-             457:  151(fvec3) Load 443(f16v1)
-             458:  151(fvec3) Load 445(f16v2)
+             457:151(f16vec3) Load 443(f16v1)
+             458:151(f16vec3) Load 445(f16v2)
              459:  154(bvec3) FOrdEqual 457 458
                               Store 442(bv) 459
-             460:  151(fvec3) Load 443(f16v1)
-             461:  151(fvec3) Load 445(f16v2)
+             460:151(f16vec3) Load 443(f16v1)
+             461:151(f16vec3) Load 445(f16v2)
              462:  154(bvec3) FOrdNotEqual 460 461
                               Store 442(bv) 462
                               Return
@@ -781,57 +781,57 @@ spv.float16.frag
               27:             Label
        463(f16v):    152(ptr) Variable Function
              467:    466(ptr) AccessChain 465(if16v) 34
-             468:   28(float) Load 467
-             469:   28(float) DPdx 468
+             468:28(float16_t) Load 467
+             469:28(float16_t) DPdx 468
              470:     35(ptr) AccessChain 463(f16v) 34
                               Store 470 469
              471:    466(ptr) AccessChain 465(if16v) 90
-             472:   28(float) Load 471
-             473:   28(float) DPdy 472
+             472:28(float16_t) Load 471
+             473:28(float16_t) DPdy 472
              474:     35(ptr) AccessChain 463(f16v) 90
                               Store 474 473
-             475:  151(fvec3) Load 465(if16v)
-             476:   29(fvec2) VectorShuffle 475 475 0 1
-             477:   29(fvec2) DPdxFine 476
-             478:  151(fvec3) Load 463(f16v)
-             479:  151(fvec3) VectorShuffle 478 477 3 4 2
+             475:151(f16vec3) Load 465(if16v)
+             476: 29(f16vec2) VectorShuffle 475 475 0 1
+             477: 29(f16vec2) DPdxFine 476
+             478:151(f16vec3) Load 463(f16v)
+             479:151(f16vec3) VectorShuffle 478 477 3 4 2
                               Store 463(f16v) 479
-             480:  151(fvec3) Load 465(if16v)
-             481:   29(fvec2) VectorShuffle 480 480 0 1
-             482:   29(fvec2) DPdyFine 481
-             483:  151(fvec3) Load 463(f16v)
-             484:  151(fvec3) VectorShuffle 483 482 3 4 2
+             480:151(f16vec3) Load 465(if16v)
+             481: 29(f16vec2) VectorShuffle 480 480 0 1
+             482: 29(f16vec2) DPdyFine 481
+             483:151(f16vec3) Load 463(f16v)
+             484:151(f16vec3) VectorShuffle 483 482 3 4 2
                               Store 463(f16v) 484
-             485:  151(fvec3) Load 465(if16v)
-             486:  151(fvec3) DPdxCoarse 485
+             485:151(f16vec3) Load 465(if16v)
+             486:151(f16vec3) DPdxCoarse 485
                               Store 463(f16v) 486
-             487:  151(fvec3) Load 465(if16v)
-             488:  151(fvec3) DPdxCoarse 487
+             487:151(f16vec3) Load 465(if16v)
+             488:151(f16vec3) DPdxCoarse 487
                               Store 463(f16v) 488
              489:    466(ptr) AccessChain 465(if16v) 34
-             490:   28(float) Load 489
-             491:   28(float) Fwidth 490
+             490:28(float16_t) Load 489
+             491:28(float16_t) Fwidth 490
              492:     35(ptr) AccessChain 463(f16v) 34
                               Store 492 491
-             493:  151(fvec3) Load 465(if16v)
-             494:   29(fvec2) VectorShuffle 493 493 0 1
-             495:   29(fvec2) FwidthFine 494
-             496:  151(fvec3) Load 463(f16v)
-             497:  151(fvec3) VectorShuffle 496 495 3 4 2
+             493:151(f16vec3) Load 465(if16v)
+             494: 29(f16vec2) VectorShuffle 493 493 0 1
+             495: 29(f16vec2) FwidthFine 494
+             496:151(f16vec3) Load 463(f16v)
+             497:151(f16vec3) VectorShuffle 496 495 3 4 2
                               Store 463(f16v) 497
-             498:  151(fvec3) Load 465(if16v)
-             499:  151(fvec3) FwidthCoarse 498
+             498:151(f16vec3) Load 465(if16v)
+             499:151(f16vec3) FwidthCoarse 498
                               Store 463(f16v) 499
              500:    466(ptr) AccessChain 465(if16v) 34
-             501:   28(float) ExtInst 1(GLSL.std.450) 76(InterpolateAtCentroid) 500
+             501:28(float16_t) ExtInst 1(GLSL.std.450) 76(InterpolateAtCentroid) 500
              502:     35(ptr) AccessChain 463(f16v) 34
                               Store 502 501
-             504:  151(fvec3) ExtInst 1(GLSL.std.450) 77(InterpolateAtSample) 465(if16v) 503
-             505:   29(fvec2) VectorShuffle 504 504 0 1
-             506:  151(fvec3) Load 463(f16v)
-             507:  151(fvec3) VectorShuffle 506 505 3 4 2
+             504:151(f16vec3) ExtInst 1(GLSL.std.450) 77(InterpolateAtSample) 465(if16v) 503
+             505: 29(f16vec2) VectorShuffle 504 504 0 1
+             506:151(f16vec3) Load 463(f16v)
+             507:151(f16vec3) VectorShuffle 506 505 3 4 2
                               Store 463(f16v) 507
-             510:  151(fvec3) ExtInst 1(GLSL.std.450) 78(InterpolateAtOffset) 465(if16v) 509
+             510:151(f16vec3) ExtInst 1(GLSL.std.450) 78(InterpolateAtOffset) 465(if16v) 509
                               Store 463(f16v) 510
                               Return
                               FunctionEnd

3rdparty/glslang/Test/baseResults/spv.float32.frag.out

@@ -142,8 +142,8 @@ spv.float32.frag
              107:             TypeBool
              108:             TypePointer Function 107(bool)
              149:             TypeFloat 64
-             150:             TypeVector 149(float) 3
-             151:             TypePointer Function 150(fvec3)
+             150:             TypeVector 149(float64_t) 3
+             151:             TypePointer Function 150(f64vec3)
              153:             TypeVector 26(float) 3
              154:             TypePointer Function 153(fvec3)
              158:             TypeVector 107(bool) 3
@@ -152,28 +152,28 @@ spv.float32.frag
              163:  153(fvec3) ConstantComposite 162 162 162
              164:  153(fvec3) ConstantComposite 54 54 54
              172:             TypeFloat 16
-             173:             TypeVector 172(float) 3
-             174:             TypePointer Function 173(fvec3)
+             173:             TypeVector 172(float16_t) 3
+             174:             TypePointer Function 173(f16vec3)
              180:             TypeInt 8 1
-             181:             TypeVector 180(int) 3
-             182:             TypePointer Function 181(ivec3)
+             181:             TypeVector 180(int8_t) 3
+             182:             TypePointer Function 181(i8vec3)
              186:             TypeInt 16 1
-             187:             TypeVector 186(int) 3
-             188:             TypePointer Function 187(ivec3)
+             187:             TypeVector 186(int16_t) 3
+             188:             TypePointer Function 187(i16vec3)
              192:             TypeInt 32 1
              193:             TypeVector 192(int) 3
              194:             TypePointer Function 193(ivec3)
              198:             TypeInt 64 1
-             199:             TypeVector 198(int) 3
-             200:             TypePointer Function 199(ivec3)
+             199:             TypeVector 198(int64_t) 3
+             200:             TypePointer Function 199(i64vec3)
              207:             TypeInt 16 0
-             208:             TypeVector 207(int) 3
-             209:             TypePointer Function 208(ivec3)
+             208:             TypeVector 207(int16_t) 3
+             209:             TypePointer Function 208(i16vec3)
              213:             TypeVector 31(int) 3
              214:             TypePointer Function 213(ivec3)
              218:             TypeInt 64 0
-             219:             TypeVector 218(int) 3
-             220:             TypePointer Function 219(ivec3)
+             219:             TypeVector 218(int64_t) 3
+             220:             TypePointer Function 219(i64vec3)
              224:             TypeVector 26(float) 4
              225:             TypePointer Function 224(fvec4)
     374(ResType):             TypeStruct 153(fvec3) 193(ivec3)
@@ -199,14 +199,14 @@ spv.float32.frag
          519(B1):             TypeStruct 26(float) 27(fvec2) 153(fvec3) 515 409 516 517(S) 518
              520:             TypePointer Uniform 519(B1)
              521:    520(ptr) Variable Uniform
-       522(sf16):  172(float) SpecConstant 12288
+       522(sf16):172(float16_t) SpecConstant 12288
          523(sf):   26(float) SpecConstant 1048576000
-         524(sd):  149(float) SpecConstant 0 1071644672
+         524(sd):149(float64_t) SpecConstant 0 1071644672
              525:   26(float) SpecConstantOp 115 522(sf16)
              526:   26(float) SpecConstantOp 115 522(sf16)
-             527:  149(float) SpecConstantOp 115 526
-             528:  172(float) SpecConstantOp 115 523(sf)
-             529:  172(float) SpecConstantOp 115 524(sd)
+             527:149(float64_t) SpecConstantOp 115 526
+             528:172(float16_t) SpecConstantOp 115 523(sf)
+             529:172(float16_t) SpecConstantOp 115 524(sd)
          4(main):           2 Function None 3
                5:             Label
                               Return
@@ -368,7 +368,7 @@ spv.float32.frag
        215(u32v):    214(ptr) Variable Function
        221(u64v):    220(ptr) Variable Function
              156:  153(fvec3) Load 155(f32v)
-             157:  150(fvec3) FConvert 156
+             157:150(f64vec3) FConvert 156
                               Store 152(f64v) 157
              161:  158(bvec3) Load 160(bv)
              165:  153(fvec3) Select 161 164 163
@@ -376,41 +376,41 @@ spv.float32.frag
              166:  153(fvec3) Load 155(f32v)
              167:  158(bvec3) FOrdNotEqual 166 163
                               Store 160(bv) 167
-             168:  150(fvec3) Load 152(f64v)
+             168:150(f64vec3) Load 152(f64v)
              169:  153(fvec3) FConvert 168
                               Store 155(f32v) 169
              170:  153(fvec3) Load 155(f32v)
-             171:  150(fvec3) FConvert 170
+             171:150(f64vec3) FConvert 170
                               Store 152(f64v) 171
-             176:  173(fvec3) Load 175(f16v)
+             176:173(f16vec3) Load 175(f16v)
              177:  153(fvec3) FConvert 176
                               Store 155(f32v) 177
              178:  153(fvec3) Load 155(f32v)
-             179:  173(fvec3) FConvert 178
+             179:173(f16vec3) FConvert 178
                               Store 175(f16v) 179
              184:  153(fvec3) Load 155(f32v)
-             185:  181(ivec3) ConvertFToS 184
+             185: 181(i8vec3) ConvertFToS 184
                               Store 183(i8v) 185
              190:  153(fvec3) Load 155(f32v)
-             191:  187(ivec3) ConvertFToS 190
+             191:187(i16vec3) ConvertFToS 190
                               Store 189(i16v) 191
              196:  153(fvec3) Load 155(f32v)
              197:  193(ivec3) ConvertFToS 196
                               Store 195(i32v) 197
              202:  153(fvec3) Load 155(f32v)
-             203:  199(ivec3) ConvertFToS 202
+             203:199(i64vec3) ConvertFToS 202
                               Store 201(i64v) 203
              205:  153(fvec3) Load 155(f32v)
-             206:  181(ivec3) ConvertFToS 205
+             206: 181(i8vec3) ConvertFToS 205
                               Store 204(u8v) 206
              211:  153(fvec3) Load 155(f32v)
-             212:  208(ivec3) ConvertFToU 211
+             212:208(i16vec3) ConvertFToU 211
                               Store 210(u16v) 212
              216:  153(fvec3) Load 155(f32v)
              217:  213(ivec3) ConvertFToU 216
                               Store 215(u32v) 217
              222:  153(fvec3) Load 155(f32v)
-             223:  219(ivec3) ConvertFToU 222
+             223:219(i64vec3) ConvertFToU 222
                               Store 221(u64v) 223
                               Return
                               FunctionEnd

3rdparty/glslang/Test/baseResults/spv.float64.frag.out

@@ -127,86 +127,86 @@ spv.float64.frag
                2:             TypeVoid
                3:             TypeFunction 2
               26:             TypeFloat 64
-              27:             TypeVector 26(float) 2
-              28:             TypePointer Function 27(fvec2)
-              30:   26(float) Constant 2696277389 1051772663
+              27:             TypeVector 26(float64_t) 2
+              28:             TypePointer Function 27(f64vec2)
+              30:26(float64_t) Constant 2696277389 1051772663
               31:             TypeInt 32 0
               32:     31(int) Constant 0
-              33:             TypePointer Function 26(float)
-              35:   26(float) Constant 0 3218079744
-              36:   26(float) Constant 3951369912 1067366481
-              37:   27(fvec2) ConstantComposite 35 36
-              54:   26(float) Constant 0 1072693248
-              60:             TypeMatrix 27(fvec2) 2
+              33:             TypePointer Function 26(float64_t)
+              35:26(float64_t) Constant 0 3218079744
+              36:26(float64_t) Constant 3951369912 1067366481
+              37: 27(f64vec2) ConstantComposite 35 36
+              54:26(float64_t) Constant 0 1072693248
+              60:             TypeMatrix 27(f64vec2) 2
               61:             TypePointer Function 60
               88:     31(int) Constant 1
              107:             TypeBool
              108:             TypePointer Function 107(bool)
-             149:             TypeVector 26(float) 3
-             150:             TypePointer Function 149(fvec3)
+             149:             TypeVector 26(float64_t) 3
+             150:             TypePointer Function 149(f64vec3)
              152:             TypeVector 107(bool) 3
              153:             TypePointer Function 152(bvec3)
-             156:   26(float) Constant 0 0
-             157:  149(fvec3) ConstantComposite 156 156 156
-             158:  149(fvec3) ConstantComposite 54 54 54
+             156:26(float64_t) Constant 0 0
+             157:149(f64vec3) ConstantComposite 156 156 156
+             158:149(f64vec3) ConstantComposite 54 54 54
              162:             TypeFloat 16
-             163:             TypeVector 162(float) 3
-             164:             TypePointer Function 163(fvec3)
+             163:             TypeVector 162(float16_t) 3
+             164:             TypePointer Function 163(f16vec3)
              170:             TypeInt 8 1
-             171:             TypeVector 170(int) 3
-             172:             TypePointer Function 171(ivec3)
+             171:             TypeVector 170(int8_t) 3
+             172:             TypePointer Function 171(i8vec3)
              176:             TypeInt 16 1
-             177:             TypeVector 176(int) 3
-             178:             TypePointer Function 177(ivec3)
+             177:             TypeVector 176(int16_t) 3
+             178:             TypePointer Function 177(i16vec3)
              182:             TypeInt 32 1
              183:             TypeVector 182(int) 3
              184:             TypePointer Function 183(ivec3)
              188:             TypeInt 64 1
-             189:             TypeVector 188(int) 3
-             190:             TypePointer Function 189(ivec3)
+             189:             TypeVector 188(int64_t) 3
+             190:             TypePointer Function 189(i64vec3)
              197:             TypeInt 16 0
-             198:             TypeVector 197(int) 3
-             199:             TypePointer Function 198(ivec3)
+             198:             TypeVector 197(int16_t) 3
+             199:             TypePointer Function 198(i16vec3)
              203:             TypeVector 31(int) 3
              204:             TypePointer Function 203(ivec3)
              208:             TypeInt 64 0
-             209:             TypeVector 208(int) 3
-             210:             TypePointer Function 209(ivec3)
-             214:             TypeVector 26(float) 4
-             215:             TypePointer Function 214(fvec4)
-    364(ResType):             TypeStruct 149(fvec3) 183(ivec3)
+             209:             TypeVector 208(int64_t) 3
+             210:             TypePointer Function 209(i64vec3)
+             214:             TypeVector 26(float64_t) 4
+             215:             TypePointer Function 214(f64vec4)
+    364(ResType):             TypeStruct 149(f64vec3) 183(ivec3)
              397:             TypeFloat 32
              398:             TypePointer Function 397(float)
-             402:             TypeMatrix 149(fvec3) 2
+             402:             TypeMatrix 149(f64vec3) 2
              403:             TypePointer Function 402
-             421:             TypeMatrix 27(fvec2) 3
+             421:             TypeMatrix 27(f64vec2) 3
              422:             TypePointer Function 421
-             427:             TypeMatrix 149(fvec3) 3
+             427:             TypeMatrix 149(f64vec3) 3
              428:             TypePointer Function 427
-             432:             TypeMatrix 214(fvec4) 4
+             432:             TypeMatrix 214(f64vec4) 4
              433:             TypePointer Function 432
-             460:             TypePointer Input 149(fvec3)
+             460:             TypePointer Input 149(f64vec3)
       461(if64v):    460(ptr) Variable Input
-             462:             TypePointer Input 26(float)
+             462:             TypePointer Input 26(float64_t)
              499:    182(int) Constant 1
-             504:   26(float) Constant 0 1071644672
-             505:   27(fvec2) ConstantComposite 504 504
+             504:26(float64_t) Constant 0 1071644672
+             505: 27(f64vec2) ConstantComposite 504 504
              507:     31(int) Constant 2
-             508:             TypeArray 26(float) 507
+             508:             TypeArray 26(float64_t) 507
              509:             TypeArray 402 507
-          510(S):             TypeStruct 26(float) 27(fvec2) 149(fvec3)
+          510(S):             TypeStruct 26(float64_t) 27(f64vec2) 149(f64vec3)
              511:             TypeArray 510(S) 507
-         512(B1):             TypeStruct 26(float) 27(fvec2) 149(fvec3) 508 402 509 510(S) 511
+         512(B1):             TypeStruct 26(float64_t) 27(f64vec2) 149(f64vec3) 508 402 509 510(S) 511
              513:             TypePointer Uniform 512(B1)
              514:    513(ptr) Variable Uniform
-       515(sf16):  162(float) SpecConstant 12288
+       515(sf16):162(float16_t) SpecConstant 12288
          516(sf):  397(float) SpecConstant 1048576000
-         517(sd):   26(float) SpecConstant 0 1071644672
+         517(sd):26(float64_t) SpecConstant 0 1071644672
              518:  397(float) SpecConstantOp 115 515(sf16)
              519:  397(float) SpecConstantOp 115 515(sf16)
-             520:   26(float) SpecConstantOp 115 519
-             521:  162(float) SpecConstantOp 115 516(sf)
-             522:  162(float) SpecConstantOp 115 517(sd)
+             520:26(float64_t) SpecConstantOp 115 519
+             521:162(float16_t) SpecConstantOp 115 516(sf)
+             522:162(float16_t) SpecConstantOp 115 517(sd)
          4(main):           2 Function None 3
                5:             Label
                               Return
@@ -216,8 +216,8 @@ spv.float64.frag
         29(f64v):     28(ptr) Variable Function
               34:     33(ptr) AccessChain 29(f64v) 32
                               Store 34 30
-              38:   27(fvec2) Load 29(f64v)
-              39:   27(fvec2) FAdd 38 37
+              38: 27(f64vec2) Load 29(f64v)
+              39: 27(f64vec2) FAdd 38 37
                               Store 29(f64v) 39
                               Return
                               FunctionEnd
@@ -227,125 +227,125 @@ spv.float64.frag
         62(f64m):     61(ptr) Variable Function
          85(f64):     33(ptr) Variable Function
           109(b):    108(ptr) Variable Function
-              41:   27(fvec2) Load 40(f64v)
-              42:   27(fvec2) Load 40(f64v)
-              43:   27(fvec2) FAdd 42 41
+              41: 27(f64vec2) Load 40(f64v)
+              42: 27(f64vec2) Load 40(f64v)
+              43: 27(f64vec2) FAdd 42 41
                               Store 40(f64v) 43
-              44:   27(fvec2) Load 40(f64v)
-              45:   27(fvec2) Load 40(f64v)
-              46:   27(fvec2) FSub 45 44
+              44: 27(f64vec2) Load 40(f64v)
+              45: 27(f64vec2) Load 40(f64v)
+              46: 27(f64vec2) FSub 45 44
                               Store 40(f64v) 46
-              47:   27(fvec2) Load 40(f64v)
-              48:   27(fvec2) Load 40(f64v)
-              49:   27(fvec2) FMul 48 47
+              47: 27(f64vec2) Load 40(f64v)
+              48: 27(f64vec2) Load 40(f64v)
+              49: 27(f64vec2) FMul 48 47
                               Store 40(f64v) 49
-              50:   27(fvec2) Load 40(f64v)
-              51:   27(fvec2) Load 40(f64v)
-              52:   27(fvec2) FDiv 51 50
+              50: 27(f64vec2) Load 40(f64v)
+              51: 27(f64vec2) Load 40(f64v)
+              52: 27(f64vec2) FDiv 51 50
                               Store 40(f64v) 52
-              53:   27(fvec2) Load 40(f64v)
-              55:   27(fvec2) CompositeConstruct 54 54
-              56:   27(fvec2) FAdd 53 55
+              53: 27(f64vec2) Load 40(f64v)
+              55: 27(f64vec2) CompositeConstruct 54 54
+              56: 27(f64vec2) FAdd 53 55
                               Store 40(f64v) 56
-              57:   27(fvec2) Load 40(f64v)
-              58:   27(fvec2) CompositeConstruct 54 54
-              59:   27(fvec2) FSub 57 58
+              57: 27(f64vec2) Load 40(f64v)
+              58: 27(f64vec2) CompositeConstruct 54 54
+              59: 27(f64vec2) FSub 57 58
                               Store 40(f64v) 59
               63:          60 Load 62(f64m)
-              64:   27(fvec2) CompositeConstruct 54 54
-              65:   27(fvec2) CompositeExtract 63 0
-              66:   27(fvec2) FAdd 65 64
-              67:   27(fvec2) CompositeExtract 63 1
-              68:   27(fvec2) FAdd 67 64
+              64: 27(f64vec2) CompositeConstruct 54 54
+              65: 27(f64vec2) CompositeExtract 63 0
+              66: 27(f64vec2) FAdd 65 64
+              67: 27(f64vec2) CompositeExtract 63 1
+              68: 27(f64vec2) FAdd 67 64
               69:          60 CompositeConstruct 66 68
                               Store 62(f64m) 69
               70:          60 Load 62(f64m)
-              71:   27(fvec2) CompositeConstruct 54 54
-              72:   27(fvec2) CompositeExtract 70 0
-              73:   27(fvec2) FSub 72 71
-              74:   27(fvec2) CompositeExtract 70 1
-              75:   27(fvec2) FSub 74 71
+              71: 27(f64vec2) CompositeConstruct 54 54
+              72: 27(f64vec2) CompositeExtract 70 0
+              73: 27(f64vec2) FSub 72 71
+              74: 27(f64vec2) CompositeExtract 70 1
+              75: 27(f64vec2) FSub 74 71
               76:          60 CompositeConstruct 73 75
                               Store 62(f64m) 76
-              77:   27(fvec2) Load 40(f64v)
-              78:   27(fvec2) FNegate 77
+              77: 27(f64vec2) Load 40(f64v)
+              78: 27(f64vec2) FNegate 77
                               Store 40(f64v) 78
               79:          60 Load 62(f64m)
-              80:   27(fvec2) CompositeExtract 79 0
-              81:   27(fvec2) FNegate 80
-              82:   27(fvec2) CompositeExtract 79 1
-              83:   27(fvec2) FNegate 82
+              80: 27(f64vec2) CompositeExtract 79 0
+              81: 27(f64vec2) FNegate 80
+              82: 27(f64vec2) CompositeExtract 79 1
+              83: 27(f64vec2) FNegate 82
               84:          60 CompositeConstruct 81 83
                               Store 62(f64m) 84
               86:     33(ptr) AccessChain 40(f64v) 32
-              87:   26(float) Load 86
+              87:26(float64_t) Load 86
               89:     33(ptr) AccessChain 40(f64v) 88
-              90:   26(float) Load 89
-              91:   26(float) FAdd 87 90
+              90:26(float64_t) Load 89
+              91:26(float64_t) FAdd 87 90
                               Store 85(f64) 91
               92:     33(ptr) AccessChain 40(f64v) 32
-              93:   26(float) Load 92
+              93:26(float64_t) Load 92
               94:     33(ptr) AccessChain 40(f64v) 88
-              95:   26(float) Load 94
-              96:   26(float) FSub 93 95
+              95:26(float64_t) Load 94
+              96:26(float64_t) FSub 93 95
                               Store 85(f64) 96
               97:     33(ptr) AccessChain 40(f64v) 32
-              98:   26(float) Load 97
+              98:26(float64_t) Load 97
               99:     33(ptr) AccessChain 40(f64v) 88
-             100:   26(float) Load 99
-             101:   26(float) FMul 98 100
+             100:26(float64_t) Load 99
+             101:26(float64_t) FMul 98 100
                               Store 85(f64) 101
              102:     33(ptr) AccessChain 40(f64v) 32
-             103:   26(float) Load 102
+             103:26(float64_t) Load 102
              104:     33(ptr) AccessChain 40(f64v) 88
-             105:   26(float) Load 104
-             106:   26(float) FDiv 103 105
+             105:26(float64_t) Load 104
+             106:26(float64_t) FDiv 103 105
                               Store 85(f64) 106
              110:     33(ptr) AccessChain 40(f64v) 32
-             111:   26(float) Load 110
-             112:   26(float) Load 85(f64)
+             111:26(float64_t) Load 110
+             112:26(float64_t) Load 85(f64)
              113:   107(bool) FOrdNotEqual 111 112
                               Store 109(b) 113
              114:     33(ptr) AccessChain 40(f64v) 88
-             115:   26(float) Load 114
-             116:   26(float) Load 85(f64)
+             115:26(float64_t) Load 114
+             116:26(float64_t) Load 85(f64)
              117:   107(bool) FOrdEqual 115 116
                               Store 109(b) 117
              118:     33(ptr) AccessChain 40(f64v) 32
-             119:   26(float) Load 118
-             120:   26(float) Load 85(f64)
+             119:26(float64_t) Load 118
+             120:26(float64_t) Load 85(f64)
              121:   107(bool) FOrdGreaterThan 119 120
                               Store 109(b) 121
              122:     33(ptr) AccessChain 40(f64v) 88
-             123:   26(float) Load 122
-             124:   26(float) Load 85(f64)
+             123:26(float64_t) Load 122
+             124:26(float64_t) Load 85(f64)
              125:   107(bool) FOrdLessThan 123 124
                               Store 109(b) 125
              126:     33(ptr) AccessChain 40(f64v) 32
-             127:   26(float) Load 126
-             128:   26(float) Load 85(f64)
+             127:26(float64_t) Load 126
+             128:26(float64_t) Load 85(f64)
              129:   107(bool) FOrdGreaterThanEqual 127 128
                               Store 109(b) 129
              130:     33(ptr) AccessChain 40(f64v) 88
-             131:   26(float) Load 130
-             132:   26(float) Load 85(f64)
+             131:26(float64_t) Load 130
+             132:26(float64_t) Load 85(f64)
              133:   107(bool) FOrdLessThanEqual 131 132
                               Store 109(b) 133
-             134:   27(fvec2) Load 40(f64v)
-             135:   26(float) Load 85(f64)
-             136:   27(fvec2) VectorTimesScalar 134 135
+             134: 27(f64vec2) Load 40(f64v)
+             135:26(float64_t) Load 85(f64)
+             136: 27(f64vec2) VectorTimesScalar 134 135
                               Store 40(f64v) 136
              137:          60 Load 62(f64m)
-             138:   26(float) Load 85(f64)
+             138:26(float64_t) Load 85(f64)
              139:          60 MatrixTimesScalar 137 138
                               Store 62(f64m) 139
              140:          60 Load 62(f64m)
-             141:   27(fvec2) Load 40(f64v)
-             142:   27(fvec2) MatrixTimesVector 140 141
+             141: 27(f64vec2) Load 40(f64v)
+             142: 27(f64vec2) MatrixTimesVector 140 141
                               Store 40(f64v) 142
-             143:   27(fvec2) Load 40(f64v)
+             143: 27(f64vec2) Load 40(f64v)
              144:          60 Load 62(f64m)
-             145:   27(fvec2) VectorTimesMatrix 143 144
+             145: 27(f64vec2) VectorTimesMatrix 143 144
                               Store 40(f64v) 145
              146:          60 Load 62(f64m)
              147:          60 Load 62(f64m)
@@ -367,40 +367,40 @@ spv.float64.frag
        205(u32v):    204(ptr) Variable Function
        211(u64v):    210(ptr) Variable Function
              155:  152(bvec3) Load 154(bv)
-             159:  149(fvec3) Select 155 158 157
+             159:149(f64vec3) Select 155 158 157
                               Store 151(f64v) 159
-             160:  149(fvec3) Load 151(f64v)
+             160:149(f64vec3) Load 151(f64v)
              161:  152(bvec3) FOrdNotEqual 160 157
                               Store 154(bv) 161
-             166:  163(fvec3) Load 165(f16v)
-             167:  149(fvec3) FConvert 166
+             166:163(f16vec3) Load 165(f16v)
+             167:149(f64vec3) FConvert 166
                               Store 151(f64v) 167
-             168:  149(fvec3) Load 151(f64v)
-             169:  163(fvec3) FConvert 168
+             168:149(f64vec3) Load 151(f64v)
+             169:163(f16vec3) FConvert 168
                               Store 165(f16v) 169
-             174:  149(fvec3) Load 151(f64v)
-             175:  171(ivec3) ConvertFToS 174
+             174:149(f64vec3) Load 151(f64v)
+             175: 171(i8vec3) ConvertFToS 174
                               Store 173(i8v) 175
-             180:  149(fvec3) Load 151(f64v)
-             181:  177(ivec3) ConvertFToS 180
+             180:149(f64vec3) Load 151(f64v)
+             181:177(i16vec3) ConvertFToS 180
                               Store 179(i16v) 181
-             186:  149(fvec3) Load 151(f64v)
+             186:149(f64vec3) Load 151(f64v)
              187:  183(ivec3) ConvertFToS 186
                               Store 185(i32v) 187
-             192:  149(fvec3) Load 151(f64v)
-             193:  189(ivec3) ConvertFToS 192
+             192:149(f64vec3) Load 151(f64v)
+             193:189(i64vec3) ConvertFToS 192
                               Store 191(i64v) 193
-             195:  149(fvec3) Load 151(f64v)
-             196:  171(ivec3) ConvertFToS 195
+             195:149(f64vec3) Load 151(f64v)
+             196: 171(i8vec3) ConvertFToS 195
                               Store 194(u8v) 196
-             201:  149(fvec3) Load 151(f64v)
-             202:  198(ivec3) ConvertFToU 201
+             201:149(f64vec3) Load 151(f64v)
+             202:198(i16vec3) ConvertFToU 201
                               Store 200(u16v) 202
-             206:  149(fvec3) Load 151(f64v)
+             206:149(f64vec3) Load 151(f64v)
              207:  203(ivec3) ConvertFToU 206
                               Store 205(u32v) 207
-             212:  149(fvec3) Load 151(f64v)
-             213:  209(ivec3) ConvertFToU 212
+             212:149(f64vec3) Load 151(f64v)
+             213:209(i64vec3) ConvertFToU 212
                               Store 211(u64v) 213
                               Return
                               FunctionEnd
@@ -408,51 +408,51 @@ spv.float64.frag
               13:             Label
       216(f64v2):    215(ptr) Variable Function
       217(f64v1):    215(ptr) Variable Function
-             218:  214(fvec4) Load 217(f64v1)
-             219:  214(fvec4) ExtInst 1(GLSL.std.450) 11(Radians) 218
+             218:214(f64vec4) Load 217(f64v1)
+             219:214(f64vec4) ExtInst 1(GLSL.std.450) 11(Radians) 218
                               Store 216(f64v2) 219
-             220:  214(fvec4) Load 217(f64v1)
-             221:  214(fvec4) ExtInst 1(GLSL.std.450) 12(Degrees) 220
+             220:214(f64vec4) Load 217(f64v1)
+             221:214(f64vec4) ExtInst 1(GLSL.std.450) 12(Degrees) 220
                               Store 216(f64v2) 221
-             222:  214(fvec4) Load 217(f64v1)
-             223:  214(fvec4) ExtInst 1(GLSL.std.450) 13(Sin) 222
+             222:214(f64vec4) Load 217(f64v1)
+             223:214(f64vec4) ExtInst 1(GLSL.std.450) 13(Sin) 222
                               Store 216(f64v2) 223
-             224:  214(fvec4) Load 217(f64v1)
-             225:  214(fvec4) ExtInst 1(GLSL.std.450) 14(Cos) 224
+             224:214(f64vec4) Load 217(f64v1)
+             225:214(f64vec4) ExtInst 1(GLSL.std.450) 14(Cos) 224
                               Store 216(f64v2) 225
-             226:  214(fvec4) Load 217(f64v1)
-             227:  214(fvec4) ExtInst 1(GLSL.std.450) 15(Tan) 226
+             226:214(f64vec4) Load 217(f64v1)
+             227:214(f64vec4) ExtInst 1(GLSL.std.450) 15(Tan) 226
                               Store 216(f64v2) 227
-             228:  214(fvec4) Load 217(f64v1)
-             229:  214(fvec4) ExtInst 1(GLSL.std.450) 16(Asin) 228
+             228:214(f64vec4) Load 217(f64v1)
+             229:214(f64vec4) ExtInst 1(GLSL.std.450) 16(Asin) 228
                               Store 216(f64v2) 229
-             230:  214(fvec4) Load 217(f64v1)
-             231:  214(fvec4) ExtInst 1(GLSL.std.450) 17(Acos) 230
+             230:214(f64vec4) Load 217(f64v1)
+             231:214(f64vec4) ExtInst 1(GLSL.std.450) 17(Acos) 230
                               Store 216(f64v2) 231
-             232:  214(fvec4) Load 217(f64v1)
-             233:  214(fvec4) Load 216(f64v2)
-             234:  214(fvec4) ExtInst 1(GLSL.std.450) 25(Atan2) 232 233
+             232:214(f64vec4) Load 217(f64v1)
+             233:214(f64vec4) Load 216(f64v2)
+             234:214(f64vec4) ExtInst 1(GLSL.std.450) 25(Atan2) 232 233
                               Store 216(f64v2) 234
-             235:  214(fvec4) Load 217(f64v1)
-             236:  214(fvec4) ExtInst 1(GLSL.std.450) 18(Atan) 235
+             235:214(f64vec4) Load 217(f64v1)
+             236:214(f64vec4) ExtInst 1(GLSL.std.450) 18(Atan) 235
                               Store 216(f64v2) 236
-             237:  214(fvec4) Load 217(f64v1)
-             238:  214(fvec4) ExtInst 1(GLSL.std.450) 19(Sinh) 237
+             237:214(f64vec4) Load 217(f64v1)
+             238:214(f64vec4) ExtInst 1(GLSL.std.450) 19(Sinh) 237
                               Store 216(f64v2) 238
-             239:  214(fvec4) Load 217(f64v1)
-             240:  214(fvec4) ExtInst 1(GLSL.std.450) 20(Cosh) 239
+             239:214(f64vec4) Load 217(f64v1)
+             240:214(f64vec4) ExtInst 1(GLSL.std.450) 20(Cosh) 239
                               Store 216(f64v2) 240
-             241:  214(fvec4) Load 217(f64v1)
-             242:  214(fvec4) ExtInst 1(GLSL.std.450) 21(Tanh) 241
+             241:214(f64vec4) Load 217(f64v1)
+             242:214(f64vec4) ExtInst 1(GLSL.std.450) 21(Tanh) 241
                               Store 216(f64v2) 242
-             243:  214(fvec4) Load 217(f64v1)
-             244:  214(fvec4) ExtInst 1(GLSL.std.450) 22(Asinh) 243
+             243:214(f64vec4) Load 217(f64v1)
+             244:214(f64vec4) ExtInst 1(GLSL.std.450) 22(Asinh) 243
                               Store 216(f64v2) 244
-             245:  214(fvec4) Load 217(f64v1)
-             246:  214(fvec4) ExtInst 1(GLSL.std.450) 23(Acosh) 245
+             245:214(f64vec4) Load 217(f64v1)
+             246:214(f64vec4) ExtInst 1(GLSL.std.450) 23(Acosh) 245
                               Store 216(f64v2) 246
-             247:  214(fvec4) Load 217(f64v1)
-             248:  214(fvec4) ExtInst 1(GLSL.std.450) 24(Atanh) 247
+             247:214(f64vec4) Load 217(f64v1)
+             248:214(f64vec4) ExtInst 1(GLSL.std.450) 24(Atanh) 247
                               Store 216(f64v2) 248
                               Return
                               FunctionEnd
@@ -460,27 +460,27 @@ spv.float64.frag
               15:             Label
       249(f64v2):     28(ptr) Variable Function
       250(f64v1):     28(ptr) Variable Function
-             251:   27(fvec2) Load 250(f64v1)
-             252:   27(fvec2) Load 249(f64v2)
-             253:   27(fvec2) ExtInst 1(GLSL.std.450) 26(Pow) 251 252
+             251: 27(f64vec2) Load 250(f64v1)
+             252: 27(f64vec2) Load 249(f64v2)
+             253: 27(f64vec2) ExtInst 1(GLSL.std.450) 26(Pow) 251 252
                               Store 249(f64v2) 253
-             254:   27(fvec2) Load 250(f64v1)
-             255:   27(fvec2) ExtInst 1(GLSL.std.450) 27(Exp) 254
+             254: 27(f64vec2) Load 250(f64v1)
+             255: 27(f64vec2) ExtInst 1(GLSL.std.450) 27(Exp) 254
                               Store 249(f64v2) 255
-             256:   27(fvec2) Load 250(f64v1)
-             257:   27(fvec2) ExtInst 1(GLSL.std.450) 28(Log) 256
+             256: 27(f64vec2) Load 250(f64v1)
+             257: 27(f64vec2) ExtInst 1(GLSL.std.450) 28(Log) 256
                               Store 249(f64v2) 257
-             258:   27(fvec2) Load 250(f64v1)
-             259:   27(fvec2) ExtInst 1(GLSL.std.450) 29(Exp2) 258
+             258: 27(f64vec2) Load 250(f64v1)
+             259: 27(f64vec2) ExtInst 1(GLSL.std.450) 29(Exp2) 258
                               Store 249(f64v2) 259
-             260:   27(fvec2) Load 250(f64v1)
-             261:   27(fvec2) ExtInst 1(GLSL.std.450) 30(Log2) 260
+             260: 27(f64vec2) Load 250(f64v1)
+             261: 27(f64vec2) ExtInst 1(GLSL.std.450) 30(Log2) 260
                               Store 249(f64v2) 261
-             262:   27(fvec2) Load 250(f64v1)
-             263:   27(fvec2) ExtInst 1(GLSL.std.450) 31(Sqrt) 262
+             262: 27(f64vec2) Load 250(f64v1)
+             263: 27(f64vec2) ExtInst 1(GLSL.std.450) 31(Sqrt) 262
                               Store 249(f64v2) 263
-             264:   27(fvec2) Load 250(f64v1)
-             265:   27(fvec2) ExtInst 1(GLSL.std.450) 32(InverseSqrt) 264
+             264: 27(f64vec2) Load 250(f64v1)
+             265: 27(f64vec2) ExtInst 1(GLSL.std.450) 32(InverseSqrt) 264
                               Store 249(f64v2) 265
                               Return
                               FunctionEnd
@@ -493,132 +493,132 @@ spv.float64.frag
          332(bv):    153(ptr) Variable Function
           353(b):    108(ptr) Variable Function
          363(iv):    184(ptr) Variable Function
-             268:  149(fvec3) Load 267(f64v1)
-             269:  149(fvec3) ExtInst 1(GLSL.std.450) 4(FAbs) 268
+             268:149(f64vec3) Load 267(f64v1)
+             269:149(f64vec3) ExtInst 1(GLSL.std.450) 4(FAbs) 268
                               Store 266(f64v2) 269
-             270:  149(fvec3) Load 267(f64v1)
-             271:  149(fvec3) ExtInst 1(GLSL.std.450) 6(FSign) 270
+             270:149(f64vec3) Load 267(f64v1)
+             271:149(f64vec3) ExtInst 1(GLSL.std.450) 6(FSign) 270
                               Store 266(f64v2) 271
-             272:  149(fvec3) Load 267(f64v1)
-             273:  149(fvec3) ExtInst 1(GLSL.std.450) 8(Floor) 272
+             272:149(f64vec3) Load 267(f64v1)
+             273:149(f64vec3) ExtInst 1(GLSL.std.450) 8(Floor) 272
                               Store 266(f64v2) 273
-             274:  149(fvec3) Load 267(f64v1)
-             275:  149(fvec3) ExtInst 1(GLSL.std.450) 3(Trunc) 274
+             274:149(f64vec3) Load 267(f64v1)
+             275:149(f64vec3) ExtInst 1(GLSL.std.450) 3(Trunc) 274
                               Store 266(f64v2) 275
-             276:  149(fvec3) Load 267(f64v1)
-             277:  149(fvec3) ExtInst 1(GLSL.std.450) 1(Round) 276
+             276:149(f64vec3) Load 267(f64v1)
+             277:149(f64vec3) ExtInst 1(GLSL.std.450) 1(Round) 276
                               Store 266(f64v2) 277
-             278:  149(fvec3) Load 267(f64v1)
-             279:  149(fvec3) ExtInst 1(GLSL.std.450) 2(RoundEven) 278
+             278:149(f64vec3) Load 267(f64v1)
+             279:149(f64vec3) ExtInst 1(GLSL.std.450) 2(RoundEven) 278
                               Store 266(f64v2) 279
-             280:  149(fvec3) Load 267(f64v1)
-             281:  149(fvec3) ExtInst 1(GLSL.std.450) 9(Ceil) 280
+             280:149(f64vec3) Load 267(f64v1)
+             281:149(f64vec3) ExtInst 1(GLSL.std.450) 9(Ceil) 280
                               Store 266(f64v2) 281
-             282:  149(fvec3) Load 267(f64v1)
-             283:  149(fvec3) ExtInst 1(GLSL.std.450) 10(Fract) 282
+             282:149(f64vec3) Load 267(f64v1)
+             283:149(f64vec3) ExtInst 1(GLSL.std.450) 10(Fract) 282
                               Store 266(f64v2) 283
-             284:  149(fvec3) Load 267(f64v1)
-             285:  149(fvec3) Load 266(f64v2)
-             286:  149(fvec3) FMod 284 285
+             284:149(f64vec3) Load 267(f64v1)
+             285:149(f64vec3) Load 266(f64v2)
+             286:149(f64vec3) FMod 284 285
                               Store 266(f64v2) 286
-             287:  149(fvec3) Load 267(f64v1)
-             289:   26(float) Load 288(f64)
-             290:  149(fvec3) CompositeConstruct 289 289 289
-             291:  149(fvec3) FMod 287 290
+             287:149(f64vec3) Load 267(f64v1)
+             289:26(float64_t) Load 288(f64)
+             290:149(f64vec3) CompositeConstruct 289 289 289
+             291:149(f64vec3) FMod 287 290
                               Store 266(f64v2) 291
-             293:  149(fvec3) Load 267(f64v1)
-             294:  149(fvec3) ExtInst 1(GLSL.std.450) 35(Modf) 293 266(f64v2)
+             293:149(f64vec3) Load 267(f64v1)
+             294:149(f64vec3) ExtInst 1(GLSL.std.450) 35(Modf) 293 266(f64v2)
                               Store 292(f64v3) 294
-             295:  149(fvec3) Load 267(f64v1)
-             296:  149(fvec3) Load 266(f64v2)
-             297:  149(fvec3) ExtInst 1(GLSL.std.450) 37(FMin) 295 296
+             295:149(f64vec3) Load 267(f64v1)
+             296:149(f64vec3) Load 266(f64v2)
+             297:149(f64vec3) ExtInst 1(GLSL.std.450) 37(FMin) 295 296
                               Store 292(f64v3) 297
-             298:  149(fvec3) Load 267(f64v1)
-             299:   26(float) Load 288(f64)
-             300:  149(fvec3) CompositeConstruct 299 299 299
-             301:  149(fvec3) ExtInst 1(GLSL.std.450) 37(FMin) 298 300
+             298:149(f64vec3) Load 267(f64v1)
+             299:26(float64_t) Load 288(f64)
+             300:149(f64vec3) CompositeConstruct 299 299 299
+             301:149(f64vec3) ExtInst 1(GLSL.std.450) 37(FMin) 298 300
                               Store 292(f64v3) 301
-             302:  149(fvec3) Load 267(f64v1)
-             303:  149(fvec3) Load 266(f64v2)
-             304:  149(fvec3) ExtInst 1(GLSL.std.450) 40(FMax) 302 303
+             302:149(f64vec3) Load 267(f64v1)
+             303:149(f64vec3) Load 266(f64v2)
+             304:149(f64vec3) ExtInst 1(GLSL.std.450) 40(FMax) 302 303
                               Store 292(f64v3) 304
-             305:  149(fvec3) Load 267(f64v1)
-             306:   26(float) Load 288(f64)
-             307:  149(fvec3) CompositeConstruct 306 306 306
-             308:  149(fvec3) ExtInst 1(GLSL.std.450) 40(FMax) 305 307
+             305:149(f64vec3) Load 267(f64v1)
+             306:26(float64_t) Load 288(f64)
+             307:149(f64vec3) CompositeConstruct 306 306 306
+             308:149(f64vec3) ExtInst 1(GLSL.std.450) 40(FMax) 305 307
                               Store 292(f64v3) 308
-             309:  149(fvec3) Load 267(f64v1)
-             310:   26(float) Load 288(f64)
+             309:149(f64vec3) Load 267(f64v1)
+             310:26(float64_t) Load 288(f64)
              311:     33(ptr) AccessChain 266(f64v2) 32
-             312:   26(float) Load 311
-             313:  149(fvec3) CompositeConstruct 310 310 310
-             314:  149(fvec3) CompositeConstruct 312 312 312
-             315:  149(fvec3) ExtInst 1(GLSL.std.450) 43(FClamp) 309 313 314
+             312:26(float64_t) Load 311
+             313:149(f64vec3) CompositeConstruct 310 310 310
+             314:149(f64vec3) CompositeConstruct 312 312 312
+             315:149(f64vec3) ExtInst 1(GLSL.std.450) 43(FClamp) 309 313 314
                               Store 292(f64v3) 315
-             316:  149(fvec3) Load 267(f64v1)
-             317:  149(fvec3) Load 266(f64v2)
-             318:   26(float) Load 288(f64)
-             319:  149(fvec3) CompositeConstruct 318 318 318
-             320:  149(fvec3) ExtInst 1(GLSL.std.450) 43(FClamp) 316 317 319
+             316:149(f64vec3) Load 267(f64v1)
+             317:149(f64vec3) Load 266(f64v2)
+             318:26(float64_t) Load 288(f64)
+             319:149(f64vec3) CompositeConstruct 318 318 318
+             320:149(f64vec3) ExtInst 1(GLSL.std.450) 43(FClamp) 316 317 319
                               Store 292(f64v3) 320
-             321:  149(fvec3) Load 267(f64v1)
-             322:  149(fvec3) Load 266(f64v2)
-             323:   26(float) Load 288(f64)
-             324:  149(fvec3) CompositeConstruct 323 323 323
-             325:  149(fvec3) ExtInst 1(GLSL.std.450) 46(FMix) 321 322 324
+             321:149(f64vec3) Load 267(f64v1)
+             322:149(f64vec3) Load 266(f64v2)
+             323:26(float64_t) Load 288(f64)
+             324:149(f64vec3) CompositeConstruct 323 323 323
+             325:149(f64vec3) ExtInst 1(GLSL.std.450) 46(FMix) 321 322 324
                               Store 292(f64v3) 325
-             326:  149(fvec3) Load 267(f64v1)
-             327:  149(fvec3) Load 266(f64v2)
-             328:  149(fvec3) Load 292(f64v3)
-             329:  149(fvec3) ExtInst 1(GLSL.std.450) 46(FMix) 326 327 328
+             326:149(f64vec3) Load 267(f64v1)
+             327:149(f64vec3) Load 266(f64v2)
+             328:149(f64vec3) Load 292(f64v3)
+             329:149(f64vec3) ExtInst 1(GLSL.std.450) 46(FMix) 326 327 328
                               Store 292(f64v3) 329
-             330:  149(fvec3) Load 267(f64v1)
-             331:  149(fvec3) Load 266(f64v2)
+             330:149(f64vec3) Load 267(f64v1)
+             331:149(f64vec3) Load 266(f64v2)
              333:  152(bvec3) Load 332(bv)
-             334:  149(fvec3) Select 333 331 330
+             334:149(f64vec3) Select 333 331 330
                               Store 292(f64v3) 334
-             335:  149(fvec3) Load 267(f64v1)
-             336:  149(fvec3) Load 266(f64v2)
-             337:  149(fvec3) ExtInst 1(GLSL.std.450) 48(Step) 335 336
+             335:149(f64vec3) Load 267(f64v1)
+             336:149(f64vec3) Load 266(f64v2)
+             337:149(f64vec3) ExtInst 1(GLSL.std.450) 48(Step) 335 336
                               Store 292(f64v3) 337
-             338:   26(float) Load 288(f64)
-             339:  149(fvec3) Load 292(f64v3)
-             340:  149(fvec3) CompositeConstruct 338 338 338
-             341:  149(fvec3) ExtInst 1(GLSL.std.450) 48(Step) 340 339
+             338:26(float64_t) Load 288(f64)
+             339:149(f64vec3) Load 292(f64v3)
+             340:149(f64vec3) CompositeConstruct 338 338 338
+             341:149(f64vec3) ExtInst 1(GLSL.std.450) 48(Step) 340 339
                               Store 292(f64v3) 341
-             342:  149(fvec3) Load 267(f64v1)
-             343:  149(fvec3) Load 266(f64v2)
-             344:  149(fvec3) Load 292(f64v3)
-             345:  149(fvec3) ExtInst 1(GLSL.std.450) 49(SmoothStep) 342 343 344
+             342:149(f64vec3) Load 267(f64v1)
+             343:149(f64vec3) Load 266(f64v2)
+             344:149(f64vec3) Load 292(f64v3)
+             345:149(f64vec3) ExtInst 1(GLSL.std.450) 49(SmoothStep) 342 343 344
                               Store 292(f64v3) 345
-             346:   26(float) Load 288(f64)
+             346:26(float64_t) Load 288(f64)
              347:     33(ptr) AccessChain 267(f64v1) 32
-             348:   26(float) Load 347
-             349:  149(fvec3) Load 266(f64v2)
-             350:  149(fvec3) CompositeConstruct 346 346 346
-             351:  149(fvec3) CompositeConstruct 348 348 348
-             352:  149(fvec3) ExtInst 1(GLSL.std.450) 49(SmoothStep) 350 351 349
+             348:26(float64_t) Load 347
+             349:149(f64vec3) Load 266(f64v2)
+             350:149(f64vec3) CompositeConstruct 346 346 346
+             351:149(f64vec3) CompositeConstruct 348 348 348
+             352:149(f64vec3) ExtInst 1(GLSL.std.450) 49(SmoothStep) 350 351 349
                               Store 292(f64v3) 352
-             354:   26(float) Load 288(f64)
+             354:26(float64_t) Load 288(f64)
              355:   107(bool) IsNan 354
                               Store 353(b) 355
-             356:  149(fvec3) Load 267(f64v1)
+             356:149(f64vec3) Load 267(f64v1)
              357:  152(bvec3) IsInf 356
                               Store 332(bv) 357
-             358:  149(fvec3) Load 267(f64v1)
-             359:  149(fvec3) Load 266(f64v2)
-             360:  149(fvec3) Load 292(f64v3)
-             361:  149(fvec3) ExtInst 1(GLSL.std.450) 50(Fma) 358 359 360
+             358:149(f64vec3) Load 267(f64v1)
+             359:149(f64vec3) Load 266(f64v2)
+             360:149(f64vec3) Load 292(f64v3)
+             361:149(f64vec3) ExtInst 1(GLSL.std.450) 50(Fma) 358 359 360
                               Store 292(f64v3) 361
-             362:  149(fvec3) Load 267(f64v1)
+             362:149(f64vec3) Load 267(f64v1)
              365:364(ResType) ExtInst 1(GLSL.std.450) 52(FrexpStruct) 362
              366:  183(ivec3) CompositeExtract 365 1
                               Store 363(iv) 366
-             367:  149(fvec3) CompositeExtract 365 0
+             367:149(f64vec3) CompositeExtract 365 0
                               Store 266(f64v2) 367
-             368:  149(fvec3) Load 267(f64v1)
+             368:149(f64vec3) Load 267(f64v1)
              369:  183(ivec3) Load 363(iv)
-             370:  149(fvec3) ExtInst 1(GLSL.std.450) 53(Ldexp) 368 369
+             370:149(f64vec3) ExtInst 1(GLSL.std.450) 53(Ldexp) 368 369
                               Store 266(f64v2) 370
                               Return
                               FunctionEnd
@@ -629,37 +629,37 @@ spv.float64.frag
       376(f64v2):    150(ptr) Variable Function
       382(f64v3):    150(ptr) Variable Function
           399(f):    398(ptr) Variable Function
-             373:  149(fvec3) Load 372(f64v1)
-             374:   26(float) ExtInst 1(GLSL.std.450) 66(Length) 373
+             373:149(f64vec3) Load 372(f64v1)
+             374:26(float64_t) ExtInst 1(GLSL.std.450) 66(Length) 373
                               Store 371(f64) 374
-             375:  149(fvec3) Load 372(f64v1)
-             377:  149(fvec3) Load 376(f64v2)
-             378:   26(float) ExtInst 1(GLSL.std.450) 67(Distance) 375 377
+             375:149(f64vec3) Load 372(f64v1)
+             377:149(f64vec3) Load 376(f64v2)
+             378:26(float64_t) ExtInst 1(GLSL.std.450) 67(Distance) 375 377
                               Store 371(f64) 378
-             379:  149(fvec3) Load 372(f64v1)
-             380:  149(fvec3) Load 376(f64v2)
-             381:   26(float) Dot 379 380
+             379:149(f64vec3) Load 372(f64v1)
+             380:149(f64vec3) Load 376(f64v2)
+             381:26(float64_t) Dot 379 380
                               Store 371(f64) 381
-             383:  149(fvec3) Load 372(f64v1)
-             384:  149(fvec3) Load 376(f64v2)
-             385:  149(fvec3) ExtInst 1(GLSL.std.450) 68(Cross) 383 384
+             383:149(f64vec3) Load 372(f64v1)
+             384:149(f64vec3) Load 376(f64v2)
+             385:149(f64vec3) ExtInst 1(GLSL.std.450) 68(Cross) 383 384
                               Store 382(f64v3) 385
-             386:  149(fvec3) Load 372(f64v1)
-             387:  149(fvec3) ExtInst 1(GLSL.std.450) 69(Normalize) 386
+             386:149(f64vec3) Load 372(f64v1)
+             387:149(f64vec3) ExtInst 1(GLSL.std.450) 69(Normalize) 386
                               Store 376(f64v2) 387
-             388:  149(fvec3) Load 372(f64v1)
-             389:  149(fvec3) Load 376(f64v2)
-             390:  149(fvec3) Load 382(f64v3)
-             391:  149(fvec3) ExtInst 1(GLSL.std.450) 70(FaceForward) 388 389 390
+             388:149(f64vec3) Load 372(f64v1)
+             389:149(f64vec3) Load 376(f64v2)
+             390:149(f64vec3) Load 382(f64v3)
+             391:149(f64vec3) ExtInst 1(GLSL.std.450) 70(FaceForward) 388 389 390
                               Store 382(f64v3) 391
-             392:  149(fvec3) Load 372(f64v1)
-             393:  149(fvec3) Load 376(f64v2)
-             394:  149(fvec3) ExtInst 1(GLSL.std.450) 71(Reflect) 392 393
+             392:149(f64vec3) Load 372(f64v1)
+             393:149(f64vec3) Load 376(f64v2)
+             394:149(f64vec3) ExtInst 1(GLSL.std.450) 71(Reflect) 392 393
                               Store 382(f64v3) 394
-             395:  149(fvec3) Load 372(f64v1)
-             396:  149(fvec3) Load 376(f64v2)
+             395:149(f64vec3) Load 372(f64v1)
+             396:149(f64vec3) Load 376(f64v2)
              400:  397(float) Load 399(f)
-             401:  149(fvec3) ExtInst 1(GLSL.std.450) 72(Refract) 395 396 400
+             401:149(f64vec3) ExtInst 1(GLSL.std.450) 72(Refract) 395 396 400
                               Store 382(f64v3) 401
                               Return
                               FunctionEnd
@@ -677,23 +677,23 @@ spv.float64.frag
       435(f64m7):    433(ptr) Variable Function
              406:         402 Load 405(f64m1)
              408:         402 Load 407(f64m2)
-             409:  149(fvec3) CompositeExtract 406 0
-             410:  149(fvec3) CompositeExtract 408 0
-             411:  149(fvec3) FMul 409 410
-             412:  149(fvec3) CompositeExtract 406 1
-             413:  149(fvec3) CompositeExtract 408 1
-             414:  149(fvec3) FMul 412 413
+             409:149(f64vec3) CompositeExtract 406 0
+             410:149(f64vec3) CompositeExtract 408 0
+             411:149(f64vec3) FMul 409 410
+             412:149(f64vec3) CompositeExtract 406 1
+             413:149(f64vec3) CompositeExtract 408 1
+             414:149(f64vec3) FMul 412 413
              415:         402 CompositeConstruct 411 414
                               Store 404(f64m3) 415
-             417:  149(fvec3) Load 416(f64v1)
-             419:   27(fvec2) Load 418(f64v2)
+             417:149(f64vec3) Load 416(f64v1)
+             419: 27(f64vec2) Load 418(f64v2)
              420:         402 OuterProduct 417 419
                               Store 405(f64m1) 420
              424:         402 Load 405(f64m1)
              425:         421 Transpose 424
                               Store 423(f64m4) 425
              430:         427 Load 429(f64m5)
-             431:   26(float) ExtInst 1(GLSL.std.450) 33(Determinant) 430
+             431:26(float64_t) ExtInst 1(GLSL.std.450) 33(Determinant) 430
                               Store 426(f64) 431
              436:         432 Load 435(f64m7)
              437:         432 ExtInst 1(GLSL.std.450) 34(MatrixInverse) 436
@@ -705,28 +705,28 @@ spv.float64.frag
          438(bv):    153(ptr) Variable Function
       439(f64v1):    150(ptr) Variable Function
       441(f64v2):    150(ptr) Variable Function
-             440:  149(fvec3) Load 439(f64v1)
-             442:  149(fvec3) Load 441(f64v2)
+             440:149(f64vec3) Load 439(f64v1)
+             442:149(f64vec3) Load 441(f64v2)
              443:  152(bvec3) FOrdLessThan 440 442
                               Store 438(bv) 443
-             444:  149(fvec3) Load 439(f64v1)
-             445:  149(fvec3) Load 441(f64v2)
+             444:149(f64vec3) Load 439(f64v1)
+             445:149(f64vec3) Load 441(f64v2)
              446:  152(bvec3) FOrdLessThanEqual 444 445
                               Store 438(bv) 446
-             447:  149(fvec3) Load 439(f64v1)
-             448:  149(fvec3) Load 441(f64v2)
+             447:149(f64vec3) Load 439(f64v1)
+             448:149(f64vec3) Load 441(f64v2)
              449:  152(bvec3) FOrdGreaterThan 447 448
                               Store 438(bv) 449
-             450:  149(fvec3) Load 439(f64v1)
-             451:  149(fvec3) Load 441(f64v2)
+             450:149(f64vec3) Load 439(f64v1)
+             451:149(f64vec3) Load 441(f64v2)
              452:  152(bvec3) FOrdGreaterThanEqual 450 451
                               Store 438(bv) 452
-             453:  149(fvec3) Load 439(f64v1)
-             454:  149(fvec3) Load 441(f64v2)
+             453:149(f64vec3) Load 439(f64v1)
+             454:149(f64vec3) Load 441(f64v2)
              455:  152(bvec3) FOrdEqual 453 454
                               Store 438(bv) 455
-             456:  149(fvec3) Load 439(f64v1)
-             457:  149(fvec3) Load 441(f64v2)
+             456:149(f64vec3) Load 439(f64v1)
+             457:149(f64vec3) Load 441(f64v2)
              458:  152(bvec3) FOrdNotEqual 456 457
                               Store 438(bv) 458
                               Return
@@ -735,57 +735,57 @@ spv.float64.frag
               25:             Label
        459(f64v):    150(ptr) Variable Function
              463:    462(ptr) AccessChain 461(if64v) 32
-             464:   26(float) Load 463
-             465:   26(float) DPdx 464
+             464:26(float64_t) Load 463
+             465:26(float64_t) DPdx 464
              466:     33(ptr) AccessChain 459(f64v) 32
                               Store 466 465
              467:    462(ptr) AccessChain 461(if64v) 88
-             468:   26(float) Load 467
-             469:   26(float) DPdy 468
+             468:26(float64_t) Load 467
+             469:26(float64_t) DPdy 468
              470:     33(ptr) AccessChain 459(f64v) 88
                               Store 470 469
-             471:  149(fvec3) Load 461(if64v)
-             472:   27(fvec2) VectorShuffle 471 471 0 1
-             473:   27(fvec2) DPdxFine 472
-             474:  149(fvec3) Load 459(f64v)
-             475:  149(fvec3) VectorShuffle 474 473 3 4 2
+             471:149(f64vec3) Load 461(if64v)
+             472: 27(f64vec2) VectorShuffle 471 471 0 1
+             473: 27(f64vec2) DPdxFine 472
+             474:149(f64vec3) Load 459(f64v)
+             475:149(f64vec3) VectorShuffle 474 473 3 4 2
                               Store 459(f64v) 475
-             476:  149(fvec3) Load 461(if64v)
-             477:   27(fvec2) VectorShuffle 476 476 0 1
-             478:   27(fvec2) DPdyFine 477
-             479:  149(fvec3) Load 459(f64v)
-             480:  149(fvec3) VectorShuffle 479 478 3 4 2
+             476:149(f64vec3) Load 461(if64v)
+             477: 27(f64vec2) VectorShuffle 476 476 0 1
+             478: 27(f64vec2) DPdyFine 477
+             479:149(f64vec3) Load 459(f64v)
+             480:149(f64vec3) VectorShuffle 479 478 3 4 2
                               Store 459(f64v) 480
-             481:  149(fvec3) Load 461(if64v)
-             482:  149(fvec3) DPdxCoarse 481
+             481:149(f64vec3) Load 461(if64v)
+             482:149(f64vec3) DPdxCoarse 481
                               Store 459(f64v) 482
-             483:  149(fvec3) Load 461(if64v)
-             484:  149(fvec3) DPdxCoarse 483
+             483:149(f64vec3) Load 461(if64v)
+             484:149(f64vec3) DPdxCoarse 483
                               Store 459(f64v) 484
              485:    462(ptr) AccessChain 461(if64v) 32
-             486:   26(float) Load 485
-             487:   26(float) Fwidth 486
+             486:26(float64_t) Load 485
+             487:26(float64_t) Fwidth 486
              488:     33(ptr) AccessChain 459(f64v) 32
                               Store 488 487
-             489:  149(fvec3) Load 461(if64v)
-             490:   27(fvec2) VectorShuffle 489 489 0 1
-             491:   27(fvec2) FwidthFine 490
-             492:  149(fvec3) Load 459(f64v)
-             493:  149(fvec3) VectorShuffle 492 491 3 4 2
+             489:149(f64vec3) Load 461(if64v)
+             490: 27(f64vec2) VectorShuffle 489 489 0 1
+             491: 27(f64vec2) FwidthFine 490
+             492:149(f64vec3) Load 459(f64v)
+             493:149(f64vec3) VectorShuffle 492 491 3 4 2
                               Store 459(f64v) 493
-             494:  149(fvec3) Load 461(if64v)
-             495:  149(fvec3) FwidthCoarse 494
+             494:149(f64vec3) Load 461(if64v)
+             495:149(f64vec3) FwidthCoarse 494
                               Store 459(f64v) 495
              496:    462(ptr) AccessChain 461(if64v) 32
-             497:   26(float) ExtInst 1(GLSL.std.450) 76(InterpolateAtCentroid) 496
+             497:26(float64_t) ExtInst 1(GLSL.std.450) 76(InterpolateAtCentroid) 496
              498:     33(ptr) AccessChain 459(f64v) 32
                               Store 498 497
-             500:  149(fvec3) ExtInst 1(GLSL.std.450) 77(InterpolateAtSample) 461(if64v) 499
-             501:   27(fvec2) VectorShuffle 500 500 0 1
-             502:  149(fvec3) Load 459(f64v)
-             503:  149(fvec3) VectorShuffle 502 501 3 4 2
+             500:149(f64vec3) ExtInst 1(GLSL.std.450) 77(InterpolateAtSample) 461(if64v) 499
+             501: 27(f64vec2) VectorShuffle 500 500 0 1
+             502:149(f64vec3) Load 459(f64v)
+             503:149(f64vec3) VectorShuffle 502 501 3 4 2
                               Store 459(f64v) 503
-             506:  149(fvec3) ExtInst 1(GLSL.std.450) 78(InterpolateAtOffset) 461(if64v) 505
+             506:149(f64vec3) ExtInst 1(GLSL.std.450) 78(InterpolateAtOffset) 461(if64v) 505
                               Store 459(f64v) 506
                               Return
                               FunctionEnd

3rdparty/glslang/Test/baseResults/spv.hlslOffsets.vert.out

@@ -66,8 +66,8 @@ Shader version: 450
                7:             TypeVector 6(float) 3
                8:             TypeVector 6(float) 2
                9:             TypeFloat 64
-              10:             TypeVector 9(float) 2
-       11(block):             TypeStruct 6(float) 7(fvec3) 6(float) 7(fvec3) 7(fvec3) 8(fvec2) 8(fvec2) 6(float) 8(fvec2) 6(float) 6(float) 8(fvec2) 8(fvec2) 10(fvec2)
+              10:             TypeVector 9(float64_t) 2
+       11(block):             TypeStruct 6(float) 7(fvec3) 6(float) 7(fvec3) 7(fvec3) 8(fvec2) 8(fvec2) 6(float) 8(fvec2) 6(float) 6(float) 8(fvec2) 8(fvec2) 10(f64vec2)
               12:             TypePointer Uniform 11(block)
               13:     12(ptr) Variable Uniform
          4(main):           2 Function None 3

3rdparty/glslang/Test/baseResults/spv.int16.amd.frag.out

@@ -96,14 +96,14 @@ spv.int16.amd.frag
                2:             TypeVoid
                3:             TypeFunction 2
               14:             TypeInt 16 0
-              15:             TypePointer Function 14(int)
+              15:             TypePointer Function 14(int16_t)
               17:             TypeInt 16 1
               18:             TypeInt 32 0
               19:     18(int) Constant 3
-              20:             TypeArray 17(int) 19
-              21:     17(int) Constant 273
-              22:     17(int) Constant 4294967294
-              23:     17(int) Constant 256
+              20:             TypeArray 17(int16_t) 19
+              21: 17(int16_t) Constant 273
+              22: 17(int16_t) Constant 4294967294
+              23: 17(int16_t) Constant 256
               24:          20 ConstantComposite 21 22 23
     25(Uniforms):             TypeStruct 18(int)
               26:             TypePointer Uniform 25(Uniforms)
@@ -112,15 +112,15 @@ spv.int16.amd.frag
               29:     28(int) Constant 0
               30:             TypePointer Uniform 18(int)
               33:             TypePointer Function 20
-              35:             TypePointer Function 17(int)
-              39:             TypeArray 14(int) 19
-              40:     14(int) Constant 65535
+              35:             TypePointer Function 17(int16_t)
+              39:             TypeArray 14(int16_t) 19
+              40: 14(int16_t) Constant 65535
               41:          39 ConstantComposite 40 40 40
               44:             TypePointer Function 39
-              49:             TypeVector 14(int) 3
-              50:             TypePointer Function 49(ivec3)
-              53:     17(int) Constant 1
-              54:             TypeVector 17(int) 3
+              49:             TypeVector 14(int16_t) 3
+              50:             TypePointer Function 49(i16vec3)
+              53: 17(int16_t) Constant 1
+              54:             TypeVector 17(int16_t) 3
              111:     18(int) Constant 1
              117:     18(int) Constant 2
              125:             TypeBool
@@ -128,19 +128,19 @@ spv.int16.amd.frag
              128:     18(int) Constant 0
              147:             TypePointer Function 18(int)
              158:             TypePointer Function 28(int)
-             187:             TypeVector 17(int) 2
-             188:             TypePointer Function 187(ivec2)
+             187:             TypeVector 17(int16_t) 2
+             188:             TypePointer Function 187(i16vec2)
              190:             TypeVector 125(bool) 2
              191:             TypePointer Function 190(bvec2)
-             194:     17(int) Constant 0
-             195:  187(ivec2) ConstantComposite 194 194
-             196:  187(ivec2) ConstantComposite 53 53
-             198:             TypeVector 14(int) 2
-             199:             TypePointer Function 198(ivec2)
-             202:     14(int) Constant 0
-             203:     14(int) Constant 1
-             204:  198(ivec2) ConstantComposite 202 202
-             205:  198(ivec2) ConstantComposite 203 203
+             194: 17(int16_t) Constant 0
+             195:187(i16vec2) ConstantComposite 194 194
+             196:187(i16vec2) ConstantComposite 53 53
+             198:             TypeVector 14(int16_t) 2
+             199:             TypePointer Function 198(i16vec2)
+             202: 14(int16_t) Constant 0
+             203: 14(int16_t) Constant 1
+             204:198(i16vec2) ConstantComposite 202 202
+             205:198(i16vec2) ConstantComposite 203 203
              211:             TypeVector 28(int) 2
              212:             TypePointer Function 211(ivec2)
              224:             TypeVector 18(int) 2
@@ -149,80 +149,80 @@ spv.int16.amd.frag
              238:             TypeVector 237(float) 2
              239:             TypePointer Function 238(fvec2)
              249:             TypeFloat 64
-             250:             TypeVector 249(float) 2
-             251:             TypePointer Function 250(fvec2)
+             250:             TypeVector 249(float64_t) 2
+             251:             TypePointer Function 250(f64vec2)
              261:             TypeFloat 16
-             262:             TypeVector 261(float) 2
-             263:             TypePointer Function 262(fvec2)
+             262:             TypeVector 261(float16_t) 2
+             263:             TypePointer Function 262(f16vec2)
              273:             TypeInt 64 1
-             274:             TypeVector 273(int) 2
-             275:             TypePointer Function 274(ivec2)
+             274:             TypeVector 273(int64_t) 2
+             275:             TypePointer Function 274(i64vec2)
              287:             TypeInt 64 0
-             288:             TypeVector 287(int) 2
-             289:             TypePointer Function 288(ivec2)
-             316:     17(int) Constant 4294967295
-             317:  187(ivec2) ConstantComposite 316 316
-             326:   49(ivec3) ConstantComposite 202 202 202
+             288:             TypeVector 287(int64_t) 2
+             289:             TypePointer Function 288(i64vec2)
+             316: 17(int16_t) Constant 4294967295
+             317:187(i16vec2) ConstantComposite 316 316
+             326: 49(i16vec3) ConstantComposite 202 202 202
              368:   125(bool) ConstantTrue
              375:   125(bool) ConstantFalse
              376:  190(bvec2) ConstantComposite 375 375
              388:             TypeVector 125(bool) 3
              389:  388(bvec3) ConstantComposite 375 375 375
-             391:             TypeVector 261(float) 3
-             392:             TypePointer Function 391(fvec3)
-             395:             TypePointer Function 54(ivec3)
-    397(ResType):             TypeStruct 391(fvec3) 54(ivec3)
-             407:             TypePointer Function 261(float)
-             431:             TypePointer Function 273(int)
-             434:             TypeVector 17(int) 4
-             440:             TypePointer Function 287(int)
-             443:             TypeVector 14(int) 4
+             391:             TypeVector 261(float16_t) 3
+             392:             TypePointer Function 391(f16vec3)
+             395:             TypePointer Function 54(i16vec3)
+    397(ResType):             TypeStruct 391(f16vec3) 54(i16vec3)
+             407:             TypePointer Function 261(float16_t)
+             431:             TypePointer Function 273(int64_t)
+             434:             TypeVector 17(int16_t) 4
+             440:             TypePointer Function 287(int64_t)
+             443:             TypeVector 14(int16_t) 4
              449:             TypePointer Function 388(bvec3)
-      515(Block):             TypeStruct 54(ivec3) 14(int)
+      515(Block):             TypeStruct 54(i16vec3) 14(int16_t)
              516:             TypePointer Uniform 515(Block)
       517(block):    516(ptr) Variable Uniform
-             518:             TypePointer Input 49(ivec3)
+             518:             TypePointer Input 49(i16vec3)
       519(iu16v):    518(ptr) Variable Input
-             520:             TypePointer Input 17(int)
+             520:             TypePointer Input 17(int16_t)
        521(ii16):    520(ptr) Variable Input
-       522(si64):    273(int) SpecConstant 4294967286 4294967295
-       523(su64):    287(int) SpecConstant 20 0
+       522(si64):273(int64_t) SpecConstant 4294967286 4294967295
+       523(su64):287(int64_t) SpecConstant 20 0
          524(si):     28(int) SpecConstant 4294967291
          525(su):     18(int) SpecConstant 4
          526(sb):   125(bool) SpecConstantTrue
-       527(si16):     17(int) SpecConstant 4294967291
-       528(su16):     14(int) SpecConstant 4
+       527(si16): 17(int16_t) SpecConstant 4294967291
+       528(su16): 14(int16_t) SpecConstant 4
              529:   125(bool) SpecConstantOp 171 527(si16) 202
              530:   125(bool) SpecConstantOp 171 528(su16) 202
-             531:     17(int) SpecConstantOp 169 526(sb) 53 194
-             532:     14(int) SpecConstantOp 169 526(sb) 203 202
+             531: 17(int16_t) SpecConstantOp 169 526(sb) 53 194
+             532: 14(int16_t) SpecConstantOp 169 526(sb) 203 202
              533:     28(int) SpecConstantOp 114 527(si16)
              534:     28(int) SpecConstantOp 113 528(su16)
              535:     28(int) SpecConstantOp 128 534 128
-             536:     17(int) SpecConstantOp 114 524(si)
-             537:     17(int) SpecConstantOp 114 524(si)
-             538:     14(int) SpecConstantOp 128 537 202
+             536: 17(int16_t) SpecConstantOp 114 524(si)
+             537: 17(int16_t) SpecConstantOp 114 524(si)
+             538: 14(int16_t) SpecConstantOp 128 537 202
              539:     28(int) SpecConstantOp 114 527(si16)
              540:     18(int) SpecConstantOp 128 539 128
              541:     18(int) SpecConstantOp 113 528(su16)
-             542:     17(int) SpecConstantOp 113 525(su)
-             543:     17(int) SpecConstantOp 128 542 202
-             544:     14(int) SpecConstantOp 113 525(su)
-             545:    273(int) SpecConstantOp 114 527(si16)
-             546:    273(int) SpecConstantOp 113 528(su16)
-             547:    287(int) Constant 0 0
-             548:    273(int) SpecConstantOp 128 546 547
-             549:     17(int) SpecConstantOp 114 522(si64)
-             550:     17(int) SpecConstantOp 114 522(si64)
-             551:     14(int) SpecConstantOp 128 550 202
-             552:    273(int) SpecConstantOp 114 527(si16)
-             553:    287(int) SpecConstantOp 128 552 547
-             554:    287(int) SpecConstantOp 113 528(su16)
-             555:     17(int) SpecConstantOp 113 523(su64)
-             556:     17(int) SpecConstantOp 128 555 202
-             557:     14(int) SpecConstantOp 113 523(su64)
-             558:     14(int) SpecConstantOp 128 527(si16) 202
-             559:     17(int) SpecConstantOp 128 528(su16) 202
+             542: 17(int16_t) SpecConstantOp 113 525(su)
+             543: 17(int16_t) SpecConstantOp 128 542 202
+             544: 14(int16_t) SpecConstantOp 113 525(su)
+             545:273(int64_t) SpecConstantOp 114 527(si16)
+             546:273(int64_t) SpecConstantOp 113 528(su16)
+             547:287(int64_t) Constant 0 0
+             548:273(int64_t) SpecConstantOp 128 546 547
+             549: 17(int16_t) SpecConstantOp 114 522(si64)
+             550: 17(int16_t) SpecConstantOp 114 522(si64)
+             551: 14(int16_t) SpecConstantOp 128 550 202
+             552:273(int64_t) SpecConstantOp 114 527(si16)
+             553:287(int64_t) SpecConstantOp 128 552 547
+             554:287(int64_t) SpecConstantOp 113 528(su16)
+             555: 17(int16_t) SpecConstantOp 113 523(su64)
+             556: 17(int16_t) SpecConstantOp 128 555 202
+             557: 14(int16_t) SpecConstantOp 113 523(su64)
+             558: 14(int16_t) SpecConstantOp 128 527(si16) 202
+             559: 17(int16_t) SpecConstantOp 128 528(su16) 202
          4(main):           2 Function None 3
                5:             Label
              511:           2 FunctionCall 6(literal()
@@ -240,14 +240,14 @@ spv.int16.amd.frag
               32:     18(int) Load 31
                               Store 34(indexable) 24
               36:     35(ptr) AccessChain 34(indexable) 32
-              37:     17(int) Load 36
-              38:     14(int) Bitcast 37
+              37: 17(int16_t) Load 36
+              38: 14(int16_t) Bitcast 37
               42:     30(ptr) AccessChain 27 29
               43:     18(int) Load 42
                               Store 45(indexable) 41
               46:     15(ptr) AccessChain 45(indexable) 43
-              47:     14(int) Load 46
-              48:     14(int) IAdd 38 47
+              47: 14(int16_t) Load 46
+              48: 14(int16_t) IAdd 38 47
                               Store 16(u16) 48
                               Return
                               FunctionEnd
@@ -259,159 +259,159 @@ spv.int16.amd.frag
           127(b):    126(ptr) Variable Function
           148(u):    147(ptr) Variable Function
           159(i):    158(ptr) Variable Function
-              52:   49(ivec3) Load 51(u16v)
-              55:   54(ivec3) CompositeConstruct 53 53 53
-              56:   49(ivec3) IAdd 52 55
+              52: 49(i16vec3) Load 51(u16v)
+              55: 54(i16vec3) CompositeConstruct 53 53 53
+              56: 49(i16vec3) IAdd 52 55
                               Store 51(u16v) 56
-              58:     17(int) Load 57(i16)
-              59:     17(int) ISub 58 53
+              58: 17(int16_t) Load 57(i16)
+              59: 17(int16_t) ISub 58 53
                               Store 57(i16) 59
-              60:     17(int) Load 57(i16)
-              61:     17(int) IAdd 60 53
+              60: 17(int16_t) Load 57(i16)
+              61: 17(int16_t) IAdd 60 53
                               Store 57(i16) 61
-              62:   49(ivec3) Load 51(u16v)
-              63:   54(ivec3) CompositeConstruct 53 53 53
-              64:   49(ivec3) ISub 62 63
+              62: 49(i16vec3) Load 51(u16v)
+              63: 54(i16vec3) CompositeConstruct 53 53 53
+              64: 49(i16vec3) ISub 62 63
                               Store 51(u16v) 64
-              65:   49(ivec3) Load 51(u16v)
-              66:   49(ivec3) Not 65
+              65: 49(i16vec3) Load 51(u16v)
+              66: 49(i16vec3) Not 65
                               Store 51(u16v) 66
-              67:     17(int) Load 57(i16)
+              67: 17(int16_t) Load 57(i16)
                               Store 57(i16) 67
-              68:   49(ivec3) Load 51(u16v)
-              69:   49(ivec3) SNegate 68
+              68: 49(i16vec3) Load 51(u16v)
+              69: 49(i16vec3) SNegate 68
                               Store 51(u16v) 69
-              71:     17(int) Load 57(i16)
-              72:     14(int) Bitcast 71
-              73:     14(int) Load 70(u16)
-              74:     14(int) IAdd 73 72
+              71: 17(int16_t) Load 57(i16)
+              72: 14(int16_t) Bitcast 71
+              73: 14(int16_t) Load 70(u16)
+              74: 14(int16_t) IAdd 73 72
                               Store 70(u16) 74
-              75:   49(ivec3) Load 51(u16v)
-              76:   49(ivec3) Load 51(u16v)
-              77:   49(ivec3) ISub 76 75
+              75: 49(i16vec3) Load 51(u16v)
+              76: 49(i16vec3) Load 51(u16v)
+              77: 49(i16vec3) ISub 76 75
                               Store 51(u16v) 77
-              78:     17(int) Load 57(i16)
-              79:     17(int) Load 57(i16)
-              80:     17(int) IMul 79 78
+              78: 17(int16_t) Load 57(i16)
+              79: 17(int16_t) Load 57(i16)
+              80: 17(int16_t) IMul 79 78
                               Store 57(i16) 80
-              81:   49(ivec3) Load 51(u16v)
-              82:   49(ivec3) Load 51(u16v)
-              83:   49(ivec3) UDiv 82 81
+              81: 49(i16vec3) Load 51(u16v)
+              82: 49(i16vec3) Load 51(u16v)
+              83: 49(i16vec3) UDiv 82 81
                               Store 51(u16v) 83
-              84:     17(int) Load 57(i16)
-              85:     14(int) Bitcast 84
-              86:   49(ivec3) Load 51(u16v)
-              87:   49(ivec3) CompositeConstruct 85 85 85
-              88:   49(ivec3) UMod 86 87
+              84: 17(int16_t) Load 57(i16)
+              85: 14(int16_t) Bitcast 84
+              86: 49(i16vec3) Load 51(u16v)
+              87: 49(i16vec3) CompositeConstruct 85 85 85
+              88: 49(i16vec3) UMod 86 87
                               Store 51(u16v) 88
-              89:   49(ivec3) Load 51(u16v)
-              90:   49(ivec3) Load 51(u16v)
-              91:   49(ivec3) IAdd 89 90
+              89: 49(i16vec3) Load 51(u16v)
+              90: 49(i16vec3) Load 51(u16v)
+              91: 49(i16vec3) IAdd 89 90
                               Store 51(u16v) 91
-              92:     17(int) Load 57(i16)
-              93:     14(int) Bitcast 92
-              94:     14(int) Load 70(u16)
-              95:     14(int) ISub 93 94
+              92: 17(int16_t) Load 57(i16)
+              93: 14(int16_t) Bitcast 92
+              94: 14(int16_t) Load 70(u16)
+              95: 14(int16_t) ISub 93 94
                               Store 70(u16) 95
-              96:   49(ivec3) Load 51(u16v)
-              97:     17(int) Load 57(i16)
-              98:     14(int) Bitcast 97
-              99:   49(ivec3) CompositeConstruct 98 98 98
-             100:   49(ivec3) IMul 96 99
+              96: 49(i16vec3) Load 51(u16v)
+              97: 17(int16_t) Load 57(i16)
+              98: 14(int16_t) Bitcast 97
+              99: 49(i16vec3) CompositeConstruct 98 98 98
+             100: 49(i16vec3) IMul 96 99
                               Store 51(u16v) 100
-             101:     17(int) Load 57(i16)
-             102:     17(int) Load 57(i16)
-             103:     17(int) IMul 101 102
+             101: 17(int16_t) Load 57(i16)
+             102: 17(int16_t) Load 57(i16)
+             103: 17(int16_t) IMul 101 102
                               Store 57(i16) 103
-             104:     17(int) Load 57(i16)
-             105:     17(int) Load 57(i16)
-             106:     17(int) SMod 104 105
+             104: 17(int16_t) Load 57(i16)
+             105: 17(int16_t) Load 57(i16)
+             106: 17(int16_t) SMod 104 105
                               Store 57(i16) 106
-             107:     17(int) Load 57(i16)
-             108:   49(ivec3) Load 51(u16v)
-             109:   54(ivec3) CompositeConstruct 107 107 107
-             110:   49(ivec3) ShiftLeftLogical 108 109
+             107: 17(int16_t) Load 57(i16)
+             108: 49(i16vec3) Load 51(u16v)
+             109: 54(i16vec3) CompositeConstruct 107 107 107
+             110: 49(i16vec3) ShiftLeftLogical 108 109
                               Store 51(u16v) 110
              112:     15(ptr) AccessChain 51(u16v) 111
-             113:     14(int) Load 112
-             114:     17(int) Load 57(i16)
-             115:     17(int) ShiftRightArithmetic 114 113
+             113: 14(int16_t) Load 112
+             114: 17(int16_t) Load 57(i16)
+             115: 17(int16_t) ShiftRightArithmetic 114 113
                               Store 57(i16) 115
-             116:     17(int) Load 57(i16)
+             116: 17(int16_t) Load 57(i16)
              118:     15(ptr) AccessChain 51(u16v) 117
-             119:     14(int) Load 118
-             120:     17(int) ShiftLeftLogical 116 119
+             119: 14(int16_t) Load 118
+             120: 17(int16_t) ShiftLeftLogical 116 119
                               Store 57(i16) 120
-             121:   49(ivec3) Load 51(u16v)
-             122:     17(int) Load 57(i16)
-             123:   54(ivec3) CompositeConstruct 122 122 122
-             124:   49(ivec3) ShiftLeftLogical 121 123
+             121: 49(i16vec3) Load 51(u16v)
+             122: 17(int16_t) Load 57(i16)
+             123: 54(i16vec3) CompositeConstruct 122 122 122
+             124: 49(i16vec3) ShiftLeftLogical 121 123
                               Store 51(u16v) 124
              129:     15(ptr) AccessChain 51(u16v) 128
-             130:     14(int) Load 129
-             131:     17(int) Load 57(i16)
-             132:     14(int) Bitcast 131
+             130: 14(int16_t) Load 129
+             131: 17(int16_t) Load 57(i16)
+             132: 14(int16_t) Bitcast 131
              133:   125(bool) INotEqual 130 132
                               Store 127(b) 133
-             134:     17(int) Load 57(i16)
-             135:     14(int) Bitcast 134
+             134: 17(int16_t) Load 57(i16)
+             135: 14(int16_t) Bitcast 134
              136:     15(ptr) AccessChain 51(u16v) 128
-             137:     14(int) Load 136
+             137: 14(int16_t) Load 136
              138:   125(bool) IEqual 135 137
                               Store 127(b) 138
              139:     15(ptr) AccessChain 51(u16v) 128
-             140:     14(int) Load 139
+             140: 14(int16_t) Load 139
              141:     15(ptr) AccessChain 51(u16v) 111
-             142:     14(int) Load 141
+             142: 14(int16_t) Load 141
              143:   125(bool) UGreaterThan 140 142
                               Store 127(b) 143
-             144:     17(int) Load 57(i16)
+             144: 17(int16_t) Load 57(i16)
              145:     28(int) SConvert 144
              146:     18(int) Bitcast 145
              149:     18(int) Load 148(u)
              150:   125(bool) ULessThan 146 149
                               Store 127(b) 150
              151:     15(ptr) AccessChain 51(u16v) 111
-             152:     14(int) Load 151
+             152: 14(int16_t) Load 151
              153:     15(ptr) AccessChain 51(u16v) 128
-             154:     14(int) Load 153
+             154: 14(int16_t) Load 153
              155:   125(bool) UGreaterThanEqual 152 154
                               Store 127(b) 155
-             156:     17(int) Load 57(i16)
+             156: 17(int16_t) Load 57(i16)
              157:     28(int) SConvert 156
              160:     28(int) Load 159(i)
              161:   125(bool) SLessThanEqual 157 160
                               Store 127(b) 161
-             162:     17(int) Load 57(i16)
-             163:     14(int) Bitcast 162
-             164:   49(ivec3) Load 51(u16v)
-             165:   49(ivec3) CompositeConstruct 163 163 163
-             166:   49(ivec3) BitwiseOr 164 165
+             162: 17(int16_t) Load 57(i16)
+             163: 14(int16_t) Bitcast 162
+             164: 49(i16vec3) Load 51(u16v)
+             165: 49(i16vec3) CompositeConstruct 163 163 163
+             166: 49(i16vec3) BitwiseOr 164 165
                               Store 51(u16v) 166
-             167:     17(int) Load 57(i16)
-             168:     14(int) Bitcast 167
-             169:     14(int) Load 70(u16)
-             170:     14(int) BitwiseOr 168 169
+             167: 17(int16_t) Load 57(i16)
+             168: 14(int16_t) Bitcast 167
+             169: 14(int16_t) Load 70(u16)
+             170: 14(int16_t) BitwiseOr 168 169
                               Store 70(u16) 170
-             171:     17(int) Load 57(i16)
-             172:     17(int) Load 57(i16)
-             173:     17(int) BitwiseAnd 172 171
+             171: 17(int16_t) Load 57(i16)
+             172: 17(int16_t) Load 57(i16)
+             173: 17(int16_t) BitwiseAnd 172 171
                               Store 57(i16) 173
-             174:   49(ivec3) Load 51(u16v)
-             175:   49(ivec3) Load 51(u16v)
-             176:   49(ivec3) BitwiseAnd 174 175
+             174: 49(i16vec3) Load 51(u16v)
+             175: 49(i16vec3) Load 51(u16v)
+             176: 49(i16vec3) BitwiseAnd 174 175
                               Store 51(u16v) 176
-             177:     17(int) Load 57(i16)
-             178:     14(int) Bitcast 177
-             179:   49(ivec3) Load 51(u16v)
-             180:   49(ivec3) CompositeConstruct 178 178 178
-             181:   49(ivec3) BitwiseXor 179 180
+             177: 17(int16_t) Load 57(i16)
+             178: 14(int16_t) Bitcast 177
+             179: 49(i16vec3) Load 51(u16v)
+             180: 49(i16vec3) CompositeConstruct 178 178 178
+             181: 49(i16vec3) BitwiseXor 179 180
                               Store 51(u16v) 181
-             182:   49(ivec3) Load 51(u16v)
-             183:     17(int) Load 57(i16)
-             184:     14(int) Bitcast 183
-             185:   49(ivec3) CompositeConstruct 184 184 184
-             186:   49(ivec3) BitwiseXor 182 185
+             182: 49(i16vec3) Load 51(u16v)
+             183: 17(int16_t) Load 57(i16)
+             184: 14(int16_t) Bitcast 183
+             185: 49(i16vec3) CompositeConstruct 184 184 184
+             186: 49(i16vec3) BitwiseXor 182 185
                               Store 51(u16v) 186
                               Return
                               FunctionEnd
@@ -428,114 +428,114 @@ spv.int16.amd.frag
        276(i64v):    275(ptr) Variable Function
        290(u64v):    289(ptr) Variable Function
              193:  190(bvec2) Load 192(bv)
-             197:  187(ivec2) Select 193 196 195
+             197:187(i16vec2) Select 193 196 195
                               Store 189(i16v) 197
              201:  190(bvec2) Load 192(bv)
-             206:  198(ivec2) Select 201 205 204
+             206:198(i16vec2) Select 201 205 204
                               Store 200(u16v) 206
-             207:  187(ivec2) Load 189(i16v)
+             207:187(i16vec2) Load 189(i16v)
              208:  190(bvec2) INotEqual 207 204
                               Store 192(bv) 208
-             209:  198(ivec2) Load 200(u16v)
+             209:198(i16vec2) Load 200(u16v)
              210:  190(bvec2) INotEqual 209 204
                               Store 192(bv) 210
              214:  211(ivec2) Load 213(iv)
-             215:  187(ivec2) SConvert 214
+             215:187(i16vec2) SConvert 214
                               Store 189(i16v) 215
              216:  211(ivec2) Load 213(iv)
-             217:  187(ivec2) SConvert 216
-             218:  198(ivec2) Bitcast 217
+             217:187(i16vec2) SConvert 216
+             218:198(i16vec2) Bitcast 217
                               Store 200(u16v) 218
-             219:  187(ivec2) Load 189(i16v)
+             219:187(i16vec2) Load 189(i16v)
              220:  211(ivec2) SConvert 219
                               Store 213(iv) 220
-             221:  198(ivec2) Load 200(u16v)
+             221:198(i16vec2) Load 200(u16v)
              222:  211(ivec2) UConvert 221
              223:  211(ivec2) Bitcast 222
                               Store 213(iv) 223
              227:  224(ivec2) Load 226(uv)
-             228:  187(ivec2) UConvert 227
-             229:  187(ivec2) Bitcast 228
+             228:187(i16vec2) UConvert 227
+             229:187(i16vec2) Bitcast 228
                               Store 189(i16v) 229
              230:  224(ivec2) Load 226(uv)
-             231:  198(ivec2) UConvert 230
+             231:198(i16vec2) UConvert 230
                               Store 200(u16v) 231
-             232:  187(ivec2) Load 189(i16v)
+             232:187(i16vec2) Load 189(i16v)
              233:  211(ivec2) SConvert 232
              234:  224(ivec2) Bitcast 233
                               Store 226(uv) 234
-             235:  198(ivec2) Load 200(u16v)
+             235:198(i16vec2) Load 200(u16v)
              236:  224(ivec2) UConvert 235
                               Store 226(uv) 236
              241:  238(fvec2) Load 240(fv)
-             242:  187(ivec2) ConvertFToS 241
+             242:187(i16vec2) ConvertFToS 241
                               Store 189(i16v) 242
              243:  238(fvec2) Load 240(fv)
-             244:  198(ivec2) ConvertFToU 243
+             244:198(i16vec2) ConvertFToU 243
                               Store 200(u16v) 244
-             245:  187(ivec2) Load 189(i16v)
+             245:187(i16vec2) Load 189(i16v)
              246:  238(fvec2) ConvertSToF 245
                               Store 240(fv) 246
-             247:  198(ivec2) Load 200(u16v)
+             247:198(i16vec2) Load 200(u16v)
              248:  238(fvec2) ConvertUToF 247
                               Store 240(fv) 248
-             253:  250(fvec2) Load 252(dv)
-             254:  187(ivec2) ConvertFToS 253
+             253:250(f64vec2) Load 252(dv)
+             254:187(i16vec2) ConvertFToS 253
                               Store 189(i16v) 254
-             255:  250(fvec2) Load 252(dv)
-             256:  198(ivec2) ConvertFToU 255
+             255:250(f64vec2) Load 252(dv)
+             256:198(i16vec2) ConvertFToU 255
                               Store 200(u16v) 256
-             257:  187(ivec2) Load 189(i16v)
-             258:  250(fvec2) ConvertSToF 257
+             257:187(i16vec2) Load 189(i16v)
+             258:250(f64vec2) ConvertSToF 257
                               Store 252(dv) 258
-             259:  198(ivec2) Load 200(u16v)
-             260:  250(fvec2) ConvertUToF 259
+             259:198(i16vec2) Load 200(u16v)
+             260:250(f64vec2) ConvertUToF 259
                               Store 252(dv) 260
-             265:  262(fvec2) Load 264(f16v)
-             266:  187(ivec2) ConvertFToS 265
+             265:262(f16vec2) Load 264(f16v)
+             266:187(i16vec2) ConvertFToS 265
                               Store 189(i16v) 266
-             267:  262(fvec2) Load 264(f16v)
-             268:  198(ivec2) ConvertFToU 267
+             267:262(f16vec2) Load 264(f16v)
+             268:198(i16vec2) ConvertFToU 267
                               Store 200(u16v) 268
-             269:  187(ivec2) Load 189(i16v)
-             270:  262(fvec2) ConvertSToF 269
+             269:187(i16vec2) Load 189(i16v)
+             270:262(f16vec2) ConvertSToF 269
                               Store 264(f16v) 270
-             271:  198(ivec2) Load 200(u16v)
-             272:  262(fvec2) ConvertUToF 271
+             271:198(i16vec2) Load 200(u16v)
+             272:262(f16vec2) ConvertUToF 271
                               Store 264(f16v) 272
-             277:  274(ivec2) Load 276(i64v)
-             278:  187(ivec2) SConvert 277
+             277:274(i64vec2) Load 276(i64v)
+             278:187(i16vec2) SConvert 277
                               Store 189(i16v) 278
-             279:  274(ivec2) Load 276(i64v)
-             280:  187(ivec2) SConvert 279
-             281:  198(ivec2) Bitcast 280
+             279:274(i64vec2) Load 276(i64v)
+             280:187(i16vec2) SConvert 279
+             281:198(i16vec2) Bitcast 280
                               Store 200(u16v) 281
-             282:  187(ivec2) Load 189(i16v)
-             283:  274(ivec2) SConvert 282
+             282:187(i16vec2) Load 189(i16v)
+             283:274(i64vec2) SConvert 282
                               Store 276(i64v) 283
-             284:  198(ivec2) Load 200(u16v)
-             285:  274(ivec2) UConvert 284
-             286:  274(ivec2) Bitcast 285
+             284:198(i16vec2) Load 200(u16v)
+             285:274(i64vec2) UConvert 284
+             286:274(i64vec2) Bitcast 285
                               Store 276(i64v) 286
-             291:  288(ivec2) Load 290(u64v)
-             292:  187(ivec2) UConvert 291
-             293:  187(ivec2) Bitcast 292
+             291:288(i64vec2) Load 290(u64v)
+             292:187(i16vec2) UConvert 291
+             293:187(i16vec2) Bitcast 292
                               Store 189(i16v) 293
-             294:  288(ivec2) Load 290(u64v)
-             295:  198(ivec2) UConvert 294
+             294:288(i64vec2) Load 290(u64v)
+             295:198(i16vec2) UConvert 294
                               Store 200(u16v) 295
-             296:  187(ivec2) Load 189(i16v)
-             297:  274(ivec2) SConvert 296
-             298:  288(ivec2) Bitcast 297
+             296:187(i16vec2) Load 189(i16v)
+             297:274(i64vec2) SConvert 296
+             298:288(i64vec2) Bitcast 297
                               Store 290(u64v) 298
-             299:  198(ivec2) Load 200(u16v)
-             300:  288(ivec2) UConvert 299
+             299:198(i16vec2) Load 200(u16v)
+             300:288(i64vec2) UConvert 299
                               Store 290(u64v) 300
-             301:  198(ivec2) Load 200(u16v)
-             302:  187(ivec2) Bitcast 301
+             301:198(i16vec2) Load 200(u16v)
+             302:187(i16vec2) Bitcast 301
                               Store 189(i16v) 302
-             303:  187(ivec2) Load 189(i16v)
-             304:  198(ivec2) Bitcast 303
+             303:187(i16vec2) Load 189(i16v)
+             304:198(i16vec2) Bitcast 303
                               Store 200(u16v) 304
                               Return
                               FunctionEnd
@@ -552,224 +552,224 @@ spv.int16.amd.frag
     432(packi64):    431(ptr) Variable Function
     441(packu64):    440(ptr) Variable Function
          450(bv):    449(ptr) Variable Function
-             306:  187(ivec2) Load 305(i16v)
-             307:  187(ivec2) ExtInst 1(GLSL.std.450) 5(SAbs) 306
+             306:187(i16vec2) Load 305(i16v)
+             307:187(i16vec2) ExtInst 1(GLSL.std.450) 5(SAbs) 306
                               Store 305(i16v) 307
-             308:  187(ivec2) Load 305(i16v)
-             309:  187(ivec2) ExtInst 1(GLSL.std.450) 7(SSign) 308
+             308:187(i16vec2) Load 305(i16v)
+             309:187(i16vec2) ExtInst 1(GLSL.std.450) 7(SSign) 308
                               Store 305(i16v) 309
-             310:  187(ivec2) Load 305(i16v)
-             312:     17(int) Load 311(i16)
-             313:  187(ivec2) CompositeConstruct 312 312
-             314:  187(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 310 313
+             310:187(i16vec2) Load 305(i16v)
+             312: 17(int16_t) Load 311(i16)
+             313:187(i16vec2) CompositeConstruct 312 312
+             314:187(i16vec2) ExtInst 1(GLSL.std.450) 39(SMin) 310 313
                               Store 305(i16v) 314
-             315:  187(ivec2) Load 305(i16v)
-             318:  187(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 315 317
+             315:187(i16vec2) Load 305(i16v)
+             318:187(i16vec2) ExtInst 1(GLSL.std.450) 39(SMin) 315 317
                               Store 305(i16v) 318
-             320:   49(ivec3) Load 319(u16v)
-             322:     14(int) Load 321(u16)
-             323:   49(ivec3) CompositeConstruct 322 322 322
-             324:   49(ivec3) ExtInst 1(GLSL.std.450) 38(UMin) 320 323
+             320: 49(i16vec3) Load 319(u16v)
+             322: 14(int16_t) Load 321(u16)
+             323: 49(i16vec3) CompositeConstruct 322 322 322
+             324: 49(i16vec3) ExtInst 1(GLSL.std.450) 38(UMin) 320 323
                               Store 319(u16v) 324
-             325:   49(ivec3) Load 319(u16v)
-             327:   49(ivec3) ExtInst 1(GLSL.std.450) 38(UMin) 325 326
+             325: 49(i16vec3) Load 319(u16v)
+             327: 49(i16vec3) ExtInst 1(GLSL.std.450) 38(UMin) 325 326
                               Store 319(u16v) 327
-             328:  187(ivec2) Load 305(i16v)
-             329:     17(int) Load 311(i16)
-             330:  187(ivec2) CompositeConstruct 329 329
-             331:  187(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 328 330
+             328:187(i16vec2) Load 305(i16v)
+             329: 17(int16_t) Load 311(i16)
+             330:187(i16vec2) CompositeConstruct 329 329
+             331:187(i16vec2) ExtInst 1(GLSL.std.450) 42(SMax) 328 330
                               Store 305(i16v) 331
-             332:  187(ivec2) Load 305(i16v)
-             333:  187(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 332 317
+             332:187(i16vec2) Load 305(i16v)
+             333:187(i16vec2) ExtInst 1(GLSL.std.450) 42(SMax) 332 317
                               Store 305(i16v) 333
-             334:   49(ivec3) Load 319(u16v)
-             335:     14(int) Load 321(u16)
-             336:   49(ivec3) CompositeConstruct 335 335 335
-             337:   49(ivec3) ExtInst 1(GLSL.std.450) 41(UMax) 334 336
+             334: 49(i16vec3) Load 319(u16v)
+             335: 14(int16_t) Load 321(u16)
+             336: 49(i16vec3) CompositeConstruct 335 335 335
+             337: 49(i16vec3) ExtInst 1(GLSL.std.450) 41(UMax) 334 336
                               Store 319(u16v) 337
-             338:   49(ivec3) Load 319(u16v)
-             339:   49(ivec3) ExtInst 1(GLSL.std.450) 41(UMax) 338 326
+             338: 49(i16vec3) Load 319(u16v)
+             339: 49(i16vec3) ExtInst 1(GLSL.std.450) 41(UMax) 338 326
                               Store 319(u16v) 339
-             340:  187(ivec2) Load 305(i16v)
-             341:     17(int) Load 311(i16)
-             342:     17(int) SNegate 341
-             343:     17(int) Load 311(i16)
-             344:  187(ivec2) CompositeConstruct 342 342
-             345:  187(ivec2) CompositeConstruct 343 343
-             346:  187(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 340 344 345
+             340:187(i16vec2) Load 305(i16v)
+             341: 17(int16_t) Load 311(i16)
+             342: 17(int16_t) SNegate 341
+             343: 17(int16_t) Load 311(i16)
+             344:187(i16vec2) CompositeConstruct 342 342
+             345:187(i16vec2) CompositeConstruct 343 343
+             346:187(i16vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 340 344 345
                               Store 305(i16v) 346
-             347:  187(ivec2) Load 305(i16v)
-             348:  187(ivec2) Load 305(i16v)
-             349:  187(ivec2) SNegate 348
-             350:  187(ivec2) Load 305(i16v)
-             351:  187(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 347 349 350
+             347:187(i16vec2) Load 305(i16v)
+             348:187(i16vec2) Load 305(i16v)
+             349:187(i16vec2) SNegate 348
+             350:187(i16vec2) Load 305(i16v)
+             351:187(i16vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 347 349 350
                               Store 305(i16v) 351
-             352:   49(ivec3) Load 319(u16v)
-             353:     14(int) Load 321(u16)
-             354:     14(int) SNegate 353
-             355:     14(int) Load 321(u16)
-             356:   49(ivec3) CompositeConstruct 354 354 354
-             357:   49(ivec3) CompositeConstruct 355 355 355
-             358:   49(ivec3) ExtInst 1(GLSL.std.450) 44(UClamp) 352 356 357
+             352: 49(i16vec3) Load 319(u16v)
+             353: 14(int16_t) Load 321(u16)
+             354: 14(int16_t) SNegate 353
+             355: 14(int16_t) Load 321(u16)
+             356: 49(i16vec3) CompositeConstruct 354 354 354
+             357: 49(i16vec3) CompositeConstruct 355 355 355
+             358: 49(i16vec3) ExtInst 1(GLSL.std.450) 44(UClamp) 352 356 357
                               Store 319(u16v) 358
-             359:   49(ivec3) Load 319(u16v)
-             360:   49(ivec3) Load 319(u16v)
-             361:   49(ivec3) SNegate 360
-             362:   49(ivec3) Load 319(u16v)
-             363:   49(ivec3) ExtInst 1(GLSL.std.450) 44(UClamp) 359 361 362
+             359: 49(i16vec3) Load 319(u16v)
+             360: 49(i16vec3) Load 319(u16v)
+             361: 49(i16vec3) SNegate 360
+             362: 49(i16vec3) Load 319(u16v)
+             363: 49(i16vec3) ExtInst 1(GLSL.std.450) 44(UClamp) 359 361 362
                               Store 319(u16v) 363
              364:     35(ptr) AccessChain 305(i16v) 128
-             365:     17(int) Load 364
+             365: 17(int16_t) Load 364
              366:     35(ptr) AccessChain 305(i16v) 111
-             367:     17(int) Load 366
-             369:     17(int) Select 368 367 365
+             367: 17(int16_t) Load 366
+             369: 17(int16_t) Select 368 367 365
                               Store 311(i16) 369
-             370:     17(int) Load 311(i16)
-             371:  187(ivec2) CompositeConstruct 370 370
-             372:     17(int) Load 311(i16)
-             373:     17(int) SNegate 372
-             374:  187(ivec2) CompositeConstruct 373 373
-             377:  187(ivec2) Select 376 374 371
+             370: 17(int16_t) Load 311(i16)
+             371:187(i16vec2) CompositeConstruct 370 370
+             372: 17(int16_t) Load 311(i16)
+             373: 17(int16_t) SNegate 372
+             374:187(i16vec2) CompositeConstruct 373 373
+             377:187(i16vec2) Select 376 374 371
                               Store 305(i16v) 377
              378:     15(ptr) AccessChain 319(u16v) 128
-             379:     14(int) Load 378
+             379: 14(int16_t) Load 378
              380:     15(ptr) AccessChain 319(u16v) 111
-             381:     14(int) Load 380
-             382:     14(int) Select 368 381 379
+             381: 14(int16_t) Load 380
+             382: 14(int16_t) Select 368 381 379
                               Store 321(u16) 382
-             383:     14(int) Load 321(u16)
-             384:   49(ivec3) CompositeConstruct 383 383 383
-             385:     14(int) Load 321(u16)
-             386:     14(int) SNegate 385
-             387:   49(ivec3) CompositeConstruct 386 386 386
-             390:   49(ivec3) Select 389 387 384
+             383: 14(int16_t) Load 321(u16)
+             384: 49(i16vec3) CompositeConstruct 383 383 383
+             385: 14(int16_t) Load 321(u16)
+             386: 14(int16_t) SNegate 385
+             387: 49(i16vec3) CompositeConstruct 386 386 386
+             390: 49(i16vec3) Select 389 387 384
                               Store 319(u16v) 390
-             394:  391(fvec3) Load 393(f16v)
+             394:391(f16vec3) Load 393(f16v)
              398:397(ResType) ExtInst 1(GLSL.std.450) 52(FrexpStruct) 394
-             399:   54(ivec3) CompositeExtract 398 1
+             399: 54(i16vec3) CompositeExtract 398 1
                               Store 396(exp) 399
-             400:  391(fvec3) CompositeExtract 398 0
+             400:391(f16vec3) CompositeExtract 398 0
                               Store 393(f16v) 400
-             401:  391(fvec3) Load 393(f16v)
-             402:   54(ivec3) Load 396(exp)
-             403:  391(fvec3) ExtInst 1(GLSL.std.450) 53(Ldexp) 401 402
+             401:391(f16vec3) Load 393(f16v)
+             402: 54(i16vec3) Load 396(exp)
+             403:391(f16vec3) ExtInst 1(GLSL.std.450) 53(Ldexp) 401 402
                               Store 393(f16v) 403
-             404:  391(fvec3) Load 393(f16v)
-             405:  262(fvec2) VectorShuffle 404 404 0 1
-             406:  187(ivec2) Bitcast 405
+             404:391(f16vec3) Load 393(f16v)
+             405:262(f16vec2) VectorShuffle 404 404 0 1
+             406:187(i16vec2) Bitcast 405
                               Store 305(i16v) 406
              408:    407(ptr) AccessChain 393(f16v) 117
-             409:  261(float) Load 408
-             410:     14(int) Bitcast 409
+             409:261(float16_t) Load 408
+             410: 14(int16_t) Bitcast 409
              411:     15(ptr) AccessChain 319(u16v) 128
                               Store 411 410
-             412:  187(ivec2) Load 305(i16v)
-             413:  262(fvec2) Bitcast 412
-             414:  391(fvec3) Load 393(f16v)
-             415:  391(fvec3) VectorShuffle 414 413 3 4 2
+             412:187(i16vec2) Load 305(i16v)
+             413:262(f16vec2) Bitcast 412
+             414:391(f16vec3) Load 393(f16v)
+             415:391(f16vec3) VectorShuffle 414 413 3 4 2
                               Store 393(f16v) 415
-             416:   49(ivec3) Load 319(u16v)
-             417:  391(fvec3) Bitcast 416
+             416: 49(i16vec3) Load 319(u16v)
+             417:391(f16vec3) Bitcast 416
                               Store 393(f16v) 417
-             419:  187(ivec2) Load 305(i16v)
+             419:187(i16vec2) Load 305(i16v)
              420:     28(int) Bitcast 419
                               Store 418(packi) 420
              421:     28(int) Load 418(packi)
-             422:  187(ivec2) Bitcast 421
+             422:187(i16vec2) Bitcast 421
                               Store 305(i16v) 422
-             424:   49(ivec3) Load 319(u16v)
-             425:  198(ivec2) VectorShuffle 424 424 0 1
+             424: 49(i16vec3) Load 319(u16v)
+             425:198(i16vec2) VectorShuffle 424 424 0 1
              426:     18(int) Bitcast 425
                               Store 423(packu) 426
              427:     18(int) Load 423(packu)
-             428:  198(ivec2) Bitcast 427
-             429:   49(ivec3) Load 319(u16v)
-             430:   49(ivec3) VectorShuffle 429 428 3 4 2
+             428:198(i16vec2) Bitcast 427
+             429: 49(i16vec3) Load 319(u16v)
+             430: 49(i16vec3) VectorShuffle 429 428 3 4 2
                               Store 319(u16v) 430
-             433:     17(int) Load 311(i16)
-             435:  434(ivec4) CompositeConstruct 433 433 433 433
-             436:    273(int) Bitcast 435
+             433: 17(int16_t) Load 311(i16)
+             435:434(i16vec4) CompositeConstruct 433 433 433 433
+             436:273(int64_t) Bitcast 435
                               Store 432(packi64) 436
-             437:    273(int) Load 432(packi64)
-             438:  434(ivec4) Bitcast 437
-             439:  187(ivec2) VectorShuffle 438 438 0 1
+             437:273(int64_t) Load 432(packi64)
+             438:434(i16vec4) Bitcast 437
+             439:187(i16vec2) VectorShuffle 438 438 0 1
                               Store 305(i16v) 439
-             442:     14(int) Load 321(u16)
-             444:  443(ivec4) CompositeConstruct 442 442 442 442
-             445:    287(int) Bitcast 444
+             442: 14(int16_t) Load 321(u16)
+             444:443(i16vec4) CompositeConstruct 442 442 442 442
+             445:287(int64_t) Bitcast 444
                               Store 441(packu64) 445
-             446:    287(int) Load 441(packu64)
-             447:  443(ivec4) Bitcast 446
-             448:   49(ivec3) VectorShuffle 447 447 0 1 2
+             446:287(int64_t) Load 441(packu64)
+             447:443(i16vec4) Bitcast 446
+             448: 49(i16vec3) VectorShuffle 447 447 0 1 2
                               Store 319(u16v) 448
-             451:   49(ivec3) Load 319(u16v)
-             452:     14(int) Load 321(u16)
-             453:   49(ivec3) CompositeConstruct 452 452 452
+             451: 49(i16vec3) Load 319(u16v)
+             452: 14(int16_t) Load 321(u16)
+             453: 49(i16vec3) CompositeConstruct 452 452 452
              454:  388(bvec3) ULessThan 451 453
                               Store 450(bv) 454
-             455:  187(ivec2) Load 305(i16v)
-             456:     17(int) Load 311(i16)
-             457:  187(ivec2) CompositeConstruct 456 456
+             455:187(i16vec2) Load 305(i16v)
+             456: 17(int16_t) Load 311(i16)
+             457:187(i16vec2) CompositeConstruct 456 456
              458:  190(bvec2) SLessThan 455 457
              459:  388(bvec3) Load 450(bv)
              460:  388(bvec3) VectorShuffle 459 458 3 4 2
                               Store 450(bv) 460
-             461:   49(ivec3) Load 319(u16v)
-             462:     14(int) Load 321(u16)
-             463:   49(ivec3) CompositeConstruct 462 462 462
+             461: 49(i16vec3) Load 319(u16v)
+             462: 14(int16_t) Load 321(u16)
+             463: 49(i16vec3) CompositeConstruct 462 462 462
              464:  388(bvec3) ULessThanEqual 461 463
                               Store 450(bv) 464
-             465:  187(ivec2) Load 305(i16v)
-             466:     17(int) Load 311(i16)
-             467:  187(ivec2) CompositeConstruct 466 466
+             465:187(i16vec2) Load 305(i16v)
+             466: 17(int16_t) Load 311(i16)
+             467:187(i16vec2) CompositeConstruct 466 466
              468:  190(bvec2) SLessThanEqual 465 467
              469:  388(bvec3) Load 450(bv)
              470:  388(bvec3) VectorShuffle 469 468 3 4 2
                               Store 450(bv) 470
-             471:   49(ivec3) Load 319(u16v)
-             472:     14(int) Load 321(u16)
-             473:   49(ivec3) CompositeConstruct 472 472 472
+             471: 49(i16vec3) Load 319(u16v)
+             472: 14(int16_t) Load 321(u16)
+             473: 49(i16vec3) CompositeConstruct 472 472 472
              474:  388(bvec3) UGreaterThan 471 473
                               Store 450(bv) 474
-             475:  187(ivec2) Load 305(i16v)
-             476:     17(int) Load 311(i16)
-             477:  187(ivec2) CompositeConstruct 476 476
+             475:187(i16vec2) Load 305(i16v)
+             476: 17(int16_t) Load 311(i16)
+             477:187(i16vec2) CompositeConstruct 476 476
              478:  190(bvec2) SGreaterThan 475 477
              479:  388(bvec3) Load 450(bv)
              480:  388(bvec3) VectorShuffle 479 478 3 4 2
                               Store 450(bv) 480
-             481:   49(ivec3) Load 319(u16v)
-             482:     14(int) Load 321(u16)
-             483:   49(ivec3) CompositeConstruct 482 482 482
+             481: 49(i16vec3) Load 319(u16v)
+             482: 14(int16_t) Load 321(u16)
+             483: 49(i16vec3) CompositeConstruct 482 482 482
              484:  388(bvec3) UGreaterThanEqual 481 483
                               Store 450(bv) 484
-             485:  187(ivec2) Load 305(i16v)
-             486:     17(int) Load 311(i16)
-             487:  187(ivec2) CompositeConstruct 486 486
+             485:187(i16vec2) Load 305(i16v)
+             486: 17(int16_t) Load 311(i16)
+             487:187(i16vec2) CompositeConstruct 486 486
              488:  190(bvec2) SGreaterThanEqual 485 487
              489:  388(bvec3) Load 450(bv)
              490:  388(bvec3) VectorShuffle 489 488 3 4 2
                               Store 450(bv) 490
-             491:   49(ivec3) Load 319(u16v)
-             492:     14(int) Load 321(u16)
-             493:   49(ivec3) CompositeConstruct 492 492 492
+             491: 49(i16vec3) Load 319(u16v)
+             492: 14(int16_t) Load 321(u16)
+             493: 49(i16vec3) CompositeConstruct 492 492 492
              494:  388(bvec3) IEqual 491 493
                               Store 450(bv) 494
-             495:  187(ivec2) Load 305(i16v)
-             496:     17(int) Load 311(i16)
-             497:  187(ivec2) CompositeConstruct 496 496
+             495:187(i16vec2) Load 305(i16v)
+             496: 17(int16_t) Load 311(i16)
+             497:187(i16vec2) CompositeConstruct 496 496
              498:  190(bvec2) IEqual 495 497
              499:  388(bvec3) Load 450(bv)
              500:  388(bvec3) VectorShuffle 499 498 3 4 2
                               Store 450(bv) 500
-             501:   49(ivec3) Load 319(u16v)
-             502:     14(int) Load 321(u16)
-             503:   49(ivec3) CompositeConstruct 502 502 502
+             501: 49(i16vec3) Load 319(u16v)
+             502: 14(int16_t) Load 321(u16)
+             503: 49(i16vec3) CompositeConstruct 502 502 502
              504:  388(bvec3) INotEqual 501 503
                               Store 450(bv) 504
-             505:  187(ivec2) Load 305(i16v)
-             506:     17(int) Load 311(i16)
-             507:  187(ivec2) CompositeConstruct 506 506
+             505:187(i16vec2) Load 305(i16v)
+             506: 17(int16_t) Load 311(i16)
+             507:187(i16vec2) CompositeConstruct 506 506
              508:  190(bvec2) INotEqual 505 507
              509:  388(bvec3) Load 450(bv)
              510:  388(bvec3) VectorShuffle 509 508 3 4 2

3rdparty/glslang/Test/baseResults/spv.int16.frag.out

@@ -100,13 +100,13 @@ spv.int16.frag
                2:             TypeVoid
                3:             TypeFunction 2
               14:             TypeInt 16 1
-              15:             TypePointer Function 14(int)
+              15:             TypePointer Function 14(int16_t)
               17:             TypeInt 32 0
               18:     17(int) Constant 3
-              19:             TypeArray 14(int) 18
-              20:     14(int) Constant 4294962927
-              21:     14(int) Constant 4294967295
-              22:     14(int) Constant 16384
+              19:             TypeArray 14(int16_t) 18
+              20: 14(int16_t) Constant 4294962927
+              21: 14(int16_t) Constant 4294967295
+              22: 14(int16_t) Constant 16384
               23:          19 ConstantComposite 20 21 22
     24(Uniforms):             TypeStruct 17(int)
               25:             TypePointer Uniform 24(Uniforms)
@@ -116,83 +116,83 @@ spv.int16.frag
               29:             TypePointer Uniform 17(int)
               32:             TypePointer Function 19
               36:             TypeInt 16 0
-              37:             TypePointer Function 36(int)
-              39:             TypeArray 36(int) 18
-              40:     36(int) Constant 65535
-              41:     36(int) Constant 32767
+              37:             TypePointer Function 36(int16_t)
+              39:             TypeArray 36(int16_t) 18
+              40: 36(int16_t) Constant 65535
+              41: 36(int16_t) Constant 32767
               42:          39 ConstantComposite 40 40 41
               45:             TypePointer Function 39
               49:             TypeVector 27(int) 2
               50:             TypePointer Function 49(ivec2)
-              52:             TypeVector 14(int) 2
-              53:             TypePointer Function 52(ivec2)
-              57:             TypeVector 36(int) 2
-              58:             TypePointer Function 57(ivec2)
+              52:             TypeVector 14(int16_t) 2
+              53:             TypePointer Function 52(i16vec2)
+              57:             TypeVector 36(int16_t) 2
+              58:             TypePointer Function 57(i16vec2)
               65:             TypeVector 17(int) 2
               66:             TypePointer Function 65(ivec2)
               71:             TypeInt 64 1
-              72:             TypeVector 71(int) 2
-              73:             TypePointer Function 72(ivec2)
+              72:             TypeVector 71(int64_t) 2
+              73:             TypePointer Function 72(i64vec2)
               77:             TypeInt 64 0
-              78:             TypeVector 77(int) 2
-              79:             TypePointer Function 78(ivec2)
+              78:             TypeVector 77(int64_t) 2
+              79:             TypePointer Function 78(i64vec2)
               91:             TypeFloat 16
-              92:             TypeVector 91(float) 2
-              93:             TypePointer Function 92(fvec2)
+              92:             TypeVector 91(float16_t) 2
+              93:             TypePointer Function 92(f16vec2)
               97:             TypeFloat 32
               98:             TypeVector 97(float) 2
               99:             TypePointer Function 98(fvec2)
              103:             TypeFloat 64
-             104:             TypeVector 103(float) 2
-             105:             TypePointer Function 104(fvec2)
+             104:             TypeVector 103(float64_t) 2
+             105:             TypePointer Function 104(f64vec2)
              151:             TypeInt 8 1
-             152:             TypeVector 151(int) 2
-             153:             TypePointer Function 152(ivec2)
+             152:             TypeVector 151(int8_t) 2
+             153:             TypePointer Function 152(i8vec2)
              160:             TypeInt 8 0
-             161:             TypeVector 160(int) 2
-             162:             TypePointer Function 161(ivec2)
+             161:             TypeVector 160(int8_t) 2
+             162:             TypePointer Function 161(i8vec2)
              173:             TypeBool
              174:             TypeVector 173(bool) 2
              175:             TypePointer Function 174(bvec2)
-             178:     14(int) Constant 0
-             179:     14(int) Constant 1
-             180:   52(ivec2) ConstantComposite 178 178
-             181:   52(ivec2) ConstantComposite 179 179
-             184:     36(int) Constant 0
-             185:     36(int) Constant 1
-             186:   57(ivec2) ConstantComposite 184 184
-             187:   57(ivec2) ConstantComposite 185 185
-             193:             TypeVector 36(int) 3
-             194:             TypePointer Function 193(ivec3)
-             197:             TypeVector 14(int) 3
+             178: 14(int16_t) Constant 0
+             179: 14(int16_t) Constant 1
+             180: 52(i16vec2) ConstantComposite 178 178
+             181: 52(i16vec2) ConstantComposite 179 179
+             184: 36(int16_t) Constant 0
+             185: 36(int16_t) Constant 1
+             186: 57(i16vec2) ConstantComposite 184 184
+             187: 57(i16vec2) ConstantComposite 185 185
+             193:             TypeVector 36(int16_t) 3
+             194:             TypePointer Function 193(i16vec3)
+             197:             TypeVector 14(int16_t) 3
              219:             TypePointer Function 27(int)
              225:             TypeVector 17(int) 3
              226:             TypePointer Function 225(ivec3)
-             242:             TypePointer Function 71(int)
+             242:             TypePointer Function 71(int64_t)
              264:     17(int) Constant 1
              270:     17(int) Constant 2
              276:             TypeVector 27(int) 3
              280:             TypePointer Function 173(bool)
              282:     17(int) Constant 0
              296:             TypePointer Function 17(int)
-             354:   52(ivec2) ConstantComposite 21 21
-             363:  193(ivec3) ConstantComposite 184 184 184
+             354: 52(i16vec2) ConstantComposite 21 21
+             363:193(i16vec3) ConstantComposite 184 184 184
              405:   173(bool) ConstantTrue
              412:   173(bool) ConstantFalse
              413:  174(bvec2) ConstantComposite 412 412
              425:             TypeVector 173(bool) 3
              426:  425(bvec3) ConstantComposite 412 412 412
-             432:             TypeVector 14(int) 4
-             433:             TypePointer Function 432(ivec4)
-             441:             TypePointer Function 77(int)
-             443:             TypeVector 36(int) 4
-             444:             TypePointer Function 443(ivec4)
+             432:             TypeVector 14(int16_t) 4
+             433:             TypePointer Function 432(i16vec4)
+             441:             TypePointer Function 77(int64_t)
+             443:             TypeVector 36(int16_t) 4
+             444:             TypePointer Function 443(i16vec4)
              456:             TypePointer Function 425(bvec3)
-      518(Block):             TypeStruct 14(int) 52(ivec2) 197(ivec3) 432(ivec4) 36(int) 57(ivec2) 193(ivec3) 443(ivec4)
+      518(Block):             TypeStruct 14(int16_t) 52(i16vec2) 197(i16vec3) 432(i16vec4) 36(int16_t) 57(i16vec2) 193(i16vec3) 443(i16vec4)
              519:             TypePointer Uniform 518(Block)
       520(block):    519(ptr) Variable Uniform
-       521(si16):     14(int) SpecConstant 4294967286
-       522(su16):     36(int) SpecConstant 20
+       521(si16): 14(int16_t) SpecConstant 4294967286
+       522(su16): 36(int16_t) SpecConstant 20
          4(main):           2 Function None 3
                5:             Label
                               Return
@@ -207,13 +207,13 @@ spv.int16.frag
               31:     17(int) Load 30
                               Store 33(indexable) 23
               34:     15(ptr) AccessChain 33(indexable) 31
-              35:     14(int) Load 34
+              35: 14(int16_t) Load 34
                               Store 16(i16) 35
               43:     29(ptr) AccessChain 26 28
               44:     17(int) Load 43
                               Store 46(indexable) 42
               47:     37(ptr) AccessChain 46(indexable) 44
-              48:     36(int) Load 47
+              48: 36(int16_t) Load 47
                               Store 38(u16) 48
                               Return
                               FunctionEnd
@@ -231,135 +231,135 @@ spv.int16.frag
         154(i8v):    153(ptr) Variable Function
         163(u8v):    162(ptr) Variable Function
          176(bv):    175(ptr) Variable Function
-              55:   52(ivec2) Load 54(i16v)
+              55: 52(i16vec2) Load 54(i16v)
               56:   49(ivec2) SConvert 55
                               Store 51(i32v) 56
-              60:   57(ivec2) Load 59(u16v)
+              60: 57(i16vec2) Load 59(u16v)
               61:   49(ivec2) UConvert 60
               62:   49(ivec2) Bitcast 61
                               Store 51(i32v) 62
-              63:   52(ivec2) Load 54(i16v)
-              64:   57(ivec2) Bitcast 63
+              63: 52(i16vec2) Load 54(i16v)
+              64: 57(i16vec2) Bitcast 63
                               Store 59(u16v) 64
-              68:   52(ivec2) Load 54(i16v)
+              68: 52(i16vec2) Load 54(i16v)
               69:   49(ivec2) SConvert 68
               70:   65(ivec2) Bitcast 69
                               Store 67(u32v) 70
-              75:   52(ivec2) Load 54(i16v)
-              76:   72(ivec2) SConvert 75
+              75: 52(i16vec2) Load 54(i16v)
+              76: 72(i64vec2) SConvert 75
                               Store 74(i64v) 76
-              81:   52(ivec2) Load 54(i16v)
-              82:   72(ivec2) SConvert 81
-              83:   78(ivec2) Bitcast 82
+              81: 52(i16vec2) Load 54(i16v)
+              82: 72(i64vec2) SConvert 81
+              83: 78(i64vec2) Bitcast 82
                               Store 80(u64v) 83
-              84:   57(ivec2) Load 59(u16v)
+              84: 57(i16vec2) Load 59(u16v)
               85:   65(ivec2) UConvert 84
                               Store 67(u32v) 85
-              86:   57(ivec2) Load 59(u16v)
-              87:   72(ivec2) UConvert 86
-              88:   72(ivec2) Bitcast 87
+              86: 57(i16vec2) Load 59(u16v)
+              87: 72(i64vec2) UConvert 86
+              88: 72(i64vec2) Bitcast 87
                               Store 74(i64v) 88
-              89:   57(ivec2) Load 59(u16v)
-              90:   78(ivec2) UConvert 89
+              89: 57(i16vec2) Load 59(u16v)
+              90: 78(i64vec2) UConvert 89
                               Store 80(u64v) 90
-              95:   52(ivec2) Load 54(i16v)
-              96:   92(fvec2) ConvertSToF 95
+              95: 52(i16vec2) Load 54(i16v)
+              96: 92(f16vec2) ConvertSToF 95
                               Store 94(f16v) 96
-             101:   52(ivec2) Load 54(i16v)
+             101: 52(i16vec2) Load 54(i16v)
              102:   98(fvec2) ConvertSToF 101
                               Store 100(f32v) 102
-             107:   52(ivec2) Load 54(i16v)
-             108:  104(fvec2) ConvertSToF 107
+             107: 52(i16vec2) Load 54(i16v)
+             108:104(f64vec2) ConvertSToF 107
                               Store 106(f64v) 108
-             109:   57(ivec2) Load 59(u16v)
-             110:   92(fvec2) ConvertUToF 109
+             109: 57(i16vec2) Load 59(u16v)
+             110: 92(f16vec2) ConvertUToF 109
                               Store 94(f16v) 110
-             111:   57(ivec2) Load 59(u16v)
+             111: 57(i16vec2) Load 59(u16v)
              112:   98(fvec2) ConvertUToF 111
                               Store 100(f32v) 112
-             113:   57(ivec2) Load 59(u16v)
-             114:  104(fvec2) ConvertUToF 113
+             113: 57(i16vec2) Load 59(u16v)
+             114:104(f64vec2) ConvertUToF 113
                               Store 106(f64v) 114
-             115:   52(ivec2) Load 54(i16v)
+             115: 52(i16vec2) Load 54(i16v)
              116:   49(ivec2) SConvert 115
                               Store 51(i32v) 116
-             117:   57(ivec2) Load 59(u16v)
+             117: 57(i16vec2) Load 59(u16v)
              118:   49(ivec2) UConvert 117
              119:   49(ivec2) Bitcast 118
                               Store 51(i32v) 119
-             120:   52(ivec2) Load 54(i16v)
-             121:   57(ivec2) Bitcast 120
+             120: 52(i16vec2) Load 54(i16v)
+             121: 57(i16vec2) Bitcast 120
                               Store 59(u16v) 121
-             122:   52(ivec2) Load 54(i16v)
+             122: 52(i16vec2) Load 54(i16v)
              123:   49(ivec2) SConvert 122
              124:   65(ivec2) Bitcast 123
                               Store 67(u32v) 124
-             125:   52(ivec2) Load 54(i16v)
-             126:   72(ivec2) SConvert 125
+             125: 52(i16vec2) Load 54(i16v)
+             126: 72(i64vec2) SConvert 125
                               Store 74(i64v) 126
-             127:   52(ivec2) Load 54(i16v)
-             128:   72(ivec2) SConvert 127
-             129:   78(ivec2) Bitcast 128
+             127: 52(i16vec2) Load 54(i16v)
+             128: 72(i64vec2) SConvert 127
+             129: 78(i64vec2) Bitcast 128
                               Store 80(u64v) 129
-             130:   57(ivec2) Load 59(u16v)
+             130: 57(i16vec2) Load 59(u16v)
              131:   65(ivec2) UConvert 130
                               Store 67(u32v) 131
-             132:   57(ivec2) Load 59(u16v)
-             133:   72(ivec2) UConvert 132
-             134:   72(ivec2) Bitcast 133
+             132: 57(i16vec2) Load 59(u16v)
+             133: 72(i64vec2) UConvert 132
+             134: 72(i64vec2) Bitcast 133
                               Store 74(i64v) 134
-             135:   57(ivec2) Load 59(u16v)
-             136:   72(ivec2) UConvert 135
-             137:   72(ivec2) Bitcast 136
-             138:   78(ivec2) Bitcast 137
+             135: 57(i16vec2) Load 59(u16v)
+             136: 72(i64vec2) UConvert 135
+             137: 72(i64vec2) Bitcast 136
+             138: 78(i64vec2) Bitcast 137
                               Store 80(u64v) 138
-             139:   52(ivec2) Load 54(i16v)
-             140:   92(fvec2) ConvertSToF 139
+             139: 52(i16vec2) Load 54(i16v)
+             140: 92(f16vec2) ConvertSToF 139
                               Store 94(f16v) 140
-             141:   52(ivec2) Load 54(i16v)
+             141: 52(i16vec2) Load 54(i16v)
              142:   98(fvec2) ConvertSToF 141
                               Store 100(f32v) 142
-             143:   52(ivec2) Load 54(i16v)
-             144:  104(fvec2) ConvertSToF 143
+             143: 52(i16vec2) Load 54(i16v)
+             144:104(f64vec2) ConvertSToF 143
                               Store 106(f64v) 144
-             145:   57(ivec2) Load 59(u16v)
-             146:   92(fvec2) ConvertUToF 145
+             145: 57(i16vec2) Load 59(u16v)
+             146: 92(f16vec2) ConvertUToF 145
                               Store 94(f16v) 146
-             147:   57(ivec2) Load 59(u16v)
+             147: 57(i16vec2) Load 59(u16v)
              148:   98(fvec2) ConvertUToF 147
                               Store 100(f32v) 148
-             149:   57(ivec2) Load 59(u16v)
-             150:  104(fvec2) ConvertUToF 149
+             149: 57(i16vec2) Load 59(u16v)
+             150:104(f64vec2) ConvertUToF 149
                               Store 106(f64v) 150
-             155:   52(ivec2) Load 54(i16v)
-             156:  152(ivec2) SConvert 155
+             155: 52(i16vec2) Load 54(i16v)
+             156: 152(i8vec2) SConvert 155
                               Store 154(i8v) 156
-             157:   57(ivec2) Load 59(u16v)
-             158:  152(ivec2) UConvert 157
-             159:  152(ivec2) Bitcast 158
+             157: 57(i16vec2) Load 59(u16v)
+             158: 152(i8vec2) UConvert 157
+             159: 152(i8vec2) Bitcast 158
                               Store 154(i8v) 159
-             164:   52(ivec2) Load 54(i16v)
-             165:  152(ivec2) SConvert 164
-             166:  161(ivec2) Bitcast 165
+             164: 52(i16vec2) Load 54(i16v)
+             165: 152(i8vec2) SConvert 164
+             166: 161(i8vec2) Bitcast 165
                               Store 163(u8v) 166
-             167:   57(ivec2) Load 59(u16v)
-             168:  161(ivec2) UConvert 167
+             167: 57(i16vec2) Load 59(u16v)
+             168: 161(i8vec2) UConvert 167
                               Store 163(u8v) 168
-             169:   57(ivec2) Load 59(u16v)
-             170:  161(ivec2) UConvert 169
-             171:   52(ivec2) UConvert 170
-             172:   52(ivec2) Bitcast 171
+             169: 57(i16vec2) Load 59(u16v)
+             170: 161(i8vec2) UConvert 169
+             171: 52(i16vec2) UConvert 170
+             172: 52(i16vec2) Bitcast 171
                               Store 54(i16v) 172
              177:  174(bvec2) Load 176(bv)
-             182:   52(ivec2) Select 177 181 180
+             182: 52(i16vec2) Select 177 181 180
                               Store 54(i16v) 182
              183:  174(bvec2) Load 176(bv)
-             188:   57(ivec2) Select 183 187 186
+             188: 57(i16vec2) Select 183 187 186
                               Store 59(u16v) 188
-             189:   52(ivec2) Load 54(i16v)
+             189: 52(i16vec2) Load 54(i16v)
              190:  174(bvec2) INotEqual 189 186
                               Store 176(bv) 190
-             191:   57(ivec2) Load 59(u16v)
+             191: 57(i16vec2) Load 59(u16v)
              192:  174(bvec2) INotEqual 191 186
                               Store 176(bv) 192
                               Return
@@ -372,169 +372,169 @@ spv.int16.frag
          227(uv):    226(ptr) Variable Function
         243(i64):    242(ptr) Variable Function
           281(b):    280(ptr) Variable Function
-             196:  193(ivec3) Load 195(u16v)
-             198:  197(ivec3) CompositeConstruct 179 179 179
-             199:  193(ivec3) IAdd 196 198
+             196:193(i16vec3) Load 195(u16v)
+             198:197(i16vec3) CompositeConstruct 179 179 179
+             199:193(i16vec3) IAdd 196 198
                               Store 195(u16v) 199
-             201:     14(int) Load 200(i16)
-             202:     14(int) ISub 201 179
+             201: 14(int16_t) Load 200(i16)
+             202: 14(int16_t) ISub 201 179
                               Store 200(i16) 202
-             203:     14(int) Load 200(i16)
-             204:     14(int) IAdd 203 179
+             203: 14(int16_t) Load 200(i16)
+             204: 14(int16_t) IAdd 203 179
                               Store 200(i16) 204
-             205:  193(ivec3) Load 195(u16v)
-             206:  197(ivec3) CompositeConstruct 179 179 179
-             207:  193(ivec3) ISub 205 206
+             205:193(i16vec3) Load 195(u16v)
+             206:197(i16vec3) CompositeConstruct 179 179 179
+             207:193(i16vec3) ISub 205 206
                               Store 195(u16v) 207
-             208:  193(ivec3) Load 195(u16v)
-             209:  193(ivec3) Not 208
+             208:193(i16vec3) Load 195(u16v)
+             209:193(i16vec3) Not 208
                               Store 195(u16v) 209
-             210:     14(int) Load 200(i16)
+             210: 14(int16_t) Load 200(i16)
                               Store 200(i16) 210
-             211:  193(ivec3) Load 195(u16v)
-             212:  193(ivec3) SNegate 211
+             211:193(i16vec3) Load 195(u16v)
+             212:193(i16vec3) SNegate 211
                               Store 195(u16v) 212
-             213:     14(int) Load 200(i16)
-             214:     14(int) Load 200(i16)
-             215:     14(int) IAdd 214 213
+             213: 14(int16_t) Load 200(i16)
+             214: 14(int16_t) Load 200(i16)
+             215: 14(int16_t) IAdd 214 213
                               Store 200(i16) 215
-             216:  193(ivec3) Load 195(u16v)
-             217:  193(ivec3) Load 195(u16v)
-             218:  193(ivec3) ISub 217 216
+             216:193(i16vec3) Load 195(u16v)
+             217:193(i16vec3) Load 195(u16v)
+             218:193(i16vec3) ISub 217 216
                               Store 195(u16v) 218
-             221:     14(int) Load 200(i16)
+             221: 14(int16_t) Load 200(i16)
              222:     27(int) SConvert 221
              223:     27(int) Load 220(i)
              224:     27(int) IMul 223 222
                               Store 220(i) 224
-             228:  193(ivec3) Load 195(u16v)
+             228:193(i16vec3) Load 195(u16v)
              229:  225(ivec3) UConvert 228
              230:  225(ivec3) Load 227(uv)
              231:  225(ivec3) UDiv 230 229
                               Store 227(uv) 231
-             232:     14(int) Load 200(i16)
+             232: 14(int16_t) Load 200(i16)
              233:     27(int) SConvert 232
              234:     17(int) Bitcast 233
              235:  225(ivec3) Load 227(uv)
              236:  225(ivec3) CompositeConstruct 234 234 234
              237:  225(ivec3) UMod 235 236
                               Store 227(uv) 237
-             238:  193(ivec3) Load 195(u16v)
+             238:193(i16vec3) Load 195(u16v)
              239:  225(ivec3) UConvert 238
              240:  225(ivec3) Load 227(uv)
              241:  225(ivec3) IAdd 239 240
                               Store 227(uv) 241
-             244:     14(int) Load 200(i16)
-             245:     71(int) SConvert 244
-             246:     71(int) Load 243(i64)
-             247:     71(int) ISub 245 246
+             244: 14(int16_t) Load 200(i16)
+             245: 71(int64_t) SConvert 244
+             246: 71(int64_t) Load 243(i64)
+             247: 71(int64_t) ISub 245 246
                               Store 243(i64) 247
-             248:  193(ivec3) Load 195(u16v)
+             248:193(i16vec3) Load 195(u16v)
              249:  225(ivec3) UConvert 248
              250:  225(ivec3) Load 227(uv)
              251:  225(ivec3) IMul 249 250
                               Store 227(uv) 251
-             252:     14(int) Load 200(i16)
-             253:     71(int) SConvert 252
-             254:     71(int) Load 243(i64)
-             255:     71(int) IMul 253 254
+             252: 14(int16_t) Load 200(i16)
+             253: 71(int64_t) SConvert 252
+             254: 71(int64_t) Load 243(i64)
+             255: 71(int64_t) IMul 253 254
                               Store 243(i64) 255
-             256:     14(int) Load 200(i16)
+             256: 14(int16_t) Load 200(i16)
              257:     27(int) SConvert 256
              258:     27(int) Load 220(i)
              259:     27(int) SMod 257 258
                               Store 220(i) 259
-             260:     14(int) Load 200(i16)
-             261:  193(ivec3) Load 195(u16v)
-             262:  197(ivec3) CompositeConstruct 260 260 260
-             263:  193(ivec3) ShiftLeftLogical 261 262
+             260: 14(int16_t) Load 200(i16)
+             261:193(i16vec3) Load 195(u16v)
+             262:197(i16vec3) CompositeConstruct 260 260 260
+             263:193(i16vec3) ShiftLeftLogical 261 262
                               Store 195(u16v) 263
              265:     37(ptr) AccessChain 195(u16v) 264
-             266:     36(int) Load 265
-             267:     14(int) Load 200(i16)
-             268:     14(int) ShiftRightArithmetic 267 266
+             266: 36(int16_t) Load 265
+             267: 14(int16_t) Load 200(i16)
+             268: 14(int16_t) ShiftRightArithmetic 267 266
                               Store 200(i16) 268
-             269:     14(int) Load 200(i16)
+             269: 14(int16_t) Load 200(i16)
              271:     37(ptr) AccessChain 195(u16v) 270
-             272:     36(int) Load 271
-             273:     14(int) ShiftLeftLogical 269 272
+             272: 36(int16_t) Load 271
+             273: 14(int16_t) ShiftLeftLogical 269 272
                               Store 200(i16) 273
-             274:  193(ivec3) Load 195(u16v)
+             274:193(i16vec3) Load 195(u16v)
              275:     27(int) Load 220(i)
              277:  276(ivec3) CompositeConstruct 275 275 275
-             278:  193(ivec3) ShiftLeftLogical 274 277
+             278:193(i16vec3) ShiftLeftLogical 274 277
              279:  225(ivec3) UConvert 278
                               Store 227(uv) 279
              283:     37(ptr) AccessChain 195(u16v) 282
-             284:     36(int) Load 283
-             285:     14(int) Load 200(i16)
-             286:     36(int) Bitcast 285
+             284: 36(int16_t) Load 283
+             285: 14(int16_t) Load 200(i16)
+             286: 36(int16_t) Bitcast 285
              287:   173(bool) INotEqual 284 286
                               Store 281(b) 287
-             288:     14(int) Load 200(i16)
-             289:     36(int) Bitcast 288
+             288: 14(int16_t) Load 200(i16)
+             289: 36(int16_t) Bitcast 288
              290:     37(ptr) AccessChain 195(u16v) 282
-             291:     36(int) Load 290
+             291: 36(int16_t) Load 290
              292:   173(bool) IEqual 289 291
                               Store 281(b) 292
              293:     37(ptr) AccessChain 195(u16v) 282
-             294:     36(int) Load 293
+             294: 36(int16_t) Load 293
              295:     17(int) UConvert 294
              297:    296(ptr) AccessChain 227(uv) 264
              298:     17(int) Load 297
              299:   173(bool) UGreaterThan 295 298
                               Store 281(b) 299
-             300:     14(int) Load 200(i16)
+             300: 14(int16_t) Load 200(i16)
              301:     27(int) SConvert 300
              302:     27(int) Load 220(i)
              303:   173(bool) SLessThan 301 302
                               Store 281(b) 303
              304:     37(ptr) AccessChain 195(u16v) 264
-             305:     36(int) Load 304
+             305: 36(int16_t) Load 304
              306:     17(int) UConvert 305
              307:    296(ptr) AccessChain 227(uv) 282
              308:     17(int) Load 307
              309:   173(bool) UGreaterThanEqual 306 308
                               Store 281(b) 309
-             310:     14(int) Load 200(i16)
+             310: 14(int16_t) Load 200(i16)
              311:     27(int) SConvert 310
              312:     27(int) Load 220(i)
              313:   173(bool) SLessThanEqual 311 312
                               Store 281(b) 313
-             314:     14(int) Load 200(i16)
+             314: 14(int16_t) Load 200(i16)
              315:     27(int) SConvert 314
              316:     17(int) Bitcast 315
              317:  225(ivec3) Load 227(uv)
              318:  225(ivec3) CompositeConstruct 316 316 316
              319:  225(ivec3) BitwiseOr 317 318
                               Store 227(uv) 319
-             320:     14(int) Load 200(i16)
+             320: 14(int16_t) Load 200(i16)
              321:     27(int) SConvert 320
              322:     27(int) Load 220(i)
              323:     27(int) BitwiseOr 321 322
                               Store 220(i) 323
-             324:     14(int) Load 200(i16)
-             325:     71(int) SConvert 324
-             326:     71(int) Load 243(i64)
-             327:     71(int) BitwiseAnd 326 325
+             324: 14(int16_t) Load 200(i16)
+             325: 71(int64_t) SConvert 324
+             326: 71(int64_t) Load 243(i64)
+             327: 71(int64_t) BitwiseAnd 326 325
                               Store 243(i64) 327
-             328:  193(ivec3) Load 195(u16v)
+             328:193(i16vec3) Load 195(u16v)
              329:  225(ivec3) UConvert 328
              330:  225(ivec3) Load 227(uv)
              331:  225(ivec3) BitwiseAnd 329 330
                               Store 227(uv) 331
-             332:     14(int) Load 200(i16)
+             332: 14(int16_t) Load 200(i16)
              333:     27(int) SConvert 332
              334:     17(int) Bitcast 333
              335:  225(ivec3) Load 227(uv)
              336:  225(ivec3) CompositeConstruct 334 334 334
              337:  225(ivec3) BitwiseXor 335 336
                               Store 227(uv) 337
-             338:  193(ivec3) Load 195(u16v)
-             339:     14(int) Load 200(i16)
-             340:     36(int) Bitcast 339
-             341:  193(ivec3) CompositeConstruct 340 340 340
-             342:  193(ivec3) BitwiseXor 338 341
+             338:193(i16vec3) Load 195(u16v)
+             339: 14(int16_t) Load 200(i16)
+             340: 36(int16_t) Bitcast 339
+             341:193(i16vec3) CompositeConstruct 340 340 340
+             342:193(i16vec3) BitwiseXor 338 341
                               Store 195(u16v) 342
                               Return
                               FunctionEnd
@@ -552,190 +552,190 @@ spv.int16.frag
         442(u64):    441(ptr) Variable Function
       445(u16v4):    444(ptr) Variable Function
          457(bv):    456(ptr) Variable Function
-             344:   52(ivec2) Load 343(i16v)
-             345:   52(ivec2) ExtInst 1(GLSL.std.450) 5(SAbs) 344
+             344: 52(i16vec2) Load 343(i16v)
+             345: 52(i16vec2) ExtInst 1(GLSL.std.450) 5(SAbs) 344
                               Store 343(i16v) 345
-             347:     14(int) Load 346(i16)
-             348:     14(int) ExtInst 1(GLSL.std.450) 7(SSign) 347
+             347: 14(int16_t) Load 346(i16)
+             348: 14(int16_t) ExtInst 1(GLSL.std.450) 7(SSign) 347
                               Store 346(i16) 348
-             349:   52(ivec2) Load 343(i16v)
-             350:     14(int) Load 346(i16)
-             351:   52(ivec2) CompositeConstruct 350 350
-             352:   52(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 349 351
+             349: 52(i16vec2) Load 343(i16v)
+             350: 14(int16_t) Load 346(i16)
+             351: 52(i16vec2) CompositeConstruct 350 350
+             352: 52(i16vec2) ExtInst 1(GLSL.std.450) 39(SMin) 349 351
                               Store 343(i16v) 352
-             353:   52(ivec2) Load 343(i16v)
-             355:   52(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 353 354
+             353: 52(i16vec2) Load 343(i16v)
+             355: 52(i16vec2) ExtInst 1(GLSL.std.450) 39(SMin) 353 354
                               Store 343(i16v) 355
-             357:  193(ivec3) Load 356(u16v)
-             359:     36(int) Load 358(u16)
-             360:  193(ivec3) CompositeConstruct 359 359 359
-             361:  193(ivec3) ExtInst 1(GLSL.std.450) 38(UMin) 357 360
+             357:193(i16vec3) Load 356(u16v)
+             359: 36(int16_t) Load 358(u16)
+             360:193(i16vec3) CompositeConstruct 359 359 359
+             361:193(i16vec3) ExtInst 1(GLSL.std.450) 38(UMin) 357 360
                               Store 356(u16v) 361
-             362:  193(ivec3) Load 356(u16v)
-             364:  193(ivec3) ExtInst 1(GLSL.std.450) 38(UMin) 362 363
+             362:193(i16vec3) Load 356(u16v)
+             364:193(i16vec3) ExtInst 1(GLSL.std.450) 38(UMin) 362 363
                               Store 356(u16v) 364
-             365:   52(ivec2) Load 343(i16v)
-             366:     14(int) Load 346(i16)
-             367:   52(ivec2) CompositeConstruct 366 366
-             368:   52(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 365 367
+             365: 52(i16vec2) Load 343(i16v)
+             366: 14(int16_t) Load 346(i16)
+             367: 52(i16vec2) CompositeConstruct 366 366
+             368: 52(i16vec2) ExtInst 1(GLSL.std.450) 42(SMax) 365 367
                               Store 343(i16v) 368
-             369:   52(ivec2) Load 343(i16v)
-             370:   52(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 369 354
+             369: 52(i16vec2) Load 343(i16v)
+             370: 52(i16vec2) ExtInst 1(GLSL.std.450) 42(SMax) 369 354
                               Store 343(i16v) 370
-             371:  193(ivec3) Load 356(u16v)
-             372:     36(int) Load 358(u16)
-             373:  193(ivec3) CompositeConstruct 372 372 372
-             374:  193(ivec3) ExtInst 1(GLSL.std.450) 41(UMax) 371 373
+             371:193(i16vec3) Load 356(u16v)
+             372: 36(int16_t) Load 358(u16)
+             373:193(i16vec3) CompositeConstruct 372 372 372
+             374:193(i16vec3) ExtInst 1(GLSL.std.450) 41(UMax) 371 373
                               Store 356(u16v) 374
-             375:  193(ivec3) Load 356(u16v)
-             376:  193(ivec3) ExtInst 1(GLSL.std.450) 41(UMax) 375 363
+             375:193(i16vec3) Load 356(u16v)
+             376:193(i16vec3) ExtInst 1(GLSL.std.450) 41(UMax) 375 363
                               Store 356(u16v) 376
-             377:   52(ivec2) Load 343(i16v)
-             378:     14(int) Load 346(i16)
-             379:     14(int) SNegate 378
-             380:     14(int) Load 346(i16)
-             381:   52(ivec2) CompositeConstruct 379 379
-             382:   52(ivec2) CompositeConstruct 380 380
-             383:   52(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 377 381 382
+             377: 52(i16vec2) Load 343(i16v)
+             378: 14(int16_t) Load 346(i16)
+             379: 14(int16_t) SNegate 378
+             380: 14(int16_t) Load 346(i16)
+             381: 52(i16vec2) CompositeConstruct 379 379
+             382: 52(i16vec2) CompositeConstruct 380 380
+             383: 52(i16vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 377 381 382
                               Store 343(i16v) 383
-             384:   52(ivec2) Load 343(i16v)
-             385:   52(ivec2) Load 343(i16v)
-             386:   52(ivec2) SNegate 385
-             387:   52(ivec2) Load 343(i16v)
-             388:   52(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 384 386 387
+             384: 52(i16vec2) Load 343(i16v)
+             385: 52(i16vec2) Load 343(i16v)
+             386: 52(i16vec2) SNegate 385
+             387: 52(i16vec2) Load 343(i16v)
+             388: 52(i16vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 384 386 387
                               Store 343(i16v) 388
-             389:  193(ivec3) Load 356(u16v)
-             390:     36(int) Load 358(u16)
-             391:     36(int) SNegate 390
-             392:     36(int) Load 358(u16)
-             393:  193(ivec3) CompositeConstruct 391 391 391
-             394:  193(ivec3) CompositeConstruct 392 392 392
-             395:  193(ivec3) ExtInst 1(GLSL.std.450) 44(UClamp) 389 393 394
+             389:193(i16vec3) Load 356(u16v)
+             390: 36(int16_t) Load 358(u16)
+             391: 36(int16_t) SNegate 390
+             392: 36(int16_t) Load 358(u16)
+             393:193(i16vec3) CompositeConstruct 391 391 391
+             394:193(i16vec3) CompositeConstruct 392 392 392
+             395:193(i16vec3) ExtInst 1(GLSL.std.450) 44(UClamp) 389 393 394
                               Store 356(u16v) 395
-             396:  193(ivec3) Load 356(u16v)
-             397:  193(ivec3) Load 356(u16v)
-             398:  193(ivec3) SNegate 397
-             399:  193(ivec3) Load 356(u16v)
-             400:  193(ivec3) ExtInst 1(GLSL.std.450) 44(UClamp) 396 398 399
+             396:193(i16vec3) Load 356(u16v)
+             397:193(i16vec3) Load 356(u16v)
+             398:193(i16vec3) SNegate 397
+             399:193(i16vec3) Load 356(u16v)
+             400:193(i16vec3) ExtInst 1(GLSL.std.450) 44(UClamp) 396 398 399
                               Store 356(u16v) 400
              401:     15(ptr) AccessChain 343(i16v) 282
-             402:     14(int) Load 401
+             402: 14(int16_t) Load 401
              403:     15(ptr) AccessChain 343(i16v) 264
-             404:     14(int) Load 403
-             406:     14(int) Select 405 404 402
+             404: 14(int16_t) Load 403
+             406: 14(int16_t) Select 405 404 402
                               Store 346(i16) 406
-             407:     14(int) Load 346(i16)
-             408:   52(ivec2) CompositeConstruct 407 407
-             409:     14(int) Load 346(i16)
-             410:     14(int) SNegate 409
-             411:   52(ivec2) CompositeConstruct 410 410
-             414:   52(ivec2) Select 413 411 408
+             407: 14(int16_t) Load 346(i16)
+             408: 52(i16vec2) CompositeConstruct 407 407
+             409: 14(int16_t) Load 346(i16)
+             410: 14(int16_t) SNegate 409
+             411: 52(i16vec2) CompositeConstruct 410 410
+             414: 52(i16vec2) Select 413 411 408
                               Store 343(i16v) 414
              415:     37(ptr) AccessChain 356(u16v) 282
-             416:     36(int) Load 415
+             416: 36(int16_t) Load 415
              417:     37(ptr) AccessChain 356(u16v) 264
-             418:     36(int) Load 417
-             419:     36(int) Select 405 418 416
+             418: 36(int16_t) Load 417
+             419: 36(int16_t) Select 405 418 416
                               Store 358(u16) 419
-             420:     36(int) Load 358(u16)
-             421:  193(ivec3) CompositeConstruct 420 420 420
-             422:     36(int) Load 358(u16)
-             423:     36(int) SNegate 422
-             424:  193(ivec3) CompositeConstruct 423 423 423
-             427:  193(ivec3) Select 426 424 421
+             420: 36(int16_t) Load 358(u16)
+             421:193(i16vec3) CompositeConstruct 420 420 420
+             422: 36(int16_t) Load 358(u16)
+             423: 36(int16_t) SNegate 422
+             424:193(i16vec3) CompositeConstruct 423 423 423
+             427:193(i16vec3) Select 426 424 421
                               Store 356(u16v) 427
-             429:   52(ivec2) Load 343(i16v)
+             429: 52(i16vec2) Load 343(i16v)
              430:     27(int) Bitcast 429
                               Store 428(i32) 430
-             435:  432(ivec4) Load 434(i16v4)
-             436:     71(int) Bitcast 435
+             435:432(i16vec4) Load 434(i16v4)
+             436: 71(int64_t) Bitcast 435
                               Store 431(i64) 436
-             439:   57(ivec2) Load 438(u16v2)
+             439: 57(i16vec2) Load 438(u16v2)
              440:     17(int) Bitcast 439
                               Store 437(u32) 440
-             446:  443(ivec4) Load 445(u16v4)
-             447:     77(int) Bitcast 446
+             446:443(i16vec4) Load 445(u16v4)
+             447: 77(int64_t) Bitcast 446
                               Store 442(u64) 447
              448:     27(int) Load 428(i32)
-             449:   52(ivec2) Bitcast 448
+             449: 52(i16vec2) Bitcast 448
                               Store 343(i16v) 449
-             450:     71(int) Load 431(i64)
-             451:  432(ivec4) Bitcast 450
+             450: 71(int64_t) Load 431(i64)
+             451:432(i16vec4) Bitcast 450
                               Store 434(i16v4) 451
              452:     17(int) Load 437(u32)
-             453:   57(ivec2) Bitcast 452
+             453: 57(i16vec2) Bitcast 452
                               Store 438(u16v2) 453
-             454:     77(int) Load 442(u64)
-             455:  443(ivec4) Bitcast 454
+             454: 77(int64_t) Load 442(u64)
+             455:443(i16vec4) Bitcast 454
                               Store 445(u16v4) 455
-             458:  193(ivec3) Load 356(u16v)
-             459:     36(int) Load 358(u16)
-             460:  193(ivec3) CompositeConstruct 459 459 459
+             458:193(i16vec3) Load 356(u16v)
+             459: 36(int16_t) Load 358(u16)
+             460:193(i16vec3) CompositeConstruct 459 459 459
              461:  425(bvec3) ULessThan 458 460
                               Store 457(bv) 461
-             462:   52(ivec2) Load 343(i16v)
-             463:     14(int) Load 346(i16)
-             464:   52(ivec2) CompositeConstruct 463 463
+             462: 52(i16vec2) Load 343(i16v)
+             463: 14(int16_t) Load 346(i16)
+             464: 52(i16vec2) CompositeConstruct 463 463
              465:  174(bvec2) SLessThan 462 464
              466:  425(bvec3) Load 457(bv)
              467:  425(bvec3) VectorShuffle 466 465 3 4 2
                               Store 457(bv) 467
-             468:  193(ivec3) Load 356(u16v)
-             469:     36(int) Load 358(u16)
-             470:  193(ivec3) CompositeConstruct 469 469 469
+             468:193(i16vec3) Load 356(u16v)
+             469: 36(int16_t) Load 358(u16)
+             470:193(i16vec3) CompositeConstruct 469 469 469
              471:  425(bvec3) ULessThanEqual 468 470
                               Store 457(bv) 471
-             472:   52(ivec2) Load 343(i16v)
-             473:     14(int) Load 346(i16)
-             474:   52(ivec2) CompositeConstruct 473 473
+             472: 52(i16vec2) Load 343(i16v)
+             473: 14(int16_t) Load 346(i16)
+             474: 52(i16vec2) CompositeConstruct 473 473
              475:  174(bvec2) SLessThanEqual 472 474
              476:  425(bvec3) Load 457(bv)
              477:  425(bvec3) VectorShuffle 476 475 3 4 2
                               Store 457(bv) 477
-             478:  193(ivec3) Load 356(u16v)
-             479:     36(int) Load 358(u16)
-             480:  193(ivec3) CompositeConstruct 479 479 479
+             478:193(i16vec3) Load 356(u16v)
+             479: 36(int16_t) Load 358(u16)
+             480:193(i16vec3) CompositeConstruct 479 479 479
              481:  425(bvec3) UGreaterThan 478 480
                               Store 457(bv) 481
-             482:   52(ivec2) Load 343(i16v)
-             483:     14(int) Load 346(i16)
-             484:   52(ivec2) CompositeConstruct 483 483
+             482: 52(i16vec2) Load 343(i16v)
+             483: 14(int16_t) Load 346(i16)
+             484: 52(i16vec2) CompositeConstruct 483 483
              485:  174(bvec2) SGreaterThan 482 484
              486:  425(bvec3) Load 457(bv)
              487:  425(bvec3) VectorShuffle 486 485 3 4 2
                               Store 457(bv) 487
-             488:  193(ivec3) Load 356(u16v)
-             489:     36(int) Load 358(u16)
-             490:  193(ivec3) CompositeConstruct 489 489 489
+             488:193(i16vec3) Load 356(u16v)
+             489: 36(int16_t) Load 358(u16)
+             490:193(i16vec3) CompositeConstruct 489 489 489
              491:  425(bvec3) UGreaterThanEqual 488 490
                               Store 457(bv) 491
-             492:   52(ivec2) Load 343(i16v)
-             493:     14(int) Load 346(i16)
-             494:   52(ivec2) CompositeConstruct 493 493
+             492: 52(i16vec2) Load 343(i16v)
+             493: 14(int16_t) Load 346(i16)
+             494: 52(i16vec2) CompositeConstruct 493 493
              495:  174(bvec2) SGreaterThanEqual 492 494
              496:  425(bvec3) Load 457(bv)
              497:  425(bvec3) VectorShuffle 496 495 3 4 2
                               Store 457(bv) 497
-             498:  193(ivec3) Load 356(u16v)
-             499:     36(int) Load 358(u16)
-             500:  193(ivec3) CompositeConstruct 499 499 499
+             498:193(i16vec3) Load 356(u16v)
+             499: 36(int16_t) Load 358(u16)
+             500:193(i16vec3) CompositeConstruct 499 499 499
              501:  425(bvec3) IEqual 498 500
                               Store 457(bv) 501
-             502:   52(ivec2) Load 343(i16v)
-             503:     14(int) Load 346(i16)
-             504:   52(ivec2) CompositeConstruct 503 503
+             502: 52(i16vec2) Load 343(i16v)
+             503: 14(int16_t) Load 346(i16)
+             504: 52(i16vec2) CompositeConstruct 503 503
              505:  174(bvec2) IEqual 502 504
              506:  425(bvec3) Load 457(bv)
              507:  425(bvec3) VectorShuffle 506 505 3 4 2
                               Store 457(bv) 507
-             508:  193(ivec3) Load 356(u16v)
-             509:     36(int) Load 358(u16)
-             510:  193(ivec3) CompositeConstruct 509 509 509
+             508:193(i16vec3) Load 356(u16v)
+             509: 36(int16_t) Load 358(u16)
+             510:193(i16vec3) CompositeConstruct 509 509 509
              511:  425(bvec3) INotEqual 508 510
                               Store 457(bv) 511
-             512:   52(ivec2) Load 343(i16v)
-             513:     14(int) Load 346(i16)
-             514:   52(ivec2) CompositeConstruct 513 513
+             512: 52(i16vec2) Load 343(i16v)
+             513: 14(int16_t) Load 346(i16)
+             514: 52(i16vec2) CompositeConstruct 513 513
              515:  174(bvec2) INotEqual 512 514
              516:  425(bvec3) Load 457(bv)
              517:  425(bvec3) VectorShuffle 516 515 3 4 2

3rdparty/glslang/Test/baseResults/spv.int32.frag.out

@@ -130,32 +130,32 @@ spv.int32.frag
               52:             TypeVector 18(int) 2
               53:             TypePointer Function 52(ivec2)
               57:             TypeInt 64 1
-              58:             TypeVector 57(int) 2
-              59:             TypePointer Function 58(ivec2)
+              58:             TypeVector 57(int64_t) 2
+              59:             TypePointer Function 58(i64vec2)
               63:             TypeInt 64 0
-              64:             TypeVector 63(int) 2
-              65:             TypePointer Function 64(ivec2)
+              64:             TypeVector 63(int64_t) 2
+              65:             TypePointer Function 64(i64vec2)
               75:             TypeFloat 32
               76:             TypeVector 75(float) 2
               77:             TypePointer Function 76(fvec2)
               81:             TypeFloat 64
-              82:             TypeVector 81(float) 2
-              83:             TypePointer Function 82(fvec2)
+              82:             TypeVector 81(float64_t) 2
+              83:             TypePointer Function 82(f64vec2)
               91:             TypeInt 8 1
-              92:             TypeVector 91(int) 2
-              93:             TypePointer Function 92(ivec2)
+              92:             TypeVector 91(int8_t) 2
+              93:             TypePointer Function 92(i8vec2)
              100:             TypeInt 16 1
-             101:             TypeVector 100(int) 2
-             102:             TypePointer Function 101(ivec2)
+             101:             TypeVector 100(int16_t) 2
+             102:             TypePointer Function 101(i16vec2)
              120:             TypeInt 8 0
-             121:             TypeVector 120(int) 2
-             122:             TypePointer Function 121(ivec2)
+             121:             TypeVector 120(int8_t) 2
+             122:             TypePointer Function 121(i8vec2)
              129:             TypeInt 16 0
-             130:             TypeVector 129(int) 2
-             131:             TypePointer Function 130(ivec2)
+             130:             TypeVector 129(int16_t) 2
+             131:             TypePointer Function 130(i16vec2)
              149:             TypeFloat 16
-             150:             TypeVector 149(float) 2
-             151:             TypePointer Function 150(fvec2)
+             150:             TypeVector 149(float16_t) 2
+             151:             TypePointer Function 150(f16vec2)
              165:             TypeBool
              166:             TypeVector 165(bool) 2
              167:             TypePointer Function 166(bvec2)
@@ -169,7 +169,7 @@ spv.int32.frag
              184:             TypeVector 14(int) 3
              185:             TypePointer Function 184(ivec3)
              188:             TypeVector 18(int) 3
-             226:             TypePointer Function 57(int)
+             226:             TypePointer Function 57(int64_t)
              251:     14(int) Constant 2
              259:             TypePointer Function 165(bool)
              323:   52(ivec2) ConstantComposite 24 24
@@ -179,11 +179,11 @@ spv.int32.frag
              382:  166(bvec2) ConstantComposite 381 381
              394:             TypeVector 165(bool) 3
              395:  394(bvec3) ConstantComposite 381 381 381
-             397:             TypeVector 91(int) 4
-             398:             TypePointer Function 397(ivec4)
-             405:             TypeVector 120(int) 4
-             406:             TypePointer Function 405(ivec4)
-             417:             TypePointer Function 63(int)
+             397:             TypeVector 91(int8_t) 4
+             398:             TypePointer Function 397(i8vec4)
+             405:             TypeVector 120(int8_t) 4
+             406:             TypePointer Function 405(i8vec4)
+             417:             TypePointer Function 63(int64_t)
              421:             TypePointer Function 394(bvec3)
              483:             TypeVector 18(int) 4
              484:             TypeVector 14(int) 4
@@ -238,44 +238,44 @@ spv.int32.frag
               56:   49(ivec2) Bitcast 55
                               Store 51(u32v) 56
               61:   52(ivec2) Load 54(i32v)
-              62:   58(ivec2) SConvert 61
+              62: 58(i64vec2) SConvert 61
                               Store 60(i64v) 62
               67:   52(ivec2) Load 54(i32v)
-              68:   58(ivec2) SConvert 67
-              69:   64(ivec2) Bitcast 68
+              68: 58(i64vec2) SConvert 67
+              69: 64(i64vec2) Bitcast 68
                               Store 66(u64v) 69
               70:   49(ivec2) Load 51(u32v)
-              71:   58(ivec2) UConvert 70
-              72:   58(ivec2) Bitcast 71
+              71: 58(i64vec2) UConvert 70
+              72: 58(i64vec2) Bitcast 71
                               Store 60(i64v) 72
               73:   49(ivec2) Load 51(u32v)
-              74:   64(ivec2) UConvert 73
+              74: 64(i64vec2) UConvert 73
                               Store 66(u64v) 74
               79:   52(ivec2) Load 54(i32v)
               80:   76(fvec2) ConvertSToF 79
                               Store 78(f32v) 80
               85:   52(ivec2) Load 54(i32v)
-              86:   82(fvec2) ConvertSToF 85
+              86: 82(f64vec2) ConvertSToF 85
                               Store 84(f64v) 86
               87:   49(ivec2) Load 51(u32v)
               88:   76(fvec2) ConvertUToF 87
                               Store 78(f32v) 88
               89:   49(ivec2) Load 51(u32v)
-              90:   82(fvec2) ConvertUToF 89
+              90: 82(f64vec2) ConvertUToF 89
                               Store 84(f64v) 90
               95:   52(ivec2) Load 54(i32v)
-              96:   92(ivec2) SConvert 95
+              96:  92(i8vec2) SConvert 95
                               Store 94(i8v) 96
               97:   49(ivec2) Load 51(u32v)
-              98:   92(ivec2) UConvert 97
-              99:   92(ivec2) Bitcast 98
+              98:  92(i8vec2) UConvert 97
+              99:  92(i8vec2) Bitcast 98
                               Store 94(i8v) 99
              104:   52(ivec2) Load 54(i32v)
-             105:  101(ivec2) SConvert 104
+             105:101(i16vec2) SConvert 104
                               Store 103(i16v) 105
              106:   49(ivec2) Load 51(u32v)
-             107:  101(ivec2) UConvert 106
-             108:  101(ivec2) Bitcast 107
+             107:101(i16vec2) UConvert 106
+             108:101(i16vec2) Bitcast 107
                               Store 103(i16v) 108
              109:   52(ivec2) Load 54(i32v)
              110:     18(int) CompositeExtract 109 0
@@ -286,25 +286,25 @@ spv.int32.frag
              114:   52(ivec2) Bitcast 113
                               Store 54(i32v) 114
              115:   52(ivec2) Load 54(i32v)
-             116:   58(ivec2) SConvert 115
+             116: 58(i64vec2) SConvert 115
                               Store 60(i64v) 116
              117:   49(ivec2) Load 51(u32v)
-             118:   58(ivec2) UConvert 117
-             119:   58(ivec2) Bitcast 118
+             118: 58(i64vec2) UConvert 117
+             119: 58(i64vec2) Bitcast 118
                               Store 60(i64v) 119
              124:   52(ivec2) Load 54(i32v)
-             125:   92(ivec2) SConvert 124
-             126:  121(ivec2) Bitcast 125
+             125:  92(i8vec2) SConvert 124
+             126: 121(i8vec2) Bitcast 125
                               Store 123(u8v) 126
              127:   49(ivec2) Load 51(u32v)
-             128:  121(ivec2) UConvert 127
+             128: 121(i8vec2) UConvert 127
                               Store 123(u8v) 128
              133:   52(ivec2) Load 54(i32v)
-             134:  101(ivec2) SConvert 133
-             135:  130(ivec2) Bitcast 134
+             134:101(i16vec2) SConvert 133
+             135:130(i16vec2) Bitcast 134
                               Store 132(u16v) 135
              136:   49(ivec2) Load 51(u32v)
-             137:  130(ivec2) UConvert 136
+             137:130(i16vec2) UConvert 136
                               Store 132(u16v) 137
              138:   52(ivec2) Load 54(i32v)
              139:   49(ivec2) Bitcast 138
@@ -315,29 +315,29 @@ spv.int32.frag
              143:   49(ivec2) CompositeConstruct 141 142
                               Store 51(u32v) 143
              144:   52(ivec2) Load 54(i32v)
-             145:   58(ivec2) SConvert 144
-             146:   64(ivec2) Bitcast 145
+             145: 58(i64vec2) SConvert 144
+             146: 64(i64vec2) Bitcast 145
                               Store 66(u64v) 146
              147:   49(ivec2) Load 51(u32v)
-             148:   64(ivec2) UConvert 147
+             148: 64(i64vec2) UConvert 147
                               Store 66(u64v) 148
              153:   52(ivec2) Load 54(i32v)
-             154:  150(fvec2) ConvertSToF 153
+             154:150(f16vec2) ConvertSToF 153
                               Store 152(f16v) 154
              155:   52(ivec2) Load 54(i32v)
              156:   76(fvec2) ConvertSToF 155
                               Store 78(f32v) 156
              157:   52(ivec2) Load 54(i32v)
-             158:   82(fvec2) ConvertSToF 157
+             158: 82(f64vec2) ConvertSToF 157
                               Store 84(f64v) 158
              159:   49(ivec2) Load 51(u32v)
-             160:  150(fvec2) ConvertUToF 159
+             160:150(f16vec2) ConvertUToF 159
                               Store 152(f16v) 160
              161:   49(ivec2) Load 51(u32v)
              162:   76(fvec2) ConvertUToF 161
                               Store 78(f32v) 162
              163:   49(ivec2) Load 51(u32v)
-             164:   82(fvec2) ConvertUToF 163
+             164: 82(f64vec2) ConvertUToF 163
                               Store 84(f64v) 164
              169:  166(bvec2) Load 168(bv)
              173:   52(ivec2) Select 169 172 171
@@ -410,18 +410,18 @@ spv.int32.frag
              225:  184(ivec3) IAdd 223 224
                               Store 214(uv) 225
              228:     18(int) Load 191(i32)
-             229:     57(int) SConvert 228
-             230:     57(int) Load 227(i64)
-             231:     57(int) ISub 229 230
+             229: 57(int64_t) SConvert 228
+             230: 57(int64_t) Load 227(i64)
+             231: 57(int64_t) ISub 229 230
                               Store 227(i64) 231
              232:  184(ivec3) Load 186(u32v)
              233:  184(ivec3) Load 214(uv)
              234:  184(ivec3) IMul 232 233
                               Store 214(uv) 234
              235:     18(int) Load 191(i32)
-             236:     57(int) SConvert 235
-             237:     57(int) Load 227(i64)
-             238:     57(int) IMul 236 237
+             236: 57(int64_t) SConvert 235
+             237: 57(int64_t) Load 227(i64)
+             238: 57(int64_t) IMul 236 237
                               Store 227(i64) 238
              239:     18(int) Load 191(i32)
              240:     18(int) Load 210(i)
@@ -437,10 +437,10 @@ spv.int32.frag
              248:     18(int) Load 191(i32)
              249:     18(int) ShiftRightArithmetic 248 247
                               Store 191(i32) 249
-             250:     57(int) Load 227(i64)
+             250: 57(int64_t) Load 227(i64)
              252:     38(ptr) AccessChain 186(u32v) 251
              253:     14(int) Load 252
-             254:     57(int) ShiftLeftLogical 250 253
+             254: 57(int64_t) ShiftLeftLogical 250 253
                               Store 227(i64) 254
              255:  184(ivec3) Load 186(u32v)
              256:     18(int) Load 210(i)
@@ -490,9 +490,9 @@ spv.int32.frag
              294:     18(int) BitwiseOr 292 293
                               Store 210(i) 294
              295:     18(int) Load 191(i32)
-             296:     57(int) SConvert 295
-             297:     57(int) Load 227(i64)
-             298:     57(int) BitwiseAnd 297 296
+             296: 57(int64_t) SConvert 295
+             297: 57(int64_t) Load 227(i64)
+             298: 57(int64_t) BitwiseAnd 297 296
                               Store 227(i64) 298
              299:  184(ivec3) Load 186(u32v)
              300:  184(ivec3) Load 214(uv)
@@ -618,22 +618,22 @@ spv.int32.frag
              393:  184(ivec3) CompositeConstruct 392 392 392
              396:  184(ivec3) Select 395 393 390
                               Store 325(u32v) 396
-             400:  397(ivec4) Load 399(i8v4)
+             400: 397(i8vec4) Load 399(i8v4)
              401:     18(int) Bitcast 400
                               Store 315(i32) 401
-             403:  101(ivec2) Load 402(i16v2)
+             403:101(i16vec2) Load 402(i16v2)
              404:     18(int) Bitcast 403
                               Store 315(i32) 404
-             408:  405(ivec4) Load 407(u8v4)
+             408: 405(i8vec4) Load 407(u8v4)
              409:     14(int) Bitcast 408
                               Store 327(u32) 409
-             411:  130(ivec2) Load 410(u16v2)
+             411:130(i16vec2) Load 410(u16v2)
              412:     14(int) Bitcast 411
                               Store 327(u32) 412
-             414:     57(int) Load 413(i64)
+             414: 57(int64_t) Load 413(i64)
              415:   52(ivec2) Bitcast 414
                               Store 312(i32v) 415
-             419:     63(int) Load 418(u64)
+             419: 63(int64_t) Load 418(u64)
              420:   49(ivec2) Bitcast 419
                               Store 416(u32v2) 420
              423:  184(ivec3) Load 325(u32v)

3rdparty/glslang/Test/baseResults/spv.int64.frag.out

@@ -72,17 +72,17 @@ spv.int64.frag
                2:             TypeVoid
                3:             TypeFunction 2
               14:             TypeInt 64 0
-              15:             TypePointer Private 14(int)
+              15:             TypePointer Private 14(int64_t)
       16(u64Max):     15(ptr) Variable Private
-              17:     14(int) Constant 4294967295 4294967295
+              17: 14(int64_t) Constant 4294967295 4294967295
               18:             TypeInt 64 1
-              19:             TypePointer Function 18(int)
+              19:             TypePointer Function 18(int64_t)
               21:             TypeInt 32 0
               22:     21(int) Constant 3
-              23:             TypeArray 18(int) 22
-              24:     18(int) Constant 4008636143 4008636142
-              25:     18(int) Constant 4294967295 4294967295
-              26:     18(int) Constant 0 1
+              23:             TypeArray 18(int64_t) 22
+              24: 18(int64_t) Constant 4008636143 4008636142
+              25: 18(int64_t) Constant 4294967295 4294967295
+              26: 18(int64_t) Constant 0 1
               27:          23 ConstantComposite 24 25 26
     28(Uniforms):             TypeStruct 21(int)
               29:             TypePointer Uniform 28(Uniforms)
@@ -91,27 +91,27 @@ spv.int64.frag
               32:     31(int) Constant 0
               33:             TypePointer Uniform 21(int)
               36:             TypePointer Function 23
-              40:             TypePointer Function 14(int)
-              42:             TypeArray 14(int) 22
-              43:     14(int) Constant 0 1
-              44:     14(int) Constant 4294967295 1
+              40:             TypePointer Function 14(int64_t)
+              42:             TypeArray 14(int64_t) 22
+              43: 14(int64_t) Constant 0 1
+              44: 14(int64_t) Constant 4294967295 1
               45:          42 ConstantComposite 17 43 44
               48:             TypePointer Function 42
-              52:             TypeVector 18(int) 2
-              53:             TypePointer Function 52(ivec2)
+              52:             TypeVector 18(int64_t) 2
+              53:             TypePointer Function 52(i64vec2)
               55:             TypeBool
               56:             TypeVector 55(bool) 2
               57:             TypePointer Function 56(bvec2)
-              60:     18(int) Constant 0 0
-              61:     18(int) Constant 1 0
-              62:   52(ivec2) ConstantComposite 60 60
-              63:   52(ivec2) ConstantComposite 61 61
-              65:             TypeVector 14(int) 2
-              66:             TypePointer Function 65(ivec2)
-              69:     14(int) Constant 0 0
-              70:     14(int) Constant 1 0
-              71:   65(ivec2) ConstantComposite 69 69
-              72:   65(ivec2) ConstantComposite 70 70
+              60: 18(int64_t) Constant 0 0
+              61: 18(int64_t) Constant 1 0
+              62: 52(i64vec2) ConstantComposite 60 60
+              63: 52(i64vec2) ConstantComposite 61 61
+              65:             TypeVector 14(int64_t) 2
+              66:             TypePointer Function 65(i64vec2)
+              69: 14(int64_t) Constant 0 0
+              70: 14(int64_t) Constant 1 0
+              71: 65(i64vec2) ConstantComposite 69 69
+              72: 65(i64vec2) ConstantComposite 70 70
               74:             TypeVector 31(int) 2
               75:             TypePointer Function 74(ivec2)
               81:             TypeVector 21(int) 2
@@ -120,11 +120,11 @@ spv.int64.frag
               89:             TypeVector 88(float) 2
               90:             TypePointer Function 89(fvec2)
               94:             TypeFloat 64
-              95:             TypeVector 94(float) 2
-              96:             TypePointer Function 95(fvec2)
-             132:             TypeVector 14(int) 3
-             133:             TypePointer Function 132(ivec3)
-             136:             TypeVector 18(int) 3
+              95:             TypeVector 94(float64_t) 2
+              96:             TypePointer Function 95(f64vec2)
+             132:             TypeVector 14(int64_t) 3
+             133:             TypePointer Function 132(i64vec3)
+             136:             TypeVector 18(int64_t) 3
              158:             TypePointer Function 31(int)
              164:             TypeVector 21(int) 3
              165:             TypePointer Function 164(ivec3)
@@ -134,47 +134,47 @@ spv.int64.frag
              217:     21(int) Constant 2
              225:             TypePointer Function 55(bool)
              227:     21(int) Constant 0
-             297:   52(ivec2) ConstantComposite 25 25
-             306:  132(ivec3) ConstantComposite 69 69 69
+             297: 52(i64vec2) ConstantComposite 25 25
+             306:132(i64vec3) ConstantComposite 69 69 69
              348:    55(bool) ConstantTrue
              355:    55(bool) ConstantFalse
              356:   56(bvec2) ConstantComposite 355 355
              368:             TypeVector 55(bool) 3
              369:  368(bvec3) ConstantComposite 355 355 355
-             371:             TypeVector 94(float) 3
-             372:             TypePointer Function 371(fvec3)
-             377:             TypePointer Function 94(float)
+             371:             TypeVector 94(float64_t) 3
+             372:             TypePointer Function 371(f64vec3)
+             377:             TypePointer Function 94(float64_t)
              388:     31(int) Constant 1
              389:     31(int) Constant 2
              390:   74(ivec2) ConstantComposite 388 389
              395:   81(ivec2) ConstantComposite 217 22
              400:             TypePointer Function 368(bvec3)
-      462(Block):             TypeStruct 136(ivec3) 14(int)
+      462(Block):             TypeStruct 136(i64vec3) 14(int64_t)
              463:             TypePointer Uniform 462(Block)
       464(block):    463(ptr) Variable Uniform
-       465(si64):     18(int) SpecConstant 4294967286 4294967295
-       466(su64):     14(int) SpecConstant 20 0
+       465(si64): 18(int64_t) SpecConstant 4294967286 4294967295
+       466(su64): 14(int64_t) SpecConstant 20 0
          467(si):     31(int) SpecConstant 4294967291
          468(su):     21(int) SpecConstant 4
          469(sb):    55(bool) SpecConstantTrue
              470:    55(bool) SpecConstantOp 171 465(si64) 69
              471:    55(bool) SpecConstantOp 171 466(su64) 69
-             472:     18(int) SpecConstantOp 169 469(sb) 61 60
-             473:     14(int) SpecConstantOp 169 469(sb) 70 69
+             472: 18(int64_t) SpecConstantOp 169 469(sb) 61 60
+             473: 14(int64_t) SpecConstantOp 169 469(sb) 70 69
              474:     31(int) SpecConstantOp 114 465(si64)
-             475:     18(int) SpecConstantOp 114 467(si)
+             475: 18(int64_t) SpecConstantOp 114 467(si)
              476:     21(int) SpecConstantOp 113 466(su64)
-             477:     14(int) SpecConstantOp 113 468(su)
-             478:     18(int) SpecConstantOp 128 466(su64) 69
-             479:     14(int) SpecConstantOp 128 465(si64) 69
+             477: 14(int64_t) SpecConstantOp 113 468(su)
+             478: 18(int64_t) SpecConstantOp 128 466(su64) 69
+             479: 14(int64_t) SpecConstantOp 128 465(si64) 69
              480:     31(int) SpecConstantOp 113 466(su64)
              481:     31(int) SpecConstantOp 128 480 227
-             482:     18(int) SpecConstantOp 114 467(si)
-             483:     14(int) SpecConstantOp 128 482 69
+             482: 18(int64_t) SpecConstantOp 114 467(si)
+             483: 14(int64_t) SpecConstantOp 128 482 69
              484:     31(int) SpecConstantOp 114 465(si64)
              485:     21(int) SpecConstantOp 128 484 227
-             486:     18(int) SpecConstantOp 113 468(su)
-             487:     18(int) SpecConstantOp 128 486 69
+             486: 18(int64_t) SpecConstantOp 113 468(su)
+             487: 18(int64_t) SpecConstantOp 128 486 69
          4(main):           2 Function None 3
                5:             Label
                               Store 16(u64Max) 17
@@ -190,13 +190,13 @@ spv.int64.frag
               35:     21(int) Load 34
                               Store 37(indexable) 27
               38:     19(ptr) AccessChain 37(indexable) 35
-              39:     18(int) Load 38
+              39: 18(int64_t) Load 38
                               Store 20(i64) 39
               46:     33(ptr) AccessChain 30 32
               47:     21(int) Load 46
                               Store 49(indexable) 45
               50:     40(ptr) AccessChain 49(indexable) 47
-              51:     14(int) Load 50
+              51: 14(int64_t) Load 50
                               Store 41(u64) 51
                               Return
                               FunctionEnd
@@ -210,74 +210,74 @@ spv.int64.frag
           91(fv):     90(ptr) Variable Function
           97(dv):     96(ptr) Variable Function
               59:   56(bvec2) Load 58(bv)
-              64:   52(ivec2) Select 59 63 62
+              64: 52(i64vec2) Select 59 63 62
                               Store 54(i64v) 64
               68:   56(bvec2) Load 58(bv)
-              73:   65(ivec2) Select 68 72 71
+              73: 65(i64vec2) Select 68 72 71
                               Store 67(u64v) 73
               77:   74(ivec2) Load 76(iv)
-              78:   52(ivec2) SConvert 77
+              78: 52(i64vec2) SConvert 77
                               Store 54(i64v) 78
-              79:   52(ivec2) Load 54(i64v)
+              79: 52(i64vec2) Load 54(i64v)
               80:   74(ivec2) SConvert 79
                               Store 76(iv) 80
               84:   81(ivec2) Load 83(uv)
-              85:   65(ivec2) UConvert 84
+              85: 65(i64vec2) UConvert 84
                               Store 67(u64v) 85
-              86:   65(ivec2) Load 67(u64v)
+              86: 65(i64vec2) Load 67(u64v)
               87:   81(ivec2) UConvert 86
                               Store 83(uv) 87
-              92:   52(ivec2) Load 54(i64v)
+              92: 52(i64vec2) Load 54(i64v)
               93:   89(fvec2) ConvertSToF 92
                               Store 91(fv) 93
-              98:   52(ivec2) Load 54(i64v)
-              99:   95(fvec2) ConvertSToF 98
+              98: 52(i64vec2) Load 54(i64v)
+              99: 95(f64vec2) ConvertSToF 98
                               Store 97(dv) 99
-             100:   65(ivec2) Load 67(u64v)
+             100: 65(i64vec2) Load 67(u64v)
              101:   89(fvec2) ConvertUToF 100
                               Store 91(fv) 101
-             102:   65(ivec2) Load 67(u64v)
-             103:   95(fvec2) ConvertUToF 102
+             102: 65(i64vec2) Load 67(u64v)
+             103: 95(f64vec2) ConvertUToF 102
                               Store 97(dv) 103
              104:   89(fvec2) Load 91(fv)
-             105:   52(ivec2) ConvertFToS 104
+             105: 52(i64vec2) ConvertFToS 104
                               Store 54(i64v) 105
-             106:   95(fvec2) Load 97(dv)
-             107:   52(ivec2) ConvertFToS 106
+             106: 95(f64vec2) Load 97(dv)
+             107: 52(i64vec2) ConvertFToS 106
                               Store 54(i64v) 107
              108:   89(fvec2) Load 91(fv)
-             109:   65(ivec2) ConvertFToU 108
+             109: 65(i64vec2) ConvertFToU 108
                               Store 67(u64v) 109
-             110:   95(fvec2) Load 97(dv)
-             111:   65(ivec2) ConvertFToU 110
+             110: 95(f64vec2) Load 97(dv)
+             111: 65(i64vec2) ConvertFToU 110
                               Store 67(u64v) 111
-             112:   52(ivec2) Load 54(i64v)
+             112: 52(i64vec2) Load 54(i64v)
              113:   56(bvec2) INotEqual 112 71
                               Store 58(bv) 113
-             114:   65(ivec2) Load 67(u64v)
+             114: 65(i64vec2) Load 67(u64v)
              115:   56(bvec2) INotEqual 114 71
                               Store 58(bv) 115
-             116:   52(ivec2) Load 54(i64v)
-             117:   65(ivec2) Bitcast 116
+             116: 52(i64vec2) Load 54(i64v)
+             117: 65(i64vec2) Bitcast 116
                               Store 67(u64v) 117
-             118:   65(ivec2) Load 67(u64v)
-             119:   52(ivec2) Bitcast 118
+             118: 65(i64vec2) Load 67(u64v)
+             119: 52(i64vec2) Bitcast 118
                               Store 54(i64v) 119
-             120:   52(ivec2) Load 54(i64v)
+             120: 52(i64vec2) Load 54(i64v)
              121:   74(ivec2) SConvert 120
              122:   81(ivec2) Bitcast 121
                               Store 83(uv) 122
              123:   81(ivec2) Load 83(uv)
-             124:   52(ivec2) UConvert 123
-             125:   52(ivec2) Bitcast 124
+             124: 52(i64vec2) UConvert 123
+             125: 52(i64vec2) Bitcast 124
                               Store 54(i64v) 125
-             126:   65(ivec2) Load 67(u64v)
+             126: 65(i64vec2) Load 67(u64v)
              127:   74(ivec2) UConvert 126
              128:   74(ivec2) Bitcast 127
                               Store 76(iv) 128
              129:   74(ivec2) Load 76(iv)
-             130:   52(ivec2) SConvert 129
-             131:   65(ivec2) Bitcast 130
+             130: 52(i64vec2) SConvert 129
+             131: 65(i64vec2) Bitcast 130
                               Store 67(u64v) 131
                               Return
                               FunctionEnd
@@ -288,177 +288,177 @@ spv.int64.frag
           159(i):    158(ptr) Variable Function
          166(uv):    165(ptr) Variable Function
           226(b):    225(ptr) Variable Function
-             135:  132(ivec3) Load 134(u64v)
-             137:  136(ivec3) CompositeConstruct 61 61 61
-             138:  132(ivec3) IAdd 135 137
+             135:132(i64vec3) Load 134(u64v)
+             137:136(i64vec3) CompositeConstruct 61 61 61
+             138:132(i64vec3) IAdd 135 137
                               Store 134(u64v) 138
-             140:     18(int) Load 139(i64)
-             141:     18(int) ISub 140 61
+             140: 18(int64_t) Load 139(i64)
+             141: 18(int64_t) ISub 140 61
                               Store 139(i64) 141
-             142:     18(int) Load 139(i64)
-             143:     18(int) IAdd 142 61
+             142: 18(int64_t) Load 139(i64)
+             143: 18(int64_t) IAdd 142 61
                               Store 139(i64) 143
-             144:  132(ivec3) Load 134(u64v)
-             145:  136(ivec3) CompositeConstruct 61 61 61
-             146:  132(ivec3) ISub 144 145
+             144:132(i64vec3) Load 134(u64v)
+             145:136(i64vec3) CompositeConstruct 61 61 61
+             146:132(i64vec3) ISub 144 145
                               Store 134(u64v) 146
-             147:  132(ivec3) Load 134(u64v)
-             148:  132(ivec3) Not 147
+             147:132(i64vec3) Load 134(u64v)
+             148:132(i64vec3) Not 147
                               Store 134(u64v) 148
-             149:     18(int) Load 139(i64)
+             149: 18(int64_t) Load 139(i64)
                               Store 139(i64) 149
-             150:  132(ivec3) Load 134(u64v)
-             151:  132(ivec3) SNegate 150
+             150:132(i64vec3) Load 134(u64v)
+             151:132(i64vec3) SNegate 150
                               Store 134(u64v) 151
-             152:     18(int) Load 139(i64)
-             153:     18(int) Load 139(i64)
-             154:     18(int) IAdd 153 152
+             152: 18(int64_t) Load 139(i64)
+             153: 18(int64_t) Load 139(i64)
+             154: 18(int64_t) IAdd 153 152
                               Store 139(i64) 154
-             155:  132(ivec3) Load 134(u64v)
-             156:  132(ivec3) Load 134(u64v)
-             157:  132(ivec3) ISub 156 155
+             155:132(i64vec3) Load 134(u64v)
+             156:132(i64vec3) Load 134(u64v)
+             157:132(i64vec3) ISub 156 155
                               Store 134(u64v) 157
              160:     31(int) Load 159(i)
-             161:     18(int) SConvert 160
-             162:     18(int) Load 139(i64)
-             163:     18(int) IMul 162 161
+             161: 18(int64_t) SConvert 160
+             162: 18(int64_t) Load 139(i64)
+             163: 18(int64_t) IMul 162 161
                               Store 139(i64) 163
              167:  164(ivec3) Load 166(uv)
-             168:  132(ivec3) UConvert 167
-             169:  132(ivec3) Load 134(u64v)
-             170:  132(ivec3) UDiv 169 168
+             168:132(i64vec3) UConvert 167
+             169:132(i64vec3) Load 134(u64v)
+             170:132(i64vec3) UDiv 169 168
                               Store 134(u64v) 170
              171:     31(int) Load 159(i)
-             172:     18(int) SConvert 171
-             173:     14(int) Bitcast 172
-             174:  132(ivec3) Load 134(u64v)
-             175:  132(ivec3) CompositeConstruct 173 173 173
-             176:  132(ivec3) UMod 174 175
+             172: 18(int64_t) SConvert 171
+             173: 14(int64_t) Bitcast 172
+             174:132(i64vec3) Load 134(u64v)
+             175:132(i64vec3) CompositeConstruct 173 173 173
+             176:132(i64vec3) UMod 174 175
                               Store 134(u64v) 176
-             177:  132(ivec3) Load 134(u64v)
+             177:132(i64vec3) Load 134(u64v)
              178:  164(ivec3) Load 166(uv)
-             179:  132(ivec3) UConvert 178
-             180:  132(ivec3) IAdd 177 179
+             179:132(i64vec3) UConvert 178
+             180:132(i64vec3) IAdd 177 179
                               Store 134(u64v) 180
-             181:     18(int) Load 139(i64)
+             181: 18(int64_t) Load 139(i64)
              182:     31(int) Load 159(i)
-             183:     18(int) SConvert 182
-             184:     18(int) ISub 181 183
+             183: 18(int64_t) SConvert 182
+             184: 18(int64_t) ISub 181 183
                               Store 139(i64) 184
-             185:  132(ivec3) Load 134(u64v)
+             185:132(i64vec3) Load 134(u64v)
              186:  164(ivec3) Load 166(uv)
-             187:  132(ivec3) UConvert 186
-             188:  132(ivec3) IMul 185 187
+             187:132(i64vec3) UConvert 186
+             188:132(i64vec3) IMul 185 187
                               Store 134(u64v) 188
-             189:     18(int) Load 139(i64)
+             189: 18(int64_t) Load 139(i64)
              190:     31(int) Load 159(i)
-             191:     18(int) SConvert 190
-             192:     18(int) IMul 189 191
+             191: 18(int64_t) SConvert 190
+             192: 18(int64_t) IMul 189 191
                               Store 139(i64) 192
-             193:     18(int) Load 139(i64)
+             193: 18(int64_t) Load 139(i64)
              194:     31(int) Load 159(i)
-             195:     18(int) SConvert 194
-             196:     18(int) SMod 193 195
+             195: 18(int64_t) SConvert 194
+             196: 18(int64_t) SMod 193 195
                               Store 139(i64) 196
-             197:  132(ivec3) Load 134(u64v)
+             197:132(i64vec3) Load 134(u64v)
              198:     31(int) Load 159(i)
              200:  199(ivec3) CompositeConstruct 198 198 198
-             201:  132(ivec3) ShiftLeftLogical 197 200
+             201:132(i64vec3) ShiftLeftLogical 197 200
                               Store 134(u64v) 201
-             202:     18(int) Load 139(i64)
+             202: 18(int64_t) Load 139(i64)
              205:    204(ptr) AccessChain 166(uv) 203
              206:     21(int) Load 205
-             207:     18(int) ShiftRightArithmetic 202 206
+             207: 18(int64_t) ShiftRightArithmetic 202 206
                               Store 139(i64) 207
              208:     31(int) Load 159(i)
-             209:  132(ivec3) Load 134(u64v)
+             209:132(i64vec3) Load 134(u64v)
              210:  199(ivec3) CompositeConstruct 208 208 208
-             211:  132(ivec3) ShiftLeftLogical 209 210
+             211:132(i64vec3) ShiftLeftLogical 209 210
                               Store 134(u64v) 211
              212:    204(ptr) AccessChain 166(uv) 203
              213:     21(int) Load 212
-             214:     18(int) Load 139(i64)
-             215:     18(int) ShiftRightArithmetic 214 213
+             214: 18(int64_t) Load 139(i64)
+             215: 18(int64_t) ShiftRightArithmetic 214 213
                               Store 139(i64) 215
-             216:     18(int) Load 139(i64)
+             216: 18(int64_t) Load 139(i64)
              218:     40(ptr) AccessChain 134(u64v) 217
-             219:     14(int) Load 218
-             220:     18(int) ShiftLeftLogical 216 219
+             219: 14(int64_t) Load 218
+             220: 18(int64_t) ShiftLeftLogical 216 219
                               Store 139(i64) 220
-             221:  132(ivec3) Load 134(u64v)
-             222:     18(int) Load 139(i64)
-             223:  136(ivec3) CompositeConstruct 222 222 222
-             224:  132(ivec3) ShiftLeftLogical 221 223
+             221:132(i64vec3) Load 134(u64v)
+             222: 18(int64_t) Load 139(i64)
+             223:136(i64vec3) CompositeConstruct 222 222 222
+             224:132(i64vec3) ShiftLeftLogical 221 223
                               Store 134(u64v) 224
              228:     40(ptr) AccessChain 134(u64v) 227
-             229:     14(int) Load 228
-             230:     18(int) Load 139(i64)
-             231:     14(int) Bitcast 230
+             229: 14(int64_t) Load 228
+             230: 18(int64_t) Load 139(i64)
+             231: 14(int64_t) Bitcast 230
              232:    55(bool) INotEqual 229 231
                               Store 226(b) 232
-             233:     18(int) Load 139(i64)
-             234:     14(int) Bitcast 233
+             233: 18(int64_t) Load 139(i64)
+             234: 14(int64_t) Bitcast 233
              235:     40(ptr) AccessChain 134(u64v) 227
-             236:     14(int) Load 235
+             236: 14(int64_t) Load 235
              237:    55(bool) IEqual 234 236
                               Store 226(b) 237
              238:     40(ptr) AccessChain 134(u64v) 227
-             239:     14(int) Load 238
+             239: 14(int64_t) Load 238
              240:    204(ptr) AccessChain 166(uv) 203
              241:     21(int) Load 240
-             242:     14(int) UConvert 241
+             242: 14(int64_t) UConvert 241
              243:    55(bool) UGreaterThan 239 242
                               Store 226(b) 243
-             244:     18(int) Load 139(i64)
+             244: 18(int64_t) Load 139(i64)
              245:     31(int) Load 159(i)
-             246:     18(int) SConvert 245
+             246: 18(int64_t) SConvert 245
              247:    55(bool) SLessThan 244 246
                               Store 226(b) 247
              248:     40(ptr) AccessChain 134(u64v) 203
-             249:     14(int) Load 248
+             249: 14(int64_t) Load 248
              250:    204(ptr) AccessChain 166(uv) 227
              251:     21(int) Load 250
-             252:     14(int) UConvert 251
+             252: 14(int64_t) UConvert 251
              253:    55(bool) UGreaterThanEqual 249 252
                               Store 226(b) 253
-             254:     18(int) Load 139(i64)
+             254: 18(int64_t) Load 139(i64)
              255:     31(int) Load 159(i)
-             256:     18(int) SConvert 255
+             256: 18(int64_t) SConvert 255
              257:    55(bool) SLessThanEqual 254 256
                               Store 226(b) 257
              258:     31(int) Load 159(i)
-             259:     18(int) SConvert 258
-             260:     14(int) Bitcast 259
-             261:  132(ivec3) Load 134(u64v)
-             262:  132(ivec3) CompositeConstruct 260 260 260
-             263:  132(ivec3) BitwiseOr 261 262
+             259: 18(int64_t) SConvert 258
+             260: 14(int64_t) Bitcast 259
+             261:132(i64vec3) Load 134(u64v)
+             262:132(i64vec3) CompositeConstruct 260 260 260
+             263:132(i64vec3) BitwiseOr 261 262
                               Store 134(u64v) 263
-             264:     18(int) Load 139(i64)
+             264: 18(int64_t) Load 139(i64)
              265:     31(int) Load 159(i)
-             266:     18(int) SConvert 265
-             267:     18(int) BitwiseOr 264 266
+             266: 18(int64_t) SConvert 265
+             267: 18(int64_t) BitwiseOr 264 266
                               Store 139(i64) 267
              268:     31(int) Load 159(i)
-             269:     18(int) SConvert 268
-             270:     18(int) Load 139(i64)
-             271:     18(int) BitwiseAnd 270 269
+             269: 18(int64_t) SConvert 268
+             270: 18(int64_t) Load 139(i64)
+             271: 18(int64_t) BitwiseAnd 270 269
                               Store 139(i64) 271
-             272:  132(ivec3) Load 134(u64v)
+             272:132(i64vec3) Load 134(u64v)
              273:  164(ivec3) Load 166(uv)
-             274:  132(ivec3) UConvert 273
-             275:  132(ivec3) BitwiseAnd 272 274
+             274:132(i64vec3) UConvert 273
+             275:132(i64vec3) BitwiseAnd 272 274
                               Store 134(u64v) 275
-             276:     18(int) Load 139(i64)
-             277:     14(int) Bitcast 276
-             278:  132(ivec3) Load 134(u64v)
-             279:  132(ivec3) CompositeConstruct 277 277 277
-             280:  132(ivec3) BitwiseXor 278 279
+             276: 18(int64_t) Load 139(i64)
+             277: 14(int64_t) Bitcast 276
+             278:132(i64vec3) Load 134(u64v)
+             279:132(i64vec3) CompositeConstruct 277 277 277
+             280:132(i64vec3) BitwiseXor 278 279
                               Store 134(u64v) 280
-             281:  132(ivec3) Load 134(u64v)
-             282:     18(int) Load 139(i64)
-             283:     14(int) Bitcast 282
-             284:  132(ivec3) CompositeConstruct 283 283 283
-             285:  132(ivec3) BitwiseXor 281 284
+             281:132(i64vec3) Load 134(u64v)
+             282: 18(int64_t) Load 139(i64)
+             283: 14(int64_t) Bitcast 282
+             284:132(i64vec3) CompositeConstruct 283 283 283
+             285:132(i64vec3) BitwiseXor 281 284
                               Store 134(u64v) 285
                               Return
                               FunctionEnd
@@ -472,193 +472,193 @@ spv.int64.frag
          392(iv):     75(ptr) Variable Function
          397(uv):     82(ptr) Variable Function
          401(bv):    400(ptr) Variable Function
-             287:   52(ivec2) Load 286(i64v)
-             288:   52(ivec2) ExtInst 1(GLSL.std.450) 5(SAbs) 287
+             287: 52(i64vec2) Load 286(i64v)
+             288: 52(i64vec2) ExtInst 1(GLSL.std.450) 5(SAbs) 287
                               Store 286(i64v) 288
-             290:     18(int) Load 289(i64)
-             291:     18(int) ExtInst 1(GLSL.std.450) 7(SSign) 290
+             290: 18(int64_t) Load 289(i64)
+             291: 18(int64_t) ExtInst 1(GLSL.std.450) 7(SSign) 290
                               Store 289(i64) 291
-             292:   52(ivec2) Load 286(i64v)
-             293:     18(int) Load 289(i64)
-             294:   52(ivec2) CompositeConstruct 293 293
-             295:   52(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 292 294
+             292: 52(i64vec2) Load 286(i64v)
+             293: 18(int64_t) Load 289(i64)
+             294: 52(i64vec2) CompositeConstruct 293 293
+             295: 52(i64vec2) ExtInst 1(GLSL.std.450) 39(SMin) 292 294
                               Store 286(i64v) 295
-             296:   52(ivec2) Load 286(i64v)
-             298:   52(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 296 297
+             296: 52(i64vec2) Load 286(i64v)
+             298: 52(i64vec2) ExtInst 1(GLSL.std.450) 39(SMin) 296 297
                               Store 286(i64v) 298
-             300:  132(ivec3) Load 299(u64v)
-             302:     14(int) Load 301(u64)
-             303:  132(ivec3) CompositeConstruct 302 302 302
-             304:  132(ivec3) ExtInst 1(GLSL.std.450) 38(UMin) 300 303
+             300:132(i64vec3) Load 299(u64v)
+             302: 14(int64_t) Load 301(u64)
+             303:132(i64vec3) CompositeConstruct 302 302 302
+             304:132(i64vec3) ExtInst 1(GLSL.std.450) 38(UMin) 300 303
                               Store 299(u64v) 304
-             305:  132(ivec3) Load 299(u64v)
-             307:  132(ivec3) ExtInst 1(GLSL.std.450) 38(UMin) 305 306
+             305:132(i64vec3) Load 299(u64v)
+             307:132(i64vec3) ExtInst 1(GLSL.std.450) 38(UMin) 305 306
                               Store 299(u64v) 307
-             308:   52(ivec2) Load 286(i64v)
-             309:     18(int) Load 289(i64)
-             310:   52(ivec2) CompositeConstruct 309 309
-             311:   52(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 308 310
+             308: 52(i64vec2) Load 286(i64v)
+             309: 18(int64_t) Load 289(i64)
+             310: 52(i64vec2) CompositeConstruct 309 309
+             311: 52(i64vec2) ExtInst 1(GLSL.std.450) 42(SMax) 308 310
                               Store 286(i64v) 311
-             312:   52(ivec2) Load 286(i64v)
-             313:   52(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 312 297
+             312: 52(i64vec2) Load 286(i64v)
+             313: 52(i64vec2) ExtInst 1(GLSL.std.450) 42(SMax) 312 297
                               Store 286(i64v) 313
-             314:  132(ivec3) Load 299(u64v)
-             315:     14(int) Load 301(u64)
-             316:  132(ivec3) CompositeConstruct 315 315 315
-             317:  132(ivec3) ExtInst 1(GLSL.std.450) 41(UMax) 314 316
+             314:132(i64vec3) Load 299(u64v)
+             315: 14(int64_t) Load 301(u64)
+             316:132(i64vec3) CompositeConstruct 315 315 315
+             317:132(i64vec3) ExtInst 1(GLSL.std.450) 41(UMax) 314 316
                               Store 299(u64v) 317
-             318:  132(ivec3) Load 299(u64v)
-             319:  132(ivec3) ExtInst 1(GLSL.std.450) 41(UMax) 318 306
+             318:132(i64vec3) Load 299(u64v)
+             319:132(i64vec3) ExtInst 1(GLSL.std.450) 41(UMax) 318 306
                               Store 299(u64v) 319
-             320:   52(ivec2) Load 286(i64v)
-             321:     18(int) Load 289(i64)
-             322:     18(int) SNegate 321
-             323:     18(int) Load 289(i64)
-             324:   52(ivec2) CompositeConstruct 322 322
-             325:   52(ivec2) CompositeConstruct 323 323
-             326:   52(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 320 324 325
+             320: 52(i64vec2) Load 286(i64v)
+             321: 18(int64_t) Load 289(i64)
+             322: 18(int64_t) SNegate 321
+             323: 18(int64_t) Load 289(i64)
+             324: 52(i64vec2) CompositeConstruct 322 322
+             325: 52(i64vec2) CompositeConstruct 323 323
+             326: 52(i64vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 320 324 325
                               Store 286(i64v) 326
-             327:   52(ivec2) Load 286(i64v)
-             328:   52(ivec2) Load 286(i64v)
-             329:   52(ivec2) SNegate 328
-             330:   52(ivec2) Load 286(i64v)
-             331:   52(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 327 329 330
+             327: 52(i64vec2) Load 286(i64v)
+             328: 52(i64vec2) Load 286(i64v)
+             329: 52(i64vec2) SNegate 328
+             330: 52(i64vec2) Load 286(i64v)
+             331: 52(i64vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 327 329 330
                               Store 286(i64v) 331
-             332:  132(ivec3) Load 299(u64v)
-             333:     14(int) Load 301(u64)
-             334:     14(int) SNegate 333
-             335:     14(int) Load 301(u64)
-             336:  132(ivec3) CompositeConstruct 334 334 334
-             337:  132(ivec3) CompositeConstruct 335 335 335
-             338:  132(ivec3) ExtInst 1(GLSL.std.450) 44(UClamp) 332 336 337
+             332:132(i64vec3) Load 299(u64v)
+             333: 14(int64_t) Load 301(u64)
+             334: 14(int64_t) SNegate 333
+             335: 14(int64_t) Load 301(u64)
+             336:132(i64vec3) CompositeConstruct 334 334 334
+             337:132(i64vec3) CompositeConstruct 335 335 335
+             338:132(i64vec3) ExtInst 1(GLSL.std.450) 44(UClamp) 332 336 337
                               Store 299(u64v) 338
-             339:  132(ivec3) Load 299(u64v)
-             340:  132(ivec3) Load 299(u64v)
-             341:  132(ivec3) SNegate 340
-             342:  132(ivec3) Load 299(u64v)
-             343:  132(ivec3) ExtInst 1(GLSL.std.450) 44(UClamp) 339 341 342
+             339:132(i64vec3) Load 299(u64v)
+             340:132(i64vec3) Load 299(u64v)
+             341:132(i64vec3) SNegate 340
+             342:132(i64vec3) Load 299(u64v)
+             343:132(i64vec3) ExtInst 1(GLSL.std.450) 44(UClamp) 339 341 342
                               Store 299(u64v) 343
              344:     19(ptr) AccessChain 286(i64v) 227
-             345:     18(int) Load 344
+             345: 18(int64_t) Load 344
              346:     19(ptr) AccessChain 286(i64v) 203
-             347:     18(int) Load 346
-             349:     18(int) Select 348 347 345
+             347: 18(int64_t) Load 346
+             349: 18(int64_t) Select 348 347 345
                               Store 289(i64) 349
-             350:     18(int) Load 289(i64)
-             351:   52(ivec2) CompositeConstruct 350 350
-             352:     18(int) Load 289(i64)
-             353:     18(int) SNegate 352
-             354:   52(ivec2) CompositeConstruct 353 353
-             357:   52(ivec2) Select 356 354 351
+             350: 18(int64_t) Load 289(i64)
+             351: 52(i64vec2) CompositeConstruct 350 350
+             352: 18(int64_t) Load 289(i64)
+             353: 18(int64_t) SNegate 352
+             354: 52(i64vec2) CompositeConstruct 353 353
+             357: 52(i64vec2) Select 356 354 351
                               Store 286(i64v) 357
              358:     40(ptr) AccessChain 299(u64v) 227
-             359:     14(int) Load 358
+             359: 14(int64_t) Load 358
              360:     40(ptr) AccessChain 299(u64v) 203
-             361:     14(int) Load 360
-             362:     14(int) Select 348 361 359
+             361: 14(int64_t) Load 360
+             362: 14(int64_t) Select 348 361 359
                               Store 301(u64) 362
-             363:     14(int) Load 301(u64)
-             364:  132(ivec3) CompositeConstruct 363 363 363
-             365:     14(int) Load 301(u64)
-             366:     14(int) SNegate 365
-             367:  132(ivec3) CompositeConstruct 366 366 366
-             370:  132(ivec3) Select 369 367 364
+             363: 14(int64_t) Load 301(u64)
+             364:132(i64vec3) CompositeConstruct 363 363 363
+             365: 14(int64_t) Load 301(u64)
+             366: 14(int64_t) SNegate 365
+             367:132(i64vec3) CompositeConstruct 366 366 366
+             370:132(i64vec3) Select 369 367 364
                               Store 299(u64v) 370
-             374:  371(fvec3) Load 373(dv)
-             375:   95(fvec2) VectorShuffle 374 374 0 1
-             376:   52(ivec2) Bitcast 375
+             374:371(f64vec3) Load 373(dv)
+             375: 95(f64vec2) VectorShuffle 374 374 0 1
+             376: 52(i64vec2) Bitcast 375
                               Store 286(i64v) 376
              378:    377(ptr) AccessChain 373(dv) 217
-             379:   94(float) Load 378
-             380:     14(int) Bitcast 379
+             379:94(float64_t) Load 378
+             380: 14(int64_t) Bitcast 379
              381:     40(ptr) AccessChain 299(u64v) 227
                               Store 381 380
-             382:   52(ivec2) Load 286(i64v)
-             383:   95(fvec2) Bitcast 382
-             384:  371(fvec3) Load 373(dv)
-             385:  371(fvec3) VectorShuffle 384 383 3 4 2
+             382: 52(i64vec2) Load 286(i64v)
+             383: 95(f64vec2) Bitcast 382
+             384:371(f64vec3) Load 373(dv)
+             385:371(f64vec3) VectorShuffle 384 383 3 4 2
                               Store 373(dv) 385
-             386:  132(ivec3) Load 299(u64v)
-             387:  371(fvec3) Bitcast 386
+             386:132(i64vec3) Load 299(u64v)
+             387:371(f64vec3) Bitcast 386
                               Store 373(dv) 387
-             391:     18(int) Bitcast 390
+             391: 18(int64_t) Bitcast 390
                               Store 289(i64) 391
-             393:     18(int) Load 289(i64)
+             393: 18(int64_t) Load 289(i64)
              394:   74(ivec2) Bitcast 393
                               Store 392(iv) 394
-             396:     14(int) Bitcast 395
+             396: 14(int64_t) Bitcast 395
                               Store 301(u64) 396
-             398:     14(int) Load 301(u64)
+             398: 14(int64_t) Load 301(u64)
              399:   81(ivec2) Bitcast 398
                               Store 397(uv) 399
-             402:  132(ivec3) Load 299(u64v)
-             403:     14(int) Load 301(u64)
-             404:  132(ivec3) CompositeConstruct 403 403 403
+             402:132(i64vec3) Load 299(u64v)
+             403: 14(int64_t) Load 301(u64)
+             404:132(i64vec3) CompositeConstruct 403 403 403
              405:  368(bvec3) ULessThan 402 404
                               Store 401(bv) 405
-             406:   52(ivec2) Load 286(i64v)
-             407:     18(int) Load 289(i64)
-             408:   52(ivec2) CompositeConstruct 407 407
+             406: 52(i64vec2) Load 286(i64v)
+             407: 18(int64_t) Load 289(i64)
+             408: 52(i64vec2) CompositeConstruct 407 407
              409:   56(bvec2) SLessThan 406 408
              410:  368(bvec3) Load 401(bv)
              411:  368(bvec3) VectorShuffle 410 409 3 4 2
                               Store 401(bv) 411
-             412:  132(ivec3) Load 299(u64v)
-             413:     14(int) Load 301(u64)
-             414:  132(ivec3) CompositeConstruct 413 413 413
+             412:132(i64vec3) Load 299(u64v)
+             413: 14(int64_t) Load 301(u64)
+             414:132(i64vec3) CompositeConstruct 413 413 413
              415:  368(bvec3) ULessThanEqual 412 414
                               Store 401(bv) 415
-             416:   52(ivec2) Load 286(i64v)
-             417:     18(int) Load 289(i64)
-             418:   52(ivec2) CompositeConstruct 417 417
+             416: 52(i64vec2) Load 286(i64v)
+             417: 18(int64_t) Load 289(i64)
+             418: 52(i64vec2) CompositeConstruct 417 417
              419:   56(bvec2) SLessThanEqual 416 418
              420:  368(bvec3) Load 401(bv)
              421:  368(bvec3) VectorShuffle 420 419 3 4 2
                               Store 401(bv) 421
-             422:  132(ivec3) Load 299(u64v)
-             423:     14(int) Load 301(u64)
-             424:  132(ivec3) CompositeConstruct 423 423 423
+             422:132(i64vec3) Load 299(u64v)
+             423: 14(int64_t) Load 301(u64)
+             424:132(i64vec3) CompositeConstruct 423 423 423
              425:  368(bvec3) UGreaterThan 422 424
                               Store 401(bv) 425
-             426:   52(ivec2) Load 286(i64v)
-             427:     18(int) Load 289(i64)
-             428:   52(ivec2) CompositeConstruct 427 427
+             426: 52(i64vec2) Load 286(i64v)
+             427: 18(int64_t) Load 289(i64)
+             428: 52(i64vec2) CompositeConstruct 427 427
              429:   56(bvec2) SGreaterThan 426 428
              430:  368(bvec3) Load 401(bv)
              431:  368(bvec3) VectorShuffle 430 429 3 4 2
                               Store 401(bv) 431
-             432:  132(ivec3) Load 299(u64v)
-             433:     14(int) Load 301(u64)
-             434:  132(ivec3) CompositeConstruct 433 433 433
+             432:132(i64vec3) Load 299(u64v)
+             433: 14(int64_t) Load 301(u64)
+             434:132(i64vec3) CompositeConstruct 433 433 433
              435:  368(bvec3) UGreaterThanEqual 432 434
                               Store 401(bv) 435
-             436:   52(ivec2) Load 286(i64v)
-             437:     18(int) Load 289(i64)
-             438:   52(ivec2) CompositeConstruct 437 437
+             436: 52(i64vec2) Load 286(i64v)
+             437: 18(int64_t) Load 289(i64)
+             438: 52(i64vec2) CompositeConstruct 437 437
              439:   56(bvec2) SGreaterThanEqual 436 438
              440:  368(bvec3) Load 401(bv)
              441:  368(bvec3) VectorShuffle 440 439 3 4 2
                               Store 401(bv) 441
-             442:  132(ivec3) Load 299(u64v)
-             443:     14(int) Load 301(u64)
-             444:  132(ivec3) CompositeConstruct 443 443 443
+             442:132(i64vec3) Load 299(u64v)
+             443: 14(int64_t) Load 301(u64)
+             444:132(i64vec3) CompositeConstruct 443 443 443
              445:  368(bvec3) IEqual 442 444
                               Store 401(bv) 445
-             446:   52(ivec2) Load 286(i64v)
-             447:     18(int) Load 289(i64)
-             448:   52(ivec2) CompositeConstruct 447 447
+             446: 52(i64vec2) Load 286(i64v)
+             447: 18(int64_t) Load 289(i64)
+             448: 52(i64vec2) CompositeConstruct 447 447
              449:   56(bvec2) IEqual 446 448
              450:  368(bvec3) Load 401(bv)
              451:  368(bvec3) VectorShuffle 450 449 3 4 2
                               Store 401(bv) 451
-             452:  132(ivec3) Load 299(u64v)
-             453:     14(int) Load 301(u64)
-             454:  132(ivec3) CompositeConstruct 453 453 453
+             452:132(i64vec3) Load 299(u64v)
+             453: 14(int64_t) Load 301(u64)
+             454:132(i64vec3) CompositeConstruct 453 453 453
              455:  368(bvec3) INotEqual 452 454
                               Store 401(bv) 455
-             456:   52(ivec2) Load 286(i64v)
-             457:     18(int) Load 289(i64)
-             458:   52(ivec2) CompositeConstruct 457 457
+             456: 52(i64vec2) Load 286(i64v)
+             457: 18(int64_t) Load 289(i64)
+             458: 52(i64vec2) CompositeConstruct 457 457
              459:   56(bvec2) INotEqual 456 458
              460:  368(bvec3) Load 401(bv)
              461:  368(bvec3) VectorShuffle 460 459 3 4 2

3rdparty/glslang/Test/baseResults/spv.int8.frag.out

@@ -96,13 +96,13 @@ spv.int8.frag
                2:             TypeVoid
                3:             TypeFunction 2
               14:             TypeInt 8 1
-              15:             TypePointer Function 14(int)
+              15:             TypePointer Function 14(int8_t)
               17:             TypeInt 32 0
               18:     17(int) Constant 3
-              19:             TypeArray 14(int) 18
-              20:     14(int) Constant 4294967279
-              21:     14(int) Constant 4294967295
-              22:     14(int) Constant 0
+              19:             TypeArray 14(int8_t) 18
+              20:  14(int8_t) Constant 4294967279
+              21:  14(int8_t) Constant 4294967295
+              22:  14(int8_t) Constant 0
               23:          19 ConstantComposite 20 21 22
     24(Uniforms):             TypeStruct 17(int)
               25:             TypePointer Uniform 24(Uniforms)
@@ -112,82 +112,82 @@ spv.int8.frag
               29:             TypePointer Uniform 17(int)
               32:             TypePointer Function 19
               36:             TypeInt 8 0
-              37:             TypePointer Function 36(int)
-              39:             TypeArray 36(int) 18
-              40:     36(int) Constant 255
-              41:     36(int) Constant 127
+              37:             TypePointer Function 36(int8_t)
+              39:             TypeArray 36(int8_t) 18
+              40:  36(int8_t) Constant 255
+              41:  36(int8_t) Constant 127
               42:          39 ConstantComposite 40 40 41
               45:             TypePointer Function 39
-              49:             TypeVector 36(int) 2
-              50:             TypePointer Function 49(ivec2)
-              52:             TypeVector 14(int) 2
-              53:             TypePointer Function 52(ivec2)
+              49:             TypeVector 36(int8_t) 2
+              50:             TypePointer Function 49(i8vec2)
+              52:             TypeVector 14(int8_t) 2
+              53:             TypePointer Function 52(i8vec2)
               57:             TypeInt 16 1
-              58:             TypeVector 57(int) 2
-              59:             TypePointer Function 58(ivec2)
+              58:             TypeVector 57(int16_t) 2
+              59:             TypePointer Function 58(i16vec2)
               66:             TypeVector 27(int) 2
               67:             TypePointer Function 66(ivec2)
               74:             TypeVector 17(int) 2
               75:             TypePointer Function 74(ivec2)
               80:             TypeInt 64 1
-              81:             TypeVector 80(int) 2
-              82:             TypePointer Function 81(ivec2)
+              81:             TypeVector 80(int64_t) 2
+              82:             TypePointer Function 81(i64vec2)
               86:             TypeInt 64 0
-              87:             TypeVector 86(int) 2
-              88:             TypePointer Function 87(ivec2)
+              87:             TypeVector 86(int64_t) 2
+              88:             TypePointer Function 87(i64vec2)
              100:             TypeFloat 16
-             101:             TypeVector 100(float) 2
-             102:             TypePointer Function 101(fvec2)
+             101:             TypeVector 100(float16_t) 2
+             102:             TypePointer Function 101(f16vec2)
              106:             TypeFloat 32
              107:             TypeVector 106(float) 2
              108:             TypePointer Function 107(fvec2)
              112:             TypeFloat 64
-             113:             TypeVector 112(float) 2
-             114:             TypePointer Function 113(fvec2)
+             113:             TypeVector 112(float64_t) 2
+             114:             TypePointer Function 113(f64vec2)
              141:             TypeInt 16 0
-             142:             TypeVector 141(int) 2
-             143:             TypePointer Function 142(ivec2)
+             142:             TypeVector 141(int16_t) 2
+             143:             TypePointer Function 142(i16vec2)
              171:             TypeBool
              172:             TypeVector 171(bool) 2
              173:             TypePointer Function 172(bvec2)
-             176:     14(int) Constant 1
-             177:   52(ivec2) ConstantComposite 22 22
-             178:   52(ivec2) ConstantComposite 176 176
-             181:     36(int) Constant 0
-             182:     36(int) Constant 1
-             183:   49(ivec2) ConstantComposite 181 181
-             184:   49(ivec2) ConstantComposite 182 182
-             190:             TypeVector 14(int) 3
-             191:             TypePointer Function 190(ivec3)
+             176:  14(int8_t) Constant 1
+             177:  52(i8vec2) ConstantComposite 22 22
+             178:  52(i8vec2) ConstantComposite 176 176
+             181:  36(int8_t) Constant 0
+             182:  36(int8_t) Constant 1
+             183:  49(i8vec2) ConstantComposite 181 181
+             184:  49(i8vec2) ConstantComposite 182 182
+             190:             TypeVector 14(int8_t) 3
+             191:             TypePointer Function 190(i8vec3)
              215:             TypePointer Function 27(int)
              221:             TypeVector 17(int) 3
              222:             TypePointer Function 221(ivec3)
              225:             TypeVector 27(int) 3
-             241:             TypePointer Function 57(int)
+             241:             TypePointer Function 57(int16_t)
              264:     17(int) Constant 1
              270:     17(int) Constant 2
              278:             TypePointer Function 171(bool)
              280:     17(int) Constant 0
              293:             TypePointer Function 17(int)
-             352:   52(ivec2) ConstantComposite 21 21
-             358:             TypeVector 36(int) 3
-             362:  190(ivec3) ConstantComposite 22 22 22
+             352:  52(i8vec2) ConstantComposite 21 21
+             358:             TypeVector 36(int8_t) 3
+             362: 190(i8vec3) ConstantComposite 22 22 22
              404:   171(bool) ConstantTrue
              411:   171(bool) ConstantFalse
              412:  172(bvec2) ConstantComposite 411 411
              427:             TypeVector 171(bool) 3
              428:  427(bvec3) ConstantComposite 411 411 411
-             434:             TypeVector 14(int) 4
-             435:             TypePointer Function 434(ivec4)
-             439:             TypePointer Function 141(int)
-             445:             TypeVector 36(int) 4
-             446:             TypePointer Function 445(ivec4)
+             434:             TypeVector 14(int8_t) 4
+             435:             TypePointer Function 434(i8vec4)
+             439:             TypePointer Function 141(int16_t)
+             445:             TypeVector 36(int8_t) 4
+             446:             TypePointer Function 445(i8vec4)
              458:             TypePointer Function 427(bvec3)
-      526(Block):             TypeStruct 14(int) 52(ivec2) 190(ivec3) 434(ivec4) 36(int) 49(ivec2) 190(ivec3) 445(ivec4)
+      526(Block):             TypeStruct 14(int8_t) 52(i8vec2) 190(i8vec3) 434(i8vec4) 36(int8_t) 49(i8vec2) 190(i8vec3) 445(i8vec4)
              527:             TypePointer Uniform 526(Block)
       528(block):    527(ptr) Variable Uniform
-        529(si8):     14(int) SpecConstant 4294967286
-        530(su8):     36(int) SpecConstant 20
+        529(si8):  14(int8_t) SpecConstant 4294967286
+        530(su8):  36(int8_t) SpecConstant 20
          4(main):           2 Function None 3
                5:             Label
                               Return
@@ -202,13 +202,13 @@ spv.int8.frag
               31:     17(int) Load 30
                               Store 33(indexable) 23
               34:     15(ptr) AccessChain 33(indexable) 31
-              35:     14(int) Load 34
+              35:  14(int8_t) Load 34
                               Store 16(i8) 35
               43:     29(ptr) AccessChain 26 28
               44:     17(int) Load 43
                               Store 46(indexable) 42
               47:     37(ptr) AccessChain 46(indexable) 44
-              48:     36(int) Load 47
+              48:  36(int8_t) Load 47
                               Store 38(u8) 48
                               Return
                               FunctionEnd
@@ -226,133 +226,133 @@ spv.int8.frag
        115(f64v):    114(ptr) Variable Function
        144(u16v):    143(ptr) Variable Function
          174(bv):    173(ptr) Variable Function
-              55:   52(ivec2) Load 54(i8v)
-              56:   49(ivec2) Bitcast 55
+              55:  52(i8vec2) Load 54(i8v)
+              56:  49(i8vec2) Bitcast 55
                               Store 51(u8v) 56
-              61:   52(ivec2) Load 54(i8v)
-              62:   58(ivec2) SConvert 61
+              61:  52(i8vec2) Load 54(i8v)
+              62: 58(i16vec2) SConvert 61
                               Store 60(i16v) 62
-              63:   49(ivec2) Load 51(u8v)
-              64:   58(ivec2) UConvert 63
-              65:   58(ivec2) Bitcast 64
+              63:  49(i8vec2) Load 51(u8v)
+              64: 58(i16vec2) UConvert 63
+              65: 58(i16vec2) Bitcast 64
                               Store 60(i16v) 65
-              69:   52(ivec2) Load 54(i8v)
+              69:  52(i8vec2) Load 54(i8v)
               70:   66(ivec2) SConvert 69
                               Store 68(i32v) 70
-              71:   49(ivec2) Load 51(u8v)
+              71:  49(i8vec2) Load 51(u8v)
               72:   66(ivec2) UConvert 71
               73:   66(ivec2) Bitcast 72
                               Store 68(i32v) 73
-              77:   52(ivec2) Load 54(i8v)
+              77:  52(i8vec2) Load 54(i8v)
               78:   66(ivec2) SConvert 77
               79:   74(ivec2) Bitcast 78
                               Store 76(u32v) 79
-              84:   52(ivec2) Load 54(i8v)
-              85:   81(ivec2) SConvert 84
+              84:  52(i8vec2) Load 54(i8v)
+              85: 81(i64vec2) SConvert 84
                               Store 83(i64v) 85
-              90:   52(ivec2) Load 54(i8v)
-              91:   81(ivec2) SConvert 90
-              92:   87(ivec2) Bitcast 91
+              90:  52(i8vec2) Load 54(i8v)
+              91: 81(i64vec2) SConvert 90
+              92: 87(i64vec2) Bitcast 91
                               Store 89(u64v) 92
-              93:   49(ivec2) Load 51(u8v)
+              93:  49(i8vec2) Load 51(u8v)
               94:   74(ivec2) UConvert 93
                               Store 76(u32v) 94
-              95:   49(ivec2) Load 51(u8v)
-              96:   81(ivec2) UConvert 95
-              97:   81(ivec2) Bitcast 96
+              95:  49(i8vec2) Load 51(u8v)
+              96: 81(i64vec2) UConvert 95
+              97: 81(i64vec2) Bitcast 96
                               Store 83(i64v) 97
-              98:   49(ivec2) Load 51(u8v)
-              99:   87(ivec2) UConvert 98
+              98:  49(i8vec2) Load 51(u8v)
+              99: 87(i64vec2) UConvert 98
                               Store 89(u64v) 99
-             104:   52(ivec2) Load 54(i8v)
-             105:  101(fvec2) ConvertSToF 104
+             104:  52(i8vec2) Load 54(i8v)
+             105:101(f16vec2) ConvertSToF 104
                               Store 103(f16v) 105
-             110:   52(ivec2) Load 54(i8v)
+             110:  52(i8vec2) Load 54(i8v)
              111:  107(fvec2) ConvertSToF 110
                               Store 109(f32v) 111
-             116:   52(ivec2) Load 54(i8v)
-             117:  113(fvec2) ConvertSToF 116
+             116:  52(i8vec2) Load 54(i8v)
+             117:113(f64vec2) ConvertSToF 116
                               Store 115(f64v) 117
-             118:   49(ivec2) Load 51(u8v)
-             119:  101(fvec2) ConvertUToF 118
+             118:  49(i8vec2) Load 51(u8v)
+             119:101(f16vec2) ConvertUToF 118
                               Store 103(f16v) 119
-             120:   49(ivec2) Load 51(u8v)
+             120:  49(i8vec2) Load 51(u8v)
              121:  107(fvec2) ConvertUToF 120
                               Store 109(f32v) 121
-             122:   49(ivec2) Load 51(u8v)
-             123:  113(fvec2) ConvertUToF 122
+             122:  49(i8vec2) Load 51(u8v)
+             123:113(f64vec2) ConvertUToF 122
                               Store 115(f64v) 123
-             124:   49(ivec2) Load 51(u8v)
-             125:   52(ivec2) Bitcast 124
+             124:  49(i8vec2) Load 51(u8v)
+             125:  52(i8vec2) Bitcast 124
                               Store 54(i8v) 125
-             126:   52(ivec2) Load 54(i8v)
-             127:   58(ivec2) SConvert 126
+             126:  52(i8vec2) Load 54(i8v)
+             127: 58(i16vec2) SConvert 126
                               Store 60(i16v) 127
-             128:   49(ivec2) Load 51(u8v)
-             129:   58(ivec2) UConvert 128
-             130:   58(ivec2) Bitcast 129
+             128:  49(i8vec2) Load 51(u8v)
+             129: 58(i16vec2) UConvert 128
+             130: 58(i16vec2) Bitcast 129
                               Store 60(i16v) 130
-             131:   52(ivec2) Load 54(i8v)
+             131:  52(i8vec2) Load 54(i8v)
              132:   66(ivec2) SConvert 131
                               Store 68(i32v) 132
-             133:   49(ivec2) Load 51(u8v)
+             133:  49(i8vec2) Load 51(u8v)
              134:   66(ivec2) UConvert 133
              135:   66(ivec2) Bitcast 134
                               Store 68(i32v) 135
-             136:   52(ivec2) Load 54(i8v)
-             137:   81(ivec2) SConvert 136
+             136:  52(i8vec2) Load 54(i8v)
+             137: 81(i64vec2) SConvert 136
                               Store 83(i64v) 137
-             138:   52(ivec2) Load 54(i8v)
-             139:   81(ivec2) SConvert 138
-             140:   87(ivec2) Bitcast 139
+             138:  52(i8vec2) Load 54(i8v)
+             139: 81(i64vec2) SConvert 138
+             140: 87(i64vec2) Bitcast 139
                               Store 89(u64v) 140
-             145:   52(ivec2) Load 54(i8v)
-             146:   58(ivec2) SConvert 145
-             147:  142(ivec2) Bitcast 146
+             145:  52(i8vec2) Load 54(i8v)
+             146: 58(i16vec2) SConvert 145
+             147:142(i16vec2) Bitcast 146
                               Store 144(u16v) 147
-             148:   49(ivec2) Load 51(u8v)
-             149:  142(ivec2) UConvert 148
+             148:  49(i8vec2) Load 51(u8v)
+             149:142(i16vec2) UConvert 148
                               Store 144(u16v) 149
-             150:   49(ivec2) Load 51(u8v)
+             150:  49(i8vec2) Load 51(u8v)
              151:   74(ivec2) UConvert 150
                               Store 76(u32v) 151
-             152:   49(ivec2) Load 51(u8v)
-             153:   81(ivec2) UConvert 152
-             154:   81(ivec2) Bitcast 153
+             152:  49(i8vec2) Load 51(u8v)
+             153: 81(i64vec2) UConvert 152
+             154: 81(i64vec2) Bitcast 153
                               Store 83(i64v) 154
-             155:   49(ivec2) Load 51(u8v)
-             156:   81(ivec2) UConvert 155
-             157:   81(ivec2) Bitcast 156
-             158:   87(ivec2) Bitcast 157
+             155:  49(i8vec2) Load 51(u8v)
+             156: 81(i64vec2) UConvert 155
+             157: 81(i64vec2) Bitcast 156
+             158: 87(i64vec2) Bitcast 157
                               Store 89(u64v) 158
-             159:   52(ivec2) Load 54(i8v)
-             160:  101(fvec2) ConvertSToF 159
+             159:  52(i8vec2) Load 54(i8v)
+             160:101(f16vec2) ConvertSToF 159
                               Store 103(f16v) 160
-             161:   52(ivec2) Load 54(i8v)
+             161:  52(i8vec2) Load 54(i8v)
              162:  107(fvec2) ConvertSToF 161
                               Store 109(f32v) 162
-             163:   52(ivec2) Load 54(i8v)
-             164:  113(fvec2) ConvertSToF 163
+             163:  52(i8vec2) Load 54(i8v)
+             164:113(f64vec2) ConvertSToF 163
                               Store 115(f64v) 164
-             165:   49(ivec2) Load 51(u8v)
-             166:  101(fvec2) ConvertUToF 165
+             165:  49(i8vec2) Load 51(u8v)
+             166:101(f16vec2) ConvertUToF 165
                               Store 103(f16v) 166
-             167:   49(ivec2) Load 51(u8v)
+             167:  49(i8vec2) Load 51(u8v)
              168:  107(fvec2) ConvertUToF 167
                               Store 109(f32v) 168
-             169:   49(ivec2) Load 51(u8v)
-             170:  113(fvec2) ConvertUToF 169
+             169:  49(i8vec2) Load 51(u8v)
+             170:113(f64vec2) ConvertUToF 169
                               Store 115(f64v) 170
              175:  172(bvec2) Load 174(bv)
-             179:   52(ivec2) Select 175 178 177
+             179:  52(i8vec2) Select 175 178 177
                               Store 54(i8v) 179
              180:  172(bvec2) Load 174(bv)
-             185:   49(ivec2) Select 180 184 183
+             185:  49(i8vec2) Select 180 184 183
                               Store 51(u8v) 185
-             186:   52(ivec2) Load 54(i8v)
+             186:  52(i8vec2) Load 54(i8v)
              187:  172(bvec2) INotEqual 186 183
                               Store 174(bv) 187
-             188:   49(ivec2) Load 51(u8v)
+             188:  49(i8vec2) Load 51(u8v)
              189:  172(bvec2) INotEqual 188 183
                               Store 174(bv) 189
                               Return
@@ -365,171 +365,171 @@ spv.int8.frag
          223(uv):    222(ptr) Variable Function
         242(i16):    241(ptr) Variable Function
           279(b):    278(ptr) Variable Function
-             193:  190(ivec3) Load 192(u8v)
-             194:  190(ivec3) CompositeConstruct 176 176 176
-             195:  190(ivec3) IAdd 193 194
+             193: 190(i8vec3) Load 192(u8v)
+             194: 190(i8vec3) CompositeConstruct 176 176 176
+             195: 190(i8vec3) IAdd 193 194
                               Store 192(u8v) 195
-             197:     14(int) Load 196(i8)
-             198:     14(int) ISub 197 176
+             197:  14(int8_t) Load 196(i8)
+             198:  14(int8_t) ISub 197 176
                               Store 196(i8) 198
-             199:     14(int) Load 196(i8)
-             200:     14(int) IAdd 199 176
+             199:  14(int8_t) Load 196(i8)
+             200:  14(int8_t) IAdd 199 176
                               Store 196(i8) 200
-             201:  190(ivec3) Load 192(u8v)
-             202:  190(ivec3) CompositeConstruct 176 176 176
-             203:  190(ivec3) ISub 201 202
+             201: 190(i8vec3) Load 192(u8v)
+             202: 190(i8vec3) CompositeConstruct 176 176 176
+             203: 190(i8vec3) ISub 201 202
                               Store 192(u8v) 203
-             204:  190(ivec3) Load 192(u8v)
-             205:  190(ivec3) Not 204
+             204: 190(i8vec3) Load 192(u8v)
+             205: 190(i8vec3) Not 204
                               Store 192(u8v) 205
-             206:     14(int) Load 196(i8)
+             206:  14(int8_t) Load 196(i8)
                               Store 196(i8) 206
-             207:  190(ivec3) Load 192(u8v)
-             208:  190(ivec3) SNegate 207
+             207: 190(i8vec3) Load 192(u8v)
+             208: 190(i8vec3) SNegate 207
                               Store 192(u8v) 208
-             209:     14(int) Load 196(i8)
-             210:     14(int) Load 196(i8)
-             211:     14(int) IAdd 210 209
+             209:  14(int8_t) Load 196(i8)
+             210:  14(int8_t) Load 196(i8)
+             211:  14(int8_t) IAdd 210 209
                               Store 196(i8) 211
-             212:  190(ivec3) Load 192(u8v)
-             213:  190(ivec3) Load 192(u8v)
-             214:  190(ivec3) ISub 213 212
+             212: 190(i8vec3) Load 192(u8v)
+             213: 190(i8vec3) Load 192(u8v)
+             214: 190(i8vec3) ISub 213 212
                               Store 192(u8v) 214
-             217:     14(int) Load 196(i8)
+             217:  14(int8_t) Load 196(i8)
              218:     27(int) SConvert 217
              219:     27(int) Load 216(i)
              220:     27(int) IMul 219 218
                               Store 216(i) 220
-             224:  190(ivec3) Load 192(u8v)
+             224: 190(i8vec3) Load 192(u8v)
              226:  225(ivec3) SConvert 224
              227:  221(ivec3) Bitcast 226
              228:  221(ivec3) Load 223(uv)
              229:  221(ivec3) UDiv 228 227
                               Store 223(uv) 229
-             230:     14(int) Load 196(i8)
+             230:  14(int8_t) Load 196(i8)
              231:     27(int) SConvert 230
              232:     17(int) Bitcast 231
              233:  221(ivec3) Load 223(uv)
              234:  221(ivec3) CompositeConstruct 232 232 232
              235:  221(ivec3) UMod 233 234
                               Store 223(uv) 235
-             236:  190(ivec3) Load 192(u8v)
+             236: 190(i8vec3) Load 192(u8v)
              237:  225(ivec3) SConvert 236
              238:  221(ivec3) Bitcast 237
              239:  221(ivec3) Load 223(uv)
              240:  221(ivec3) IAdd 238 239
                               Store 223(uv) 240
-             243:     14(int) Load 196(i8)
-             244:     57(int) SConvert 243
-             245:     57(int) Load 242(i16)
-             246:     57(int) ISub 244 245
+             243:  14(int8_t) Load 196(i8)
+             244: 57(int16_t) SConvert 243
+             245: 57(int16_t) Load 242(i16)
+             246: 57(int16_t) ISub 244 245
                               Store 242(i16) 246
-             247:  190(ivec3) Load 192(u8v)
+             247: 190(i8vec3) Load 192(u8v)
              248:  225(ivec3) SConvert 247
              249:  221(ivec3) Bitcast 248
              250:  221(ivec3) Load 223(uv)
              251:  221(ivec3) IMul 249 250
                               Store 223(uv) 251
-             252:     14(int) Load 196(i8)
-             253:     57(int) SConvert 252
-             254:     57(int) Load 242(i16)
-             255:     57(int) IMul 253 254
+             252:  14(int8_t) Load 196(i8)
+             253: 57(int16_t) SConvert 252
+             254: 57(int16_t) Load 242(i16)
+             255: 57(int16_t) IMul 253 254
                               Store 242(i16) 255
-             256:     14(int) Load 196(i8)
+             256:  14(int8_t) Load 196(i8)
              257:     27(int) SConvert 256
              258:     27(int) Load 216(i)
              259:     27(int) SMod 257 258
                               Store 216(i) 259
-             260:     14(int) Load 196(i8)
-             261:  190(ivec3) Load 192(u8v)
-             262:  190(ivec3) CompositeConstruct 260 260 260
-             263:  190(ivec3) ShiftLeftLogical 261 262
+             260:  14(int8_t) Load 196(i8)
+             261: 190(i8vec3) Load 192(u8v)
+             262: 190(i8vec3) CompositeConstruct 260 260 260
+             263: 190(i8vec3) ShiftLeftLogical 261 262
                               Store 192(u8v) 263
              265:     15(ptr) AccessChain 192(u8v) 264
-             266:     14(int) Load 265
-             267:     14(int) Load 196(i8)
-             268:     14(int) ShiftRightArithmetic 267 266
+             266:  14(int8_t) Load 265
+             267:  14(int8_t) Load 196(i8)
+             268:  14(int8_t) ShiftRightArithmetic 267 266
                               Store 196(i8) 268
-             269:     14(int) Load 196(i8)
+             269:  14(int8_t) Load 196(i8)
              271:     15(ptr) AccessChain 192(u8v) 270
-             272:     14(int) Load 271
-             273:     14(int) ShiftLeftLogical 269 272
+             272:  14(int8_t) Load 271
+             273:  14(int8_t) ShiftLeftLogical 269 272
                               Store 196(i8) 273
-             274:  190(ivec3) Load 192(u8v)
-             275:     14(int) Load 196(i8)
-             276:  190(ivec3) CompositeConstruct 275 275 275
-             277:  190(ivec3) ShiftLeftLogical 274 276
+             274: 190(i8vec3) Load 192(u8v)
+             275:  14(int8_t) Load 196(i8)
+             276: 190(i8vec3) CompositeConstruct 275 275 275
+             277: 190(i8vec3) ShiftLeftLogical 274 276
                               Store 192(u8v) 277
              281:     15(ptr) AccessChain 192(u8v) 280
-             282:     14(int) Load 281
-             283:     14(int) Load 196(i8)
+             282:  14(int8_t) Load 281
+             283:  14(int8_t) Load 196(i8)
              284:   171(bool) INotEqual 282 283
                               Store 279(b) 284
-             285:     14(int) Load 196(i8)
+             285:  14(int8_t) Load 196(i8)
              286:     15(ptr) AccessChain 192(u8v) 280
-             287:     14(int) Load 286
+             287:  14(int8_t) Load 286
              288:   171(bool) IEqual 285 287
                               Store 279(b) 288
              289:     15(ptr) AccessChain 192(u8v) 280
-             290:     14(int) Load 289
+             290:  14(int8_t) Load 289
              291:     27(int) SConvert 290
              292:     17(int) Bitcast 291
              294:    293(ptr) AccessChain 223(uv) 264
              295:     17(int) Load 294
              296:   171(bool) UGreaterThan 292 295
                               Store 279(b) 296
-             297:     14(int) Load 196(i8)
+             297:  14(int8_t) Load 196(i8)
              298:     27(int) SConvert 297
              299:     27(int) Load 216(i)
              300:   171(bool) SLessThan 298 299
                               Store 279(b) 300
              301:     15(ptr) AccessChain 192(u8v) 264
-             302:     14(int) Load 301
+             302:  14(int8_t) Load 301
              303:     27(int) SConvert 302
              304:     17(int) Bitcast 303
              305:    293(ptr) AccessChain 223(uv) 280
              306:     17(int) Load 305
              307:   171(bool) UGreaterThanEqual 304 306
                               Store 279(b) 307
-             308:     14(int) Load 196(i8)
+             308:  14(int8_t) Load 196(i8)
              309:     27(int) SConvert 308
              310:     27(int) Load 216(i)
              311:   171(bool) SLessThanEqual 309 310
                               Store 279(b) 311
-             312:     14(int) Load 196(i8)
+             312:  14(int8_t) Load 196(i8)
              313:     27(int) SConvert 312
              314:     17(int) Bitcast 313
              315:  221(ivec3) Load 223(uv)
              316:  221(ivec3) CompositeConstruct 314 314 314
              317:  221(ivec3) BitwiseOr 315 316
                               Store 223(uv) 317
-             318:     14(int) Load 196(i8)
+             318:  14(int8_t) Load 196(i8)
              319:     27(int) SConvert 318
              320:     27(int) Load 216(i)
              321:     27(int) BitwiseOr 319 320
                               Store 216(i) 321
-             322:     14(int) Load 196(i8)
-             323:     57(int) SConvert 322
-             324:     57(int) Load 242(i16)
-             325:     57(int) BitwiseAnd 324 323
+             322:  14(int8_t) Load 196(i8)
+             323: 57(int16_t) SConvert 322
+             324: 57(int16_t) Load 242(i16)
+             325: 57(int16_t) BitwiseAnd 324 323
                               Store 242(i16) 325
-             326:  190(ivec3) Load 192(u8v)
+             326: 190(i8vec3) Load 192(u8v)
              327:  225(ivec3) SConvert 326
              328:  221(ivec3) Bitcast 327
              329:  221(ivec3) Load 223(uv)
              330:  221(ivec3) BitwiseAnd 328 329
                               Store 223(uv) 330
-             331:     14(int) Load 196(i8)
+             331:  14(int8_t) Load 196(i8)
              332:     27(int) SConvert 331
              333:     17(int) Bitcast 332
              334:  221(ivec3) Load 223(uv)
              335:  221(ivec3) CompositeConstruct 333 333 333
              336:  221(ivec3) BitwiseXor 334 335
                               Store 223(uv) 336
-             337:  190(ivec3) Load 192(u8v)
-             338:     14(int) Load 196(i8)
-             339:  190(ivec3) CompositeConstruct 338 338 338
-             340:  190(ivec3) BitwiseXor 337 339
+             337: 190(i8vec3) Load 192(u8v)
+             338:  14(int8_t) Load 196(i8)
+             339: 190(i8vec3) CompositeConstruct 338 338 338
+             340: 190(i8vec3) BitwiseXor 337 339
                               Store 192(u8v) 340
                               Return
                               FunctionEnd
@@ -547,199 +547,199 @@ spv.int8.frag
         444(u32):    293(ptr) Variable Function
        447(u8v4):    446(ptr) Variable Function
          459(bv):    458(ptr) Variable Function
-             342:   52(ivec2) Load 341(i8v)
-             343:   52(ivec2) ExtInst 1(GLSL.std.450) 5(SAbs) 342
+             342:  52(i8vec2) Load 341(i8v)
+             343:  52(i8vec2) ExtInst 1(GLSL.std.450) 5(SAbs) 342
                               Store 341(i8v) 343
-             345:     14(int) Load 344(i8)
-             346:     14(int) ExtInst 1(GLSL.std.450) 7(SSign) 345
+             345:  14(int8_t) Load 344(i8)
+             346:  14(int8_t) ExtInst 1(GLSL.std.450) 7(SSign) 345
                               Store 344(i8) 346
-             347:   52(ivec2) Load 341(i8v)
-             348:     14(int) Load 344(i8)
-             349:   52(ivec2) CompositeConstruct 348 348
-             350:   52(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 347 349
+             347:  52(i8vec2) Load 341(i8v)
+             348:  14(int8_t) Load 344(i8)
+             349:  52(i8vec2) CompositeConstruct 348 348
+             350:  52(i8vec2) ExtInst 1(GLSL.std.450) 39(SMin) 347 349
                               Store 341(i8v) 350
-             351:   52(ivec2) Load 341(i8v)
-             353:   52(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 351 352
+             351:  52(i8vec2) Load 341(i8v)
+             353:  52(i8vec2) ExtInst 1(GLSL.std.450) 39(SMin) 351 352
                               Store 341(i8v) 353
-             355:  190(ivec3) Load 354(u8v)
-             357:     36(int) Load 356(u8)
-             359:  358(ivec3) CompositeConstruct 357 357 357
-             360:  190(ivec3) ExtInst 1(GLSL.std.450) 39(SMin) 355 359
+             355: 190(i8vec3) Load 354(u8v)
+             357:  36(int8_t) Load 356(u8)
+             359: 358(i8vec3) CompositeConstruct 357 357 357
+             360: 190(i8vec3) ExtInst 1(GLSL.std.450) 39(SMin) 355 359
                               Store 354(u8v) 360
-             361:  190(ivec3) Load 354(u8v)
-             363:  190(ivec3) ExtInst 1(GLSL.std.450) 39(SMin) 361 362
+             361: 190(i8vec3) Load 354(u8v)
+             363: 190(i8vec3) ExtInst 1(GLSL.std.450) 39(SMin) 361 362
                               Store 354(u8v) 363
-             364:   52(ivec2) Load 341(i8v)
-             365:     14(int) Load 344(i8)
-             366:   52(ivec2) CompositeConstruct 365 365
-             367:   52(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 364 366
+             364:  52(i8vec2) Load 341(i8v)
+             365:  14(int8_t) Load 344(i8)
+             366:  52(i8vec2) CompositeConstruct 365 365
+             367:  52(i8vec2) ExtInst 1(GLSL.std.450) 42(SMax) 364 366
                               Store 341(i8v) 367
-             368:   52(ivec2) Load 341(i8v)
-             369:   52(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 368 352
+             368:  52(i8vec2) Load 341(i8v)
+             369:  52(i8vec2) ExtInst 1(GLSL.std.450) 42(SMax) 368 352
                               Store 341(i8v) 369
-             370:  190(ivec3) Load 354(u8v)
-             371:     36(int) Load 356(u8)
-             372:  358(ivec3) CompositeConstruct 371 371 371
-             373:  190(ivec3) ExtInst 1(GLSL.std.450) 42(SMax) 370 372
+             370: 190(i8vec3) Load 354(u8v)
+             371:  36(int8_t) Load 356(u8)
+             372: 358(i8vec3) CompositeConstruct 371 371 371
+             373: 190(i8vec3) ExtInst 1(GLSL.std.450) 42(SMax) 370 372
                               Store 354(u8v) 373
-             374:  190(ivec3) Load 354(u8v)
-             375:  190(ivec3) ExtInst 1(GLSL.std.450) 42(SMax) 374 362
+             374: 190(i8vec3) Load 354(u8v)
+             375: 190(i8vec3) ExtInst 1(GLSL.std.450) 42(SMax) 374 362
                               Store 354(u8v) 375
-             376:   52(ivec2) Load 341(i8v)
-             377:     14(int) Load 344(i8)
-             378:     14(int) SNegate 377
-             379:     14(int) Load 344(i8)
-             380:   52(ivec2) CompositeConstruct 378 378
-             381:   52(ivec2) CompositeConstruct 379 379
-             382:   52(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 376 380 381
+             376:  52(i8vec2) Load 341(i8v)
+             377:  14(int8_t) Load 344(i8)
+             378:  14(int8_t) SNegate 377
+             379:  14(int8_t) Load 344(i8)
+             380:  52(i8vec2) CompositeConstruct 378 378
+             381:  52(i8vec2) CompositeConstruct 379 379
+             382:  52(i8vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 376 380 381
                               Store 341(i8v) 382
-             383:   52(ivec2) Load 341(i8v)
-             384:   52(ivec2) Load 341(i8v)
-             385:   52(ivec2) SNegate 384
-             386:   52(ivec2) Load 341(i8v)
-             387:   52(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 383 385 386
+             383:  52(i8vec2) Load 341(i8v)
+             384:  52(i8vec2) Load 341(i8v)
+             385:  52(i8vec2) SNegate 384
+             386:  52(i8vec2) Load 341(i8v)
+             387:  52(i8vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 383 385 386
                               Store 341(i8v) 387
-             388:  190(ivec3) Load 354(u8v)
-             389:     36(int) Load 356(u8)
-             390:     36(int) SNegate 389
-             391:     36(int) Load 356(u8)
-             392:  358(ivec3) CompositeConstruct 390 390 390
-             393:  358(ivec3) CompositeConstruct 391 391 391
-             394:  190(ivec3) ExtInst 1(GLSL.std.450) 45(SClamp) 388 392 393
+             388: 190(i8vec3) Load 354(u8v)
+             389:  36(int8_t) Load 356(u8)
+             390:  36(int8_t) SNegate 389
+             391:  36(int8_t) Load 356(u8)
+             392: 358(i8vec3) CompositeConstruct 390 390 390
+             393: 358(i8vec3) CompositeConstruct 391 391 391
+             394: 190(i8vec3) ExtInst 1(GLSL.std.450) 45(SClamp) 388 392 393
                               Store 354(u8v) 394
-             395:  190(ivec3) Load 354(u8v)
-             396:  190(ivec3) Load 354(u8v)
-             397:  190(ivec3) SNegate 396
-             398:  190(ivec3) Load 354(u8v)
-             399:  190(ivec3) ExtInst 1(GLSL.std.450) 45(SClamp) 395 397 398
+             395: 190(i8vec3) Load 354(u8v)
+             396: 190(i8vec3) Load 354(u8v)
+             397: 190(i8vec3) SNegate 396
+             398: 190(i8vec3) Load 354(u8v)
+             399: 190(i8vec3) ExtInst 1(GLSL.std.450) 45(SClamp) 395 397 398
                               Store 354(u8v) 399
              400:     15(ptr) AccessChain 341(i8v) 280
-             401:     14(int) Load 400
+             401:  14(int8_t) Load 400
              402:     15(ptr) AccessChain 341(i8v) 264
-             403:     14(int) Load 402
-             405:     14(int) Select 404 403 401
+             403:  14(int8_t) Load 402
+             405:  14(int8_t) Select 404 403 401
                               Store 344(i8) 405
-             406:     14(int) Load 344(i8)
-             407:   52(ivec2) CompositeConstruct 406 406
-             408:     14(int) Load 344(i8)
-             409:     14(int) SNegate 408
-             410:   52(ivec2) CompositeConstruct 409 409
-             413:   52(ivec2) Select 412 410 407
+             406:  14(int8_t) Load 344(i8)
+             407:  52(i8vec2) CompositeConstruct 406 406
+             408:  14(int8_t) Load 344(i8)
+             409:  14(int8_t) SNegate 408
+             410:  52(i8vec2) CompositeConstruct 409 409
+             413:  52(i8vec2) Select 412 410 407
                               Store 341(i8v) 413
              414:     15(ptr) AccessChain 354(u8v) 280
-             415:     14(int) Load 414
+             415:  14(int8_t) Load 414
              416:     15(ptr) AccessChain 354(u8v) 264
-             417:     14(int) Load 416
-             418:     14(int) Select 404 417 415
-             419:     36(int) Bitcast 418
+             417:  14(int8_t) Load 416
+             418:  14(int8_t) Select 404 417 415
+             419:  36(int8_t) Bitcast 418
                               Store 356(u8) 419
-             420:     36(int) Load 356(u8)
-             421:     14(int) Bitcast 420
-             422:  190(ivec3) CompositeConstruct 421 421 421
-             423:     36(int) Load 356(u8)
-             424:     36(int) SNegate 423
-             425:     14(int) Bitcast 424
-             426:  190(ivec3) CompositeConstruct 425 425 425
-             429:  190(ivec3) Select 428 426 422
+             420:  36(int8_t) Load 356(u8)
+             421:  14(int8_t) Bitcast 420
+             422: 190(i8vec3) CompositeConstruct 421 421 421
+             423:  36(int8_t) Load 356(u8)
+             424:  36(int8_t) SNegate 423
+             425:  14(int8_t) Bitcast 424
+             426: 190(i8vec3) CompositeConstruct 425 425 425
+             429: 190(i8vec3) Select 428 426 422
                               Store 354(u8v) 429
-             431:   52(ivec2) Load 341(i8v)
-             432:     57(int) Bitcast 431
+             431:  52(i8vec2) Load 341(i8v)
+             432: 57(int16_t) Bitcast 431
                               Store 430(i16) 432
-             437:  434(ivec4) Load 436(i8v4)
+             437: 434(i8vec4) Load 436(i8v4)
              438:     27(int) Bitcast 437
                               Store 433(i32) 438
-             442:   49(ivec2) Load 441(u8v2)
-             443:    141(int) Bitcast 442
+             442:  49(i8vec2) Load 441(u8v2)
+             443:141(int16_t) Bitcast 442
                               Store 440(u16) 443
-             448:  445(ivec4) Load 447(u8v4)
+             448: 445(i8vec4) Load 447(u8v4)
              449:     17(int) Bitcast 448
                               Store 444(u32) 449
-             450:     57(int) Load 430(i16)
-             451:   52(ivec2) Bitcast 450
+             450: 57(int16_t) Load 430(i16)
+             451:  52(i8vec2) Bitcast 450
                               Store 341(i8v) 451
              452:     27(int) Load 433(i32)
-             453:  434(ivec4) Bitcast 452
+             453: 434(i8vec4) Bitcast 452
                               Store 436(i8v4) 453
-             454:    141(int) Load 440(u16)
-             455:   49(ivec2) Bitcast 454
+             454:141(int16_t) Load 440(u16)
+             455:  49(i8vec2) Bitcast 454
                               Store 441(u8v2) 455
              456:     17(int) Load 444(u32)
-             457:  445(ivec4) Bitcast 456
+             457: 445(i8vec4) Bitcast 456
                               Store 447(u8v4) 457
-             460:  190(ivec3) Load 354(u8v)
-             461:     36(int) Load 356(u8)
-             462:     14(int) Bitcast 461
-             463:  190(ivec3) CompositeConstruct 462 462 462
+             460: 190(i8vec3) Load 354(u8v)
+             461:  36(int8_t) Load 356(u8)
+             462:  14(int8_t) Bitcast 461
+             463: 190(i8vec3) CompositeConstruct 462 462 462
              464:  427(bvec3) SLessThan 460 463
                               Store 459(bv) 464
-             465:   52(ivec2) Load 341(i8v)
-             466:     14(int) Load 344(i8)
-             467:   52(ivec2) CompositeConstruct 466 466
+             465:  52(i8vec2) Load 341(i8v)
+             466:  14(int8_t) Load 344(i8)
+             467:  52(i8vec2) CompositeConstruct 466 466
              468:  172(bvec2) SLessThan 465 467
              469:  427(bvec3) Load 459(bv)
              470:  427(bvec3) VectorShuffle 469 468 3 4 2
                               Store 459(bv) 470
-             471:  190(ivec3) Load 354(u8v)
-             472:     36(int) Load 356(u8)
-             473:     14(int) Bitcast 472
-             474:  190(ivec3) CompositeConstruct 473 473 473
+             471: 190(i8vec3) Load 354(u8v)
+             472:  36(int8_t) Load 356(u8)
+             473:  14(int8_t) Bitcast 472
+             474: 190(i8vec3) CompositeConstruct 473 473 473
              475:  427(bvec3) SLessThanEqual 471 474
                               Store 459(bv) 475
-             476:   52(ivec2) Load 341(i8v)
-             477:     14(int) Load 344(i8)
-             478:   52(ivec2) CompositeConstruct 477 477
+             476:  52(i8vec2) Load 341(i8v)
+             477:  14(int8_t) Load 344(i8)
+             478:  52(i8vec2) CompositeConstruct 477 477
              479:  172(bvec2) SLessThanEqual 476 478
              480:  427(bvec3) Load 459(bv)
              481:  427(bvec3) VectorShuffle 480 479 3 4 2
                               Store 459(bv) 481
-             482:  190(ivec3) Load 354(u8v)
-             483:     36(int) Load 356(u8)
-             484:     14(int) Bitcast 483
-             485:  190(ivec3) CompositeConstruct 484 484 484
+             482: 190(i8vec3) Load 354(u8v)
+             483:  36(int8_t) Load 356(u8)
+             484:  14(int8_t) Bitcast 483
+             485: 190(i8vec3) CompositeConstruct 484 484 484
              486:  427(bvec3) SGreaterThan 482 485
                               Store 459(bv) 486
-             487:   52(ivec2) Load 341(i8v)
-             488:     14(int) Load 344(i8)
-             489:   52(ivec2) CompositeConstruct 488 488
+             487:  52(i8vec2) Load 341(i8v)
+             488:  14(int8_t) Load 344(i8)
+             489:  52(i8vec2) CompositeConstruct 488 488
              490:  172(bvec2) SGreaterThan 487 489
              491:  427(bvec3) Load 459(bv)
              492:  427(bvec3) VectorShuffle 491 490 3 4 2
                               Store 459(bv) 492
-             493:  190(ivec3) Load 354(u8v)
-             494:     36(int) Load 356(u8)
-             495:     14(int) Bitcast 494
-             496:  190(ivec3) CompositeConstruct 495 495 495
+             493: 190(i8vec3) Load 354(u8v)
+             494:  36(int8_t) Load 356(u8)
+             495:  14(int8_t) Bitcast 494
+             496: 190(i8vec3) CompositeConstruct 495 495 495
              497:  427(bvec3) SGreaterThanEqual 493 496
                               Store 459(bv) 497
-             498:   52(ivec2) Load 341(i8v)
-             499:     14(int) Load 344(i8)
-             500:   52(ivec2) CompositeConstruct 499 499
+             498:  52(i8vec2) Load 341(i8v)
+             499:  14(int8_t) Load 344(i8)
+             500:  52(i8vec2) CompositeConstruct 499 499
              501:  172(bvec2) SGreaterThanEqual 498 500
              502:  427(bvec3) Load 459(bv)
              503:  427(bvec3) VectorShuffle 502 501 3 4 2
                               Store 459(bv) 503
-             504:  190(ivec3) Load 354(u8v)
-             505:     36(int) Load 356(u8)
-             506:     14(int) Bitcast 505
-             507:  190(ivec3) CompositeConstruct 506 506 506
+             504: 190(i8vec3) Load 354(u8v)
+             505:  36(int8_t) Load 356(u8)
+             506:  14(int8_t) Bitcast 505
+             507: 190(i8vec3) CompositeConstruct 506 506 506
              508:  427(bvec3) IEqual 504 507
                               Store 459(bv) 508
-             509:   52(ivec2) Load 341(i8v)
-             510:     14(int) Load 344(i8)
-             511:   52(ivec2) CompositeConstruct 510 510
+             509:  52(i8vec2) Load 341(i8v)
+             510:  14(int8_t) Load 344(i8)
+             511:  52(i8vec2) CompositeConstruct 510 510
              512:  172(bvec2) IEqual 509 511
              513:  427(bvec3) Load 459(bv)
              514:  427(bvec3) VectorShuffle 513 512 3 4 2
                               Store 459(bv) 514
-             515:  190(ivec3) Load 354(u8v)
-             516:     36(int) Load 356(u8)
-             517:     14(int) Bitcast 516
-             518:  190(ivec3) CompositeConstruct 517 517 517
+             515: 190(i8vec3) Load 354(u8v)
+             516:  36(int8_t) Load 356(u8)
+             517:  14(int8_t) Bitcast 516
+             518: 190(i8vec3) CompositeConstruct 517 517 517
              519:  427(bvec3) INotEqual 515 518
                               Store 459(bv) 519
-             520:   52(ivec2) Load 341(i8v)
-             521:     14(int) Load 344(i8)
-             522:   52(ivec2) CompositeConstruct 521 521
+             520:  52(i8vec2) Load 341(i8v)
+             521:  14(int8_t) Load 344(i8)
+             522:  52(i8vec2) CompositeConstruct 521 521
              523:  172(bvec2) INotEqual 520 522
              524:  427(bvec3) Load 459(bv)
              525:  427(bvec3) VectorShuffle 524 523 3 4 2

3rdparty/glslang/Test/baseResults/spv.matrix.frag.out

@@ -36,8 +36,8 @@ spv.matrix.frag
            28(f):     27(ptr) Variable Input
               81:    6(float) Constant 1065353216
              136:             TypeFloat 64
-             137:             TypeVector 136(float) 4
-             138:             TypeMatrix 137(fvec4) 3
+             137:             TypeVector 136(float64_t) 4
+             138:             TypeMatrix 137(f64vec4) 3
              139:             TypePointer Function 138
              157:             TypeVector 6(float) 3
              158:             TypePointer Function 157(fvec3)
@@ -193,19 +193,19 @@ spv.matrix.frag
                               Store 10(sum34) 135
              141:           8 Load 10(sum34)
              142:    7(fvec4) CompositeExtract 141 0
-             143:  137(fvec4) FConvert 142
+             143:137(f64vec4) FConvert 142
              144:    7(fvec4) CompositeExtract 141 1
-             145:  137(fvec4) FConvert 144
+             145:137(f64vec4) FConvert 144
              146:    7(fvec4) CompositeExtract 141 2
-             147:  137(fvec4) FConvert 146
+             147:137(f64vec4) FConvert 146
              148:         138 CompositeConstruct 143 145 147
                               Store 140(dm) 148
              149:         138 Load 140(dm)
-             150:  137(fvec4) CompositeExtract 149 0
+             150:137(f64vec4) CompositeExtract 149 0
              151:    7(fvec4) FConvert 150
-             152:  137(fvec4) CompositeExtract 149 1
+             152:137(f64vec4) CompositeExtract 149 1
              153:    7(fvec4) FConvert 152
-             154:  137(fvec4) CompositeExtract 149 2
+             154:137(f64vec4) CompositeExtract 149 2
              155:    7(fvec4) FConvert 154
              156:           8 CompositeConstruct 151 153 155
                               Store 10(sum34) 156

3rdparty/glslang/Test/baseResults/spv.rankShift.comp.out

@@ -21,9 +21,9 @@ spv.rankShift.comp
                2:             TypeVoid
                3:             TypeFunction 2
                6:             TypeInt 64 0
-               7:             TypePointer Function 6(int)
+               7:             TypePointer Function 6(int64_t)
                9:             TypeInt 64 1
-              10:             TypePointer UniformConstant 9(int)
+              10:             TypePointer UniformConstant 9(int64_t)
         11(arg0):     10(ptr) Variable UniformConstant
               13:             TypeInt 32 0
               14:             TypePointer UniformConstant 13(int)
@@ -35,23 +35,23 @@ spv.rankShift.comp
          4(main):           2 Function None 3
                5:             Label
        8(result):      7(ptr) Variable Function
-              12:      9(int) Load 11(arg0)
+              12:  9(int64_t) Load 11(arg0)
               16:     13(int) Load 15(arg1)
-              17:      9(int) ShiftLeftLogical 12 16
-              18:      6(int) Bitcast 17
+              17:  9(int64_t) ShiftLeftLogical 12 16
+              18:  6(int64_t) Bitcast 17
                               Store 8(result) 18
-              19:      9(int) Load 11(arg0)
+              19:  9(int64_t) Load 11(arg0)
               20:     13(int) Load 15(arg1)
-              21:      9(int) ShiftRightArithmetic 19 20
-              22:      6(int) Bitcast 21
+              21:  9(int64_t) ShiftRightArithmetic 19 20
+              22:  6(int64_t) Bitcast 21
                               Store 8(result) 22
               23:     13(int) Load 15(arg1)
-              24:      6(int) Load 8(result)
-              25:      6(int) ShiftLeftLogical 24 23
+              24:  6(int64_t) Load 8(result)
+              25:  6(int64_t) ShiftLeftLogical 24 23
                               Store 8(result) 25
               26:     13(int) Load 15(arg1)
-              27:      6(int) Load 8(result)
-              28:      6(int) ShiftRightLogical 27 26
+              27:  6(int64_t) Load 8(result)
+              28:  6(int64_t) ShiftRightLogical 27 26
                               Store 8(result) 28
                               Return
                               FunctionEnd

3rdparty/glslang/Test/baseResults/spv.shaderBallot.comp.out

@@ -52,8 +52,8 @@ spv.shaderBallot.comp
 12(gl_SubGroupSizeARB):      9(ptr) Variable Input
               15:      6(int) Constant 4
               17:             TypeInt 64 0
-              18:             TypePointer Function 17(int)
-              20:             TypePointer Input 17(int)
+              18:             TypePointer Function 17(int64_t)
+              20:             TypePointer Input 17(int64_t)
 21(gl_SubGroupEqMaskARB):     20(ptr) Variable Input
 23(gl_SubGroupGeMaskARB):     20(ptr) Variable Input
 26(gl_SubGroupGtMaskARB):     20(ptr) Variable Input
@@ -99,22 +99,22 @@ spv.shaderBallot.comp
               14:      6(int) IAdd 11 13
               16:      6(int) UMod 14 15
                               Store 8(invocation) 16
-              22:     17(int) Load 21(gl_SubGroupEqMaskARB)
-              24:     17(int) Load 23(gl_SubGroupGeMaskARB)
-              25:     17(int) IAdd 22 24
-              27:     17(int) Load 26(gl_SubGroupGtMaskARB)
-              28:     17(int) IAdd 25 27
-              30:     17(int) Load 29(gl_SubGroupLeMaskARB)
-              31:     17(int) IAdd 28 30
-              33:     17(int) Load 32(gl_SubGroupLtMaskARB)
-              34:     17(int) IAdd 31 33
+              22: 17(int64_t) Load 21(gl_SubGroupEqMaskARB)
+              24: 17(int64_t) Load 23(gl_SubGroupGeMaskARB)
+              25: 17(int64_t) IAdd 22 24
+              27: 17(int64_t) Load 26(gl_SubGroupGtMaskARB)
+              28: 17(int64_t) IAdd 25 27
+              30: 17(int64_t) Load 29(gl_SubGroupLeMaskARB)
+              31: 17(int64_t) IAdd 28 30
+              33: 17(int64_t) Load 32(gl_SubGroupLtMaskARB)
+              34: 17(int64_t) IAdd 31 33
                               Store 19(relMask) 34
-              35:     17(int) Load 19(relMask)
+              35: 17(int64_t) Load 19(relMask)
               39:   38(ivec4) SubgroupBallotKHR 37
               40:      6(int) CompositeExtract 39 0
               41:      6(int) CompositeExtract 39 1
               43:   42(ivec2) CompositeConstruct 40 41
-              44:     17(int) Bitcast 43
+              44: 17(int64_t) Bitcast 43
               45:    36(bool) IEqual 35 44
                               SelectionMerge 47 None
                               BranchConditional 45 46 216

3rdparty/glslang/Test/baseResults/spv.specConstant.vert.out

@@ -64,18 +64,18 @@ spv.specConstant.vert
               33:             TypeInt 32 0
        34(scale):     33(int) SpecConstant 2
               38:             TypeFloat 64
-    39(spDouble):   38(float) SpecConstant 1413754136 1074340347
+    39(spDouble):38(float64_t) SpecConstant 1413754136 1074340347
      40(spFloat):    6(float) SpecConstant 1078523331
-              41:   38(float) SpecConstantOp 115 40(spFloat)
+              41:38(float64_t) SpecConstantOp 115 40(spFloat)
 50(dupArraySize):      8(int) SpecConstant 12
               51:             TypeArray 7(fvec4) 50(dupArraySize)
               52:             TypePointer Input 51
      53(dupUcol):     52(ptr) Variable Input
    60(spDupBool):    29(bool) SpecConstantTrue
     63(dupScale):     33(int) SpecConstant 2
- 67(spDupDouble):   38(float) SpecConstant 1413754136 1074340347
+ 67(spDupDouble):38(float64_t) SpecConstant 1413754136 1074340347
   68(spDupFloat):    6(float) SpecConstant 1078523331
-              69:   38(float) SpecConstantOp 115 68(spDupFloat)
+              69:38(float64_t) SpecConstantOp 115 68(spDupFloat)
               75:             TypePointer Function 8(int)
 77(gl_MaxImageUnits):      8(int) SpecConstant 8
          4(main):           2 Function None 3
@@ -94,7 +94,7 @@ spv.specConstant.vert
                                 Store 20(color) 37
                                 Branch 32
               32:             Label
-              42:   38(float) FDiv 39(spDouble) 41
+              42:38(float64_t) FDiv 39(spDouble) 41
               43:    6(float) FConvert 42
               44:    7(fvec4) Load 20(color)
               45:    7(fvec4) CompositeConstruct 43 43 43 43
@@ -125,7 +125,7 @@ spv.specConstant.vert
                                 Store 20(color) 66
                                 Branch 62
               62:             Label
-              70:   38(float) FDiv 67(spDupDouble) 69
+              70:38(float64_t) FDiv 67(spDupDouble) 69
               71:    6(float) FConvert 70
               72:    7(fvec4) Load 20(color)
               73:    7(fvec4) CompositeConstruct 71 71 71 71

3rdparty/glslang/Test/baseResults/spv.specConstantComposite.vert.out

@@ -41,7 +41,7 @@ spv.specConstantComposite.vert
               32:             TypePointer Function 14(int)
   37(spec_float):   24(float) SpecConstant 1078523331
               38:             TypeFloat 64
- 39(spec_double):   38(float) SpecConstant 1413754136 1074340347
+ 39(spec_double):38(float64_t) SpecConstant 1413754136 1074340347
               40:             TypeArray 25(fvec4) 28(spec_int)
               41:             TypePointer Input 40
 42(global_vec4_array_with_spec_length):     41(ptr) Variable Input

3rdparty/glslang/Test/baseResults/spv.specConstantOperations.vert.out

@@ -52,9 +52,9 @@ spv.specConstantOperations.vert
      42(sp_uint):     41(int) SpecConstant 100
      43(sp_sint):      6(int) SpecConstant 4294967286
               44:             TypeFloat 64
-   45(sp_double):   44(float) SpecConstant 2333366019 1074118410
+   45(sp_double):44(float64_t) SpecConstant 2333366019 1074118410
               46:   39(float) SpecConstantOp 115 45(sp_double)
-              47:   44(float) SpecConstantOp 115 40(sp_float)
+              47:44(float64_t) SpecConstantOp 115 40(sp_float)
               48:     41(int) Constant 0
               49:    22(bool) SpecConstantOp 171 19(sp_int) 48
               50:    22(bool) SpecConstantOp 171 42(sp_uint) 48

3rdparty/glslang/Test/baseResults/spv.subgroupArithmetic.comp.out

@@ -54,8 +54,8 @@ spv.subgroupArithmetic.comp
               20:             TypeVector 19(int) 4
               21:             TypeVector 6(int) 4
               22:             TypeFloat 64
-              23:             TypeVector 22(float) 4
-     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(fvec4)
+              23:             TypeVector 22(float64_t) 4
+     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(f64vec4)
               25:             TypeArray 24(Buffers) 15
               26:             TypePointer Uniform 25
         27(data):     26(ptr) Variable Uniform
@@ -77,10 +77,10 @@ spv.subgroupArithmetic.comp
              101:             TypeVector 6(int) 2
              102:             TypePointer Uniform 21(ivec4)
              111:             TypeVector 6(int) 3
-             125:             TypePointer Uniform 22(float)
-             131:             TypeVector 22(float) 2
-             132:             TypePointer Uniform 23(fvec4)
-             141:             TypeVector 22(float) 3
+             125:             TypePointer Uniform 22(float64_t)
+             131:             TypeVector 22(float64_t) 2
+             132:             TypePointer Uniform 23(f64vec4)
+             141:             TypeVector 22(float64_t) 3
              521:             TypeBool
              530:   71(ivec2) ConstantComposite 29 29
              531:             TypeVector 521(bool) 2
@@ -194,32 +194,32 @@ spv.subgroupArithmetic.comp
                               Store 123 122
              124:      6(int) Load 8(invocation)
              126:    125(ptr) AccessChain 27(data) 29 59 30
-             127:   22(float) Load 126
-             128:   22(float) GroupNonUniformFAdd 34 Reduce 127
+             127:22(float64_t) Load 126
+             128:22(float64_t) GroupNonUniformFAdd 34 Reduce 127
              129:    125(ptr) AccessChain 27(data) 124 59 30
                               Store 129 128
              130:      6(int) Load 8(invocation)
              133:    132(ptr) AccessChain 27(data) 38 59
-             134:   23(fvec4) Load 133
-             135:  131(fvec2) VectorShuffle 134 134 0 1
-             136:  131(fvec2) GroupNonUniformFAdd 34 Reduce 135
+             134: 23(f64vec4) Load 133
+             135:131(f64vec2) VectorShuffle 134 134 0 1
+             136:131(f64vec2) GroupNonUniformFAdd 34 Reduce 135
              137:    132(ptr) AccessChain 27(data) 130 59
-             138:   23(fvec4) Load 137
-             139:   23(fvec4) VectorShuffle 138 136 4 5 2 3
+             138: 23(f64vec4) Load 137
+             139: 23(f64vec4) VectorShuffle 138 136 4 5 2 3
                               Store 137 139
              140:      6(int) Load 8(invocation)
              142:    132(ptr) AccessChain 27(data) 49 59
-             143:   23(fvec4) Load 142
-             144:  141(fvec3) VectorShuffle 143 143 0 1 2
-             145:  141(fvec3) GroupNonUniformFAdd 34 Reduce 144
+             143: 23(f64vec4) Load 142
+             144:141(f64vec3) VectorShuffle 143 143 0 1 2
+             145:141(f64vec3) GroupNonUniformFAdd 34 Reduce 144
              146:    132(ptr) AccessChain 27(data) 140 59
-             147:   23(fvec4) Load 146
-             148:   23(fvec4) VectorShuffle 147 145 4 5 6 3
+             147: 23(f64vec4) Load 146
+             148: 23(f64vec4) VectorShuffle 147 145 4 5 6 3
                               Store 146 148
              149:      6(int) Load 8(invocation)
              150:    132(ptr) AccessChain 27(data) 59 59
-             151:   23(fvec4) Load 150
-             152:   23(fvec4) GroupNonUniformFAdd 34 Reduce 151
+             151: 23(f64vec4) Load 150
+             152: 23(f64vec4) GroupNonUniformFAdd 34 Reduce 151
              153:    132(ptr) AccessChain 27(data) 149 59
                               Store 153 152
              154:      6(int) Load 8(invocation)
@@ -314,32 +314,32 @@ spv.subgroupArithmetic.comp
                               Store 231 230
              232:      6(int) Load 8(invocation)
              233:    125(ptr) AccessChain 27(data) 29 59 30
-             234:   22(float) Load 233
-             235:   22(float) GroupNonUniformFMul 34 Reduce 234
+             234:22(float64_t) Load 233
+             235:22(float64_t) GroupNonUniformFMul 34 Reduce 234
              236:    125(ptr) AccessChain 27(data) 232 59 30
                               Store 236 235
              237:      6(int) Load 8(invocation)
              238:    132(ptr) AccessChain 27(data) 38 59
-             239:   23(fvec4) Load 238
-             240:  131(fvec2) VectorShuffle 239 239 0 1
-             241:  131(fvec2) GroupNonUniformFMul 34 Reduce 240
+             239: 23(f64vec4) Load 238
+             240:131(f64vec2) VectorShuffle 239 239 0 1
+             241:131(f64vec2) GroupNonUniformFMul 34 Reduce 240
              242:    132(ptr) AccessChain 27(data) 237 59
-             243:   23(fvec4) Load 242
-             244:   23(fvec4) VectorShuffle 243 241 4 5 2 3
+             243: 23(f64vec4) Load 242
+             244: 23(f64vec4) VectorShuffle 243 241 4 5 2 3
                               Store 242 244
              245:      6(int) Load 8(invocation)
              246:    132(ptr) AccessChain 27(data) 49 59
-             247:   23(fvec4) Load 246
-             248:  141(fvec3) VectorShuffle 247 247 0 1 2
-             249:  141(fvec3) GroupNonUniformFMul 34 Reduce 248
+             247: 23(f64vec4) Load 246
+             248:141(f64vec3) VectorShuffle 247 247 0 1 2
+             249:141(f64vec3) GroupNonUniformFMul 34 Reduce 248
              250:    132(ptr) AccessChain 27(data) 245 59
-             251:   23(fvec4) Load 250
-             252:   23(fvec4) VectorShuffle 251 249 4 5 6 3
+             251: 23(f64vec4) Load 250
+             252: 23(f64vec4) VectorShuffle 251 249 4 5 6 3
                               Store 250 252
              253:      6(int) Load 8(invocation)
              254:    132(ptr) AccessChain 27(data) 59 59
-             255:   23(fvec4) Load 254
-             256:   23(fvec4) GroupNonUniformFMul 34 Reduce 255
+             255: 23(f64vec4) Load 254
+             256: 23(f64vec4) GroupNonUniformFMul 34 Reduce 255
              257:    132(ptr) AccessChain 27(data) 253 59
                               Store 257 256
              258:      6(int) Load 8(invocation)
@@ -434,32 +434,32 @@ spv.subgroupArithmetic.comp
                               Store 335 334
              336:      6(int) Load 8(invocation)
              337:    125(ptr) AccessChain 27(data) 29 59 30
-             338:   22(float) Load 337
-             339:   22(float) GroupNonUniformFMin 34 Reduce 338
+             338:22(float64_t) Load 337
+             339:22(float64_t) GroupNonUniformFMin 34 Reduce 338
              340:    125(ptr) AccessChain 27(data) 336 59 30
                               Store 340 339
              341:      6(int) Load 8(invocation)
              342:    132(ptr) AccessChain 27(data) 38 59
-             343:   23(fvec4) Load 342
-             344:  131(fvec2) VectorShuffle 343 343 0 1
-             345:  131(fvec2) GroupNonUniformFMin 34 Reduce 344
+             343: 23(f64vec4) Load 342
+             344:131(f64vec2) VectorShuffle 343 343 0 1
+             345:131(f64vec2) GroupNonUniformFMin 34 Reduce 344
              346:    132(ptr) AccessChain 27(data) 341 59
-             347:   23(fvec4) Load 346
-             348:   23(fvec4) VectorShuffle 347 345 4 5 2 3
+             347: 23(f64vec4) Load 346
+             348: 23(f64vec4) VectorShuffle 347 345 4 5 2 3
                               Store 346 348
              349:      6(int) Load 8(invocation)
              350:    132(ptr) AccessChain 27(data) 49 59
-             351:   23(fvec4) Load 350
-             352:  141(fvec3) VectorShuffle 351 351 0 1 2
-             353:  141(fvec3) GroupNonUniformFMin 34 Reduce 352
+             351: 23(f64vec4) Load 350
+             352:141(f64vec3) VectorShuffle 351 351 0 1 2
+             353:141(f64vec3) GroupNonUniformFMin 34 Reduce 352
              354:    132(ptr) AccessChain 27(data) 349 59
-             355:   23(fvec4) Load 354
-             356:   23(fvec4) VectorShuffle 355 353 4 5 6 3
+             355: 23(f64vec4) Load 354
+             356: 23(f64vec4) VectorShuffle 355 353 4 5 6 3
                               Store 354 356
              357:      6(int) Load 8(invocation)
              358:    132(ptr) AccessChain 27(data) 59 59
-             359:   23(fvec4) Load 358
-             360:   23(fvec4) GroupNonUniformFMin 34 Reduce 359
+             359: 23(f64vec4) Load 358
+             360: 23(f64vec4) GroupNonUniformFMin 34 Reduce 359
              361:    132(ptr) AccessChain 27(data) 357 59
                               Store 361 360
              362:      6(int) Load 8(invocation)
@@ -554,32 +554,32 @@ spv.subgroupArithmetic.comp
                               Store 439 438
              440:      6(int) Load 8(invocation)
              441:    125(ptr) AccessChain 27(data) 29 59 30
-             442:   22(float) Load 441
-             443:   22(float) GroupNonUniformFMax 34 Reduce 442
+             442:22(float64_t) Load 441
+             443:22(float64_t) GroupNonUniformFMax 34 Reduce 442
              444:    125(ptr) AccessChain 27(data) 440 59 30
                               Store 444 443
              445:      6(int) Load 8(invocation)
              446:    132(ptr) AccessChain 27(data) 38 59
-             447:   23(fvec4) Load 446
-             448:  131(fvec2) VectorShuffle 447 447 0 1
-             449:  131(fvec2) GroupNonUniformFMax 34 Reduce 448
+             447: 23(f64vec4) Load 446
+             448:131(f64vec2) VectorShuffle 447 447 0 1
+             449:131(f64vec2) GroupNonUniformFMax 34 Reduce 448
              450:    132(ptr) AccessChain 27(data) 445 59
-             451:   23(fvec4) Load 450
-             452:   23(fvec4) VectorShuffle 451 449 4 5 2 3
+             451: 23(f64vec4) Load 450
+             452: 23(f64vec4) VectorShuffle 451 449 4 5 2 3
                               Store 450 452
              453:      6(int) Load 8(invocation)
              454:    132(ptr) AccessChain 27(data) 49 59
-             455:   23(fvec4) Load 454
-             456:  141(fvec3) VectorShuffle 455 455 0 1 2
-             457:  141(fvec3) GroupNonUniformFMax 34 Reduce 456
+             455: 23(f64vec4) Load 454
+             456:141(f64vec3) VectorShuffle 455 455 0 1 2
+             457:141(f64vec3) GroupNonUniformFMax 34 Reduce 456
              458:    132(ptr) AccessChain 27(data) 453 59
-             459:   23(fvec4) Load 458
-             460:   23(fvec4) VectorShuffle 459 457 4 5 6 3
+             459: 23(f64vec4) Load 458
+             460: 23(f64vec4) VectorShuffle 459 457 4 5 6 3
                               Store 458 460
              461:      6(int) Load 8(invocation)
              462:    132(ptr) AccessChain 27(data) 59 59
-             463:   23(fvec4) Load 462
-             464:   23(fvec4) GroupNonUniformFMax 34 Reduce 463
+             463: 23(f64vec4) Load 462
+             464: 23(f64vec4) GroupNonUniformFMax 34 Reduce 463
              465:    132(ptr) AccessChain 27(data) 461 59
                               Store 465 464
              466:      6(int) Load 8(invocation)
@@ -968,32 +968,32 @@ spv.subgroupArithmetic.comp
                               Store 811 810
              812:      6(int) Load 8(invocation)
              813:    125(ptr) AccessChain 27(data) 29 59 30
-             814:   22(float) Load 813
-             815:   22(float) GroupNonUniformFAdd 34 InclusiveScan 814
+             814:22(float64_t) Load 813
+             815:22(float64_t) GroupNonUniformFAdd 34 InclusiveScan 814
              816:    125(ptr) AccessChain 27(data) 812 59 30
                               Store 816 815
              817:      6(int) Load 8(invocation)
              818:    132(ptr) AccessChain 27(data) 38 59
-             819:   23(fvec4) Load 818
-             820:  131(fvec2) VectorShuffle 819 819 0 1
-             821:  131(fvec2) GroupNonUniformFAdd 34 InclusiveScan 820
+             819: 23(f64vec4) Load 818
+             820:131(f64vec2) VectorShuffle 819 819 0 1
+             821:131(f64vec2) GroupNonUniformFAdd 34 InclusiveScan 820
              822:    132(ptr) AccessChain 27(data) 817 59
-             823:   23(fvec4) Load 822
-             824:   23(fvec4) VectorShuffle 823 821 4 5 2 3
+             823: 23(f64vec4) Load 822
+             824: 23(f64vec4) VectorShuffle 823 821 4 5 2 3
                               Store 822 824
              825:      6(int) Load 8(invocation)
              826:    132(ptr) AccessChain 27(data) 49 59
-             827:   23(fvec4) Load 826
-             828:  141(fvec3) VectorShuffle 827 827 0 1 2
-             829:  141(fvec3) GroupNonUniformFAdd 34 InclusiveScan 828
+             827: 23(f64vec4) Load 826
+             828:141(f64vec3) VectorShuffle 827 827 0 1 2
+             829:141(f64vec3) GroupNonUniformFAdd 34 InclusiveScan 828
              830:    132(ptr) AccessChain 27(data) 825 59
-             831:   23(fvec4) Load 830
-             832:   23(fvec4) VectorShuffle 831 829 4 5 6 3
+             831: 23(f64vec4) Load 830
+             832: 23(f64vec4) VectorShuffle 831 829 4 5 6 3
                               Store 830 832
              833:      6(int) Load 8(invocation)
              834:    132(ptr) AccessChain 27(data) 59 59
-             835:   23(fvec4) Load 834
-             836:   23(fvec4) GroupNonUniformFAdd 34 InclusiveScan 835
+             835: 23(f64vec4) Load 834
+             836: 23(f64vec4) GroupNonUniformFAdd 34 InclusiveScan 835
              837:    132(ptr) AccessChain 27(data) 833 59
                               Store 837 836
              838:      6(int) Load 8(invocation)
@@ -1088,32 +1088,32 @@ spv.subgroupArithmetic.comp
                               Store 915 914
              916:      6(int) Load 8(invocation)
              917:    125(ptr) AccessChain 27(data) 29 59 30
-             918:   22(float) Load 917
-             919:   22(float) GroupNonUniformFMul 34 InclusiveScan 918
+             918:22(float64_t) Load 917
+             919:22(float64_t) GroupNonUniformFMul 34 InclusiveScan 918
              920:    125(ptr) AccessChain 27(data) 916 59 30
                               Store 920 919
              921:      6(int) Load 8(invocation)
              922:    132(ptr) AccessChain 27(data) 38 59
-             923:   23(fvec4) Load 922
-             924:  131(fvec2) VectorShuffle 923 923 0 1
-             925:  131(fvec2) GroupNonUniformFMul 34 InclusiveScan 924
+             923: 23(f64vec4) Load 922
+             924:131(f64vec2) VectorShuffle 923 923 0 1
+             925:131(f64vec2) GroupNonUniformFMul 34 InclusiveScan 924
              926:    132(ptr) AccessChain 27(data) 921 59
-             927:   23(fvec4) Load 926
-             928:   23(fvec4) VectorShuffle 927 925 4 5 2 3
+             927: 23(f64vec4) Load 926
+             928: 23(f64vec4) VectorShuffle 927 925 4 5 2 3
                               Store 926 928
              929:      6(int) Load 8(invocation)
              930:    132(ptr) AccessChain 27(data) 49 59
-             931:   23(fvec4) Load 930
-             932:  141(fvec3) VectorShuffle 931 931 0 1 2
-             933:  141(fvec3) GroupNonUniformFMul 34 InclusiveScan 932
+             931: 23(f64vec4) Load 930
+             932:141(f64vec3) VectorShuffle 931 931 0 1 2
+             933:141(f64vec3) GroupNonUniformFMul 34 InclusiveScan 932
              934:    132(ptr) AccessChain 27(data) 929 59
-             935:   23(fvec4) Load 934
-             936:   23(fvec4) VectorShuffle 935 933 4 5 6 3
+             935: 23(f64vec4) Load 934
+             936: 23(f64vec4) VectorShuffle 935 933 4 5 6 3
                               Store 934 936
              937:      6(int) Load 8(invocation)
              938:    132(ptr) AccessChain 27(data) 59 59
-             939:   23(fvec4) Load 938
-             940:   23(fvec4) GroupNonUniformFMul 34 InclusiveScan 939
+             939: 23(f64vec4) Load 938
+             940: 23(f64vec4) GroupNonUniformFMul 34 InclusiveScan 939
              941:    132(ptr) AccessChain 27(data) 937 59
                               Store 941 940
              942:      6(int) Load 8(invocation)
@@ -1208,32 +1208,32 @@ spv.subgroupArithmetic.comp
                               Store 1019 1018
             1020:      6(int) Load 8(invocation)
             1021:    125(ptr) AccessChain 27(data) 29 59 30
-            1022:   22(float) Load 1021
-            1023:   22(float) GroupNonUniformFMin 34 InclusiveScan 1022
+            1022:22(float64_t) Load 1021
+            1023:22(float64_t) GroupNonUniformFMin 34 InclusiveScan 1022
             1024:    125(ptr) AccessChain 27(data) 1020 59 30
                               Store 1024 1023
             1025:      6(int) Load 8(invocation)
             1026:    132(ptr) AccessChain 27(data) 38 59
-            1027:   23(fvec4) Load 1026
-            1028:  131(fvec2) VectorShuffle 1027 1027 0 1
-            1029:  131(fvec2) GroupNonUniformFMin 34 InclusiveScan 1028
+            1027: 23(f64vec4) Load 1026
+            1028:131(f64vec2) VectorShuffle 1027 1027 0 1
+            1029:131(f64vec2) GroupNonUniformFMin 34 InclusiveScan 1028
             1030:    132(ptr) AccessChain 27(data) 1025 59
-            1031:   23(fvec4) Load 1030
-            1032:   23(fvec4) VectorShuffle 1031 1029 4 5 2 3
+            1031: 23(f64vec4) Load 1030
+            1032: 23(f64vec4) VectorShuffle 1031 1029 4 5 2 3
                               Store 1030 1032
             1033:      6(int) Load 8(invocation)
             1034:    132(ptr) AccessChain 27(data) 49 59
-            1035:   23(fvec4) Load 1034
-            1036:  141(fvec3) VectorShuffle 1035 1035 0 1 2
-            1037:  141(fvec3) GroupNonUniformFMin 34 InclusiveScan 1036
+            1035: 23(f64vec4) Load 1034
+            1036:141(f64vec3) VectorShuffle 1035 1035 0 1 2
+            1037:141(f64vec3) GroupNonUniformFMin 34 InclusiveScan 1036
             1038:    132(ptr) AccessChain 27(data) 1033 59
-            1039:   23(fvec4) Load 1038
-            1040:   23(fvec4) VectorShuffle 1039 1037 4 5 6 3
+            1039: 23(f64vec4) Load 1038
+            1040: 23(f64vec4) VectorShuffle 1039 1037 4 5 6 3
                               Store 1038 1040
             1041:      6(int) Load 8(invocation)
             1042:    132(ptr) AccessChain 27(data) 59 59
-            1043:   23(fvec4) Load 1042
-            1044:   23(fvec4) GroupNonUniformFMin 34 InclusiveScan 1043
+            1043: 23(f64vec4) Load 1042
+            1044: 23(f64vec4) GroupNonUniformFMin 34 InclusiveScan 1043
             1045:    132(ptr) AccessChain 27(data) 1041 59
                               Store 1045 1044
             1046:      6(int) Load 8(invocation)
@@ -1328,32 +1328,32 @@ spv.subgroupArithmetic.comp
                               Store 1123 1122
             1124:      6(int) Load 8(invocation)
             1125:    125(ptr) AccessChain 27(data) 29 59 30
-            1126:   22(float) Load 1125
-            1127:   22(float) GroupNonUniformFMax 34 InclusiveScan 1126
+            1126:22(float64_t) Load 1125
+            1127:22(float64_t) GroupNonUniformFMax 34 InclusiveScan 1126
             1128:    125(ptr) AccessChain 27(data) 1124 59 30
                               Store 1128 1127
             1129:      6(int) Load 8(invocation)
             1130:    132(ptr) AccessChain 27(data) 38 59
-            1131:   23(fvec4) Load 1130
-            1132:  131(fvec2) VectorShuffle 1131 1131 0 1
-            1133:  131(fvec2) GroupNonUniformFMax 34 InclusiveScan 1132
+            1131: 23(f64vec4) Load 1130
+            1132:131(f64vec2) VectorShuffle 1131 1131 0 1
+            1133:131(f64vec2) GroupNonUniformFMax 34 InclusiveScan 1132
             1134:    132(ptr) AccessChain 27(data) 1129 59
-            1135:   23(fvec4) Load 1134
-            1136:   23(fvec4) VectorShuffle 1135 1133 4 5 2 3
+            1135: 23(f64vec4) Load 1134
+            1136: 23(f64vec4) VectorShuffle 1135 1133 4 5 2 3
                               Store 1134 1136
             1137:      6(int) Load 8(invocation)
             1138:    132(ptr) AccessChain 27(data) 49 59
-            1139:   23(fvec4) Load 1138
-            1140:  141(fvec3) VectorShuffle 1139 1139 0 1 2
-            1141:  141(fvec3) GroupNonUniformFMax 34 InclusiveScan 1140
+            1139: 23(f64vec4) Load 1138
+            1140:141(f64vec3) VectorShuffle 1139 1139 0 1 2
+            1141:141(f64vec3) GroupNonUniformFMax 34 InclusiveScan 1140
             1142:    132(ptr) AccessChain 27(data) 1137 59
-            1143:   23(fvec4) Load 1142
-            1144:   23(fvec4) VectorShuffle 1143 1141 4 5 6 3
+            1143: 23(f64vec4) Load 1142
+            1144: 23(f64vec4) VectorShuffle 1143 1141 4 5 6 3
                               Store 1142 1144
             1145:      6(int) Load 8(invocation)
             1146:    132(ptr) AccessChain 27(data) 59 59
-            1147:   23(fvec4) Load 1146
-            1148:   23(fvec4) GroupNonUniformFMax 34 InclusiveScan 1147
+            1147: 23(f64vec4) Load 1146
+            1148: 23(f64vec4) GroupNonUniformFMax 34 InclusiveScan 1147
             1149:    132(ptr) AccessChain 27(data) 1145 59
                               Store 1149 1148
             1150:      6(int) Load 8(invocation)
@@ -1742,32 +1742,32 @@ spv.subgroupArithmetic.comp
                               Store 1485 1484
             1486:      6(int) Load 8(invocation)
             1487:    125(ptr) AccessChain 27(data) 29 59 30
-            1488:   22(float) Load 1487
-            1489:   22(float) GroupNonUniformFAdd 34 ExclusiveScan 1488
+            1488:22(float64_t) Load 1487
+            1489:22(float64_t) GroupNonUniformFAdd 34 ExclusiveScan 1488
             1490:    125(ptr) AccessChain 27(data) 1486 59 30
                               Store 1490 1489
             1491:      6(int) Load 8(invocation)
             1492:    132(ptr) AccessChain 27(data) 38 59
-            1493:   23(fvec4) Load 1492
-            1494:  131(fvec2) VectorShuffle 1493 1493 0 1
-            1495:  131(fvec2) GroupNonUniformFAdd 34 ExclusiveScan 1494
+            1493: 23(f64vec4) Load 1492
+            1494:131(f64vec2) VectorShuffle 1493 1493 0 1
+            1495:131(f64vec2) GroupNonUniformFAdd 34 ExclusiveScan 1494
             1496:    132(ptr) AccessChain 27(data) 1491 59
-            1497:   23(fvec4) Load 1496
-            1498:   23(fvec4) VectorShuffle 1497 1495 4 5 2 3
+            1497: 23(f64vec4) Load 1496
+            1498: 23(f64vec4) VectorShuffle 1497 1495 4 5 2 3
                               Store 1496 1498
             1499:      6(int) Load 8(invocation)
             1500:    132(ptr) AccessChain 27(data) 49 59
-            1501:   23(fvec4) Load 1500
-            1502:  141(fvec3) VectorShuffle 1501 1501 0 1 2
-            1503:  141(fvec3) GroupNonUniformFAdd 34 ExclusiveScan 1502
+            1501: 23(f64vec4) Load 1500
+            1502:141(f64vec3) VectorShuffle 1501 1501 0 1 2
+            1503:141(f64vec3) GroupNonUniformFAdd 34 ExclusiveScan 1502
             1504:    132(ptr) AccessChain 27(data) 1499 59
-            1505:   23(fvec4) Load 1504
-            1506:   23(fvec4) VectorShuffle 1505 1503 4 5 6 3
+            1505: 23(f64vec4) Load 1504
+            1506: 23(f64vec4) VectorShuffle 1505 1503 4 5 6 3
                               Store 1504 1506
             1507:      6(int) Load 8(invocation)
             1508:    132(ptr) AccessChain 27(data) 59 59
-            1509:   23(fvec4) Load 1508
-            1510:   23(fvec4) GroupNonUniformFAdd 34 ExclusiveScan 1509
+            1509: 23(f64vec4) Load 1508
+            1510: 23(f64vec4) GroupNonUniformFAdd 34 ExclusiveScan 1509
             1511:    132(ptr) AccessChain 27(data) 1507 59
                               Store 1511 1510
             1512:      6(int) Load 8(invocation)
@@ -1862,32 +1862,32 @@ spv.subgroupArithmetic.comp
                               Store 1589 1588
             1590:      6(int) Load 8(invocation)
             1591:    125(ptr) AccessChain 27(data) 29 59 30
-            1592:   22(float) Load 1591
-            1593:   22(float) GroupNonUniformFMul 34 ExclusiveScan 1592
+            1592:22(float64_t) Load 1591
+            1593:22(float64_t) GroupNonUniformFMul 34 ExclusiveScan 1592
             1594:    125(ptr) AccessChain 27(data) 1590 59 30
                               Store 1594 1593
             1595:      6(int) Load 8(invocation)
             1596:    132(ptr) AccessChain 27(data) 38 59
-            1597:   23(fvec4) Load 1596
-            1598:  131(fvec2) VectorShuffle 1597 1597 0 1
-            1599:  131(fvec2) GroupNonUniformFMul 34 ExclusiveScan 1598
+            1597: 23(f64vec4) Load 1596
+            1598:131(f64vec2) VectorShuffle 1597 1597 0 1
+            1599:131(f64vec2) GroupNonUniformFMul 34 ExclusiveScan 1598
             1600:    132(ptr) AccessChain 27(data) 1595 59
-            1601:   23(fvec4) Load 1600
-            1602:   23(fvec4) VectorShuffle 1601 1599 4 5 2 3
+            1601: 23(f64vec4) Load 1600
+            1602: 23(f64vec4) VectorShuffle 1601 1599 4 5 2 3
                               Store 1600 1602
             1603:      6(int) Load 8(invocation)
             1604:    132(ptr) AccessChain 27(data) 49 59
-            1605:   23(fvec4) Load 1604
-            1606:  141(fvec3) VectorShuffle 1605 1605 0 1 2
-            1607:  141(fvec3) GroupNonUniformFMul 34 ExclusiveScan 1606
+            1605: 23(f64vec4) Load 1604
+            1606:141(f64vec3) VectorShuffle 1605 1605 0 1 2
+            1607:141(f64vec3) GroupNonUniformFMul 34 ExclusiveScan 1606
             1608:    132(ptr) AccessChain 27(data) 1603 59
-            1609:   23(fvec4) Load 1608
-            1610:   23(fvec4) VectorShuffle 1609 1607 4 5 6 3
+            1609: 23(f64vec4) Load 1608
+            1610: 23(f64vec4) VectorShuffle 1609 1607 4 5 6 3
                               Store 1608 1610
             1611:      6(int) Load 8(invocation)
             1612:    132(ptr) AccessChain 27(data) 59 59
-            1613:   23(fvec4) Load 1612
-            1614:   23(fvec4) GroupNonUniformFMul 34 ExclusiveScan 1613
+            1613: 23(f64vec4) Load 1612
+            1614: 23(f64vec4) GroupNonUniformFMul 34 ExclusiveScan 1613
             1615:    132(ptr) AccessChain 27(data) 1611 59
                               Store 1615 1614
             1616:      6(int) Load 8(invocation)
@@ -1982,32 +1982,32 @@ spv.subgroupArithmetic.comp
                               Store 1693 1692
             1694:      6(int) Load 8(invocation)
             1695:    125(ptr) AccessChain 27(data) 29 59 30
-            1696:   22(float) Load 1695
-            1697:   22(float) GroupNonUniformFMin 34 ExclusiveScan 1696
+            1696:22(float64_t) Load 1695
+            1697:22(float64_t) GroupNonUniformFMin 34 ExclusiveScan 1696
             1698:    125(ptr) AccessChain 27(data) 1694 59 30
                               Store 1698 1697
             1699:      6(int) Load 8(invocation)
             1700:    132(ptr) AccessChain 27(data) 38 59
-            1701:   23(fvec4) Load 1700
-            1702:  131(fvec2) VectorShuffle 1701 1701 0 1
-            1703:  131(fvec2) GroupNonUniformFMin 34 ExclusiveScan 1702
+            1701: 23(f64vec4) Load 1700
+            1702:131(f64vec2) VectorShuffle 1701 1701 0 1
+            1703:131(f64vec2) GroupNonUniformFMin 34 ExclusiveScan 1702
             1704:    132(ptr) AccessChain 27(data) 1699 59
-            1705:   23(fvec4) Load 1704
-            1706:   23(fvec4) VectorShuffle 1705 1703 4 5 2 3
+            1705: 23(f64vec4) Load 1704
+            1706: 23(f64vec4) VectorShuffle 1705 1703 4 5 2 3
                               Store 1704 1706
             1707:      6(int) Load 8(invocation)
             1708:    132(ptr) AccessChain 27(data) 49 59
-            1709:   23(fvec4) Load 1708
-            1710:  141(fvec3) VectorShuffle 1709 1709 0 1 2
-            1711:  141(fvec3) GroupNonUniformFMin 34 ExclusiveScan 1710
+            1709: 23(f64vec4) Load 1708
+            1710:141(f64vec3) VectorShuffle 1709 1709 0 1 2
+            1711:141(f64vec3) GroupNonUniformFMin 34 ExclusiveScan 1710
             1712:    132(ptr) AccessChain 27(data) 1707 59
-            1713:   23(fvec4) Load 1712
-            1714:   23(fvec4) VectorShuffle 1713 1711 4 5 6 3
+            1713: 23(f64vec4) Load 1712
+            1714: 23(f64vec4) VectorShuffle 1713 1711 4 5 6 3
                               Store 1712 1714
             1715:      6(int) Load 8(invocation)
             1716:    132(ptr) AccessChain 27(data) 59 59
-            1717:   23(fvec4) Load 1716
-            1718:   23(fvec4) GroupNonUniformFMin 34 ExclusiveScan 1717
+            1717: 23(f64vec4) Load 1716
+            1718: 23(f64vec4) GroupNonUniformFMin 34 ExclusiveScan 1717
             1719:    132(ptr) AccessChain 27(data) 1715 59
                               Store 1719 1718
             1720:      6(int) Load 8(invocation)
@@ -2102,32 +2102,32 @@ spv.subgroupArithmetic.comp
                               Store 1797 1796
             1798:      6(int) Load 8(invocation)
             1799:    125(ptr) AccessChain 27(data) 29 59 30
-            1800:   22(float) Load 1799
-            1801:   22(float) GroupNonUniformFMax 34 ExclusiveScan 1800
+            1800:22(float64_t) Load 1799
+            1801:22(float64_t) GroupNonUniformFMax 34 ExclusiveScan 1800
             1802:    125(ptr) AccessChain 27(data) 1798 59 30
                               Store 1802 1801
             1803:      6(int) Load 8(invocation)
             1804:    132(ptr) AccessChain 27(data) 38 59
-            1805:   23(fvec4) Load 1804
-            1806:  131(fvec2) VectorShuffle 1805 1805 0 1
-            1807:  131(fvec2) GroupNonUniformFMax 34 ExclusiveScan 1806
+            1805: 23(f64vec4) Load 1804
+            1806:131(f64vec2) VectorShuffle 1805 1805 0 1
+            1807:131(f64vec2) GroupNonUniformFMax 34 ExclusiveScan 1806
             1808:    132(ptr) AccessChain 27(data) 1803 59
-            1809:   23(fvec4) Load 1808
-            1810:   23(fvec4) VectorShuffle 1809 1807 4 5 2 3
+            1809: 23(f64vec4) Load 1808
+            1810: 23(f64vec4) VectorShuffle 1809 1807 4 5 2 3
                               Store 1808 1810
             1811:      6(int) Load 8(invocation)
             1812:    132(ptr) AccessChain 27(data) 49 59
-            1813:   23(fvec4) Load 1812
-            1814:  141(fvec3) VectorShuffle 1813 1813 0 1 2
-            1815:  141(fvec3) GroupNonUniformFMax 34 ExclusiveScan 1814
+            1813: 23(f64vec4) Load 1812
+            1814:141(f64vec3) VectorShuffle 1813 1813 0 1 2
+            1815:141(f64vec3) GroupNonUniformFMax 34 ExclusiveScan 1814
             1816:    132(ptr) AccessChain 27(data) 1811 59
-            1817:   23(fvec4) Load 1816
-            1818:   23(fvec4) VectorShuffle 1817 1815 4 5 6 3
+            1817: 23(f64vec4) Load 1816
+            1818: 23(f64vec4) VectorShuffle 1817 1815 4 5 6 3
                               Store 1816 1818
             1819:      6(int) Load 8(invocation)
             1820:    132(ptr) AccessChain 27(data) 59 59
-            1821:   23(fvec4) Load 1820
-            1822:   23(fvec4) GroupNonUniformFMax 34 ExclusiveScan 1821
+            1821: 23(f64vec4) Load 1820
+            1822: 23(f64vec4) GroupNonUniformFMax 34 ExclusiveScan 1821
             1823:    132(ptr) AccessChain 27(data) 1819 59
                               Store 1823 1822
             1824:      6(int) Load 8(invocation)

3rdparty/glslang/Test/baseResults/spv.subgroupBallot.comp.out

@@ -76,8 +76,8 @@ spv.subgroupBallot.comp
               42:             TypeInt 32 1
               43:             TypeVector 42(int) 4
               44:             TypeFloat 64
-              45:             TypeVector 44(float) 4
-     46(Buffers):             TypeStruct 41(fvec4) 43(ivec4) 17(ivec4) 45(fvec4)
+              45:             TypeVector 44(float64_t) 4
+     46(Buffers):             TypeStruct 41(fvec4) 43(ivec4) 17(ivec4) 45(f64vec4)
               47:             TypeArray 46(Buffers) 15
               48:             TypePointer Uniform 47
         49(data):     48(ptr) Variable Uniform
@@ -101,10 +101,10 @@ spv.subgroupBallot.comp
              149:             TypeVector 42(int) 3
              171:             TypeVector 6(int) 2
              181:             TypeVector 6(int) 3
-             197:             TypePointer Uniform 44(float)
-             204:             TypeVector 44(float) 2
-             205:             TypePointer Uniform 45(fvec4)
-             215:             TypeVector 44(float) 3
+             197:             TypePointer Uniform 44(float64_t)
+             204:             TypeVector 44(float64_t) 2
+             205:             TypePointer Uniform 45(f64vec4)
+             215:             TypeVector 44(float64_t) 3
              242:  138(ivec2) ConstantComposite 61 61
              243:             TypeVector 36(bool) 2
              247:  138(ivec2) ConstantComposite 60 60
@@ -285,36 +285,36 @@ spv.subgroupBallot.comp
                                 Store 195 194
              196:      6(int)   Load 8(invocation)
              198:    197(ptr)   AccessChain 49(data) 61 124 54
-             199:   44(float)   Load 198
+             199:44(float64_t)   Load 198
              200:      6(int)   Load 8(invocation)
-             201:   44(float)   GroupNonUniformBroadcast 38 199 200
+             201:44(float64_t)   GroupNonUniformBroadcast 38 199 200
              202:    197(ptr)   AccessChain 49(data) 196 124 54
                                 Store 202 201
              203:      6(int)   Load 8(invocation)
              206:    205(ptr)   AccessChain 49(data) 60 124
-             207:   45(fvec4)   Load 206
-             208:  204(fvec2)   VectorShuffle 207 207 0 1
+             207: 45(f64vec4)   Load 206
+             208:204(f64vec2)   VectorShuffle 207 207 0 1
              209:      6(int)   Load 8(invocation)
-             210:  204(fvec2)   GroupNonUniformBroadcast 38 208 209
+             210:204(f64vec2)   GroupNonUniformBroadcast 38 208 209
              211:    205(ptr)   AccessChain 49(data) 203 124
-             212:   45(fvec4)   Load 211
-             213:   45(fvec4)   VectorShuffle 212 210 4 5 2 3
+             212: 45(f64vec4)   Load 211
+             213: 45(f64vec4)   VectorShuffle 212 210 4 5 2 3
                                 Store 211 213
              214:      6(int)   Load 8(invocation)
              216:    205(ptr)   AccessChain 49(data) 51 124
-             217:   45(fvec4)   Load 216
-             218:  215(fvec3)   VectorShuffle 217 217 0 1 2
+             217: 45(f64vec4)   Load 216
+             218:215(f64vec3)   VectorShuffle 217 217 0 1 2
              219:      6(int)   Load 8(invocation)
-             220:  215(fvec3)   GroupNonUniformBroadcast 38 218 219
+             220:215(f64vec3)   GroupNonUniformBroadcast 38 218 219
              221:    205(ptr)   AccessChain 49(data) 214 124
-             222:   45(fvec4)   Load 221
-             223:   45(fvec4)   VectorShuffle 222 220 4 5 6 3
+             222: 45(f64vec4)   Load 221
+             223: 45(f64vec4)   VectorShuffle 222 220 4 5 6 3
                                 Store 221 223
              224:      6(int)   Load 8(invocation)
              225:    205(ptr)   AccessChain 49(data) 124 124
-             226:   45(fvec4)   Load 225
+             226: 45(f64vec4)   Load 225
              227:      6(int)   Load 8(invocation)
-             228:   45(fvec4)   GroupNonUniformBroadcast 38 226 227
+             228: 45(f64vec4)   GroupNonUniformBroadcast 38 226 227
              229:    205(ptr)   AccessChain 49(data) 224 124
                                 Store 229 228
              230:      6(int)   Load 8(invocation)
@@ -453,32 +453,32 @@ spv.subgroupBallot.comp
                                 Store 354 353
              355:      6(int)   Load 8(invocation)
              356:    197(ptr)   AccessChain 49(data) 61 124 54
-             357:   44(float)   Load 356
-             358:   44(float)   GroupNonUniformBroadcastFirst 38 357
+             357:44(float64_t)   Load 356
+             358:44(float64_t)   GroupNonUniformBroadcastFirst 38 357
              359:    197(ptr)   AccessChain 49(data) 355 124 54
                                 Store 359 358
              360:      6(int)   Load 8(invocation)
              361:    205(ptr)   AccessChain 49(data) 60 124
-             362:   45(fvec4)   Load 361
-             363:  204(fvec2)   VectorShuffle 362 362 0 1
-             364:  204(fvec2)   GroupNonUniformBroadcastFirst 38 363
+             362: 45(f64vec4)   Load 361
+             363:204(f64vec2)   VectorShuffle 362 362 0 1
+             364:204(f64vec2)   GroupNonUniformBroadcastFirst 38 363
              365:    205(ptr)   AccessChain 49(data) 360 124
-             366:   45(fvec4)   Load 365
-             367:   45(fvec4)   VectorShuffle 366 364 4 5 2 3
+             366: 45(f64vec4)   Load 365
+             367: 45(f64vec4)   VectorShuffle 366 364 4 5 2 3
                                 Store 365 367
              368:      6(int)   Load 8(invocation)
              369:    205(ptr)   AccessChain 49(data) 51 124
-             370:   45(fvec4)   Load 369
-             371:  215(fvec3)   VectorShuffle 370 370 0 1 2
-             372:  215(fvec3)   GroupNonUniformBroadcastFirst 38 371
+             370: 45(f64vec4)   Load 369
+             371:215(f64vec3)   VectorShuffle 370 370 0 1 2
+             372:215(f64vec3)   GroupNonUniformBroadcastFirst 38 371
              373:    205(ptr)   AccessChain 49(data) 368 124
-             374:   45(fvec4)   Load 373
-             375:   45(fvec4)   VectorShuffle 374 372 4 5 6 3
+             374: 45(f64vec4)   Load 373
+             375: 45(f64vec4)   VectorShuffle 374 372 4 5 6 3
                                 Store 373 375
              376:      6(int)   Load 8(invocation)
              377:    205(ptr)   AccessChain 49(data) 124 124
-             378:   45(fvec4)   Load 377
-             379:   45(fvec4)   GroupNonUniformBroadcastFirst 38 378
+             378: 45(f64vec4)   Load 377
+             379: 45(f64vec4)   GroupNonUniformBroadcastFirst 38 378
              380:    205(ptr)   AccessChain 49(data) 376 124
                                 Store 380 379
              381:      6(int)   Load 8(invocation)

3rdparty/glslang/Test/baseResults/spv.subgroupClustered.comp.out

@@ -54,8 +54,8 @@ spv.subgroupClustered.comp
               20:             TypeVector 19(int) 4
               21:             TypeVector 6(int) 4
               22:             TypeFloat 64
-              23:             TypeVector 22(float) 4
-     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(fvec4)
+              23:             TypeVector 22(float64_t) 4
+     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(f64vec4)
               25:             TypeArray 24(Buffers) 15
               26:             TypePointer Uniform 25
         27(data):     26(ptr) Variable Uniform
@@ -78,10 +78,10 @@ spv.subgroupClustered.comp
              102:             TypeVector 6(int) 2
              103:             TypePointer Uniform 21(ivec4)
              112:             TypeVector 6(int) 3
-             126:             TypePointer Uniform 22(float)
-             132:             TypeVector 22(float) 2
-             133:             TypePointer Uniform 23(fvec4)
-             142:             TypeVector 22(float) 3
+             126:             TypePointer Uniform 22(float64_t)
+             132:             TypeVector 22(float64_t) 2
+             133:             TypePointer Uniform 23(f64vec4)
+             142:             TypeVector 22(float64_t) 3
              522:             TypeBool
              531:   72(ivec2) ConstantComposite 29 29
              532:             TypeVector 522(bool) 2
@@ -194,32 +194,32 @@ spv.subgroupClustered.comp
                               Store 124 123
              125:      6(int) Load 8(invocation)
              127:    126(ptr) AccessChain 27(data) 29 60 30
-             128:   22(float) Load 127
-             129:   22(float) GroupNonUniformFAdd 35 ClusteredReduce 128 34
+             128:22(float64_t) Load 127
+             129:22(float64_t) GroupNonUniformFAdd 35 ClusteredReduce 128 34
              130:    126(ptr) AccessChain 27(data) 125 60 30
                               Store 130 129
              131:      6(int) Load 8(invocation)
              134:    133(ptr) AccessChain 27(data) 39 60
-             135:   23(fvec4) Load 134
-             136:  132(fvec2) VectorShuffle 135 135 0 1
-             137:  132(fvec2) GroupNonUniformFAdd 35 ClusteredReduce 136 34
+             135: 23(f64vec4) Load 134
+             136:132(f64vec2) VectorShuffle 135 135 0 1
+             137:132(f64vec2) GroupNonUniformFAdd 35 ClusteredReduce 136 34
              138:    133(ptr) AccessChain 27(data) 131 60
-             139:   23(fvec4) Load 138
-             140:   23(fvec4) VectorShuffle 139 137 4 5 2 3
+             139: 23(f64vec4) Load 138
+             140: 23(f64vec4) VectorShuffle 139 137 4 5 2 3
                               Store 138 140
              141:      6(int) Load 8(invocation)
              143:    133(ptr) AccessChain 27(data) 50 60
-             144:   23(fvec4) Load 143
-             145:  142(fvec3) VectorShuffle 144 144 0 1 2
-             146:  142(fvec3) GroupNonUniformFAdd 35 ClusteredReduce 145 34
+             144: 23(f64vec4) Load 143
+             145:142(f64vec3) VectorShuffle 144 144 0 1 2
+             146:142(f64vec3) GroupNonUniformFAdd 35 ClusteredReduce 145 34
              147:    133(ptr) AccessChain 27(data) 141 60
-             148:   23(fvec4) Load 147
-             149:   23(fvec4) VectorShuffle 148 146 4 5 6 3
+             148: 23(f64vec4) Load 147
+             149: 23(f64vec4) VectorShuffle 148 146 4 5 6 3
                               Store 147 149
              150:      6(int) Load 8(invocation)
              151:    133(ptr) AccessChain 27(data) 60 60
-             152:   23(fvec4) Load 151
-             153:   23(fvec4) GroupNonUniformFAdd 35 ClusteredReduce 152 34
+             152: 23(f64vec4) Load 151
+             153: 23(f64vec4) GroupNonUniformFAdd 35 ClusteredReduce 152 34
              154:    133(ptr) AccessChain 27(data) 150 60
                               Store 154 153
              155:      6(int) Load 8(invocation)
@@ -314,32 +314,32 @@ spv.subgroupClustered.comp
                               Store 232 231
              233:      6(int) Load 8(invocation)
              234:    126(ptr) AccessChain 27(data) 29 60 30
-             235:   22(float) Load 234
-             236:   22(float) GroupNonUniformFMul 35 ClusteredReduce 235 34
+             235:22(float64_t) Load 234
+             236:22(float64_t) GroupNonUniformFMul 35 ClusteredReduce 235 34
              237:    126(ptr) AccessChain 27(data) 233 60 30
                               Store 237 236
              238:      6(int) Load 8(invocation)
              239:    133(ptr) AccessChain 27(data) 39 60
-             240:   23(fvec4) Load 239
-             241:  132(fvec2) VectorShuffle 240 240 0 1
-             242:  132(fvec2) GroupNonUniformFMul 35 ClusteredReduce 241 34
+             240: 23(f64vec4) Load 239
+             241:132(f64vec2) VectorShuffle 240 240 0 1
+             242:132(f64vec2) GroupNonUniformFMul 35 ClusteredReduce 241 34
              243:    133(ptr) AccessChain 27(data) 238 60
-             244:   23(fvec4) Load 243
-             245:   23(fvec4) VectorShuffle 244 242 4 5 2 3
+             244: 23(f64vec4) Load 243
+             245: 23(f64vec4) VectorShuffle 244 242 4 5 2 3
                               Store 243 245
              246:      6(int) Load 8(invocation)
              247:    133(ptr) AccessChain 27(data) 50 60
-             248:   23(fvec4) Load 247
-             249:  142(fvec3) VectorShuffle 248 248 0 1 2
-             250:  142(fvec3) GroupNonUniformFMul 35 ClusteredReduce 249 34
+             248: 23(f64vec4) Load 247
+             249:142(f64vec3) VectorShuffle 248 248 0 1 2
+             250:142(f64vec3) GroupNonUniformFMul 35 ClusteredReduce 249 34
              251:    133(ptr) AccessChain 27(data) 246 60
-             252:   23(fvec4) Load 251
-             253:   23(fvec4) VectorShuffle 252 250 4 5 6 3
+             252: 23(f64vec4) Load 251
+             253: 23(f64vec4) VectorShuffle 252 250 4 5 6 3
                               Store 251 253
              254:      6(int) Load 8(invocation)
              255:    133(ptr) AccessChain 27(data) 60 60
-             256:   23(fvec4) Load 255
-             257:   23(fvec4) GroupNonUniformFMul 35 ClusteredReduce 256 34
+             256: 23(f64vec4) Load 255
+             257: 23(f64vec4) GroupNonUniformFMul 35 ClusteredReduce 256 34
              258:    133(ptr) AccessChain 27(data) 254 60
                               Store 258 257
              259:      6(int) Load 8(invocation)
@@ -434,32 +434,32 @@ spv.subgroupClustered.comp
                               Store 336 335
              337:      6(int) Load 8(invocation)
              338:    126(ptr) AccessChain 27(data) 29 60 30
-             339:   22(float) Load 338
-             340:   22(float) GroupNonUniformFMin 35 ClusteredReduce 339 34
+             339:22(float64_t) Load 338
+             340:22(float64_t) GroupNonUniformFMin 35 ClusteredReduce 339 34
              341:    126(ptr) AccessChain 27(data) 337 60 30
                               Store 341 340
              342:      6(int) Load 8(invocation)
              343:    133(ptr) AccessChain 27(data) 39 60
-             344:   23(fvec4) Load 343
-             345:  132(fvec2) VectorShuffle 344 344 0 1
-             346:  132(fvec2) GroupNonUniformFMin 35 ClusteredReduce 345 34
+             344: 23(f64vec4) Load 343
+             345:132(f64vec2) VectorShuffle 344 344 0 1
+             346:132(f64vec2) GroupNonUniformFMin 35 ClusteredReduce 345 34
              347:    133(ptr) AccessChain 27(data) 342 60
-             348:   23(fvec4) Load 347
-             349:   23(fvec4) VectorShuffle 348 346 4 5 2 3
+             348: 23(f64vec4) Load 347
+             349: 23(f64vec4) VectorShuffle 348 346 4 5 2 3
                               Store 347 349
              350:      6(int) Load 8(invocation)
              351:    133(ptr) AccessChain 27(data) 50 60
-             352:   23(fvec4) Load 351
-             353:  142(fvec3) VectorShuffle 352 352 0 1 2
-             354:  142(fvec3) GroupNonUniformFMin 35 ClusteredReduce 353 34
+             352: 23(f64vec4) Load 351
+             353:142(f64vec3) VectorShuffle 352 352 0 1 2
+             354:142(f64vec3) GroupNonUniformFMin 35 ClusteredReduce 353 34
              355:    133(ptr) AccessChain 27(data) 350 60
-             356:   23(fvec4) Load 355
-             357:   23(fvec4) VectorShuffle 356 354 4 5 6 3
+             356: 23(f64vec4) Load 355
+             357: 23(f64vec4) VectorShuffle 356 354 4 5 6 3
                               Store 355 357
              358:      6(int) Load 8(invocation)
              359:    133(ptr) AccessChain 27(data) 60 60
-             360:   23(fvec4) Load 359
-             361:   23(fvec4) GroupNonUniformFMin 35 ClusteredReduce 360 34
+             360: 23(f64vec4) Load 359
+             361: 23(f64vec4) GroupNonUniformFMin 35 ClusteredReduce 360 34
              362:    133(ptr) AccessChain 27(data) 358 60
                               Store 362 361
              363:      6(int) Load 8(invocation)
@@ -554,32 +554,32 @@ spv.subgroupClustered.comp
                               Store 440 439
              441:      6(int) Load 8(invocation)
              442:    126(ptr) AccessChain 27(data) 29 60 30
-             443:   22(float) Load 442
-             444:   22(float) GroupNonUniformFMax 35 ClusteredReduce 443 34
+             443:22(float64_t) Load 442
+             444:22(float64_t) GroupNonUniformFMax 35 ClusteredReduce 443 34
              445:    126(ptr) AccessChain 27(data) 441 60 30
                               Store 445 444
              446:      6(int) Load 8(invocation)
              447:    133(ptr) AccessChain 27(data) 39 60
-             448:   23(fvec4) Load 447
-             449:  132(fvec2) VectorShuffle 448 448 0 1
-             450:  132(fvec2) GroupNonUniformFMax 35 ClusteredReduce 449 34
+             448: 23(f64vec4) Load 447
+             449:132(f64vec2) VectorShuffle 448 448 0 1
+             450:132(f64vec2) GroupNonUniformFMax 35 ClusteredReduce 449 34
              451:    133(ptr) AccessChain 27(data) 446 60
-             452:   23(fvec4) Load 451
-             453:   23(fvec4) VectorShuffle 452 450 4 5 2 3
+             452: 23(f64vec4) Load 451
+             453: 23(f64vec4) VectorShuffle 452 450 4 5 2 3
                               Store 451 453
              454:      6(int) Load 8(invocation)
              455:    133(ptr) AccessChain 27(data) 50 60
-             456:   23(fvec4) Load 455
-             457:  142(fvec3) VectorShuffle 456 456 0 1 2
-             458:  142(fvec3) GroupNonUniformFMax 35 ClusteredReduce 457 34
+             456: 23(f64vec4) Load 455
+             457:142(f64vec3) VectorShuffle 456 456 0 1 2
+             458:142(f64vec3) GroupNonUniformFMax 35 ClusteredReduce 457 34
              459:    133(ptr) AccessChain 27(data) 454 60
-             460:   23(fvec4) Load 459
-             461:   23(fvec4) VectorShuffle 460 458 4 5 6 3
+             460: 23(f64vec4) Load 459
+             461: 23(f64vec4) VectorShuffle 460 458 4 5 6 3
                               Store 459 461
              462:      6(int) Load 8(invocation)
              463:    133(ptr) AccessChain 27(data) 60 60
-             464:   23(fvec4) Load 463
-             465:   23(fvec4) GroupNonUniformFMax 35 ClusteredReduce 464 34
+             464: 23(f64vec4) Load 463
+             465: 23(f64vec4) GroupNonUniformFMax 35 ClusteredReduce 464 34
              466:    133(ptr) AccessChain 27(data) 462 60
                               Store 466 465
              467:      6(int) Load 8(invocation)

3rdparty/glslang/Test/baseResults/spv.subgroupPartitioned.comp.out

@@ -57,8 +57,8 @@ spv.subgroupPartitioned.comp
               24:             TypeInt 32 1
               25:             TypeVector 24(int) 4
               26:             TypeFloat 64
-              27:             TypeVector 26(float) 4
-     28(Buffers):             TypeStruct 23(fvec4) 25(ivec4) 17(ivec4) 27(fvec4)
+              27:             TypeVector 26(float64_t) 4
+     28(Buffers):             TypeStruct 23(fvec4) 25(ivec4) 17(ivec4) 27(f64vec4)
               29:             TypeArray 28(Buffers) 15
               30:             TypePointer Uniform 29
         31(data):     30(ptr) Variable Uniform
@@ -79,10 +79,10 @@ spv.subgroupPartitioned.comp
               96:             TypeVector 6(int) 2
              103:             TypeVector 6(int) 3
              115:     24(int) Constant 3
-             116:             TypePointer Uniform 26(float)
-             122:             TypeVector 26(float) 2
-             123:             TypePointer Uniform 27(fvec4)
-             130:             TypeVector 26(float) 3
+             116:             TypePointer Uniform 26(float64_t)
+             122:             TypeVector 26(float64_t) 2
+             123:             TypePointer Uniform 27(f64vec4)
+             130:             TypeVector 26(float64_t) 3
              144:             TypeBool
              152:             TypeVector 144(bool) 2
              153:   96(ivec2) ConstantComposite 35 35
@@ -192,27 +192,27 @@ spv.subgroupPartitioned.comp
                               Store 113 112
              114:      6(int) Load 8(invocation)
              117:    116(ptr) AccessChain 31(data) 34 115 35
-             118:   26(float) Load 117
+             118:26(float64_t) Load 117
              119:   17(ivec4) GroupNonUniformPartitionNV 118
              120:     40(ptr) AccessChain 31(data) 114 33
                               Store 120 119
              121:      6(int) Load 8(invocation)
              124:    123(ptr) AccessChain 31(data) 34 115
-             125:   27(fvec4) Load 124
-             126:  122(fvec2) VectorShuffle 125 125 0 1
+             125: 27(f64vec4) Load 124
+             126:122(f64vec2) VectorShuffle 125 125 0 1
              127:   17(ivec4) GroupNonUniformPartitionNV 126
              128:     40(ptr) AccessChain 31(data) 121 33
                               Store 128 127
              129:      6(int) Load 8(invocation)
              131:    123(ptr) AccessChain 31(data) 34 115
-             132:   27(fvec4) Load 131
-             133:  130(fvec3) VectorShuffle 132 132 0 1 2
+             132: 27(f64vec4) Load 131
+             133:130(f64vec3) VectorShuffle 132 132 0 1 2
              134:   17(ivec4) GroupNonUniformPartitionNV 133
              135:     40(ptr) AccessChain 31(data) 129 33
                               Store 135 134
              136:      6(int) Load 8(invocation)
              137:    123(ptr) AccessChain 31(data) 34 115
-             138:   27(fvec4) Load 137
+             138: 27(f64vec4) Load 137
              139:   17(ivec4) GroupNonUniformPartitionNV 138
              140:     40(ptr) AccessChain 31(data) 136 33
                               Store 140 139
@@ -350,36 +350,36 @@ spv.subgroupPartitioned.comp
                               Store 264 263
              265:      6(int) Load 8(invocation)
              266:    116(ptr) AccessChain 31(data) 34 115 35
-             267:   26(float) Load 266
+             267:26(float64_t) Load 266
              268:   17(ivec4) Load 19(ballot)
-             269:   26(float) GroupNonUniformFAdd 178 PartitionedReduceNV 267 268
+             269:26(float64_t) GroupNonUniformFAdd 178 PartitionedReduceNV 267 268
              270:    116(ptr) AccessChain 31(data) 265 115 35
                               Store 270 269
              271:      6(int) Load 8(invocation)
              272:    123(ptr) AccessChain 31(data) 63 115
-             273:   27(fvec4) Load 272
-             274:  122(fvec2) VectorShuffle 273 273 0 1
+             273: 27(f64vec4) Load 272
+             274:122(f64vec2) VectorShuffle 273 273 0 1
              275:   17(ivec4) Load 19(ballot)
-             276:  122(fvec2) GroupNonUniformFAdd 178 PartitionedReduceNV 274 275
+             276:122(f64vec2) GroupNonUniformFAdd 178 PartitionedReduceNV 274 275
              277:    123(ptr) AccessChain 31(data) 271 115
-             278:   27(fvec4) Load 277
-             279:   27(fvec4) VectorShuffle 278 276 4 5 2 3
+             278: 27(f64vec4) Load 277
+             279: 27(f64vec4) VectorShuffle 278 276 4 5 2 3
                               Store 277 279
              280:      6(int) Load 8(invocation)
              281:    123(ptr) AccessChain 31(data) 33 115
-             282:   27(fvec4) Load 281
-             283:  130(fvec3) VectorShuffle 282 282 0 1 2
+             282: 27(f64vec4) Load 281
+             283:130(f64vec3) VectorShuffle 282 282 0 1 2
              284:   17(ivec4) Load 19(ballot)
-             285:  130(fvec3) GroupNonUniformFAdd 178 PartitionedReduceNV 283 284
+             285:130(f64vec3) GroupNonUniformFAdd 178 PartitionedReduceNV 283 284
              286:    123(ptr) AccessChain 31(data) 280 115
-             287:   27(fvec4) Load 286
-             288:   27(fvec4) VectorShuffle 287 285 4 5 6 3
+             287: 27(f64vec4) Load 286
+             288: 27(f64vec4) VectorShuffle 287 285 4 5 6 3
                               Store 286 288
              289:      6(int) Load 8(invocation)
              290:    123(ptr) AccessChain 31(data) 115 115
-             291:   27(fvec4) Load 290
+             291: 27(f64vec4) Load 290
              292:   17(ivec4) Load 19(ballot)
-             293:   27(fvec4) GroupNonUniformFAdd 178 PartitionedReduceNV 291 292
+             293: 27(f64vec4) GroupNonUniformFAdd 178 PartitionedReduceNV 291 292
              294:    123(ptr) AccessChain 31(data) 289 115
                               Store 294 293
              295:      6(int) Load 8(invocation)
@@ -486,36 +486,36 @@ spv.subgroupPartitioned.comp
                               Store 384 383
              385:      6(int) Load 8(invocation)
              386:    116(ptr) AccessChain 31(data) 34 115 35
-             387:   26(float) Load 386
+             387:26(float64_t) Load 386
              388:   17(ivec4) Load 19(ballot)
-             389:   26(float) GroupNonUniformFMul 178 PartitionedReduceNV 387 388
+             389:26(float64_t) GroupNonUniformFMul 178 PartitionedReduceNV 387 388
              390:    116(ptr) AccessChain 31(data) 385 115 35
                               Store 390 389
              391:      6(int) Load 8(invocation)
              392:    123(ptr) AccessChain 31(data) 63 115
-             393:   27(fvec4) Load 392
-             394:  122(fvec2) VectorShuffle 393 393 0 1
+             393: 27(f64vec4) Load 392
+             394:122(f64vec2) VectorShuffle 393 393 0 1
              395:   17(ivec4) Load 19(ballot)
-             396:  122(fvec2) GroupNonUniformFMul 178 PartitionedReduceNV 394 395
+             396:122(f64vec2) GroupNonUniformFMul 178 PartitionedReduceNV 394 395
              397:    123(ptr) AccessChain 31(data) 391 115
-             398:   27(fvec4) Load 397
-             399:   27(fvec4) VectorShuffle 398 396 4 5 2 3
+             398: 27(f64vec4) Load 397
+             399: 27(f64vec4) VectorShuffle 398 396 4 5 2 3
                               Store 397 399
              400:      6(int) Load 8(invocation)
              401:    123(ptr) AccessChain 31(data) 33 115
-             402:   27(fvec4) Load 401
-             403:  130(fvec3) VectorShuffle 402 402 0 1 2
+             402: 27(f64vec4) Load 401
+             403:130(f64vec3) VectorShuffle 402 402 0 1 2
              404:   17(ivec4) Load 19(ballot)
-             405:  130(fvec3) GroupNonUniformFMul 178 PartitionedReduceNV 403 404
+             405:130(f64vec3) GroupNonUniformFMul 178 PartitionedReduceNV 403 404
              406:    123(ptr) AccessChain 31(data) 400 115
-             407:   27(fvec4) Load 406
-             408:   27(fvec4) VectorShuffle 407 405 4 5 6 3
+             407: 27(f64vec4) Load 406
+             408: 27(f64vec4) VectorShuffle 407 405 4 5 6 3
                               Store 406 408
              409:      6(int) Load 8(invocation)
              410:    123(ptr) AccessChain 31(data) 115 115
-             411:   27(fvec4) Load 410
+             411: 27(f64vec4) Load 410
              412:   17(ivec4) Load 19(ballot)
-             413:   27(fvec4) GroupNonUniformFMul 178 PartitionedReduceNV 411 412
+             413: 27(f64vec4) GroupNonUniformFMul 178 PartitionedReduceNV 411 412
              414:    123(ptr) AccessChain 31(data) 409 115
                               Store 414 413
              415:      6(int) Load 8(invocation)
@@ -622,36 +622,36 @@ spv.subgroupPartitioned.comp
                               Store 504 503
              505:      6(int) Load 8(invocation)
              506:    116(ptr) AccessChain 31(data) 34 115 35
-             507:   26(float) Load 506
+             507:26(float64_t) Load 506
              508:   17(ivec4) Load 19(ballot)
-             509:   26(float) GroupNonUniformFMin 178 PartitionedReduceNV 507 508
+             509:26(float64_t) GroupNonUniformFMin 178 PartitionedReduceNV 507 508
              510:    116(ptr) AccessChain 31(data) 505 115 35
                               Store 510 509
              511:      6(int) Load 8(invocation)
              512:    123(ptr) AccessChain 31(data) 63 115
-             513:   27(fvec4) Load 512
-             514:  122(fvec2) VectorShuffle 513 513 0 1
+             513: 27(f64vec4) Load 512
+             514:122(f64vec2) VectorShuffle 513 513 0 1
              515:   17(ivec4) Load 19(ballot)
-             516:  122(fvec2) GroupNonUniformFMin 178 PartitionedReduceNV 514 515
+             516:122(f64vec2) GroupNonUniformFMin 178 PartitionedReduceNV 514 515
              517:    123(ptr) AccessChain 31(data) 511 115
-             518:   27(fvec4) Load 517
-             519:   27(fvec4) VectorShuffle 518 516 4 5 2 3
+             518: 27(f64vec4) Load 517
+             519: 27(f64vec4) VectorShuffle 518 516 4 5 2 3
                               Store 517 519
              520:      6(int) Load 8(invocation)
              521:    123(ptr) AccessChain 31(data) 33 115
-             522:   27(fvec4) Load 521
-             523:  130(fvec3) VectorShuffle 522 522 0 1 2
+             522: 27(f64vec4) Load 521
+             523:130(f64vec3) VectorShuffle 522 522 0 1 2
              524:   17(ivec4) Load 19(ballot)
-             525:  130(fvec3) GroupNonUniformFMin 178 PartitionedReduceNV 523 524
+             525:130(f64vec3) GroupNonUniformFMin 178 PartitionedReduceNV 523 524
              526:    123(ptr) AccessChain 31(data) 520 115
-             527:   27(fvec4) Load 526
-             528:   27(fvec4) VectorShuffle 527 525 4 5 6 3
+             527: 27(f64vec4) Load 526
+             528: 27(f64vec4) VectorShuffle 527 525 4 5 6 3
                               Store 526 528
              529:      6(int) Load 8(invocation)
              530:    123(ptr) AccessChain 31(data) 115 115
-             531:   27(fvec4) Load 530
+             531: 27(f64vec4) Load 530
              532:   17(ivec4) Load 19(ballot)
-             533:   27(fvec4) GroupNonUniformFMin 178 PartitionedReduceNV 531 532
+             533: 27(f64vec4) GroupNonUniformFMin 178 PartitionedReduceNV 531 532
              534:    123(ptr) AccessChain 31(data) 529 115
                               Store 534 533
              535:      6(int) Load 8(invocation)
@@ -758,36 +758,36 @@ spv.subgroupPartitioned.comp
                               Store 624 623
              625:      6(int) Load 8(invocation)
              626:    116(ptr) AccessChain 31(data) 34 115 35
-             627:   26(float) Load 626
+             627:26(float64_t) Load 626
              628:   17(ivec4) Load 19(ballot)
-             629:   26(float) GroupNonUniformFMax 178 PartitionedReduceNV 627 628
+             629:26(float64_t) GroupNonUniformFMax 178 PartitionedReduceNV 627 628
              630:    116(ptr) AccessChain 31(data) 625 115 35
                               Store 630 629
              631:      6(int) Load 8(invocation)
              632:    123(ptr) AccessChain 31(data) 63 115
-             633:   27(fvec4) Load 632
-             634:  122(fvec2) VectorShuffle 633 633 0 1
+             633: 27(f64vec4) Load 632
+             634:122(f64vec2) VectorShuffle 633 633 0 1
              635:   17(ivec4) Load 19(ballot)
-             636:  122(fvec2) GroupNonUniformFMax 178 PartitionedReduceNV 634 635
+             636:122(f64vec2) GroupNonUniformFMax 178 PartitionedReduceNV 634 635
              637:    123(ptr) AccessChain 31(data) 631 115
-             638:   27(fvec4) Load 637
-             639:   27(fvec4) VectorShuffle 638 636 4 5 2 3
+             638: 27(f64vec4) Load 637
+             639: 27(f64vec4) VectorShuffle 638 636 4 5 2 3
                               Store 637 639
              640:      6(int) Load 8(invocation)
              641:    123(ptr) AccessChain 31(data) 33 115
-             642:   27(fvec4) Load 641
-             643:  130(fvec3) VectorShuffle 642 642 0 1 2
+             642: 27(f64vec4) Load 641
+             643:130(f64vec3) VectorShuffle 642 642 0 1 2
              644:   17(ivec4) Load 19(ballot)
-             645:  130(fvec3) GroupNonUniformFMax 178 PartitionedReduceNV 643 644
+             645:130(f64vec3) GroupNonUniformFMax 178 PartitionedReduceNV 643 644
              646:    123(ptr) AccessChain 31(data) 640 115
-             647:   27(fvec4) Load 646
-             648:   27(fvec4) VectorShuffle 647 645 4 5 6 3
+             647: 27(f64vec4) Load 646
+             648: 27(f64vec4) VectorShuffle 647 645 4 5 6 3
                               Store 646 648
              649:      6(int) Load 8(invocation)
              650:    123(ptr) AccessChain 31(data) 115 115
-             651:   27(fvec4) Load 650
+             651: 27(f64vec4) Load 650
              652:   17(ivec4) Load 19(ballot)
-             653:   27(fvec4) GroupNonUniformFMax 178 PartitionedReduceNV 651 652
+             653: 27(f64vec4) GroupNonUniformFMax 178 PartitionedReduceNV 651 652
              654:    123(ptr) AccessChain 31(data) 649 115
                               Store 654 653
              655:      6(int) Load 8(invocation)
@@ -1224,36 +1224,36 @@ spv.subgroupPartitioned.comp
                               Store 1044 1043
             1045:      6(int) Load 8(invocation)
             1046:    116(ptr) AccessChain 31(data) 34 115 35
-            1047:   26(float) Load 1046
+            1047:26(float64_t) Load 1046
             1048:   17(ivec4) Load 19(ballot)
-            1049:   26(float) GroupNonUniformFAdd 178 PartitionedInclusiveScanNV 1047 1048
+            1049:26(float64_t) GroupNonUniformFAdd 178 PartitionedInclusiveScanNV 1047 1048
             1050:    116(ptr) AccessChain 31(data) 1045 115 35
                               Store 1050 1049
             1051:      6(int) Load 8(invocation)
             1052:    123(ptr) AccessChain 31(data) 63 115
-            1053:   27(fvec4) Load 1052
-            1054:  122(fvec2) VectorShuffle 1053 1053 0 1
+            1053: 27(f64vec4) Load 1052
+            1054:122(f64vec2) VectorShuffle 1053 1053 0 1
             1055:   17(ivec4) Load 19(ballot)
-            1056:  122(fvec2) GroupNonUniformFAdd 178 PartitionedInclusiveScanNV 1054 1055
+            1056:122(f64vec2) GroupNonUniformFAdd 178 PartitionedInclusiveScanNV 1054 1055
             1057:    123(ptr) AccessChain 31(data) 1051 115
-            1058:   27(fvec4) Load 1057
-            1059:   27(fvec4) VectorShuffle 1058 1056 4 5 2 3
+            1058: 27(f64vec4) Load 1057
+            1059: 27(f64vec4) VectorShuffle 1058 1056 4 5 2 3
                               Store 1057 1059
             1060:      6(int) Load 8(invocation)
             1061:    123(ptr) AccessChain 31(data) 33 115
-            1062:   27(fvec4) Load 1061
-            1063:  130(fvec3) VectorShuffle 1062 1062 0 1 2
+            1062: 27(f64vec4) Load 1061
+            1063:130(f64vec3) VectorShuffle 1062 1062 0 1 2
             1064:   17(ivec4) Load 19(ballot)
-            1065:  130(fvec3) GroupNonUniformFAdd 178 PartitionedInclusiveScanNV 1063 1064
+            1065:130(f64vec3) GroupNonUniformFAdd 178 PartitionedInclusiveScanNV 1063 1064
             1066:    123(ptr) AccessChain 31(data) 1060 115
-            1067:   27(fvec4) Load 1066
-            1068:   27(fvec4) VectorShuffle 1067 1065 4 5 6 3
+            1067: 27(f64vec4) Load 1066
+            1068: 27(f64vec4) VectorShuffle 1067 1065 4 5 6 3
                               Store 1066 1068
             1069:      6(int) Load 8(invocation)
             1070:    123(ptr) AccessChain 31(data) 115 115
-            1071:   27(fvec4) Load 1070
+            1071: 27(f64vec4) Load 1070
             1072:   17(ivec4) Load 19(ballot)
-            1073:   27(fvec4) GroupNonUniformFAdd 178 PartitionedInclusiveScanNV 1071 1072
+            1073: 27(f64vec4) GroupNonUniformFAdd 178 PartitionedInclusiveScanNV 1071 1072
             1074:    123(ptr) AccessChain 31(data) 1069 115
                               Store 1074 1073
             1075:      6(int) Load 8(invocation)
@@ -1360,36 +1360,36 @@ spv.subgroupPartitioned.comp
                               Store 1164 1163
             1165:      6(int) Load 8(invocation)
             1166:    116(ptr) AccessChain 31(data) 34 115 35
-            1167:   26(float) Load 1166
+            1167:26(float64_t) Load 1166
             1168:   17(ivec4) Load 19(ballot)
-            1169:   26(float) GroupNonUniformFMul 178 PartitionedInclusiveScanNV 1167 1168
+            1169:26(float64_t) GroupNonUniformFMul 178 PartitionedInclusiveScanNV 1167 1168
             1170:    116(ptr) AccessChain 31(data) 1165 115 35
                               Store 1170 1169
             1171:      6(int) Load 8(invocation)
             1172:    123(ptr) AccessChain 31(data) 63 115
-            1173:   27(fvec4) Load 1172
-            1174:  122(fvec2) VectorShuffle 1173 1173 0 1
+            1173: 27(f64vec4) Load 1172
+            1174:122(f64vec2) VectorShuffle 1173 1173 0 1
             1175:   17(ivec4) Load 19(ballot)
-            1176:  122(fvec2) GroupNonUniformFMul 178 PartitionedInclusiveScanNV 1174 1175
+            1176:122(f64vec2) GroupNonUniformFMul 178 PartitionedInclusiveScanNV 1174 1175
             1177:    123(ptr) AccessChain 31(data) 1171 115
-            1178:   27(fvec4) Load 1177
-            1179:   27(fvec4) VectorShuffle 1178 1176 4 5 2 3
+            1178: 27(f64vec4) Load 1177
+            1179: 27(f64vec4) VectorShuffle 1178 1176 4 5 2 3
                               Store 1177 1179
             1180:      6(int) Load 8(invocation)
             1181:    123(ptr) AccessChain 31(data) 33 115
-            1182:   27(fvec4) Load 1181
-            1183:  130(fvec3) VectorShuffle 1182 1182 0 1 2
+            1182: 27(f64vec4) Load 1181
+            1183:130(f64vec3) VectorShuffle 1182 1182 0 1 2
             1184:   17(ivec4) Load 19(ballot)
-            1185:  130(fvec3) GroupNonUniformFMul 178 PartitionedInclusiveScanNV 1183 1184
+            1185:130(f64vec3) GroupNonUniformFMul 178 PartitionedInclusiveScanNV 1183 1184
             1186:    123(ptr) AccessChain 31(data) 1180 115
-            1187:   27(fvec4) Load 1186
-            1188:   27(fvec4) VectorShuffle 1187 1185 4 5 6 3
+            1187: 27(f64vec4) Load 1186
+            1188: 27(f64vec4) VectorShuffle 1187 1185 4 5 6 3
                               Store 1186 1188
             1189:      6(int) Load 8(invocation)
             1190:    123(ptr) AccessChain 31(data) 115 115
-            1191:   27(fvec4) Load 1190
+            1191: 27(f64vec4) Load 1190
             1192:   17(ivec4) Load 19(ballot)
-            1193:   27(fvec4) GroupNonUniformFMul 178 PartitionedInclusiveScanNV 1191 1192
+            1193: 27(f64vec4) GroupNonUniformFMul 178 PartitionedInclusiveScanNV 1191 1192
             1194:    123(ptr) AccessChain 31(data) 1189 115
                               Store 1194 1193
             1195:      6(int) Load 8(invocation)
@@ -1496,36 +1496,36 @@ spv.subgroupPartitioned.comp
                               Store 1284 1283
             1285:      6(int) Load 8(invocation)
             1286:    116(ptr) AccessChain 31(data) 34 115 35
-            1287:   26(float) Load 1286
+            1287:26(float64_t) Load 1286
             1288:   17(ivec4) Load 19(ballot)
-            1289:   26(float) GroupNonUniformFMin 178 PartitionedInclusiveScanNV 1287 1288
+            1289:26(float64_t) GroupNonUniformFMin 178 PartitionedInclusiveScanNV 1287 1288
             1290:    116(ptr) AccessChain 31(data) 1285 115 35
                               Store 1290 1289
             1291:      6(int) Load 8(invocation)
             1292:    123(ptr) AccessChain 31(data) 63 115
-            1293:   27(fvec4) Load 1292
-            1294:  122(fvec2) VectorShuffle 1293 1293 0 1
+            1293: 27(f64vec4) Load 1292
+            1294:122(f64vec2) VectorShuffle 1293 1293 0 1
             1295:   17(ivec4) Load 19(ballot)
-            1296:  122(fvec2) GroupNonUniformFMin 178 PartitionedInclusiveScanNV 1294 1295
+            1296:122(f64vec2) GroupNonUniformFMin 178 PartitionedInclusiveScanNV 1294 1295
             1297:    123(ptr) AccessChain 31(data) 1291 115
-            1298:   27(fvec4) Load 1297
-            1299:   27(fvec4) VectorShuffle 1298 1296 4 5 2 3
+            1298: 27(f64vec4) Load 1297
+            1299: 27(f64vec4) VectorShuffle 1298 1296 4 5 2 3
                               Store 1297 1299
             1300:      6(int) Load 8(invocation)
             1301:    123(ptr) AccessChain 31(data) 33 115
-            1302:   27(fvec4) Load 1301
-            1303:  130(fvec3) VectorShuffle 1302 1302 0 1 2
+            1302: 27(f64vec4) Load 1301
+            1303:130(f64vec3) VectorShuffle 1302 1302 0 1 2
             1304:   17(ivec4) Load 19(ballot)
-            1305:  130(fvec3) GroupNonUniformFMin 178 PartitionedInclusiveScanNV 1303 1304
+            1305:130(f64vec3) GroupNonUniformFMin 178 PartitionedInclusiveScanNV 1303 1304
             1306:    123(ptr) AccessChain 31(data) 1300 115
-            1307:   27(fvec4) Load 1306
-            1308:   27(fvec4) VectorShuffle 1307 1305 4 5 6 3
+            1307: 27(f64vec4) Load 1306
+            1308: 27(f64vec4) VectorShuffle 1307 1305 4 5 6 3
                               Store 1306 1308
             1309:      6(int) Load 8(invocation)
             1310:    123(ptr) AccessChain 31(data) 115 115
-            1311:   27(fvec4) Load 1310
+            1311: 27(f64vec4) Load 1310
             1312:   17(ivec4) Load 19(ballot)
-            1313:   27(fvec4) GroupNonUniformFMin 178 PartitionedInclusiveScanNV 1311 1312
+            1313: 27(f64vec4) GroupNonUniformFMin 178 PartitionedInclusiveScanNV 1311 1312
             1314:    123(ptr) AccessChain 31(data) 1309 115
                               Store 1314 1313
             1315:      6(int) Load 8(invocation)
@@ -1632,36 +1632,36 @@ spv.subgroupPartitioned.comp
                               Store 1404 1403
             1405:      6(int) Load 8(invocation)
             1406:    116(ptr) AccessChain 31(data) 34 115 35
-            1407:   26(float) Load 1406
+            1407:26(float64_t) Load 1406
             1408:   17(ivec4) Load 19(ballot)
-            1409:   26(float) GroupNonUniformFMax 178 PartitionedInclusiveScanNV 1407 1408
+            1409:26(float64_t) GroupNonUniformFMax 178 PartitionedInclusiveScanNV 1407 1408
             1410:    116(ptr) AccessChain 31(data) 1405 115 35
                               Store 1410 1409
             1411:      6(int) Load 8(invocation)
             1412:    123(ptr) AccessChain 31(data) 63 115
-            1413:   27(fvec4) Load 1412
-            1414:  122(fvec2) VectorShuffle 1413 1413 0 1
+            1413: 27(f64vec4) Load 1412
+            1414:122(f64vec2) VectorShuffle 1413 1413 0 1
             1415:   17(ivec4) Load 19(ballot)
-            1416:  122(fvec2) GroupNonUniformFMax 178 PartitionedInclusiveScanNV 1414 1415
+            1416:122(f64vec2) GroupNonUniformFMax 178 PartitionedInclusiveScanNV 1414 1415
             1417:    123(ptr) AccessChain 31(data) 1411 115
-            1418:   27(fvec4) Load 1417
-            1419:   27(fvec4) VectorShuffle 1418 1416 4 5 2 3
+            1418: 27(f64vec4) Load 1417
+            1419: 27(f64vec4) VectorShuffle 1418 1416 4 5 2 3
                               Store 1417 1419
             1420:      6(int) Load 8(invocation)
             1421:    123(ptr) AccessChain 31(data) 33 115
-            1422:   27(fvec4) Load 1421
-            1423:  130(fvec3) VectorShuffle 1422 1422 0 1 2
+            1422: 27(f64vec4) Load 1421
+            1423:130(f64vec3) VectorShuffle 1422 1422 0 1 2
             1424:   17(ivec4) Load 19(ballot)
-            1425:  130(fvec3) GroupNonUniformFMax 178 PartitionedInclusiveScanNV 1423 1424
+            1425:130(f64vec3) GroupNonUniformFMax 178 PartitionedInclusiveScanNV 1423 1424
             1426:    123(ptr) AccessChain 31(data) 1420 115
-            1427:   27(fvec4) Load 1426
-            1428:   27(fvec4) VectorShuffle 1427 1425 4 5 6 3
+            1427: 27(f64vec4) Load 1426
+            1428: 27(f64vec4) VectorShuffle 1427 1425 4 5 6 3
                               Store 1426 1428
             1429:      6(int) Load 8(invocation)
             1430:    123(ptr) AccessChain 31(data) 115 115
-            1431:   27(fvec4) Load 1430
+            1431: 27(f64vec4) Load 1430
             1432:   17(ivec4) Load 19(ballot)
-            1433:   27(fvec4) GroupNonUniformFMax 178 PartitionedInclusiveScanNV 1431 1432
+            1433: 27(f64vec4) GroupNonUniformFMax 178 PartitionedInclusiveScanNV 1431 1432
             1434:    123(ptr) AccessChain 31(data) 1429 115
                               Store 1434 1433
             1435:      6(int) Load 8(invocation)
@@ -2098,36 +2098,36 @@ spv.subgroupPartitioned.comp
                               Store 1818 1817
             1819:      6(int) Load 8(invocation)
             1820:    116(ptr) AccessChain 31(data) 34 115 35
-            1821:   26(float) Load 1820
+            1821:26(float64_t) Load 1820
             1822:   17(ivec4) Load 19(ballot)
-            1823:   26(float) GroupNonUniformFAdd 178 PartitionedExclusiveScanNV 1821 1822
+            1823:26(float64_t) GroupNonUniformFAdd 178 PartitionedExclusiveScanNV 1821 1822
             1824:    116(ptr) AccessChain 31(data) 1819 115 35
                               Store 1824 1823
             1825:      6(int) Load 8(invocation)
             1826:    123(ptr) AccessChain 31(data) 63 115
-            1827:   27(fvec4) Load 1826
-            1828:  122(fvec2) VectorShuffle 1827 1827 0 1
+            1827: 27(f64vec4) Load 1826
+            1828:122(f64vec2) VectorShuffle 1827 1827 0 1
             1829:   17(ivec4) Load 19(ballot)
-            1830:  122(fvec2) GroupNonUniformFAdd 178 PartitionedExclusiveScanNV 1828 1829
+            1830:122(f64vec2) GroupNonUniformFAdd 178 PartitionedExclusiveScanNV 1828 1829
             1831:    123(ptr) AccessChain 31(data) 1825 115
-            1832:   27(fvec4) Load 1831
-            1833:   27(fvec4) VectorShuffle 1832 1830 4 5 2 3
+            1832: 27(f64vec4) Load 1831
+            1833: 27(f64vec4) VectorShuffle 1832 1830 4 5 2 3
                               Store 1831 1833
             1834:      6(int) Load 8(invocation)
             1835:    123(ptr) AccessChain 31(data) 33 115
-            1836:   27(fvec4) Load 1835
-            1837:  130(fvec3) VectorShuffle 1836 1836 0 1 2
+            1836: 27(f64vec4) Load 1835
+            1837:130(f64vec3) VectorShuffle 1836 1836 0 1 2
             1838:   17(ivec4) Load 19(ballot)
-            1839:  130(fvec3) GroupNonUniformFAdd 178 PartitionedExclusiveScanNV 1837 1838
+            1839:130(f64vec3) GroupNonUniformFAdd 178 PartitionedExclusiveScanNV 1837 1838
             1840:    123(ptr) AccessChain 31(data) 1834 115
-            1841:   27(fvec4) Load 1840
-            1842:   27(fvec4) VectorShuffle 1841 1839 4 5 6 3
+            1841: 27(f64vec4) Load 1840
+            1842: 27(f64vec4) VectorShuffle 1841 1839 4 5 6 3
                               Store 1840 1842
             1843:      6(int) Load 8(invocation)
             1844:    123(ptr) AccessChain 31(data) 115 115
-            1845:   27(fvec4) Load 1844
+            1845: 27(f64vec4) Load 1844
             1846:   17(ivec4) Load 19(ballot)
-            1847:   27(fvec4) GroupNonUniformFAdd 178 PartitionedExclusiveScanNV 1845 1846
+            1847: 27(f64vec4) GroupNonUniformFAdd 178 PartitionedExclusiveScanNV 1845 1846
             1848:    123(ptr) AccessChain 31(data) 1843 115
                               Store 1848 1847
             1849:      6(int) Load 8(invocation)
@@ -2234,36 +2234,36 @@ spv.subgroupPartitioned.comp
                               Store 1938 1937
             1939:      6(int) Load 8(invocation)
             1940:    116(ptr) AccessChain 31(data) 34 115 35
-            1941:   26(float) Load 1940
+            1941:26(float64_t) Load 1940
             1942:   17(ivec4) Load 19(ballot)
-            1943:   26(float) GroupNonUniformFMul 178 PartitionedExclusiveScanNV 1941 1942
+            1943:26(float64_t) GroupNonUniformFMul 178 PartitionedExclusiveScanNV 1941 1942
             1944:    116(ptr) AccessChain 31(data) 1939 115 35
                               Store 1944 1943
             1945:      6(int) Load 8(invocation)
             1946:    123(ptr) AccessChain 31(data) 63 115
-            1947:   27(fvec4) Load 1946
-            1948:  122(fvec2) VectorShuffle 1947 1947 0 1
+            1947: 27(f64vec4) Load 1946
+            1948:122(f64vec2) VectorShuffle 1947 1947 0 1
             1949:   17(ivec4) Load 19(ballot)
-            1950:  122(fvec2) GroupNonUniformFMul 178 PartitionedExclusiveScanNV 1948 1949
+            1950:122(f64vec2) GroupNonUniformFMul 178 PartitionedExclusiveScanNV 1948 1949
             1951:    123(ptr) AccessChain 31(data) 1945 115
-            1952:   27(fvec4) Load 1951
-            1953:   27(fvec4) VectorShuffle 1952 1950 4 5 2 3
+            1952: 27(f64vec4) Load 1951
+            1953: 27(f64vec4) VectorShuffle 1952 1950 4 5 2 3
                               Store 1951 1953
             1954:      6(int) Load 8(invocation)
             1955:    123(ptr) AccessChain 31(data) 33 115
-            1956:   27(fvec4) Load 1955
-            1957:  130(fvec3) VectorShuffle 1956 1956 0 1 2
+            1956: 27(f64vec4) Load 1955
+            1957:130(f64vec3) VectorShuffle 1956 1956 0 1 2
             1958:   17(ivec4) Load 19(ballot)
-            1959:  130(fvec3) GroupNonUniformFMul 178 PartitionedExclusiveScanNV 1957 1958
+            1959:130(f64vec3) GroupNonUniformFMul 178 PartitionedExclusiveScanNV 1957 1958
             1960:    123(ptr) AccessChain 31(data) 1954 115
-            1961:   27(fvec4) Load 1960
-            1962:   27(fvec4) VectorShuffle 1961 1959 4 5 6 3
+            1961: 27(f64vec4) Load 1960
+            1962: 27(f64vec4) VectorShuffle 1961 1959 4 5 6 3
                               Store 1960 1962
             1963:      6(int) Load 8(invocation)
             1964:    123(ptr) AccessChain 31(data) 115 115
-            1965:   27(fvec4) Load 1964
+            1965: 27(f64vec4) Load 1964
             1966:   17(ivec4) Load 19(ballot)
-            1967:   27(fvec4) GroupNonUniformFMul 178 PartitionedExclusiveScanNV 1965 1966
+            1967: 27(f64vec4) GroupNonUniformFMul 178 PartitionedExclusiveScanNV 1965 1966
             1968:    123(ptr) AccessChain 31(data) 1963 115
                               Store 1968 1967
             1969:      6(int) Load 8(invocation)
@@ -2370,36 +2370,36 @@ spv.subgroupPartitioned.comp
                               Store 2058 2057
             2059:      6(int) Load 8(invocation)
             2060:    116(ptr) AccessChain 31(data) 34 115 35
-            2061:   26(float) Load 2060
+            2061:26(float64_t) Load 2060
             2062:   17(ivec4) Load 19(ballot)
-            2063:   26(float) GroupNonUniformFMin 178 PartitionedExclusiveScanNV 2061 2062
+            2063:26(float64_t) GroupNonUniformFMin 178 PartitionedExclusiveScanNV 2061 2062
             2064:    116(ptr) AccessChain 31(data) 2059 115 35
                               Store 2064 2063
             2065:      6(int) Load 8(invocation)
             2066:    123(ptr) AccessChain 31(data) 63 115
-            2067:   27(fvec4) Load 2066
-            2068:  122(fvec2) VectorShuffle 2067 2067 0 1
+            2067: 27(f64vec4) Load 2066
+            2068:122(f64vec2) VectorShuffle 2067 2067 0 1
             2069:   17(ivec4) Load 19(ballot)
-            2070:  122(fvec2) GroupNonUniformFMin 178 PartitionedExclusiveScanNV 2068 2069
+            2070:122(f64vec2) GroupNonUniformFMin 178 PartitionedExclusiveScanNV 2068 2069
             2071:    123(ptr) AccessChain 31(data) 2065 115
-            2072:   27(fvec4) Load 2071
-            2073:   27(fvec4) VectorShuffle 2072 2070 4 5 2 3
+            2072: 27(f64vec4) Load 2071
+            2073: 27(f64vec4) VectorShuffle 2072 2070 4 5 2 3
                               Store 2071 2073
             2074:      6(int) Load 8(invocation)
             2075:    123(ptr) AccessChain 31(data) 33 115
-            2076:   27(fvec4) Load 2075
-            2077:  130(fvec3) VectorShuffle 2076 2076 0 1 2
+            2076: 27(f64vec4) Load 2075
+            2077:130(f64vec3) VectorShuffle 2076 2076 0 1 2
             2078:   17(ivec4) Load 19(ballot)
-            2079:  130(fvec3) GroupNonUniformFMin 178 PartitionedExclusiveScanNV 2077 2078
+            2079:130(f64vec3) GroupNonUniformFMin 178 PartitionedExclusiveScanNV 2077 2078
             2080:    123(ptr) AccessChain 31(data) 2074 115
-            2081:   27(fvec4) Load 2080
-            2082:   27(fvec4) VectorShuffle 2081 2079 4 5 6 3
+            2081: 27(f64vec4) Load 2080
+            2082: 27(f64vec4) VectorShuffle 2081 2079 4 5 6 3
                               Store 2080 2082
             2083:      6(int) Load 8(invocation)
             2084:    123(ptr) AccessChain 31(data) 115 115
-            2085:   27(fvec4) Load 2084
+            2085: 27(f64vec4) Load 2084
             2086:   17(ivec4) Load 19(ballot)
-            2087:   27(fvec4) GroupNonUniformFMin 178 PartitionedExclusiveScanNV 2085 2086
+            2087: 27(f64vec4) GroupNonUniformFMin 178 PartitionedExclusiveScanNV 2085 2086
             2088:    123(ptr) AccessChain 31(data) 2083 115
                               Store 2088 2087
             2089:      6(int) Load 8(invocation)
@@ -2506,36 +2506,36 @@ spv.subgroupPartitioned.comp
                               Store 2178 2177
             2179:      6(int) Load 8(invocation)
             2180:    116(ptr) AccessChain 31(data) 34 115 35
-            2181:   26(float) Load 2180
+            2181:26(float64_t) Load 2180
             2182:   17(ivec4) Load 19(ballot)
-            2183:   26(float) GroupNonUniformFMax 178 PartitionedExclusiveScanNV 2181 2182
+            2183:26(float64_t) GroupNonUniformFMax 178 PartitionedExclusiveScanNV 2181 2182
             2184:    116(ptr) AccessChain 31(data) 2179 115 35
                               Store 2184 2183
             2185:      6(int) Load 8(invocation)
             2186:    123(ptr) AccessChain 31(data) 63 115
-            2187:   27(fvec4) Load 2186
-            2188:  122(fvec2) VectorShuffle 2187 2187 0 1
+            2187: 27(f64vec4) Load 2186
+            2188:122(f64vec2) VectorShuffle 2187 2187 0 1
             2189:   17(ivec4) Load 19(ballot)
-            2190:  122(fvec2) GroupNonUniformFMax 178 PartitionedExclusiveScanNV 2188 2189
+            2190:122(f64vec2) GroupNonUniformFMax 178 PartitionedExclusiveScanNV 2188 2189
             2191:    123(ptr) AccessChain 31(data) 2185 115
-            2192:   27(fvec4) Load 2191
-            2193:   27(fvec4) VectorShuffle 2192 2190 4 5 2 3
+            2192: 27(f64vec4) Load 2191
+            2193: 27(f64vec4) VectorShuffle 2192 2190 4 5 2 3
                               Store 2191 2193
             2194:      6(int) Load 8(invocation)
             2195:    123(ptr) AccessChain 31(data) 33 115
-            2196:   27(fvec4) Load 2195
-            2197:  130(fvec3) VectorShuffle 2196 2196 0 1 2
+            2196: 27(f64vec4) Load 2195
+            2197:130(f64vec3) VectorShuffle 2196 2196 0 1 2
             2198:   17(ivec4) Load 19(ballot)
-            2199:  130(fvec3) GroupNonUniformFMax 178 PartitionedExclusiveScanNV 2197 2198
+            2199:130(f64vec3) GroupNonUniformFMax 178 PartitionedExclusiveScanNV 2197 2198
             2200:    123(ptr) AccessChain 31(data) 2194 115
-            2201:   27(fvec4) Load 2200
-            2202:   27(fvec4) VectorShuffle 2201 2199 4 5 6 3
+            2201: 27(f64vec4) Load 2200
+            2202: 27(f64vec4) VectorShuffle 2201 2199 4 5 6 3
                               Store 2200 2202
             2203:      6(int) Load 8(invocation)
             2204:    123(ptr) AccessChain 31(data) 115 115
-            2205:   27(fvec4) Load 2204
+            2205: 27(f64vec4) Load 2204
             2206:   17(ivec4) Load 19(ballot)
-            2207:   27(fvec4) GroupNonUniformFMax 178 PartitionedExclusiveScanNV 2205 2206
+            2207: 27(f64vec4) GroupNonUniformFMax 178 PartitionedExclusiveScanNV 2205 2206
             2208:    123(ptr) AccessChain 31(data) 2203 115
                               Store 2208 2207
             2209:      6(int) Load 8(invocation)

3rdparty/glslang/Test/baseResults/spv.subgroupQuad.comp.out

@@ -54,8 +54,8 @@ spv.subgroupQuad.comp
               20:             TypeVector 19(int) 4
               21:             TypeVector 6(int) 4
               22:             TypeFloat 64
-              23:             TypeVector 22(float) 4
-     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(fvec4)
+              23:             TypeVector 22(float64_t) 4
+     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(f64vec4)
               25:             TypeArray 24(Buffers) 15
               26:             TypePointer Uniform 25
         27(data):     26(ptr) Variable Uniform
@@ -78,10 +78,10 @@ spv.subgroupQuad.comp
              102:             TypeVector 6(int) 2
              103:             TypePointer Uniform 21(ivec4)
              112:             TypeVector 6(int) 3
-             126:             TypePointer Uniform 22(float)
-             132:             TypeVector 22(float) 2
-             133:             TypePointer Uniform 23(fvec4)
-             142:             TypeVector 22(float) 3
+             126:             TypePointer Uniform 22(float64_t)
+             132:             TypeVector 22(float64_t) 2
+             133:             TypePointer Uniform 23(f64vec4)
+             142:             TypeVector 22(float64_t) 3
              158:             TypeBool
              167:   72(ivec2) ConstantComposite 29 29
              168:             TypeVector 158(bool) 2
@@ -195,32 +195,32 @@ spv.subgroupQuad.comp
                               Store 124 123
              125:      6(int) Load 8(invocation)
              127:    126(ptr) AccessChain 27(data) 29 60 30
-             128:   22(float) Load 127
-             129:   22(float) GroupNonUniformQuadBroadcast 35 128 34
+             128:22(float64_t) Load 127
+             129:22(float64_t) GroupNonUniformQuadBroadcast 35 128 34
              130:    126(ptr) AccessChain 27(data) 125 60 30
                               Store 130 129
              131:      6(int) Load 8(invocation)
              134:    133(ptr) AccessChain 27(data) 39 60
-             135:   23(fvec4) Load 134
-             136:  132(fvec2) VectorShuffle 135 135 0 1
-             137:  132(fvec2) GroupNonUniformQuadBroadcast 35 136 34
+             135: 23(f64vec4) Load 134
+             136:132(f64vec2) VectorShuffle 135 135 0 1
+             137:132(f64vec2) GroupNonUniformQuadBroadcast 35 136 34
              138:    133(ptr) AccessChain 27(data) 131 60
-             139:   23(fvec4) Load 138
-             140:   23(fvec4) VectorShuffle 139 137 4 5 2 3
+             139: 23(f64vec4) Load 138
+             140: 23(f64vec4) VectorShuffle 139 137 4 5 2 3
                               Store 138 140
              141:      6(int) Load 8(invocation)
              143:    133(ptr) AccessChain 27(data) 50 60
-             144:   23(fvec4) Load 143
-             145:  142(fvec3) VectorShuffle 144 144 0 1 2
-             146:  142(fvec3) GroupNonUniformQuadBroadcast 35 145 34
+             144: 23(f64vec4) Load 143
+             145:142(f64vec3) VectorShuffle 144 144 0 1 2
+             146:142(f64vec3) GroupNonUniformQuadBroadcast 35 145 34
              147:    133(ptr) AccessChain 27(data) 141 60
-             148:   23(fvec4) Load 147
-             149:   23(fvec4) VectorShuffle 148 146 4 5 6 3
+             148: 23(f64vec4) Load 147
+             149: 23(f64vec4) VectorShuffle 148 146 4 5 6 3
                               Store 147 149
              150:      6(int) Load 8(invocation)
              151:    133(ptr) AccessChain 27(data) 60 60
-             152:   23(fvec4) Load 151
-             153:   23(fvec4) GroupNonUniformQuadBroadcast 35 152 34
+             152: 23(f64vec4) Load 151
+             153: 23(f64vec4) GroupNonUniformQuadBroadcast 35 152 34
              154:    133(ptr) AccessChain 27(data) 150 60
                               Store 154 153
              155:      6(int) Load 8(invocation)
@@ -353,32 +353,32 @@ spv.subgroupQuad.comp
                               Store 276 275
              277:      6(int) Load 8(invocation)
              278:    126(ptr) AccessChain 27(data) 29 60 30
-             279:   22(float) Load 278
-             280:   22(float) GroupNonUniformQuadSwap 35 279 30
+             279:22(float64_t) Load 278
+             280:22(float64_t) GroupNonUniformQuadSwap 35 279 30
              281:    126(ptr) AccessChain 27(data) 277 60 30
                               Store 281 280
              282:      6(int) Load 8(invocation)
              283:    133(ptr) AccessChain 27(data) 39 60
-             284:   23(fvec4) Load 283
-             285:  132(fvec2) VectorShuffle 284 284 0 1
-             286:  132(fvec2) GroupNonUniformQuadSwap 35 285 30
+             284: 23(f64vec4) Load 283
+             285:132(f64vec2) VectorShuffle 284 284 0 1
+             286:132(f64vec2) GroupNonUniformQuadSwap 35 285 30
              287:    133(ptr) AccessChain 27(data) 282 60
-             288:   23(fvec4) Load 287
-             289:   23(fvec4) VectorShuffle 288 286 4 5 2 3
+             288: 23(f64vec4) Load 287
+             289: 23(f64vec4) VectorShuffle 288 286 4 5 2 3
                               Store 287 289
              290:      6(int) Load 8(invocation)
              291:    133(ptr) AccessChain 27(data) 50 60
-             292:   23(fvec4) Load 291
-             293:  142(fvec3) VectorShuffle 292 292 0 1 2
-             294:  142(fvec3) GroupNonUniformQuadSwap 35 293 30
+             292: 23(f64vec4) Load 291
+             293:142(f64vec3) VectorShuffle 292 292 0 1 2
+             294:142(f64vec3) GroupNonUniformQuadSwap 35 293 30
              295:    133(ptr) AccessChain 27(data) 290 60
-             296:   23(fvec4) Load 295
-             297:   23(fvec4) VectorShuffle 296 294 4 5 6 3
+             296: 23(f64vec4) Load 295
+             297: 23(f64vec4) VectorShuffle 296 294 4 5 6 3
                               Store 295 297
              298:      6(int) Load 8(invocation)
              299:    133(ptr) AccessChain 27(data) 60 60
-             300:   23(fvec4) Load 299
-             301:   23(fvec4) GroupNonUniformQuadSwap 35 300 30
+             300: 23(f64vec4) Load 299
+             301: 23(f64vec4) GroupNonUniformQuadSwap 35 300 30
              302:    133(ptr) AccessChain 27(data) 298 60
                               Store 302 301
              303:      6(int) Load 8(invocation)
@@ -511,32 +511,32 @@ spv.subgroupQuad.comp
                               Store 414 413
              415:      6(int) Load 8(invocation)
              416:    126(ptr) AccessChain 27(data) 29 60 30
-             417:   22(float) Load 416
-             418:   22(float) GroupNonUniformQuadSwap 35 417 34
+             417:22(float64_t) Load 416
+             418:22(float64_t) GroupNonUniformQuadSwap 35 417 34
              419:    126(ptr) AccessChain 27(data) 415 60 30
                               Store 419 418
              420:      6(int) Load 8(invocation)
              421:    133(ptr) AccessChain 27(data) 39 60
-             422:   23(fvec4) Load 421
-             423:  132(fvec2) VectorShuffle 422 422 0 1
-             424:  132(fvec2) GroupNonUniformQuadSwap 35 423 34
+             422: 23(f64vec4) Load 421
+             423:132(f64vec2) VectorShuffle 422 422 0 1
+             424:132(f64vec2) GroupNonUniformQuadSwap 35 423 34
              425:    133(ptr) AccessChain 27(data) 420 60
-             426:   23(fvec4) Load 425
-             427:   23(fvec4) VectorShuffle 426 424 4 5 2 3
+             426: 23(f64vec4) Load 425
+             427: 23(f64vec4) VectorShuffle 426 424 4 5 2 3
                               Store 425 427
              428:      6(int) Load 8(invocation)
              429:    133(ptr) AccessChain 27(data) 50 60
-             430:   23(fvec4) Load 429
-             431:  142(fvec3) VectorShuffle 430 430 0 1 2
-             432:  142(fvec3) GroupNonUniformQuadSwap 35 431 34
+             430: 23(f64vec4) Load 429
+             431:142(f64vec3) VectorShuffle 430 430 0 1 2
+             432:142(f64vec3) GroupNonUniformQuadSwap 35 431 34
              433:    133(ptr) AccessChain 27(data) 428 60
-             434:   23(fvec4) Load 433
-             435:   23(fvec4) VectorShuffle 434 432 4 5 6 3
+             434: 23(f64vec4) Load 433
+             435: 23(f64vec4) VectorShuffle 434 432 4 5 6 3
                               Store 433 435
              436:      6(int) Load 8(invocation)
              437:    133(ptr) AccessChain 27(data) 60 60
-             438:   23(fvec4) Load 437
-             439:   23(fvec4) GroupNonUniformQuadSwap 35 438 34
+             438: 23(f64vec4) Load 437
+             439: 23(f64vec4) GroupNonUniformQuadSwap 35 438 34
              440:    133(ptr) AccessChain 27(data) 436 60
                               Store 440 439
              441:      6(int) Load 8(invocation)
@@ -669,32 +669,32 @@ spv.subgroupQuad.comp
                               Store 553 552
              554:      6(int) Load 8(invocation)
              555:    126(ptr) AccessChain 27(data) 29 60 30
-             556:   22(float) Load 555
-             557:   22(float) GroupNonUniformQuadSwap 35 556 478
+             556:22(float64_t) Load 555
+             557:22(float64_t) GroupNonUniformQuadSwap 35 556 478
              558:    126(ptr) AccessChain 27(data) 554 60 30
                               Store 558 557
              559:      6(int) Load 8(invocation)
              560:    133(ptr) AccessChain 27(data) 39 60
-             561:   23(fvec4) Load 560
-             562:  132(fvec2) VectorShuffle 561 561 0 1
-             563:  132(fvec2) GroupNonUniformQuadSwap 35 562 478
+             561: 23(f64vec4) Load 560
+             562:132(f64vec2) VectorShuffle 561 561 0 1
+             563:132(f64vec2) GroupNonUniformQuadSwap 35 562 478
              564:    133(ptr) AccessChain 27(data) 559 60
-             565:   23(fvec4) Load 564
-             566:   23(fvec4) VectorShuffle 565 563 4 5 2 3
+             565: 23(f64vec4) Load 564
+             566: 23(f64vec4) VectorShuffle 565 563 4 5 2 3
                               Store 564 566
              567:      6(int) Load 8(invocation)
              568:    133(ptr) AccessChain 27(data) 50 60
-             569:   23(fvec4) Load 568
-             570:  142(fvec3) VectorShuffle 569 569 0 1 2
-             571:  142(fvec3) GroupNonUniformQuadSwap 35 570 478
+             569: 23(f64vec4) Load 568
+             570:142(f64vec3) VectorShuffle 569 569 0 1 2
+             571:142(f64vec3) GroupNonUniformQuadSwap 35 570 478
              572:    133(ptr) AccessChain 27(data) 567 60
-             573:   23(fvec4) Load 572
-             574:   23(fvec4) VectorShuffle 573 571 4 5 6 3
+             573: 23(f64vec4) Load 572
+             574: 23(f64vec4) VectorShuffle 573 571 4 5 6 3
                               Store 572 574
              575:      6(int) Load 8(invocation)
              576:    133(ptr) AccessChain 27(data) 60 60
-             577:   23(fvec4) Load 576
-             578:   23(fvec4) GroupNonUniformQuadSwap 35 577 478
+             577: 23(f64vec4) Load 576
+             578: 23(f64vec4) GroupNonUniformQuadSwap 35 577 478
              579:    133(ptr) AccessChain 27(data) 575 60
                               Store 579 578
              580:      6(int) Load 8(invocation)

3rdparty/glslang/Test/baseResults/spv.subgroupShuffle.comp.out

@@ -54,8 +54,8 @@ spv.subgroupShuffle.comp
               20:             TypeVector 19(int) 4
               21:             TypeVector 6(int) 4
               22:             TypeFloat 64
-              23:             TypeVector 22(float) 4
-     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(fvec4)
+              23:             TypeVector 22(float64_t) 4
+     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(f64vec4)
               25:             TypeArray 24(Buffers) 15
               26:             TypePointer Uniform 25
         27(data):     26(ptr) Variable Uniform
@@ -77,10 +77,10 @@ spv.subgroupShuffle.comp
              110:             TypeVector 6(int) 2
              111:             TypePointer Uniform 21(ivec4)
              121:             TypeVector 6(int) 3
-             137:             TypePointer Uniform 22(float)
-             144:             TypeVector 22(float) 2
-             145:             TypePointer Uniform 23(fvec4)
-             155:             TypeVector 22(float) 3
+             137:             TypePointer Uniform 22(float64_t)
+             144:             TypeVector 22(float64_t) 2
+             145:             TypePointer Uniform 23(f64vec4)
+             155:             TypeVector 22(float64_t) 3
              173:             TypeBool
              183:   76(ivec2) ConstantComposite 29 29
              184:             TypeVector 173(bool) 2
@@ -206,36 +206,36 @@ spv.subgroupShuffle.comp
                               Store 135 134
              136:      6(int) Load 8(invocation)
              138:    137(ptr) AccessChain 27(data) 29 62 30
-             139:   22(float) Load 138
+             139:22(float64_t) Load 138
              140:      6(int) Load 8(invocation)
-             141:   22(float) GroupNonUniformShuffle 35 139 140
+             141:22(float64_t) GroupNonUniformShuffle 35 139 140
              142:    137(ptr) AccessChain 27(data) 136 62 30
                               Store 142 141
              143:      6(int) Load 8(invocation)
              146:    145(ptr) AccessChain 27(data) 39 62
-             147:   23(fvec4) Load 146
-             148:  144(fvec2) VectorShuffle 147 147 0 1
+             147: 23(f64vec4) Load 146
+             148:144(f64vec2) VectorShuffle 147 147 0 1
              149:      6(int) Load 8(invocation)
-             150:  144(fvec2) GroupNonUniformShuffle 35 148 149
+             150:144(f64vec2) GroupNonUniformShuffle 35 148 149
              151:    145(ptr) AccessChain 27(data) 143 62
-             152:   23(fvec4) Load 151
-             153:   23(fvec4) VectorShuffle 152 150 4 5 2 3
+             152: 23(f64vec4) Load 151
+             153: 23(f64vec4) VectorShuffle 152 150 4 5 2 3
                               Store 151 153
              154:      6(int) Load 8(invocation)
              156:    145(ptr) AccessChain 27(data) 51 62
-             157:   23(fvec4) Load 156
-             158:  155(fvec3) VectorShuffle 157 157 0 1 2
+             157: 23(f64vec4) Load 156
+             158:155(f64vec3) VectorShuffle 157 157 0 1 2
              159:      6(int) Load 8(invocation)
-             160:  155(fvec3) GroupNonUniformShuffle 35 158 159
+             160:155(f64vec3) GroupNonUniformShuffle 35 158 159
              161:    145(ptr) AccessChain 27(data) 154 62
-             162:   23(fvec4) Load 161
-             163:   23(fvec4) VectorShuffle 162 160 4 5 6 3
+             162: 23(f64vec4) Load 161
+             163: 23(f64vec4) VectorShuffle 162 160 4 5 6 3
                               Store 161 163
              164:      6(int) Load 8(invocation)
              165:    145(ptr) AccessChain 27(data) 62 62
-             166:   23(fvec4) Load 165
+             166: 23(f64vec4) Load 165
              167:      6(int) Load 8(invocation)
-             168:   23(fvec4) GroupNonUniformShuffle 35 166 167
+             168: 23(f64vec4) GroupNonUniformShuffle 35 166 167
              169:    145(ptr) AccessChain 27(data) 164 62
                               Store 169 168
              170:      6(int) Load 8(invocation)
@@ -384,36 +384,36 @@ spv.subgroupShuffle.comp
                               Store 307 306
              308:      6(int) Load 8(invocation)
              309:    137(ptr) AccessChain 27(data) 29 62 30
-             310:   22(float) Load 309
+             310:22(float64_t) Load 309
              311:      6(int) Load 8(invocation)
-             312:   22(float) GroupNonUniformShuffleXor 35 310 311
+             312:22(float64_t) GroupNonUniformShuffleXor 35 310 311
              313:    137(ptr) AccessChain 27(data) 308 62 30
                               Store 313 312
              314:      6(int) Load 8(invocation)
              315:    145(ptr) AccessChain 27(data) 39 62
-             316:   23(fvec4) Load 315
-             317:  144(fvec2) VectorShuffle 316 316 0 1
+             316: 23(f64vec4) Load 315
+             317:144(f64vec2) VectorShuffle 316 316 0 1
              318:      6(int) Load 8(invocation)
-             319:  144(fvec2) GroupNonUniformShuffleXor 35 317 318
+             319:144(f64vec2) GroupNonUniformShuffleXor 35 317 318
              320:    145(ptr) AccessChain 27(data) 314 62
-             321:   23(fvec4) Load 320
-             322:   23(fvec4) VectorShuffle 321 319 4 5 2 3
+             321: 23(f64vec4) Load 320
+             322: 23(f64vec4) VectorShuffle 321 319 4 5 2 3
                               Store 320 322
              323:      6(int) Load 8(invocation)
              324:    145(ptr) AccessChain 27(data) 51 62
-             325:   23(fvec4) Load 324
-             326:  155(fvec3) VectorShuffle 325 325 0 1 2
+             325: 23(f64vec4) Load 324
+             326:155(f64vec3) VectorShuffle 325 325 0 1 2
              327:      6(int) Load 8(invocation)
-             328:  155(fvec3) GroupNonUniformShuffleXor 35 326 327
+             328:155(f64vec3) GroupNonUniformShuffleXor 35 326 327
              329:    145(ptr) AccessChain 27(data) 323 62
-             330:   23(fvec4) Load 329
-             331:   23(fvec4) VectorShuffle 330 328 4 5 6 3
+             330: 23(f64vec4) Load 329
+             331: 23(f64vec4) VectorShuffle 330 328 4 5 6 3
                               Store 329 331
              332:      6(int) Load 8(invocation)
              333:    145(ptr) AccessChain 27(data) 62 62
-             334:   23(fvec4) Load 333
+             334: 23(f64vec4) Load 333
              335:      6(int) Load 8(invocation)
-             336:   23(fvec4) GroupNonUniformShuffleXor 35 334 335
+             336: 23(f64vec4) GroupNonUniformShuffleXor 35 334 335
              337:    145(ptr) AccessChain 27(data) 332 62
                               Store 337 336
              338:      6(int) Load 8(invocation)

3rdparty/glslang/Test/baseResults/spv.subgroupShuffleRelative.comp.out

@@ -54,8 +54,8 @@ spv.subgroupShuffleRelative.comp
               20:             TypeVector 19(int) 4
               21:             TypeVector 6(int) 4
               22:             TypeFloat 64
-              23:             TypeVector 22(float) 4
-     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(fvec4)
+              23:             TypeVector 22(float64_t) 4
+     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(f64vec4)
               25:             TypeArray 24(Buffers) 15
               26:             TypePointer Uniform 25
         27(data):     26(ptr) Variable Uniform
@@ -77,10 +77,10 @@ spv.subgroupShuffleRelative.comp
              110:             TypeVector 6(int) 2
              111:             TypePointer Uniform 21(ivec4)
              121:             TypeVector 6(int) 3
-             137:             TypePointer Uniform 22(float)
-             144:             TypeVector 22(float) 2
-             145:             TypePointer Uniform 23(fvec4)
-             155:             TypeVector 22(float) 3
+             137:             TypePointer Uniform 22(float64_t)
+             144:             TypeVector 22(float64_t) 2
+             145:             TypePointer Uniform 23(f64vec4)
+             155:             TypeVector 22(float64_t) 3
              173:             TypeBool
              183:   76(ivec2) ConstantComposite 29 29
              184:             TypeVector 173(bool) 2
@@ -206,36 +206,36 @@ spv.subgroupShuffleRelative.comp
                               Store 135 134
              136:      6(int) Load 8(invocation)
              138:    137(ptr) AccessChain 27(data) 29 62 30
-             139:   22(float) Load 138
+             139:22(float64_t) Load 138
              140:      6(int) Load 8(invocation)
-             141:   22(float) GroupNonUniformShuffleUp 35 139 140
+             141:22(float64_t) GroupNonUniformShuffleUp 35 139 140
              142:    137(ptr) AccessChain 27(data) 136 62 30
                               Store 142 141
              143:      6(int) Load 8(invocation)
              146:    145(ptr) AccessChain 27(data) 39 62
-             147:   23(fvec4) Load 146
-             148:  144(fvec2) VectorShuffle 147 147 0 1
+             147: 23(f64vec4) Load 146
+             148:144(f64vec2) VectorShuffle 147 147 0 1
              149:      6(int) Load 8(invocation)
-             150:  144(fvec2) GroupNonUniformShuffleUp 35 148 149
+             150:144(f64vec2) GroupNonUniformShuffleUp 35 148 149
              151:    145(ptr) AccessChain 27(data) 143 62
-             152:   23(fvec4) Load 151
-             153:   23(fvec4) VectorShuffle 152 150 4 5 2 3
+             152: 23(f64vec4) Load 151
+             153: 23(f64vec4) VectorShuffle 152 150 4 5 2 3
                               Store 151 153
              154:      6(int) Load 8(invocation)
              156:    145(ptr) AccessChain 27(data) 51 62
-             157:   23(fvec4) Load 156
-             158:  155(fvec3) VectorShuffle 157 157 0 1 2
+             157: 23(f64vec4) Load 156
+             158:155(f64vec3) VectorShuffle 157 157 0 1 2
              159:      6(int) Load 8(invocation)
-             160:  155(fvec3) GroupNonUniformShuffleUp 35 158 159
+             160:155(f64vec3) GroupNonUniformShuffleUp 35 158 159
              161:    145(ptr) AccessChain 27(data) 154 62
-             162:   23(fvec4) Load 161
-             163:   23(fvec4) VectorShuffle 162 160 4 5 6 3
+             162: 23(f64vec4) Load 161
+             163: 23(f64vec4) VectorShuffle 162 160 4 5 6 3
                               Store 161 163
              164:      6(int) Load 8(invocation)
              165:    145(ptr) AccessChain 27(data) 62 62
-             166:   23(fvec4) Load 165
+             166: 23(f64vec4) Load 165
              167:      6(int) Load 8(invocation)
-             168:   23(fvec4) GroupNonUniformShuffleUp 35 166 167
+             168: 23(f64vec4) GroupNonUniformShuffleUp 35 166 167
              169:    145(ptr) AccessChain 27(data) 164 62
                               Store 169 168
              170:      6(int) Load 8(invocation)
@@ -384,36 +384,36 @@ spv.subgroupShuffleRelative.comp
                               Store 307 306
              308:      6(int) Load 8(invocation)
              309:    137(ptr) AccessChain 27(data) 29 62 30
-             310:   22(float) Load 309
+             310:22(float64_t) Load 309
              311:      6(int) Load 8(invocation)
-             312:   22(float) GroupNonUniformShuffleDown 35 310 311
+             312:22(float64_t) GroupNonUniformShuffleDown 35 310 311
              313:    137(ptr) AccessChain 27(data) 308 62 30
                               Store 313 312
              314:      6(int) Load 8(invocation)
              315:    145(ptr) AccessChain 27(data) 39 62
-             316:   23(fvec4) Load 315
-             317:  144(fvec2) VectorShuffle 316 316 0 1
+             316: 23(f64vec4) Load 315
+             317:144(f64vec2) VectorShuffle 316 316 0 1
              318:      6(int) Load 8(invocation)
-             319:  144(fvec2) GroupNonUniformShuffleDown 35 317 318
+             319:144(f64vec2) GroupNonUniformShuffleDown 35 317 318
              320:    145(ptr) AccessChain 27(data) 314 62
-             321:   23(fvec4) Load 320
-             322:   23(fvec4) VectorShuffle 321 319 4 5 2 3
+             321: 23(f64vec4) Load 320
+             322: 23(f64vec4) VectorShuffle 321 319 4 5 2 3
                               Store 320 322
              323:      6(int) Load 8(invocation)
              324:    145(ptr) AccessChain 27(data) 51 62
-             325:   23(fvec4) Load 324
-             326:  155(fvec3) VectorShuffle 325 325 0 1 2
+             325: 23(f64vec4) Load 324
+             326:155(f64vec3) VectorShuffle 325 325 0 1 2
              327:      6(int) Load 8(invocation)
-             328:  155(fvec3) GroupNonUniformShuffleDown 35 326 327
+             328:155(f64vec3) GroupNonUniformShuffleDown 35 326 327
              329:    145(ptr) AccessChain 27(data) 323 62
-             330:   23(fvec4) Load 329
-             331:   23(fvec4) VectorShuffle 330 328 4 5 6 3
+             330: 23(f64vec4) Load 329
+             331: 23(f64vec4) VectorShuffle 330 328 4 5 6 3
                               Store 329 331
              332:      6(int) Load 8(invocation)
              333:    145(ptr) AccessChain 27(data) 62 62
-             334:   23(fvec4) Load 333
+             334: 23(f64vec4) Load 333
              335:      6(int) Load 8(invocation)
-             336:   23(fvec4) GroupNonUniformShuffleDown 35 334 335
+             336: 23(f64vec4) GroupNonUniformShuffleDown 35 334 335
              337:    145(ptr) AccessChain 27(data) 332 62
                               Store 337 336
              338:      6(int) Load 8(invocation)

3rdparty/glslang/Test/baseResults/spv.subgroupVote.comp.out

@@ -56,8 +56,8 @@ spv.subgroupVote.comp
               20:             TypeVector 19(int) 4
               21:             TypeVector 6(int) 4
               22:             TypeFloat 64
-              23:             TypeVector 22(float) 4
-     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(fvec4) 19(int)
+              23:             TypeVector 22(float64_t) 4
+     24(Buffers):             TypeStruct 18(fvec4) 20(ivec4) 21(ivec4) 23(f64vec4) 19(int)
               25:             TypeArray 24(Buffers) 15
               26:             TypePointer Uniform 25
         27(data):     26(ptr) Variable Uniform
@@ -81,10 +81,10 @@ spv.subgroupVote.comp
              111:             TypeVector 6(int) 2
              112:             TypePointer Uniform 21(ivec4)
              120:             TypeVector 6(int) 3
-             142:             TypePointer Uniform 22(float)
-             149:             TypeVector 22(float) 2
-             150:             TypePointer Uniform 23(fvec4)
-             158:             TypeVector 22(float) 3
+             142:             TypePointer Uniform 22(float64_t)
+             149:             TypeVector 22(float64_t) 2
+             150:             TypePointer Uniform 23(f64vec4)
+             158:             TypeVector 22(float64_t) 3
              182:   81(ivec2) ConstantComposite 33 33
              183:             TypeVector 34(bool) 2
              194:   90(ivec3) ConstantComposite 33 33 33
@@ -212,30 +212,30 @@ spv.subgroupVote.comp
              139:                 Label
              141:      6(int)     Load 8(invocation)
              143:    142(ptr)     AccessChain 27(data) 33 68 41
-             144:   22(float)     Load 143
+             144:22(float64_t)     Load 143
              145:    34(bool)     GroupNonUniformAllEqual 36 144
              146:     19(int)     Select 145 46 33
              147:     30(ptr)     AccessChain 27(data) 141 29
                                   Store 147 146
              148:      6(int)     Load 8(invocation)
              151:    150(ptr)     AccessChain 27(data) 46 68
-             152:   23(fvec4)     Load 151
-             153:  149(fvec2)     VectorShuffle 152 152 0 1
+             152: 23(f64vec4)     Load 151
+             153:149(f64vec2)     VectorShuffle 152 152 0 1
              154:    34(bool)     GroupNonUniformAllEqual 36 153
              155:     19(int)     Select 154 46 33
              156:     30(ptr)     AccessChain 27(data) 148 29
                                   Store 156 155
              157:      6(int)     Load 8(invocation)
              159:    150(ptr)     AccessChain 27(data) 59 68
-             160:   23(fvec4)     Load 159
-             161:  158(fvec3)     VectorShuffle 160 160 0 1 2
+             160: 23(f64vec4)     Load 159
+             161:158(f64vec3)     VectorShuffle 160 160 0 1 2
              162:    34(bool)     GroupNonUniformAllEqual 36 161
              163:     19(int)     Select 162 46 33
              164:     30(ptr)     AccessChain 27(data) 157 29
                                   Store 164 163
              165:      6(int)     Load 8(invocation)
              166:    150(ptr)     AccessChain 27(data) 68 68
-             167:   23(fvec4)     Load 166
+             167: 23(f64vec4)     Load 166
              168:    34(bool)     GroupNonUniformAllEqual 36 167
              169:     19(int)     Select 168 46 33
              170:     30(ptr)     AccessChain 27(data) 165 29

3rdparty/glslang/Test/baseResults/spv.vulkan110.int16.frag.out

@@ -97,13 +97,13 @@ spv.vulkan110.int16.frag
                2:             TypeVoid
                3:             TypeFunction 2
               14:             TypeInt 16 1
-              15:             TypePointer Function 14(int)
+              15:             TypePointer Function 14(int16_t)
               17:             TypeInt 32 0
               18:     17(int) Constant 3
-              19:             TypeArray 14(int) 18
-              20:     14(int) Constant 4294962927
-              21:     14(int) Constant 4294967295
-              22:     14(int) Constant 16384
+              19:             TypeArray 14(int16_t) 18
+              20: 14(int16_t) Constant 4294962927
+              21: 14(int16_t) Constant 4294967295
+              22: 14(int16_t) Constant 16384
               23:          19 ConstantComposite 20 21 22
     24(Uniforms):             TypeStruct 17(int)
               25:             TypePointer Uniform 24(Uniforms)
@@ -113,83 +113,83 @@ spv.vulkan110.int16.frag
               29:             TypePointer Uniform 17(int)
               32:             TypePointer Function 19
               36:             TypeInt 16 0
-              37:             TypePointer Function 36(int)
-              39:             TypeArray 36(int) 18
-              40:     36(int) Constant 65535
-              41:     36(int) Constant 32767
+              37:             TypePointer Function 36(int16_t)
+              39:             TypeArray 36(int16_t) 18
+              40: 36(int16_t) Constant 65535
+              41: 36(int16_t) Constant 32767
               42:          39 ConstantComposite 40 40 41
               45:             TypePointer Function 39
               49:             TypeVector 27(int) 2
               50:             TypePointer Function 49(ivec2)
-              52:             TypeVector 14(int) 2
-              53:             TypePointer Function 52(ivec2)
-              57:             TypeVector 36(int) 2
-              58:             TypePointer Function 57(ivec2)
+              52:             TypeVector 14(int16_t) 2
+              53:             TypePointer Function 52(i16vec2)
+              57:             TypeVector 36(int16_t) 2
+              58:             TypePointer Function 57(i16vec2)
               65:             TypeVector 17(int) 2
               66:             TypePointer Function 65(ivec2)
               71:             TypeInt 64 1
-              72:             TypeVector 71(int) 2
-              73:             TypePointer Function 72(ivec2)
+              72:             TypeVector 71(int64_t) 2
+              73:             TypePointer Function 72(i64vec2)
               77:             TypeInt 64 0
-              78:             TypeVector 77(int) 2
-              79:             TypePointer Function 78(ivec2)
+              78:             TypeVector 77(int64_t) 2
+              79:             TypePointer Function 78(i64vec2)
               91:             TypeFloat 16
-              92:             TypeVector 91(float) 2
-              93:             TypePointer Function 92(fvec2)
+              92:             TypeVector 91(float16_t) 2
+              93:             TypePointer Function 92(f16vec2)
               97:             TypeFloat 32
               98:             TypeVector 97(float) 2
               99:             TypePointer Function 98(fvec2)
              103:             TypeFloat 64
-             104:             TypeVector 103(float) 2
-             105:             TypePointer Function 104(fvec2)
+             104:             TypeVector 103(float64_t) 2
+             105:             TypePointer Function 104(f64vec2)
              151:             TypeInt 8 1
-             152:             TypeVector 151(int) 2
-             153:             TypePointer Function 152(ivec2)
+             152:             TypeVector 151(int8_t) 2
+             153:             TypePointer Function 152(i8vec2)
              160:             TypeInt 8 0
-             161:             TypeVector 160(int) 2
-             162:             TypePointer Function 161(ivec2)
+             161:             TypeVector 160(int8_t) 2
+             162:             TypePointer Function 161(i8vec2)
              173:             TypeBool
              174:             TypeVector 173(bool) 2
              175:             TypePointer Function 174(bvec2)
-             178:     14(int) Constant 0
-             179:     14(int) Constant 1
-             180:   52(ivec2) ConstantComposite 178 178
-             181:   52(ivec2) ConstantComposite 179 179
-             184:     36(int) Constant 0
-             185:     36(int) Constant 1
-             186:   57(ivec2) ConstantComposite 184 184
-             187:   57(ivec2) ConstantComposite 185 185
-             193:             TypeVector 36(int) 3
-             194:             TypePointer Function 193(ivec3)
-             197:             TypeVector 14(int) 3
+             178: 14(int16_t) Constant 0
+             179: 14(int16_t) Constant 1
+             180: 52(i16vec2) ConstantComposite 178 178
+             181: 52(i16vec2) ConstantComposite 179 179
+             184: 36(int16_t) Constant 0
+             185: 36(int16_t) Constant 1
+             186: 57(i16vec2) ConstantComposite 184 184
+             187: 57(i16vec2) ConstantComposite 185 185
+             193:             TypeVector 36(int16_t) 3
+             194:             TypePointer Function 193(i16vec3)
+             197:             TypeVector 14(int16_t) 3
              219:             TypePointer Function 27(int)
              225:             TypeVector 17(int) 3
              226:             TypePointer Function 225(ivec3)
-             242:             TypePointer Function 71(int)
+             242:             TypePointer Function 71(int64_t)
              264:     17(int) Constant 1
              270:     17(int) Constant 2
              276:             TypeVector 27(int) 3
              280:             TypePointer Function 173(bool)
              282:     17(int) Constant 0
              296:             TypePointer Function 17(int)
-             354:   52(ivec2) ConstantComposite 21 21
-             363:  193(ivec3) ConstantComposite 184 184 184
+             354: 52(i16vec2) ConstantComposite 21 21
+             363:193(i16vec3) ConstantComposite 184 184 184
              405:   173(bool) ConstantTrue
              412:   173(bool) ConstantFalse
              413:  174(bvec2) ConstantComposite 412 412
              425:             TypeVector 173(bool) 3
              426:  425(bvec3) ConstantComposite 412 412 412
-             432:             TypeVector 14(int) 4
-             433:             TypePointer Function 432(ivec4)
-             441:             TypePointer Function 77(int)
-             443:             TypeVector 36(int) 4
-             444:             TypePointer Function 443(ivec4)
+             432:             TypeVector 14(int16_t) 4
+             433:             TypePointer Function 432(i16vec4)
+             441:             TypePointer Function 77(int64_t)
+             443:             TypeVector 36(int16_t) 4
+             444:             TypePointer Function 443(i16vec4)
              456:             TypePointer Function 425(bvec3)
-      518(Block):             TypeStruct 14(int) 52(ivec2) 197(ivec3) 432(ivec4) 36(int) 57(ivec2) 193(ivec3) 443(ivec4)
+      518(Block):             TypeStruct 14(int16_t) 52(i16vec2) 197(i16vec3) 432(i16vec4) 36(int16_t) 57(i16vec2) 193(i16vec3) 443(i16vec4)
              519:             TypePointer Uniform 518(Block)
       520(block):    519(ptr) Variable Uniform
-       521(si16):     14(int) SpecConstant 4294967286
-       522(su16):     36(int) SpecConstant 20
+       521(si16): 14(int16_t) SpecConstant 4294967286
+       522(su16): 36(int16_t) SpecConstant 20
          4(main):           2 Function None 3
                5:             Label
                               Return
@@ -204,13 +204,13 @@ spv.vulkan110.int16.frag
               31:     17(int) Load 30
                               Store 33(indexable) 23
               34:     15(ptr) AccessChain 33(indexable) 31
-              35:     14(int) Load 34
+              35: 14(int16_t) Load 34
                               Store 16(i16) 35
               43:     29(ptr) AccessChain 26 28
               44:     17(int) Load 43
                               Store 46(indexable) 42
               47:     37(ptr) AccessChain 46(indexable) 44
-              48:     36(int) Load 47
+              48: 36(int16_t) Load 47
                               Store 38(u16) 48
                               Return
                               FunctionEnd
@@ -228,135 +228,135 @@ spv.vulkan110.int16.frag
         154(i8v):    153(ptr) Variable Function
         163(u8v):    162(ptr) Variable Function
          176(bv):    175(ptr) Variable Function
-              55:   52(ivec2) Load 54(i16v)
+              55: 52(i16vec2) Load 54(i16v)
               56:   49(ivec2) SConvert 55
                               Store 51(i32v) 56
-              60:   57(ivec2) Load 59(u16v)
+              60: 57(i16vec2) Load 59(u16v)
               61:   49(ivec2) UConvert 60
               62:   49(ivec2) Bitcast 61
                               Store 51(i32v) 62
-              63:   52(ivec2) Load 54(i16v)
-              64:   57(ivec2) Bitcast 63
+              63: 52(i16vec2) Load 54(i16v)
+              64: 57(i16vec2) Bitcast 63
                               Store 59(u16v) 64
-              68:   52(ivec2) Load 54(i16v)
+              68: 52(i16vec2) Load 54(i16v)
               69:   49(ivec2) SConvert 68
               70:   65(ivec2) Bitcast 69
                               Store 67(u32v) 70
-              75:   52(ivec2) Load 54(i16v)
-              76:   72(ivec2) SConvert 75
+              75: 52(i16vec2) Load 54(i16v)
+              76: 72(i64vec2) SConvert 75
                               Store 74(i64v) 76
-              81:   52(ivec2) Load 54(i16v)
-              82:   72(ivec2) SConvert 81
-              83:   78(ivec2) Bitcast 82
+              81: 52(i16vec2) Load 54(i16v)
+              82: 72(i64vec2) SConvert 81
+              83: 78(i64vec2) Bitcast 82
                               Store 80(u64v) 83
-              84:   57(ivec2) Load 59(u16v)
+              84: 57(i16vec2) Load 59(u16v)
               85:   65(ivec2) UConvert 84
                               Store 67(u32v) 85
-              86:   57(ivec2) Load 59(u16v)
-              87:   72(ivec2) UConvert 86
-              88:   72(ivec2) Bitcast 87
+              86: 57(i16vec2) Load 59(u16v)
+              87: 72(i64vec2) UConvert 86
+              88: 72(i64vec2) Bitcast 87
                               Store 74(i64v) 88
-              89:   57(ivec2) Load 59(u16v)
-              90:   78(ivec2) UConvert 89
+              89: 57(i16vec2) Load 59(u16v)
+              90: 78(i64vec2) UConvert 89
                               Store 80(u64v) 90
-              95:   52(ivec2) Load 54(i16v)
-              96:   92(fvec2) ConvertSToF 95
+              95: 52(i16vec2) Load 54(i16v)
+              96: 92(f16vec2) ConvertSToF 95
                               Store 94(f16v) 96
-             101:   52(ivec2) Load 54(i16v)
+             101: 52(i16vec2) Load 54(i16v)
              102:   98(fvec2) ConvertSToF 101
                               Store 100(f32v) 102
-             107:   52(ivec2) Load 54(i16v)
-             108:  104(fvec2) ConvertSToF 107
+             107: 52(i16vec2) Load 54(i16v)
+             108:104(f64vec2) ConvertSToF 107
                               Store 106(f64v) 108
-             109:   57(ivec2) Load 59(u16v)
-             110:   92(fvec2) ConvertUToF 109
+             109: 57(i16vec2) Load 59(u16v)
+             110: 92(f16vec2) ConvertUToF 109
                               Store 94(f16v) 110
-             111:   57(ivec2) Load 59(u16v)
+             111: 57(i16vec2) Load 59(u16v)
              112:   98(fvec2) ConvertUToF 111
                               Store 100(f32v) 112
-             113:   57(ivec2) Load 59(u16v)
-             114:  104(fvec2) ConvertUToF 113
+             113: 57(i16vec2) Load 59(u16v)
+             114:104(f64vec2) ConvertUToF 113
                               Store 106(f64v) 114
-             115:   52(ivec2) Load 54(i16v)
+             115: 52(i16vec2) Load 54(i16v)
              116:   49(ivec2) SConvert 115
                               Store 51(i32v) 116
-             117:   57(ivec2) Load 59(u16v)
+             117: 57(i16vec2) Load 59(u16v)
              118:   49(ivec2) UConvert 117
              119:   49(ivec2) Bitcast 118
                               Store 51(i32v) 119
-             120:   52(ivec2) Load 54(i16v)
-             121:   57(ivec2) Bitcast 120
+             120: 52(i16vec2) Load 54(i16v)
+             121: 57(i16vec2) Bitcast 120
                               Store 59(u16v) 121
-             122:   52(ivec2) Load 54(i16v)
+             122: 52(i16vec2) Load 54(i16v)
              123:   49(ivec2) SConvert 122
              124:   65(ivec2) Bitcast 123
                               Store 67(u32v) 124
-             125:   52(ivec2) Load 54(i16v)
-             126:   72(ivec2) SConvert 125
+             125: 52(i16vec2) Load 54(i16v)
+             126: 72(i64vec2) SConvert 125
                               Store 74(i64v) 126
-             127:   52(ivec2) Load 54(i16v)
-             128:   72(ivec2) SConvert 127
-             129:   78(ivec2) Bitcast 128
+             127: 52(i16vec2) Load 54(i16v)
+             128: 72(i64vec2) SConvert 127
+             129: 78(i64vec2) Bitcast 128
                               Store 80(u64v) 129
-             130:   57(ivec2) Load 59(u16v)
+             130: 57(i16vec2) Load 59(u16v)
              131:   65(ivec2) UConvert 130
                               Store 67(u32v) 131
-             132:   57(ivec2) Load 59(u16v)
-             133:   72(ivec2) UConvert 132
-             134:   72(ivec2) Bitcast 133
+             132: 57(i16vec2) Load 59(u16v)
+             133: 72(i64vec2) UConvert 132
+             134: 72(i64vec2) Bitcast 133
                               Store 74(i64v) 134
-             135:   57(ivec2) Load 59(u16v)
-             136:   72(ivec2) UConvert 135
-             137:   72(ivec2) Bitcast 136
-             138:   78(ivec2) Bitcast 137
+             135: 57(i16vec2) Load 59(u16v)
+             136: 72(i64vec2) UConvert 135
+             137: 72(i64vec2) Bitcast 136
+             138: 78(i64vec2) Bitcast 137
                               Store 80(u64v) 138
-             139:   52(ivec2) Load 54(i16v)
-             140:   92(fvec2) ConvertSToF 139
+             139: 52(i16vec2) Load 54(i16v)
+             140: 92(f16vec2) ConvertSToF 139
                               Store 94(f16v) 140
-             141:   52(ivec2) Load 54(i16v)
+             141: 52(i16vec2) Load 54(i16v)
              142:   98(fvec2) ConvertSToF 141
                               Store 100(f32v) 142
-             143:   52(ivec2) Load 54(i16v)
-             144:  104(fvec2) ConvertSToF 143
+             143: 52(i16vec2) Load 54(i16v)
+             144:104(f64vec2) ConvertSToF 143
                               Store 106(f64v) 144
-             145:   57(ivec2) Load 59(u16v)
-             146:   92(fvec2) ConvertUToF 145
+             145: 57(i16vec2) Load 59(u16v)
+             146: 92(f16vec2) ConvertUToF 145
                               Store 94(f16v) 146
-             147:   57(ivec2) Load 59(u16v)
+             147: 57(i16vec2) Load 59(u16v)
              148:   98(fvec2) ConvertUToF 147
                               Store 100(f32v) 148
-             149:   57(ivec2) Load 59(u16v)
-             150:  104(fvec2) ConvertUToF 149
+             149: 57(i16vec2) Load 59(u16v)
+             150:104(f64vec2) ConvertUToF 149
                               Store 106(f64v) 150
-             155:   52(ivec2) Load 54(i16v)
-             156:  152(ivec2) SConvert 155
+             155: 52(i16vec2) Load 54(i16v)
+             156: 152(i8vec2) SConvert 155
                               Store 154(i8v) 156
-             157:   57(ivec2) Load 59(u16v)
-             158:  152(ivec2) UConvert 157
-             159:  152(ivec2) Bitcast 158
+             157: 57(i16vec2) Load 59(u16v)
+             158: 152(i8vec2) UConvert 157
+             159: 152(i8vec2) Bitcast 158
                               Store 154(i8v) 159
-             164:   52(ivec2) Load 54(i16v)
-             165:  152(ivec2) SConvert 164
-             166:  161(ivec2) Bitcast 165
+             164: 52(i16vec2) Load 54(i16v)
+             165: 152(i8vec2) SConvert 164
+             166: 161(i8vec2) Bitcast 165
                               Store 163(u8v) 166
-             167:   57(ivec2) Load 59(u16v)
-             168:  161(ivec2) UConvert 167
+             167: 57(i16vec2) Load 59(u16v)
+             168: 161(i8vec2) UConvert 167
                               Store 163(u8v) 168
-             169:   57(ivec2) Load 59(u16v)
-             170:  161(ivec2) UConvert 169
-             171:   52(ivec2) UConvert 170
-             172:   52(ivec2) Bitcast 171
+             169: 57(i16vec2) Load 59(u16v)
+             170: 161(i8vec2) UConvert 169
+             171: 52(i16vec2) UConvert 170
+             172: 52(i16vec2) Bitcast 171
                               Store 54(i16v) 172
              177:  174(bvec2) Load 176(bv)
-             182:   52(ivec2) Select 177 181 180
+             182: 52(i16vec2) Select 177 181 180
                               Store 54(i16v) 182
              183:  174(bvec2) Load 176(bv)
-             188:   57(ivec2) Select 183 187 186
+             188: 57(i16vec2) Select 183 187 186
                               Store 59(u16v) 188
-             189:   52(ivec2) Load 54(i16v)
+             189: 52(i16vec2) Load 54(i16v)
              190:  174(bvec2) INotEqual 189 186
                               Store 176(bv) 190
-             191:   57(ivec2) Load 59(u16v)
+             191: 57(i16vec2) Load 59(u16v)
              192:  174(bvec2) INotEqual 191 186
                               Store 176(bv) 192
                               Return
@@ -369,169 +369,169 @@ spv.vulkan110.int16.frag
          227(uv):    226(ptr) Variable Function
         243(i64):    242(ptr) Variable Function
           281(b):    280(ptr) Variable Function
-             196:  193(ivec3) Load 195(u16v)
-             198:  197(ivec3) CompositeConstruct 179 179 179
-             199:  193(ivec3) IAdd 196 198
+             196:193(i16vec3) Load 195(u16v)
+             198:197(i16vec3) CompositeConstruct 179 179 179
+             199:193(i16vec3) IAdd 196 198
                               Store 195(u16v) 199
-             201:     14(int) Load 200(i16)
-             202:     14(int) ISub 201 179
+             201: 14(int16_t) Load 200(i16)
+             202: 14(int16_t) ISub 201 179
                               Store 200(i16) 202
-             203:     14(int) Load 200(i16)
-             204:     14(int) IAdd 203 179
+             203: 14(int16_t) Load 200(i16)
+             204: 14(int16_t) IAdd 203 179
                               Store 200(i16) 204
-             205:  193(ivec3) Load 195(u16v)
-             206:  197(ivec3) CompositeConstruct 179 179 179
-             207:  193(ivec3) ISub 205 206
+             205:193(i16vec3) Load 195(u16v)
+             206:197(i16vec3) CompositeConstruct 179 179 179
+             207:193(i16vec3) ISub 205 206
                               Store 195(u16v) 207
-             208:  193(ivec3) Load 195(u16v)
-             209:  193(ivec3) Not 208
+             208:193(i16vec3) Load 195(u16v)
+             209:193(i16vec3) Not 208
                               Store 195(u16v) 209
-             210:     14(int) Load 200(i16)
+             210: 14(int16_t) Load 200(i16)
                               Store 200(i16) 210
-             211:  193(ivec3) Load 195(u16v)
-             212:  193(ivec3) SNegate 211
+             211:193(i16vec3) Load 195(u16v)
+             212:193(i16vec3) SNegate 211
                               Store 195(u16v) 212
-             213:     14(int) Load 200(i16)
-             214:     14(int) Load 200(i16)
-             215:     14(int) IAdd 214 213
+             213: 14(int16_t) Load 200(i16)
+             214: 14(int16_t) Load 200(i16)
+             215: 14(int16_t) IAdd 214 213
                               Store 200(i16) 215
-             216:  193(ivec3) Load 195(u16v)
-             217:  193(ivec3) Load 195(u16v)
-             218:  193(ivec3) ISub 217 216
+             216:193(i16vec3) Load 195(u16v)
+             217:193(i16vec3) Load 195(u16v)
+             218:193(i16vec3) ISub 217 216
                               Store 195(u16v) 218
-             221:     14(int) Load 200(i16)
+             221: 14(int16_t) Load 200(i16)
              222:     27(int) SConvert 221
              223:     27(int) Load 220(i)
              224:     27(int) IMul 223 222
                               Store 220(i) 224
-             228:  193(ivec3) Load 195(u16v)
+             228:193(i16vec3) Load 195(u16v)
              229:  225(ivec3) UConvert 228
              230:  225(ivec3) Load 227(uv)
              231:  225(ivec3) UDiv 230 229
                               Store 227(uv) 231
-             232:     14(int) Load 200(i16)
+             232: 14(int16_t) Load 200(i16)
              233:     27(int) SConvert 232
              234:     17(int) Bitcast 233
              235:  225(ivec3) Load 227(uv)
              236:  225(ivec3) CompositeConstruct 234 234 234
              237:  225(ivec3) UMod 235 236
                               Store 227(uv) 237
-             238:  193(ivec3) Load 195(u16v)
+             238:193(i16vec3) Load 195(u16v)
              239:  225(ivec3) UConvert 238
              240:  225(ivec3) Load 227(uv)
              241:  225(ivec3) IAdd 239 240
                               Store 227(uv) 241
-             244:     14(int) Load 200(i16)
-             245:     71(int) SConvert 244
-             246:     71(int) Load 243(i64)
-             247:     71(int) ISub 245 246
+             244: 14(int16_t) Load 200(i16)
+             245: 71(int64_t) SConvert 244
+             246: 71(int64_t) Load 243(i64)
+             247: 71(int64_t) ISub 245 246
                               Store 243(i64) 247
-             248:  193(ivec3) Load 195(u16v)
+             248:193(i16vec3) Load 195(u16v)
              249:  225(ivec3) UConvert 248
              250:  225(ivec3) Load 227(uv)
              251:  225(ivec3) IMul 249 250
                               Store 227(uv) 251
-             252:     14(int) Load 200(i16)
-             253:     71(int) SConvert 252
-             254:     71(int) Load 243(i64)
-             255:     71(int) IMul 253 254
+             252: 14(int16_t) Load 200(i16)
+             253: 71(int64_t) SConvert 252
+             254: 71(int64_t) Load 243(i64)
+             255: 71(int64_t) IMul 253 254
                               Store 243(i64) 255
-             256:     14(int) Load 200(i16)
+             256: 14(int16_t) Load 200(i16)
              257:     27(int) SConvert 256
              258:     27(int) Load 220(i)
              259:     27(int) SMod 257 258
                               Store 220(i) 259
-             260:     14(int) Load 200(i16)
-             261:  193(ivec3) Load 195(u16v)
-             262:  197(ivec3) CompositeConstruct 260 260 260
-             263:  193(ivec3) ShiftLeftLogical 261 262
+             260: 14(int16_t) Load 200(i16)
+             261:193(i16vec3) Load 195(u16v)
+             262:197(i16vec3) CompositeConstruct 260 260 260
+             263:193(i16vec3) ShiftLeftLogical 261 262
                               Store 195(u16v) 263
              265:     37(ptr) AccessChain 195(u16v) 264
-             266:     36(int) Load 265
-             267:     14(int) Load 200(i16)
-             268:     14(int) ShiftRightArithmetic 267 266
+             266: 36(int16_t) Load 265
+             267: 14(int16_t) Load 200(i16)
+             268: 14(int16_t) ShiftRightArithmetic 267 266
                               Store 200(i16) 268
-             269:     14(int) Load 200(i16)
+             269: 14(int16_t) Load 200(i16)
              271:     37(ptr) AccessChain 195(u16v) 270
-             272:     36(int) Load 271
-             273:     14(int) ShiftLeftLogical 269 272
+             272: 36(int16_t) Load 271
+             273: 14(int16_t) ShiftLeftLogical 269 272
                               Store 200(i16) 273
-             274:  193(ivec3) Load 195(u16v)
+             274:193(i16vec3) Load 195(u16v)
              275:     27(int) Load 220(i)
              277:  276(ivec3) CompositeConstruct 275 275 275
-             278:  193(ivec3) ShiftLeftLogical 274 277
+             278:193(i16vec3) ShiftLeftLogical 274 277
              279:  225(ivec3) UConvert 278
                               Store 227(uv) 279
              283:     37(ptr) AccessChain 195(u16v) 282
-             284:     36(int) Load 283
-             285:     14(int) Load 200(i16)
-             286:     36(int) Bitcast 285
+             284: 36(int16_t) Load 283
+             285: 14(int16_t) Load 200(i16)
+             286: 36(int16_t) Bitcast 285
              287:   173(bool) INotEqual 284 286
                               Store 281(b) 287
-             288:     14(int) Load 200(i16)
-             289:     36(int) Bitcast 288
+             288: 14(int16_t) Load 200(i16)
+             289: 36(int16_t) Bitcast 288
              290:     37(ptr) AccessChain 195(u16v) 282
-             291:     36(int) Load 290
+             291: 36(int16_t) Load 290
              292:   173(bool) IEqual 289 291
                               Store 281(b) 292
              293:     37(ptr) AccessChain 195(u16v) 282
-             294:     36(int) Load 293
+             294: 36(int16_t) Load 293
              295:     17(int) UConvert 294
              297:    296(ptr) AccessChain 227(uv) 264
              298:     17(int) Load 297
              299:   173(bool) UGreaterThan 295 298
                               Store 281(b) 299
-             300:     14(int) Load 200(i16)
+             300: 14(int16_t) Load 200(i16)
              301:     27(int) SConvert 300
              302:     27(int) Load 220(i)
              303:   173(bool) SLessThan 301 302
                               Store 281(b) 303
              304:     37(ptr) AccessChain 195(u16v) 264
-             305:     36(int) Load 304
+             305: 36(int16_t) Load 304
              306:     17(int) UConvert 305
              307:    296(ptr) AccessChain 227(uv) 282
              308:     17(int) Load 307
              309:   173(bool) UGreaterThanEqual 306 308
                               Store 281(b) 309
-             310:     14(int) Load 200(i16)
+             310: 14(int16_t) Load 200(i16)
              311:     27(int) SConvert 310
              312:     27(int) Load 220(i)
              313:   173(bool) SLessThanEqual 311 312
                               Store 281(b) 313
-             314:     14(int) Load 200(i16)
+             314: 14(int16_t) Load 200(i16)
              315:     27(int) SConvert 314
              316:     17(int) Bitcast 315
              317:  225(ivec3) Load 227(uv)
              318:  225(ivec3) CompositeConstruct 316 316 316
              319:  225(ivec3) BitwiseOr 317 318
                               Store 227(uv) 319
-             320:     14(int) Load 200(i16)
+             320: 14(int16_t) Load 200(i16)
              321:     27(int) SConvert 320
              322:     27(int) Load 220(i)
              323:     27(int) BitwiseOr 321 322
                               Store 220(i) 323
-             324:     14(int) Load 200(i16)
-             325:     71(int) SConvert 324
-             326:     71(int) Load 243(i64)
-             327:     71(int) BitwiseAnd 326 325
+             324: 14(int16_t) Load 200(i16)
+             325: 71(int64_t) SConvert 324
+             326: 71(int64_t) Load 243(i64)
+             327: 71(int64_t) BitwiseAnd 326 325
                               Store 243(i64) 327
-             328:  193(ivec3) Load 195(u16v)
+             328:193(i16vec3) Load 195(u16v)
              329:  225(ivec3) UConvert 328
              330:  225(ivec3) Load 227(uv)
              331:  225(ivec3) BitwiseAnd 329 330
                               Store 227(uv) 331
-             332:     14(int) Load 200(i16)
+             332: 14(int16_t) Load 200(i16)
              333:     27(int) SConvert 332
              334:     17(int) Bitcast 333
              335:  225(ivec3) Load 227(uv)
              336:  225(ivec3) CompositeConstruct 334 334 334
              337:  225(ivec3) BitwiseXor 335 336
                               Store 227(uv) 337
-             338:  193(ivec3) Load 195(u16v)
-             339:     14(int) Load 200(i16)
-             340:     36(int) Bitcast 339
-             341:  193(ivec3) CompositeConstruct 340 340 340
-             342:  193(ivec3) BitwiseXor 338 341
+             338:193(i16vec3) Load 195(u16v)
+             339: 14(int16_t) Load 200(i16)
+             340: 36(int16_t) Bitcast 339
+             341:193(i16vec3) CompositeConstruct 340 340 340
+             342:193(i16vec3) BitwiseXor 338 341
                               Store 195(u16v) 342
                               Return
                               FunctionEnd
@@ -549,190 +549,190 @@ spv.vulkan110.int16.frag
         442(u64):    441(ptr) Variable Function
       445(u16v4):    444(ptr) Variable Function
          457(bv):    456(ptr) Variable Function
-             344:   52(ivec2) Load 343(i16v)
-             345:   52(ivec2) ExtInst 1(GLSL.std.450) 5(SAbs) 344
+             344: 52(i16vec2) Load 343(i16v)
+             345: 52(i16vec2) ExtInst 1(GLSL.std.450) 5(SAbs) 344
                               Store 343(i16v) 345
-             347:     14(int) Load 346(i16)
-             348:     14(int) ExtInst 1(GLSL.std.450) 7(SSign) 347
+             347: 14(int16_t) Load 346(i16)
+             348: 14(int16_t) ExtInst 1(GLSL.std.450) 7(SSign) 347
                               Store 346(i16) 348
-             349:   52(ivec2) Load 343(i16v)
-             350:     14(int) Load 346(i16)
-             351:   52(ivec2) CompositeConstruct 350 350
-             352:   52(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 349 351
+             349: 52(i16vec2) Load 343(i16v)
+             350: 14(int16_t) Load 346(i16)
+             351: 52(i16vec2) CompositeConstruct 350 350
+             352: 52(i16vec2) ExtInst 1(GLSL.std.450) 39(SMin) 349 351
                               Store 343(i16v) 352
-             353:   52(ivec2) Load 343(i16v)
-             355:   52(ivec2) ExtInst 1(GLSL.std.450) 39(SMin) 353 354
+             353: 52(i16vec2) Load 343(i16v)
+             355: 52(i16vec2) ExtInst 1(GLSL.std.450) 39(SMin) 353 354
                               Store 343(i16v) 355
-             357:  193(ivec3) Load 356(u16v)
-             359:     36(int) Load 358(u16)
-             360:  193(ivec3) CompositeConstruct 359 359 359
-             361:  193(ivec3) ExtInst 1(GLSL.std.450) 38(UMin) 357 360
+             357:193(i16vec3) Load 356(u16v)
+             359: 36(int16_t) Load 358(u16)
+             360:193(i16vec3) CompositeConstruct 359 359 359
+             361:193(i16vec3) ExtInst 1(GLSL.std.450) 38(UMin) 357 360
                               Store 356(u16v) 361
-             362:  193(ivec3) Load 356(u16v)
-             364:  193(ivec3) ExtInst 1(GLSL.std.450) 38(UMin) 362 363
+             362:193(i16vec3) Load 356(u16v)
+             364:193(i16vec3) ExtInst 1(GLSL.std.450) 38(UMin) 362 363
                               Store 356(u16v) 364
-             365:   52(ivec2) Load 343(i16v)
-             366:     14(int) Load 346(i16)
-             367:   52(ivec2) CompositeConstruct 366 366
-             368:   52(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 365 367
+             365: 52(i16vec2) Load 343(i16v)
+             366: 14(int16_t) Load 346(i16)
+             367: 52(i16vec2) CompositeConstruct 366 366
+             368: 52(i16vec2) ExtInst 1(GLSL.std.450) 42(SMax) 365 367
                               Store 343(i16v) 368
-             369:   52(ivec2) Load 343(i16v)
-             370:   52(ivec2) ExtInst 1(GLSL.std.450) 42(SMax) 369 354
+             369: 52(i16vec2) Load 343(i16v)
+             370: 52(i16vec2) ExtInst 1(GLSL.std.450) 42(SMax) 369 354
                               Store 343(i16v) 370
-             371:  193(ivec3) Load 356(u16v)
-             372:     36(int) Load 358(u16)
-             373:  193(ivec3) CompositeConstruct 372 372 372
-             374:  193(ivec3) ExtInst 1(GLSL.std.450) 41(UMax) 371 373
+             371:193(i16vec3) Load 356(u16v)
+             372: 36(int16_t) Load 358(u16)
+             373:193(i16vec3) CompositeConstruct 372 372 372
+             374:193(i16vec3) ExtInst 1(GLSL.std.450) 41(UMax) 371 373
                               Store 356(u16v) 374
-             375:  193(ivec3) Load 356(u16v)
-             376:  193(ivec3) ExtInst 1(GLSL.std.450) 41(UMax) 375 363
+             375:193(i16vec3) Load 356(u16v)
+             376:193(i16vec3) ExtInst 1(GLSL.std.450) 41(UMax) 375 363
                               Store 356(u16v) 376
-             377:   52(ivec2) Load 343(i16v)
-             378:     14(int) Load 346(i16)
-             379:     14(int) SNegate 378
-             380:     14(int) Load 346(i16)
-             381:   52(ivec2) CompositeConstruct 379 379
-             382:   52(ivec2) CompositeConstruct 380 380
-             383:   52(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 377 381 382
+             377: 52(i16vec2) Load 343(i16v)
+             378: 14(int16_t) Load 346(i16)
+             379: 14(int16_t) SNegate 378
+             380: 14(int16_t) Load 346(i16)
+             381: 52(i16vec2) CompositeConstruct 379 379
+             382: 52(i16vec2) CompositeConstruct 380 380
+             383: 52(i16vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 377 381 382
                               Store 343(i16v) 383
-             384:   52(ivec2) Load 343(i16v)
-             385:   52(ivec2) Load 343(i16v)
-             386:   52(ivec2) SNegate 385
-             387:   52(ivec2) Load 343(i16v)
-             388:   52(ivec2) ExtInst 1(GLSL.std.450) 45(SClamp) 384 386 387
+             384: 52(i16vec2) Load 343(i16v)
+             385: 52(i16vec2) Load 343(i16v)
+             386: 52(i16vec2) SNegate 385
+             387: 52(i16vec2) Load 343(i16v)
+             388: 52(i16vec2) ExtInst 1(GLSL.std.450) 45(SClamp) 384 386 387
                               Store 343(i16v) 388
-             389:  193(ivec3) Load 356(u16v)
-             390:     36(int) Load 358(u16)
-             391:     36(int) SNegate 390
-             392:     36(int) Load 358(u16)
-             393:  193(ivec3) CompositeConstruct 391 391 391
-             394:  193(ivec3) CompositeConstruct 392 392 392
-             395:  193(ivec3) ExtInst 1(GLSL.std.450) 44(UClamp) 389 393 394
+             389:193(i16vec3) Load 356(u16v)
+             390: 36(int16_t) Load 358(u16)
+             391: 36(int16_t) SNegate 390
+             392: 36(int16_t) Load 358(u16)
+             393:193(i16vec3) CompositeConstruct 391 391 391
+             394:193(i16vec3) CompositeConstruct 392 392 392
+             395:193(i16vec3) ExtInst 1(GLSL.std.450) 44(UClamp) 389 393 394
                               Store 356(u16v) 395
-             396:  193(ivec3) Load 356(u16v)
-             397:  193(ivec3) Load 356(u16v)
-             398:  193(ivec3) SNegate 397
-             399:  193(ivec3) Load 356(u16v)
-             400:  193(ivec3) ExtInst 1(GLSL.std.450) 44(UClamp) 396 398 399
+             396:193(i16vec3) Load 356(u16v)
+             397:193(i16vec3) Load 356(u16v)
+             398:193(i16vec3) SNegate 397
+             399:193(i16vec3) Load 356(u16v)
+             400:193(i16vec3) ExtInst 1(GLSL.std.450) 44(UClamp) 396 398 399
                               Store 356(u16v) 400
              401:     15(ptr) AccessChain 343(i16v) 282
-             402:     14(int) Load 401
+             402: 14(int16_t) Load 401
              403:     15(ptr) AccessChain 343(i16v) 264
-             404:     14(int) Load 403
-             406:     14(int) Select 405 404 402
+             404: 14(int16_t) Load 403
+             406: 14(int16_t) Select 405 404 402
                               Store 346(i16) 406
-             407:     14(int) Load 346(i16)
-             408:   52(ivec2) CompositeConstruct 407 407
-             409:     14(int) Load 346(i16)
-             410:     14(int) SNegate 409
-             411:   52(ivec2) CompositeConstruct 410 410
-             414:   52(ivec2) Select 413 411 408
+             407: 14(int16_t) Load 346(i16)
+             408: 52(i16vec2) CompositeConstruct 407 407
+             409: 14(int16_t) Load 346(i16)
+             410: 14(int16_t) SNegate 409
+             411: 52(i16vec2) CompositeConstruct 410 410
+             414: 52(i16vec2) Select 413 411 408
                               Store 343(i16v) 414
              415:     37(ptr) AccessChain 356(u16v) 282
-             416:     36(int) Load 415
+             416: 36(int16_t) Load 415
              417:     37(ptr) AccessChain 356(u16v) 264
-             418:     36(int) Load 417
-             419:     36(int) Select 405 418 416
+             418: 36(int16_t) Load 417
+             419: 36(int16_t) Select 405 418 416
                               Store 358(u16) 419
-             420:     36(int) Load 358(u16)
-             421:  193(ivec3) CompositeConstruct 420 420 420
-             422:     36(int) Load 358(u16)
-             423:     36(int) SNegate 422
-             424:  193(ivec3) CompositeConstruct 423 423 423
-             427:  193(ivec3) Select 426 424 421
+             420: 36(int16_t) Load 358(u16)
+             421:193(i16vec3) CompositeConstruct 420 420 420
+             422: 36(int16_t) Load 358(u16)
+             423: 36(int16_t) SNegate 422
+             424:193(i16vec3) CompositeConstruct 423 423 423
+             427:193(i16vec3) Select 426 424 421
                               Store 356(u16v) 427
-             429:   52(ivec2) Load 343(i16v)
+             429: 52(i16vec2) Load 343(i16v)
              430:     27(int) Bitcast 429
                               Store 428(i32) 430
-             435:  432(ivec4) Load 434(i16v4)
-             436:     71(int) Bitcast 435
+             435:432(i16vec4) Load 434(i16v4)
+             436: 71(int64_t) Bitcast 435
                               Store 431(i64) 436
-             439:   57(ivec2) Load 438(u16v2)
+             439: 57(i16vec2) Load 438(u16v2)
              440:     17(int) Bitcast 439
                               Store 437(u32) 440
-             446:  443(ivec4) Load 445(u16v4)
-             447:     77(int) Bitcast 446
+             446:443(i16vec4) Load 445(u16v4)
+             447: 77(int64_t) Bitcast 446
                               Store 442(u64) 447
              448:     27(int) Load 428(i32)
-             449:   52(ivec2) Bitcast 448
+             449: 52(i16vec2) Bitcast 448
                               Store 343(i16v) 449
-             450:     71(int) Load 431(i64)
-             451:  432(ivec4) Bitcast 450
+             450: 71(int64_t) Load 431(i64)
+             451:432(i16vec4) Bitcast 450
                               Store 434(i16v4) 451
              452:     17(int) Load 437(u32)
-             453:   57(ivec2) Bitcast 452
+             453: 57(i16vec2) Bitcast 452
                               Store 438(u16v2) 453
-             454:     77(int) Load 442(u64)
-             455:  443(ivec4) Bitcast 454
+             454: 77(int64_t) Load 442(u64)
+             455:443(i16vec4) Bitcast 454
                               Store 445(u16v4) 455
-             458:  193(ivec3) Load 356(u16v)
-             459:     36(int) Load 358(u16)
-             460:  193(ivec3) CompositeConstruct 459 459 459
+             458:193(i16vec3) Load 356(u16v)
+             459: 36(int16_t) Load 358(u16)
+             460:193(i16vec3) CompositeConstruct 459 459 459
              461:  425(bvec3) ULessThan 458 460
                               Store 457(bv) 461
-             462:   52(ivec2) Load 343(i16v)
-             463:     14(int) Load 346(i16)
-             464:   52(ivec2) CompositeConstruct 463 463
+             462: 52(i16vec2) Load 343(i16v)
+             463: 14(int16_t) Load 346(i16)
+             464: 52(i16vec2) CompositeConstruct 463 463
              465:  174(bvec2) SLessThan 462 464
              466:  425(bvec3) Load 457(bv)
              467:  425(bvec3) VectorShuffle 466 465 3 4 2
                               Store 457(bv) 467
-             468:  193(ivec3) Load 356(u16v)
-             469:     36(int) Load 358(u16)
-             470:  193(ivec3) CompositeConstruct 469 469 469
+             468:193(i16vec3) Load 356(u16v)
+             469: 36(int16_t) Load 358(u16)
+             470:193(i16vec3) CompositeConstruct 469 469 469
              471:  425(bvec3) ULessThanEqual 468 470
                               Store 457(bv) 471
-             472:   52(ivec2) Load 343(i16v)
-             473:     14(int) Load 346(i16)
-             474:   52(ivec2) CompositeConstruct 473 473
+             472: 52(i16vec2) Load 343(i16v)
+             473: 14(int16_t) Load 346(i16)
+             474: 52(i16vec2) CompositeConstruct 473 473
              475:  174(bvec2) SLessThanEqual 472 474
              476:  425(bvec3) Load 457(bv)
              477:  425(bvec3) VectorShuffle 476 475 3 4 2
                               Store 457(bv) 477
-             478:  193(ivec3) Load 356(u16v)
-             479:     36(int) Load 358(u16)
-             480:  193(ivec3) CompositeConstruct 479 479 479
+             478:193(i16vec3) Load 356(u16v)
+             479: 36(int16_t) Load 358(u16)
+             480:193(i16vec3) CompositeConstruct 479 479 479
              481:  425(bvec3) UGreaterThan 478 480
                               Store 457(bv) 481
-             482:   52(ivec2) Load 343(i16v)
-             483:     14(int) Load 346(i16)
-             484:   52(ivec2) CompositeConstruct 483 483
+             482: 52(i16vec2) Load 343(i16v)
+             483: 14(int16_t) Load 346(i16)
+             484: 52(i16vec2) CompositeConstruct 483 483
              485:  174(bvec2) SGreaterThan 482 484
              486:  425(bvec3) Load 457(bv)
              487:  425(bvec3) VectorShuffle 486 485 3 4 2
                               Store 457(bv) 487
-             488:  193(ivec3) Load 356(u16v)
-             489:     36(int) Load 358(u16)
-             490:  193(ivec3) CompositeConstruct 489 489 489
+             488:193(i16vec3) Load 356(u16v)
+             489: 36(int16_t) Load 358(u16)
+             490:193(i16vec3) CompositeConstruct 489 489 489
              491:  425(bvec3) UGreaterThanEqual 488 490
                               Store 457(bv) 491
-             492:   52(ivec2) Load 343(i16v)
-             493:     14(int) Load 346(i16)
-             494:   52(ivec2) CompositeConstruct 493 493
+             492: 52(i16vec2) Load 343(i16v)
+             493: 14(int16_t) Load 346(i16)
+             494: 52(i16vec2) CompositeConstruct 493 493
              495:  174(bvec2) SGreaterThanEqual 492 494
              496:  425(bvec3) Load 457(bv)
              497:  425(bvec3) VectorShuffle 496 495 3 4 2
                               Store 457(bv) 497
-             498:  193(ivec3) Load 356(u16v)
-             499:     36(int) Load 358(u16)
-             500:  193(ivec3) CompositeConstruct 499 499 499
+             498:193(i16vec3) Load 356(u16v)
+             499: 36(int16_t) Load 358(u16)
+             500:193(i16vec3) CompositeConstruct 499 499 499
              501:  425(bvec3) IEqual 498 500
                               Store 457(bv) 501
-             502:   52(ivec2) Load 343(i16v)
-             503:     14(int) Load 346(i16)
-             504:   52(ivec2) CompositeConstruct 503 503
+             502: 52(i16vec2) Load 343(i16v)
+             503: 14(int16_t) Load 346(i16)
+             504: 52(i16vec2) CompositeConstruct 503 503
              505:  174(bvec2) IEqual 502 504
              506:  425(bvec3) Load 457(bv)
              507:  425(bvec3) VectorShuffle 506 505 3 4 2
                               Store 457(bv) 507
-             508:  193(ivec3) Load 356(u16v)
-             509:     36(int) Load 358(u16)
-             510:  193(ivec3) CompositeConstruct 509 509 509
+             508:193(i16vec3) Load 356(u16v)
+             509: 36(int16_t) Load 358(u16)
+             510:193(i16vec3) CompositeConstruct 509 509 509
              511:  425(bvec3) INotEqual 508 510
                               Store 457(bv) 511
-             512:   52(ivec2) Load 343(i16v)
-             513:     14(int) Load 346(i16)
-             514:   52(ivec2) CompositeConstruct 513 513
+             512: 52(i16vec2) Load 343(i16v)
+             513: 14(int16_t) Load 346(i16)
+             514: 52(i16vec2) CompositeConstruct 513 513
              515:  174(bvec2) INotEqual 512 514
              516:  425(bvec3) Load 457(bv)
              517:  425(bvec3) VectorShuffle 516 515 3 4 2

3rdparty/glslang/Test/baseResults/stringToDouble.vert.out

@@ -0,0 +1,903 @@
+stringToDouble.vert
+Shader version: 460
+0:? Sequence
+0:3  Function Definition: main( ( global void)
+0:3    Function Parameters: 
+0:5    Sequence
+0:5      Sequence
+0:5        move second child to first child ( temp float)
+0:5          'w1' ( temp float)
+0:5          Constant:
+0:5            0.000000
+0:6      Sequence
+0:6        move second child to first child ( temp float)
+0:6          'w2' ( temp float)
+0:6          Constant:
+0:6            1.000000
+0:7      Sequence
+0:7        move second child to first child ( temp float)
+0:7          'w3' ( temp float)
+0:7          Constant:
+0:7            7.000000
+0:8      Sequence
+0:8        move second child to first child ( temp float)
+0:8          'w4' ( temp float)
+0:8          Constant:
+0:8            130000.000000
+0:9      Sequence
+0:9        move second child to first child ( temp float)
+0:9          'w5' ( temp float)
+0:9          Constant:
+0:9            123456789.000000
+0:10      Sequence
+0:10        move second child to first child ( temp double)
+0:10          'w6' ( temp double)
+0:10          Constant:
+0:10            1.2345678901235e+15
+0:11      Sequence
+0:11        move second child to first child ( temp double)
+0:11          'w7' ( temp double)
+0:11          Constant:
+0:11            1.2345678901235e+16
+0:12      Sequence
+0:12        move second child to first child ( temp double)
+0:12          'w8' ( temp double)
+0:12          Constant:
+0:12            1.2345678901235e+17
+0:13      Sequence
+0:13        move second child to first child ( temp double)
+0:13          'w9' ( temp double)
+0:13          Constant:
+0:13            1.2345678901235e+19
+0:14      Sequence
+0:14        move second child to first child ( temp double)
+0:14          'w10' ( temp double)
+0:14          Constant:
+0:14            1.2345678901235e+24
+0:16      Sequence
+0:16        move second child to first child ( temp float)
+0:16          'e1' ( temp float)
+0:16          Constant:
+0:16            0.000000
+0:17      Sequence
+0:17        move second child to first child ( temp float)
+0:17          'e2' ( temp float)
+0:17          Constant:
+0:17            1.000000
+0:18      Sequence
+0:18        move second child to first child ( temp float)
+0:18          'e3' ( temp float)
+0:18          Constant:
+0:18            0.000000
+0:19      Sequence
+0:19        move second child to first child ( temp float)
+0:19          'e4' ( temp float)
+0:19          Constant:
+0:19            1.0000000000000e+15
+0:20      Sequence
+0:20        move second child to first child ( temp float)
+0:20          'e5' ( temp float)
+0:20          Constant:
+0:20            1.0000000000000e+16
+0:21      Sequence
+0:21        move second child to first child ( temp float)
+0:21          'e6' ( temp float)
+0:21          Constant:
+0:21            0.000000
+0:22      Sequence
+0:22        move second child to first child ( temp float)
+0:22          'e7' ( temp float)
+0:22          Constant:
+0:22            1.0000000000000e-15
+0:23      Sequence
+0:23        move second child to first child ( temp float)
+0:23          'e8' ( temp float)
+0:23          Constant:
+0:23            1.0000000000000e-16
+0:24      Sequence
+0:24        move second child to first child ( temp double)
+0:24          'e9' ( temp double)
+0:24          Constant:
+0:24            1.0000000000000e+100
+0:25      Sequence
+0:25        move second child to first child ( temp double)
+0:25          'e10' ( temp double)
+0:25          Constant:
+0:25            1.0000000000000e+308
+0:26      Sequence
+0:26        move second child to first child ( temp double)
+0:26          'e11' ( temp double)
+0:26          Constant:
+0:26            9.8813129168249e-324
+0:27      Sequence
+0:27        move second child to first child ( temp double)
+0:27          'e12' ( temp double)
+0:27          Constant:
+0:27            +1.#INF
+0:28      Sequence
+0:28        move second child to first child ( temp double)
+0:28          'e13' ( temp double)
+0:28          Constant:
+0:28            0.000000
+0:29      Sequence
+0:29        move second child to first child ( temp double)
+0:29          'e24' ( temp double)
+0:29          Constant:
+0:29            +1.#INF
+0:30      Sequence
+0:30        move second child to first child ( temp double)
+0:30          'e25' ( temp double)
+0:30          Constant:
+0:30            0.000000
+0:32      Sequence
+0:32        move second child to first child ( temp double)
+0:32          'f1' ( temp double)
+0:32          Constant:
+0:32            0.500000
+0:33      Sequence
+0:33        move second child to first child ( temp double)
+0:33          'f2' ( temp double)
+0:33          Constant:
+0:33            0.125000
+0:34      Sequence
+0:34        move second child to first child ( temp double)
+0:34          'f31' ( temp double)
+0:34          Constant:
+0:34            0.100000
+0:35      Sequence
+0:35        move second child to first child ( temp double)
+0:35          'f32' ( temp double)
+0:35          Constant:
+0:35            0.200000
+0:36      Sequence
+0:36        move second child to first child ( temp double)
+0:36          'f33' ( temp double)
+0:36          Constant:
+0:36            0.300000
+0:37      Sequence
+0:37        move second child to first child ( temp double)
+0:37          'f34' ( temp double)
+0:37          Constant:
+0:37            0.400000
+0:38      Sequence
+0:38        move second child to first child ( temp double)
+0:38          'f35' ( temp double)
+0:38          Constant:
+0:38            0.500000
+0:39      Sequence
+0:39        move second child to first child ( temp double)
+0:39          'f36' ( temp double)
+0:39          Constant:
+0:39            0.600000
+0:40      Sequence
+0:40        move second child to first child ( temp double)
+0:40          'f37' ( temp double)
+0:40          Constant:
+0:40            0.700000
+0:41      Sequence
+0:41        move second child to first child ( temp double)
+0:41          'f38' ( temp double)
+0:41          Constant:
+0:41            0.800000
+0:42      Sequence
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+0:43            0.333333
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+0:44            7.8347500000000e-37
+0:45      Sequence
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+0:45          'f52' ( temp double)
+0:45          Constant:
+0:45            7.8347500000000e-37
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+0:46          Constant:
+0:46            7.8347500000000e-37
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+0:47            7.8347500000000e-37
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+0:48            4.000000
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+0:50            0.000000
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+0:52            0.000000
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+0:57            0.000810
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+0:58            7.300000
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+0:59            3.450000
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+0:60          'c4' ( temp double)
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+0:65            1.2345678901235e+18
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+0:71            1.2003000000456e+12
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+0:74            1.2300000045601e+12
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+0:76            7.2057594037928e+16
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+0:77            7.2057594037928e+16
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+0:78            7.2057594037928e+16
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+0:79            7.2057594037928e+16
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+0:80            7.2057594037928e+16
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+0:82            9.2233720368548e+18
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+0:83            9.2233720368548e+18
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+0:84            9.2233720368548e+18
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+0:85            9.2233720368548e+18
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+0:86            1.0141204801826e+31
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+0:87            1.0141204801826e+31
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+0:88          Constant:
+0:88            1.0141204801826e+31
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+0:89          'b34' ( temp double)
+0:89          Constant:
+0:89            1.0141204801826e+31
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+0:90        move second child to first child ( temp double)
+0:90          'b35' ( temp double)
+0:90          Constant:
+0:90            1.0141204801826e+31
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+0:91          Constant:
+0:91            5.7089907708238e+45
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+0:92          'b42' ( temp double)
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+0:92            5.7089907708238e+45
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+0:93          Constant:
+0:93            5.7089907708238e+45
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+0:94          'b44' ( temp double)
+0:94          Constant:
+0:94            5.7089907708238e+45
+0:95      Sequence
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+0:95          'b45' ( temp double)
+0:95          Constant:
+0:95            5.7089907708238e+45
+0:97      Sequence
+0:97        move second child to first child ( temp double)
+0:97          'pi' ( temp double)
+0:97          Constant:
+0:97            3.141593
+0:?   Linker Objects
+0:?     'gl_VertexID' ( gl_VertexId int VertexId)
+0:?     'gl_InstanceID' ( gl_InstanceId int InstanceId)
+
+
+Linked vertex stage:
+
+
+Shader version: 460
+0:? Sequence
+0:3  Function Definition: main( ( global void)
+0:3    Function Parameters: 
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+0:10            1.2345678901235e+15
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+0:27            +1.#INF
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+0:54            0.400000
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+0:55        move second child to first child ( temp double)
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+0:55            0.040000
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+0:57        move second child to first child ( temp double)
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+0:61            439.000000
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+0:62          Constant:
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+0:68          Constant:
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+0:74          Constant:
+0:74            1.2300000045601e+12
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+0:76        move second child to first child ( temp double)
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+0:76            7.2057594037928e+16
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+0:77            7.2057594037928e+16
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+0:78            7.2057594037928e+16
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+0:79            7.2057594037928e+16
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+0:80          Constant:
+0:80            7.2057594037928e+16
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+0:81        move second child to first child ( temp double)
+0:81          'b21' ( temp double)
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+0:81            9.2233720368548e+18
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+0:82        move second child to first child ( temp double)
+0:82          'b22' ( temp double)
+0:82          Constant:
+0:82            9.2233720368548e+18
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+0:83        move second child to first child ( temp double)
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+0:83          Constant:
+0:83            9.2233720368548e+18
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+0:84            9.2233720368548e+18
+0:85      Sequence
+0:85        move second child to first child ( temp double)
+0:85          'b25' ( temp double)
+0:85          Constant:
+0:85            9.2233720368548e+18
+0:86      Sequence
+0:86        move second child to first child ( temp double)
+0:86          'b31' ( temp double)
+0:86          Constant:
+0:86            1.0141204801826e+31
+0:87      Sequence
+0:87        move second child to first child ( temp double)
+0:87          'b32' ( temp double)
+0:87          Constant:
+0:87            1.0141204801826e+31
+0:88      Sequence
+0:88        move second child to first child ( temp double)
+0:88          'b33' ( temp double)
+0:88          Constant:
+0:88            1.0141204801826e+31
+0:89      Sequence
+0:89        move second child to first child ( temp double)
+0:89          'b34' ( temp double)
+0:89          Constant:
+0:89            1.0141204801826e+31
+0:90      Sequence
+0:90        move second child to first child ( temp double)
+0:90          'b35' ( temp double)
+0:90          Constant:
+0:90            1.0141204801826e+31
+0:91      Sequence
+0:91        move second child to first child ( temp double)
+0:91          'b41' ( temp double)
+0:91          Constant:
+0:91            5.7089907708238e+45
+0:92      Sequence
+0:92        move second child to first child ( temp double)
+0:92          'b42' ( temp double)
+0:92          Constant:
+0:92            5.7089907708238e+45
+0:93      Sequence
+0:93        move second child to first child ( temp double)
+0:93          'b43' ( temp double)
+0:93          Constant:
+0:93            5.7089907708238e+45
+0:94      Sequence
+0:94        move second child to first child ( temp double)
+0:94          'b44' ( temp double)
+0:94          Constant:
+0:94            5.7089907708238e+45
+0:95      Sequence
+0:95        move second child to first child ( temp double)
+0:95          'b45' ( temp double)
+0:95          Constant:
+0:95            5.7089907708238e+45
+0:97      Sequence
+0:97        move second child to first child ( temp double)
+0:97          'pi' ( temp double)
+0:97          Constant:
+0:97            3.141593
+0:?   Linker Objects
+0:?     'gl_VertexID' ( gl_VertexId int VertexId)
+0:?     'gl_InstanceID' ( gl_InstanceId int InstanceId)
+

3rdparty/glslang/Test/cppPassMacroName.frag

@@ -2,6 +2,10 @@
 #define I2(f, n) f(n) + f(n+1)
 #define I3(f, n) I2(f, n) + f(n+2)
 
+#define FL_f1(i) ((i)*(i))
+#define FL_I2(f, n) f(n) + f(n+0.2)
+#define FL_I3(f, n) FL_I2(f, n) + f(n+0.5)
+
 void main()
 {
     int f1 = 4;
@@ -9,4 +13,18 @@ void main()
     int f3 = f1(3);
     int f4 = I2(f1, 0);
     int f5 = I3(f1, 0);
+
+    highp float fl_f5 = FL_I3(FL_f1, 0.1);
 }
+
+// f5 = I3(f1, 0)
+//    = I2(f1, 0) + f1(0 + 2)
+//    = f1(0) + f1(0+1) + f1(0+2)
+//    = 0*0 + 1*1 + 2*2
+//    = 5
+
+// fl_f5 = FL_I3(FL_f1, 0.1)
+//       = FL_I2(FL_f1, 0.1) + FL_f1(0.1 + 0.5)
+//       = FL_f1(0.1) + FL_f1(0.1 + 0.2) + FL_f1(0.1 + 0.5)
+//       = 0.1*0.1 + 0.3*0.3 + 0.6*0.6
+//       = 0.46

3rdparty/glslang/Test/hlsl.self_cast.frag

@@ -0,0 +1,25 @@
+struct Test0 {};
+struct Test1 { float f; };
+
+void main()
+{
+    {
+        Test0 a;
+        Test0 b = (Test0)a;
+    }
+
+    {
+        Test1 a;
+        Test1 b = (Test1)a;
+    }
+
+    {
+        Test0 a[2];
+        Test0 b[2] = (Test0[2])a;
+    }
+
+    {
+        Test1 a[2];
+        Test1 b[2] = (Test1[2])a;
+    }
+}

3rdparty/glslang/Test/stringToDouble.vert

@@ -0,0 +1,98 @@
+#version 460
+//#pragma glslang_binary_double_output
+void main()
+{
+    float w1   = 00000.000;
+    float w2   = 1.0;
+    float w3   = 007.00;
+    float w4   = 000130000.0;
+    float w5   = 123456789.0000;
+    double w6  = 1234567890123456.0;
+    double w7  = 12345678901234567.0;
+    double w8  = 123456789012345678.0;
+    double w9  = 12345678901234567893.0;
+    double w10 = 1234567890123456789012345.0;
+
+    float e1 = 0e0;
+    float e2 = 1e0;
+    float e3 = 0e14;
+    float e4 = 1e15;
+    float e5 = 1e16;
+    float e6 = 0e-14;
+    float e7 = 1e-15;
+    float e8 = 1e-16;
+    double e9 = 1e100;
+    double e10 = 1e+308;
+    double e11 = 1e-323;
+    double e12 = 1e+309;
+    double e13 = 1e-324;
+    double e24 = 1e+999;
+    double e25 = 1e-999;
+
+    double f1 = 0.5;
+    double f2 = 0.125;
+    double f31 = 0.1;
+    double f32 = 0.2;
+    double f33 = 0.3;
+    double f34 = 0.4;
+    double f35 = 0.5;
+    double f36 = 0.6;
+    double f37 = 0.7;
+    double f38 = 0.8;
+    double f39 = 0.9;
+    double f4 = 0.33333333333333333333333333333333333333333333333333333333333333333333333333333;
+    double f51 = 0.000000000000000000000000000000000000783475;
+    double f52 = 0.0000000000000000000000000000000000007834750;
+    double f53 = .00000000000000000000000000000000000078347500;
+    double f54 = 0.000000000000000000000000000000000000783475000000;
+    double f61 = 4.;
+    double f62 = 40.;
+    double f63 = 0.;
+    double f64 = 04.;
+    double f65 = .0;
+    double f66 = .004;
+    double f67 = .400;
+    double f68 = .04000;
+
+    double c1  = .081e-2;
+    double c2  = .073e2;
+    double c3  = 34.5e-1;
+    double c4  = 35.7e-4;
+    double c5  = 43.9e1;
+    double c6  = 52.2e4;
+    double c7  = 000610000e2;
+    double c8  = 000610000e-6;
+    double c9  = 000001234567890123450000.0;
+    double c10 = 000999999999999999999000.0;
+    double c11 = 0001230000.0045600000;
+    double c12 = 0001230000.00405600000e-3;
+    double c13 = 0001230000.004500600000e-4;
+    double c14 = 00010230000.0045600000e-5;
+    double c15 = 000120030000.0045600000e4;
+    double c16 = 0001230000.0045600000e5;
+    double c17 = 0001230000.0045600000e6;
+    double c18 = 0001230000.00456007e6;
+
+    double b11 = 72057594037927928.0;
+    double b12 = 72057594037927936.0;
+    double b13 = 72057594037927932.0;
+    double b14 = 7205759403792793199999e-5;
+    double b15 = 7205759403792793200001e-5;
+    double b21 = 9223372036854774784.0;
+    double b22 = 9223372036854775808.0;
+    double b23 = 9223372036854775296.0;
+    double b24 = 922337203685477529599999e-5;
+    double b25 = 922337203685477529600001e-5;
+    double b31 = 10141204801825834086073718800384.0;
+    double b32 = 10141204801825835211973625643008.0;
+    double b33 = 10141204801825834649023672221696.0;
+    double b34 = 1014120480182583464902367222169599999e-5;
+    double b35 = 1014120480182583464902367222169600001e-5;
+    double b41 = 5708990770823838890407843763683279797179383808.0;
+    double b42 = 5708990770823839524233143877797980545530986496.0;
+    double b43 = 5708990770823839207320493820740630171355185152.0;
+    double b44 = 5708990770823839207320493820740630171355185151999e-3;
+    double b45 = 5708990770823839207320493820740630171355185152001e-3;
+
+    double pi = 3.1415926535897932384626433832795028841971693993751058209749445923078164062862089986280348253421170679;
+}

3rdparty/glslang/Test/tokenLength.vert

@@ -1,5 +1,5 @@
 #version 300 es
-
+//#pragma glslang_binary_double_output
 // 1023 characters
 in float BCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789;
 

3rdparty/glslang/glslang/MachineIndependent/Intermediate.cpp

@@ -3769,23 +3769,39 @@ struct TextureUpgradeAndSamplerRemovalTransform : public TIntermTraverser {
     bool visitAggregate(TVisit, TIntermAggregate* ag) override {
         using namespace std;
         TIntermSequence& seq = ag->getSequence();
-        // remove pure sampler variables
-        TIntermSequence::iterator newEnd = remove_if(seq.begin(), seq.end(), [](TIntermNode* node) {
-            TIntermSymbol* symbol = node->getAsSymbolNode();
-            if (!symbol)
-                return false;
+        TQualifierList& qual = ag->getQualifierList();
+
+        // qual and seq are indexed using the same indices, so we have to modify both in lock-step
+        assert(seq.size() == qual.size() || qual.empty());
+
+        size_t write = 0;
+        for (size_t i = 0; i < seq.size(); ++i) {
+            TIntermSymbol* symbol = seq[i]->getAsSymbolNode();
+            if (symbol && symbol->getBasicType() == EbtSampler && symbol->getType().getSampler().isPureSampler()) {
+                // remove pure sampler variables
+                continue;
+            }
+
+            TIntermNode* result = seq[i];
 
-            return (symbol->getBasicType() == EbtSampler && symbol->getType().getSampler().isPureSampler());
-        });
-        seq.erase(newEnd, seq.end());
-        // replace constructors with sampler/textures
-        for_each(seq.begin(), seq.end(), [](TIntermNode*& node) {
-            TIntermAggregate *constructor = node->getAsAggregate();
+            // replace constructors with sampler/textures
+            TIntermAggregate *constructor = seq[i]->getAsAggregate();
             if (constructor && constructor->getOp() == EOpConstructTextureSampler) {
                 if (!constructor->getSequence().empty())
-                    node = constructor->getSequence()[0];
+                    result = constructor->getSequence()[0];
             }
-        });
+
+            // write new node & qualifier
+            seq[write] = result;
+            if (!qual.empty())
+                qual[write] = qual[i];
+            write++;
+        }
+
+        seq.resize(write);
+        if (!qual.empty())
+            qual.resize(write);
+
         return true;
     }
 };

3rdparty/glslang/glslang/MachineIndependent/ParseHelper.cpp

@@ -269,7 +269,8 @@ void TParseContext::handlePragma(const TSourceLoc& loc, const TVector<TString>&
         intermediate.setUseStorageBuffer();
     } else if (tokens[0].compare("once") == 0) {
         warn(loc, "not implemented", "#pragma once", "");
-    }
+    } else if (tokens[0].compare("glslang_binary_double_output") == 0)
+        intermediate.setBinaryDoubleOutput();
 }
 
 //

3rdparty/glslang/glslang/MachineIndependent/intermOut.cpp

@@ -93,7 +93,13 @@ namespace glslang {
 //
 class TOutputTraverser : public TIntermTraverser {
 public:
-    TOutputTraverser(TInfoSink& i) : infoSink(i) { }
+    TOutputTraverser(TInfoSink& i) : infoSink(i), extraOutput(NoExtraOutput) { }
+
+    enum EExtraOutput {
+        NoExtraOutput,
+        BinaryDoubleOutput
+    };
+    void setDoubleOutput(EExtraOutput extra) { extraOutput = extra; }
 
     virtual bool visitBinary(TVisit, TIntermBinary* node);
     virtual bool visitUnary(TVisit, TIntermUnary* node);
@@ -109,6 +115,8 @@ public:
 protected:
     TOutputTraverser(TOutputTraverser&);
     TOutputTraverser& operator=(TOutputTraverser&);
+
+    EExtraOutput extraOutput;
 };
 
 //
@@ -1082,7 +1090,61 @@ bool TOutputTraverser::visitSelection(TVisit /* visit */, TIntermSelection* node
     return false;
 }
 
-static void OutputConstantUnion(TInfoSink& out, const TIntermTyped* node, const TConstUnionArray& constUnion, int depth)
+// Print infinities and NaNs, and numbers in a portable way.
+// Goals:
+//   - portable (across IEEE 754 platforms)
+//   - shows all possible IEEE values
+//   - shows simple numbers in a simple way, e.g., no leading/trailing 0s
+//   - shows all digits, no premature rounding
+static void OutputDouble(TInfoSink& out, double value, TOutputTraverser::EExtraOutput extra)
+{
+    if (IsInfinity(value)) {
+        if (value < 0)
+            out.debug << "-1.#INF";
+        else
+            out.debug << "+1.#INF";
+    } else if (IsNan(value))
+        out.debug << "1.#IND";
+    else {
+        const int maxSize = 340;
+        char buf[maxSize];
+        const char* format = "%f";
+        if (fabs(value) > 0.0 && (fabs(value) < 1e-5 || fabs(value) > 1e12))
+            format = "%-.13e";
+        snprintf(buf, maxSize, format, value);
+
+        // remove a leading zero in the 100s slot in exponent; it is not portable
+        // pattern:   XX...XXXe+0XX or XX...XXXe-0XX
+        int len = (int)strnlen(buf, maxSize);
+        if (len > 5) {
+            if (buf[len-5] == 'e' && (buf[len-4] == '+' || buf[len-4] == '-') && buf[len-3] == '0') {
+                buf[len-3] = buf[len-2];
+                buf[len-2] = buf[len-1];
+                buf[len-1] = '\0';
+            }
+        }
+
+        out.debug << buf;
+
+        switch (extra) {
+        case TOutputTraverser::BinaryDoubleOutput:
+        {
+            out.debug << " : ";
+            long long b = *reinterpret_cast<long long*>(&value);
+            for (int i = 0; i < 8 * sizeof(value); ++i, ++b) {
+                out.debug << ((b & 0x8000000000000000) != 0 ? "1" : "0");
+                b <<= 1;
+            }
+            break;
+        }
+        default:
+            break;
+        }
+    }
+}
+
+static void OutputConstantUnion(TInfoSink& out, const TIntermTyped* node, const TConstUnionArray& constUnion,
+    TOutputTraverser::EExtraOutput extra, int depth)
 {
     int size = node->getType().computeNumComponents();
 
@@ -1102,24 +1164,8 @@ static void OutputConstantUnion(TInfoSink& out, const TIntermTyped* node, const
         case EbtFloat:
         case EbtDouble:
         case EbtFloat16:
-            {
-                const double value = constUnion[i].getDConst();
-                // Print infinities and NaNs in a portable way.
-                if (IsInfinity(value)) {
-                    if (value < 0)
-                        out.debug << "-1.#INF\n";
-                    else
-                        out.debug << "+1.#INF\n";
-                } else if (IsNan(value))
-                    out.debug << "1.#IND\n";
-                else {
-                    const int maxSize = 300;
-                    char buf[maxSize];
-                    snprintf(buf, maxSize, "%f", value);
-
-                    out.debug << buf << "\n";
-                }
-            }
+            OutputDouble(out, constUnion[i].getDConst(), extra);
+            out.debug << "\n";
             break;
         case EbtInt8:
             {
@@ -1205,7 +1251,7 @@ void TOutputTraverser::visitConstantUnion(TIntermConstantUnion* node)
     OutputTreeText(infoSink, node, depth);
     infoSink.debug << "Constant:\n";
 
-    OutputConstantUnion(infoSink, node, node->getConstArray(), depth + 1);
+    OutputConstantUnion(infoSink, node, node->getConstArray(), extraOutput, depth + 1);
 }
 
 void TOutputTraverser::visitSymbol(TIntermSymbol* node)
@@ -1215,7 +1261,7 @@ void TOutputTraverser::visitSymbol(TIntermSymbol* node)
     infoSink.debug << "'" << node->getName() << "' (" << node->getCompleteString() << ")\n";
 
     if (! node->getConstArray().empty())
-        OutputConstantUnion(infoSink, node, node->getConstArray(), depth + 1);
+        OutputConstantUnion(infoSink, node, node->getConstArray(), extraOutput, depth + 1);
     else if (node->getConstSubtree()) {
         incrementDepth(node);
         node->getConstSubtree()->traverse(this);
@@ -1417,7 +1463,8 @@ void TIntermediate::output(TInfoSink& infoSink, bool tree)
         return;
 
     TOutputTraverser it(infoSink);
-
+    if (getBinaryDoubleOutput())
+        it.setDoubleOutput(TOutputTraverser::BinaryDoubleOutput);
     treeRoot->traverse(&it);
 }
 

3rdparty/glslang/glslang/MachineIndependent/localintermediate.h

@@ -233,7 +233,8 @@ public:
         useStorageBuffer(false),
         hlslIoMapping(false),
         textureSamplerTransformMode(EShTexSampTransKeep),
-        needToLegalize(false)
+        needToLegalize(false),
+        binaryDoubleOutput(false)
     {
         localSize[0] = 1;
         localSize[1] = 1;
@@ -634,6 +635,9 @@ public:
     void setNeedsLegalization() { needToLegalize = true; }
     bool needsLegalization() const { return needToLegalize; }
 
+    void setBinaryDoubleOutput() { binaryDoubleOutput = true; }
+    bool getBinaryDoubleOutput() { return binaryDoubleOutput; }
+
     const char* const implicitThisName;
     const char* const implicitCounterName;
 
@@ -742,6 +746,7 @@ protected:
     TProcesses processes;
 
     bool needToLegalize;
+    bool binaryDoubleOutput;
 
 private:
     void operator=(TIntermediate&); // prevent assignments

3rdparty/glslang/glslang/MachineIndependent/preprocessor/PpContext.cpp

@@ -77,6 +77,7 @@ NVIDIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 \****************************************************************************/
 
 #include <cstdlib>
+#include <locale>
 
 #include "PpContext.h"
 
@@ -91,6 +92,8 @@ TPpContext::TPpContext(TParseContextBase& pc, const std::string& rootFileName, T
     for (elsetracker = 0; elsetracker < maxIfNesting; elsetracker++)
         elseSeen[elsetracker] = false;
     elsetracker = 0;
+
+    strtodStream.imbue(std::locale::classic());
 }
 
 TPpContext::~TPpContext()

3rdparty/glslang/glslang/MachineIndependent/preprocessor/PpContext.h

@@ -80,6 +80,7 @@ NVIDIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 #include <stack>
 #include <unordered_map>
+#include <sstream>
 
 #include "../ParseHelper.h"
 
@@ -92,13 +93,16 @@ namespace glslang {
 
 class TPpToken {
 public:
-    TPpToken() : space(false), i64val(0)
+    TPpToken() { clear(); }
+    void clear()
     {
+        space = false;
+        i64val = 0;
         loc.init();
         name[0] = 0;
     }
 
-    // This is used for comparing macro definitions, so checks what is relevant for that.
+    // Used for comparing macro definitions, so checks what is relevant for that.
     bool operator==(const TPpToken& right)
     {
         return space == right.space &&
@@ -108,15 +112,17 @@ public:
     bool operator!=(const TPpToken& right) { return ! operator==(right); }
 
     TSourceLoc loc;
-    bool space;  // true if a space (for white space or a removed comment) should also be recognized, in front of the token returned
-
+    // True if a space (for white space or a removed comment) should also be
+    // recognized, in front of the token returned:
+    bool space;
+    // Numeric value of the token:
     union {
         int ival;
         double dval;
         long long i64val;
     };
-
-    char   name[MaxTokenLength + 1];
+    // Text string of the token:
+    char name[MaxTokenLength + 1];
 };
 
 class TStringAtomMap {
@@ -615,6 +621,8 @@ protected:
     std::string rootFileName;
     std::stack<TShader::Includer::IncludeResult*> includeStack;
     std::string currentSourceFile;
+
+    std::istringstream strtodStream;
 };
 
 } // end namespace glslang

3rdparty/glslang/glslang/MachineIndependent/preprocessor/PpScanner.cpp

@@ -102,20 +102,36 @@ namespace glslang {
 
 int TPpContext::lFloatConst(int len, int ch, TPpToken* ppToken)
 {
-    bool HasDecimalOrExponent = false;
-    int isDouble = 0;
-
     const auto saveName = [&](int ch) {
         if (len <= MaxTokenLength)
             ppToken->name[len++] = static_cast<char>(ch);
     };
 
-    // Decimal:
+    // find the range of non-zero digits before the decimal point
+    int startNonZero = 0;
+    while (startNonZero < len && ppToken->name[startNonZero] == '0')
+        ++startNonZero;
+    int endNonZero = len;
+    while (endNonZero > startNonZero && ppToken->name[endNonZero-1] == '0')
+        --endNonZero;
+    int numWholeNumberDigits = endNonZero - startNonZero;
+
+    // accumulate the range's value
+    bool fastPath = numWholeNumberDigits <= 15;  // when the number gets too complex, set to false
+    unsigned long long wholeNumber = 0;
+    if (fastPath) {
+        for (int i = startNonZero; i < endNonZero; ++i)
+            wholeNumber = wholeNumber * 10 + (ppToken->name[i] - '0');
+    }
+    int decimalShift = len - endNonZero;
 
+    // Decimal point:
+    bool hasDecimalOrExponent = false;
     if (ch == '.') {
-        HasDecimalOrExponent = true;
+        hasDecimalOrExponent = true;
         saveName(ch);
         ch = getChar();
+        int firstDecimal = len;
 
         // 1.#INF or -1.#INF
         if (ch == '#' && (ifdepth > 0 || parseContext.intermediate.getSource() == EShSourceHlsl)) {
@@ -145,38 +161,97 @@ int TPpContext::lFloatConst(int len, int ch, TPpToken* ppToken)
             }
         }
 
+        // Consume leading-zero digits after the decimal point
+        while (ch == '0') {
+            saveName(ch);
+            ch = getChar();
+        }
+        int startNonZeroDecimal = len;
+        int endNonZeroDecimal = len;
+
+        // Consume remaining digits, up to the exponent
         while (ch >= '0' && ch <= '9') {
             saveName(ch);
+            if (ch != '0')
+                endNonZeroDecimal = len;
             ch = getChar();
         }
+
+        // Compute accumulation up to the last non-zero digit
+        if (endNonZeroDecimal > startNonZeroDecimal) {
+            numWholeNumberDigits += endNonZeroDecimal - endNonZero - 1; // don't include the "."
+            if (numWholeNumberDigits > 15)
+                fastPath = false;
+            if (fastPath) {
+                for (int i = endNonZero; i < endNonZeroDecimal; ++i) {
+                    if (ppToken->name[i] != '.')
+                        wholeNumber = wholeNumber * 10 + (ppToken->name[i] - '0');
+                }
+            }
+            decimalShift = firstDecimal - endNonZeroDecimal;
+        }
     }
 
     // Exponent:
-
-    if (ch == 'e' || ch == 'E') {
-        HasDecimalOrExponent = true;
-        saveName(ch);
-        ch = getChar();
-        if (ch == '+' || ch == '-') {
+    bool negativeExponent = false;
+    double exponentValue = 0.0;
+    int exponent = 0;
+    {
+        if (ch == 'e' || ch == 'E') {
+            hasDecimalOrExponent = true;
             saveName(ch);
             ch = getChar();
-        }
-        if (ch >= '0' && ch <= '9') {
-            while (ch >= '0' && ch <= '9') {
+            if (ch == '+' || ch == '-') {
+                negativeExponent = ch == '-';
                 saveName(ch);
                 ch = getChar();
             }
-        } else {
-            parseContext.ppError(ppToken->loc, "bad character in float exponent", "", "");
+            if (ch >= '0' && ch <= '9') {
+                while (ch >= '0' && ch <= '9') {
+                    exponent = exponent * 10 + (ch - '0');
+                    saveName(ch);
+                    ch = getChar();
+                }
+            } else {
+                parseContext.ppError(ppToken->loc, "bad character in float exponent", "", "");
+            }
+        }
+
+        // Compensate for location of decimal
+        if (negativeExponent)
+            exponent -= decimalShift;
+        else {
+            exponent += decimalShift;
+            if (exponent < 0) {
+                negativeExponent = true;
+                exponent = -exponent;
+            }
+        }
+        if (exponent > 22)
+            fastPath = false;
+
+        if (fastPath) {
+            // Compute the floating-point value of the exponent
+            exponentValue = 1.0;
+            if (exponent > 0) {
+                double expFactor = 10;
+                while (exponent > 0) {
+                    if (exponent & 0x1)
+                        exponentValue *= expFactor;
+                    expFactor *= expFactor;
+                    exponent >>= 1;
+                }
+            }
         }
     }
 
     // Suffix:
+    bool isDouble = false;
     bool isFloat16 = false;
     if (ch == 'l' || ch == 'L') {
         if (ifdepth == 0 && parseContext.intermediate.getSource() == EShSourceGlsl)
             parseContext.doubleCheck(ppToken->loc, "double floating-point suffix");
-        if (ifdepth == 0 && !HasDecimalOrExponent)
+        if (ifdepth == 0 && !hasDecimalOrExponent)
             parseContext.ppError(ppToken->loc, "float literal needs a decimal point or exponent", "", "");
         if (parseContext.intermediate.getSource() == EShSourceGlsl) {
             int ch2 = getChar();
@@ -186,16 +261,16 @@ int TPpContext::lFloatConst(int len, int ch, TPpToken* ppToken)
             } else {
                 saveName(ch);
                 saveName(ch2);
-                isDouble = 1;
+                isDouble = true;
             }
         } else if (parseContext.intermediate.getSource() == EShSourceHlsl) {
             saveName(ch);
-            isDouble = 1;
+            isDouble = true;
         }
     } else if (ch == 'h' || ch == 'H') {
         if (ifdepth == 0 && parseContext.intermediate.getSource() == EShSourceGlsl)
             parseContext.float16Check(ppToken->loc, "half floating-point suffix");
-        if (ifdepth == 0 && !HasDecimalOrExponent)
+        if (ifdepth == 0 && !hasDecimalOrExponent)
             parseContext.ppError(ppToken->loc, "float literal needs a decimal point or exponent", "", "");
         if (parseContext.intermediate.getSource() == EShSourceGlsl) {
             int ch2 = getChar();
@@ -216,13 +291,13 @@ int TPpContext::lFloatConst(int len, int ch, TPpToken* ppToken)
             parseContext.profileRequires(ppToken->loc,  EEsProfile, 300, nullptr, "floating-point suffix");
         if (ifdepth == 0 && !parseContext.relaxedErrors())
             parseContext.profileRequires(ppToken->loc, ~EEsProfile, 120, nullptr, "floating-point suffix");
-        if (ifdepth == 0 && !HasDecimalOrExponent)
+        if (ifdepth == 0 && !hasDecimalOrExponent)
             parseContext.ppError(ppToken->loc, "float literal needs a decimal point or exponent", "", "");
         saveName(ch);
     } else
         ungetChar();
 
-    // Patch up the name, length, etc.
+    // Patch up the name and length for overflow
 
     if (len > MaxTokenLength) {
         len = MaxTokenLength;
@@ -230,8 +305,29 @@ int TPpContext::lFloatConst(int len, int ch, TPpToken* ppToken)
     }
     ppToken->name[len] = '\0';
 
-    // Get the numerical value
-    ppToken->dval = strtod(ppToken->name, nullptr);
+    // Compute the numerical value
+    if (fastPath) {
+        // compute the floating-point value of the exponent
+        if (exponentValue == 0.0)
+            ppToken->dval = (double)wholeNumber;
+        else if (negativeExponent)
+            ppToken->dval = (double)wholeNumber / exponentValue;
+        else
+            ppToken->dval = (double)wholeNumber * exponentValue;
+    } else {
+        // slow path
+        strtodStream.clear();
+        strtodStream.str(ppToken->name);
+        strtodStream >> ppToken->dval;
+        // Assume failure combined with a large exponent was overflow, in
+        // an attempt to set INF.  Otherwise, assume underflow, and set 0.0.
+        if (strtodStream.fail()) {
+            if (!negativeExponent && exponent + numWholeNumberDigits > 300)
+                ppToken->i64val = 0x7ff0000000000000; // +Infinity
+            else
+                ppToken->dval = 0.0;
+        }
+    }
 
     // Return the right token type
     if (isDouble)

3rdparty/glslang/glslang/MachineIndependent/preprocessor/PpTokens.cpp

@@ -97,6 +97,56 @@ NVIDIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 namespace glslang {
 
+
+namespace {
+
+    // When recording (and playing back) should the backing name string
+    // be saved (restored)?
+    bool SaveName(int atom)
+    {
+        switch (atom) {
+        case PpAtomIdentifier:
+        case PpAtomConstString:
+        case PpAtomConstInt:
+        case PpAtomConstUint:
+        case PpAtomConstInt64:
+        case PpAtomConstUint64:
+    #ifdef AMD_EXTENSIONS
+        case PpAtomConstInt16:
+        case PpAtomConstUint16:
+    #endif
+        case PpAtomConstFloat:
+        case PpAtomConstDouble:
+        case PpAtomConstFloat16:
+            return true;
+        default:
+            return false;
+        }
+    }
+
+    // When recording (and playing back) should the numeric value
+    // be saved (restored)?
+    bool SaveValue(int atom)
+    {
+        switch (atom) {
+        case PpAtomConstInt:
+        case PpAtomConstUint:
+        case PpAtomConstInt64:
+        case PpAtomConstUint64:
+    #ifdef AMD_EXTENSIONS
+        case PpAtomConstInt16:
+        case PpAtomConstUint16:
+    #endif
+        case PpAtomConstFloat:
+        case PpAtomConstDouble:
+        case PpAtomConstFloat16:
+            return true;
+        default:
+            return false;
+        }
+    }
+}
+
 // push onto back of stream
 void TPpContext::TokenStream::putSubtoken(char subtoken)
 {
@@ -121,42 +171,25 @@ void TPpContext::TokenStream::ungetSubtoken()
 
 // Add a complete token (including backing string) to the end of a list
 // for later playback.
-void TPpContext::TokenStream::putToken(int token, TPpToken* ppToken)
+void TPpContext::TokenStream::putToken(int atom, TPpToken* ppToken)
 {
-    const char* s;
-    char* str = NULL;
+    // save the atom
+    assert((atom & ~0xff) == 0);
+    putSubtoken(static_cast<char>(atom));
 
-    assert((token & ~0xff) == 0);
-    putSubtoken(static_cast<char>(token));
-
-    switch (token) {
-    case PpAtomIdentifier:
-    case PpAtomConstString:
-        s = ppToken->name;
+    // save the backing name string
+    if (SaveName(atom)) {
+        const char* s = ppToken->name;
         while (*s)
             putSubtoken(*s++);
         putSubtoken(0);
-        break;
-    case PpAtomConstInt:
-    case PpAtomConstUint:
-    case PpAtomConstInt64:
-    case PpAtomConstUint64:
-#ifdef AMD_EXTENSIONS
-    case PpAtomConstInt16:
-    case PpAtomConstUint16:
-#endif
-    case PpAtomConstFloat:
-    case PpAtomConstDouble:
-    case PpAtomConstFloat16:
-        str = ppToken->name;
-        while (*str) {
-            putSubtoken(*str);
-            str++;
-        }
-        putSubtoken(0);
-        break;
-    default:
-        break;
+    }
+
+    // save the numeric value
+    if (SaveValue(atom)) {
+        const char* n = reinterpret_cast<const char*>(&ppToken->i64val);
+        for (int i = 0; i < sizeof(ppToken->i64val); ++i)
+            putSubtoken(*n++);
     }
 }
 
@@ -164,38 +197,19 @@ void TPpContext::TokenStream::putToken(int token, TPpToken* ppToken)
 // (Not the source stream, but a stream used to hold a tokenized macro).
 int TPpContext::TokenStream::getToken(TParseContextBase& parseContext, TPpToken *ppToken)
 {
-    int len;
-    int ch;
+    // get the atom
+    int atom = getSubtoken();
+    if (atom == EndOfInput)
+        return atom;
 
-    int subtoken = getSubtoken();
+    // init the token
+    ppToken->clear();
     ppToken->loc = parseContext.getCurrentLoc();
-    switch (subtoken) {
-    case '#':
-        // Check for ##, unless the current # is the last character
-        if (current < data.size()) {
-            if (getSubtoken() == '#') {
-                parseContext.requireProfile(ppToken->loc, ~EEsProfile, "token pasting (##)");
-                parseContext.profileRequires(ppToken->loc, ~EEsProfile, 130, 0, "token pasting (##)");
-                subtoken = PpAtomPaste;
-            } else
-                ungetSubtoken();
-        }
-        break;
-    case PpAtomConstString:
-    case PpAtomIdentifier:
-    case PpAtomConstFloat:
-    case PpAtomConstDouble:
-    case PpAtomConstFloat16:
-    case PpAtomConstInt:
-    case PpAtomConstUint:
-    case PpAtomConstInt64:
-    case PpAtomConstUint64:
-#ifdef AMD_EXTENSIONS
-    case PpAtomConstInt16:
-    case PpAtomConstUint16:
-#endif
-        len = 0;
-        ch = getSubtoken();
+
+    // get the backing name string
+    if (SaveName(atom)) {
+        int ch = getSubtoken();
+        int len = 0;
         while (ch != 0 && ch != EndOfInput) {
             if (len < MaxTokenLength) {
                 ppToken->name[len] = (char)ch;
@@ -207,63 +221,28 @@ int TPpContext::TokenStream::getToken(TParseContextBase& parseContext, TPpToken
             }
         }
         ppToken->name[len] = 0;
+    }
 
-        switch (subtoken) {
-        case PpAtomIdentifier:
-            break;
-        case PpAtomConstString:
-            break;
-        case PpAtomConstFloat:
-        case PpAtomConstDouble:
-        case PpAtomConstFloat16:
-            ppToken->dval = atof(ppToken->name);
-            break;
-        case PpAtomConstInt:
-#ifdef AMD_EXTENSIONS
-        case PpAtomConstInt16:
-#endif
-            if (len > 0 && ppToken->name[0] == '0') {
-                if (len > 1 && (ppToken->name[1] == 'x' || ppToken->name[1] == 'X'))
-                    ppToken->ival = (int)strtol(ppToken->name, 0, 16);
-                else
-                    ppToken->ival = (int)strtol(ppToken->name, 0, 8);
-            } else
-                ppToken->ival = atoi(ppToken->name);
-            break;
-        case PpAtomConstUint:
-#ifdef AMD_EXTENSIONS
-        case PpAtomConstUint16:
-#endif
-            if (len > 0 && ppToken->name[0] == '0') {
-                if (len > 1 && (ppToken->name[1] == 'x' || ppToken->name[1] == 'X'))
-                    ppToken->ival = (int)strtoul(ppToken->name, 0, 16);
-                else
-                    ppToken->ival = (int)strtoul(ppToken->name, 0, 8);
-            } else
-                ppToken->ival = (int)strtoul(ppToken->name, 0, 10);
-            break;
-        case PpAtomConstInt64:
-            if (len > 0 && ppToken->name[0] == '0') {
-                if (len > 1 && (ppToken->name[1] == 'x' || ppToken->name[1] == 'X'))
-                    ppToken->i64val = strtoll(ppToken->name, nullptr, 16);
-                else
-                    ppToken->i64val = strtoll(ppToken->name, nullptr, 8);
-            } else
-                ppToken->i64val = atoll(ppToken->name);
-            break;
-        case PpAtomConstUint64:
-            if (len > 0 && ppToken->name[0] == '0') {
-                if (len > 1 && (ppToken->name[1] == 'x' || ppToken->name[1] == 'X'))
-                    ppToken->i64val = (long long)strtoull(ppToken->name, nullptr, 16);
-                else
-                    ppToken->i64val = (long long)strtoull(ppToken->name, nullptr, 8);
+    // Check for ##, unless the current # is the last character
+    if (atom == '#') {
+        if (current < data.size()) {
+            if (getSubtoken() == '#') {
+                parseContext.requireProfile(ppToken->loc, ~EEsProfile, "token pasting (##)");
+                parseContext.profileRequires(ppToken->loc, ~EEsProfile, 130, 0, "token pasting (##)");
+                atom = PpAtomPaste;
             } else
-                ppToken->i64val = (long long)strtoull(ppToken->name, 0, 10);
-            break;
+                ungetSubtoken();
         }
     }
 
-    return subtoken;
+    // get the numeric value
+    if (SaveValue(atom)) {
+        char* n = reinterpret_cast<char*>(&ppToken->i64val);
+        for (int i = 0; i < sizeof(ppToken->i64val); ++i)
+            *n++ = getSubtoken();
+    }
+
+    return atom;
 }
 
 // We are pasting if

3rdparty/glslang/gtests/AST.FromFile.cpp

@@ -208,6 +208,7 @@ INSTANTIATE_TEST_CASE_P(
         "prepost.frag",
         "runtimeArray.vert",
         "simpleFunctionCall.frag",
+        "stringToDouble.vert",
         "structAssignment.frag",
         "structDeref.frag",
         "structure.frag",

3rdparty/glslang/gtests/Hlsl.FromFile.cpp

@@ -315,6 +315,7 @@ INSTANTIATE_TEST_CASE_P(
         {"hlsl.semicolons.frag", "main"},
         {"hlsl.shapeConv.frag", "main"},
         {"hlsl.shapeConvRet.frag", "main"},
+        {"hlsl.self_cast.frag", "main"},
         {"hlsl.snorm.uav.comp", "main"},
         {"hlsl.staticMemberFunction.frag", "main"},
         {"hlsl.store.rwbyteaddressbuffer.type.comp", "main"},

3rdparty/glslang/hlsl/hlslParseHelper.cpp

@@ -6401,12 +6401,18 @@ bool HlslParseContext::constructorError(const TSourceLoc& loc, TIntermNode* node
         return true;
     }
 
-    if (op == EOpConstructStruct && ! type.isArray() && isScalarConstructor(node))
-        return false;
+    if (op == EOpConstructStruct && ! type.isArray()) {
+        if (isScalarConstructor(node))
+            return false;
 
-    if (op == EOpConstructStruct && ! type.isArray() && (int)type.getStruct()->size() != function.getParamCount()) {
-        error(loc, "Number of constructor parameters does not match the number of structure fields", "constructor", "");
-        return true;
+        // Self-type construction: e.g, we can construct a struct from a single identically typed object.
+        if (function.getParamCount() == 1 && type == *function[0].type)
+            return false;
+
+        if ((int)type.getStruct()->size() != function.getParamCount()) {
+            error(loc, "Number of constructor parameters does not match the number of structure fields", "constructor", "");
+            return true;
+        }
     }
 
     if ((op != EOpConstructStruct && size != 1 && size < type.computeNumComponents()) ||
@@ -8132,6 +8138,10 @@ TIntermTyped* HlslParseContext::handleConstructor(const TSourceLoc& loc, TInterm
     if (node == nullptr)
         return nullptr;
 
+    // Construct identical type
+    if (type == node->getType())
+        return node;
+
     // Handle the idiom "(struct type)<scalar value>"
     if (type.isStruct() && isScalarConstructor(node)) {
         // 'node' will almost always get used multiple times, so should not be used directly,

3rdparty/glslang/known_good.json

@@ -5,7 +5,7 @@
       "site" : "github",
       "subrepo" : "KhronosGroup/SPIRV-Tools",
       "subdir" : "External/spirv-tools",
-      "commit" : "a00a0a09ae5dab8ef15073ceb40542c162767798"
+      "commit" : "a579e720a8d7805ec9ebf657a4c6fa67ec268f7e"
     },
     {
       "name" : "spirv-tools/external/spirv-headers",