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@@ -324,6 +324,34 @@ namespace detail
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return detail::bitfieldInterleave<uint8, uint16>(x, y);
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return detail::bitfieldInterleave<uint8, uint16>(x, y);
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}
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}
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+ GLM_FUNC_QUALIFIER uint16 bitfieldInterleave(u8vec2 const& v)
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+ {
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+ return detail::bitfieldInterleave<uint8, uint16>(v.x, v.y);
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+ }
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+
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+ GLM_FUNC_QUALIFIER u8vec2 bitfieldDeinterleave(glm::uint16 x)
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+ {
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+ uint16 REG1(x);
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+ uint16 REG2(x >>= 1);
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+
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+ REG1 = REG1 & static_cast<uint16>(0x5555555555555555ull);
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+ REG2 = REG2 & static_cast<uint16>(0x5555555555555555ull);
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+
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+ REG1 = ((REG1 >> 1) | REG1) & static_cast<uint16>(0x3333333333333333ull);
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+ REG2 = ((REG2 >> 1) | REG2) & static_cast<uint16>(0x3333333333333333ull);
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+
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+ REG1 = ((REG1 >> 2) | REG1) & static_cast<uint16>(0x0F0F0F0F0F0F0F0Full);
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+ REG2 = ((REG2 >> 2) | REG2) & static_cast<uint16>(0x0F0F0F0F0F0F0F0Full);
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+
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+ REG1 = ((REG1 >> 4) | REG1) & static_cast<uint16>(0x00FF00FF00FF00FFull);
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+ REG2 = ((REG2 >> 4) | REG2) & static_cast<uint16>(0x00FF00FF00FF00FFull);
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+
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+ REG1 = ((REG1 >> 8) | REG1) & static_cast<uint16>(0x0000FFFF0000FFFFull);
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+ REG2 = ((REG2 >> 8) | REG2) & static_cast<uint16>(0x0000FFFF0000FFFFull);
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+
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+ return glm::u8vec2(REG1, REG2);
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+ }
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+
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GLM_FUNC_QUALIFIER int32 bitfieldInterleave(int16 x, int16 y)
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GLM_FUNC_QUALIFIER int32 bitfieldInterleave(int16 x, int16 y)
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{
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{
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union sign16
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union sign16
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@@ -350,6 +378,34 @@ namespace detail
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return detail::bitfieldInterleave<uint16, uint32>(x, y);
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return detail::bitfieldInterleave<uint16, uint32>(x, y);
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}
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}
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+ GLM_FUNC_QUALIFIER glm::uint32 bitfieldInterleave(u16vec2 const& v)
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+ {
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+ return detail::bitfieldInterleave<uint16, uint32>(v.x, v.y);
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+ }
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+
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+ GLM_FUNC_QUALIFIER glm::u16vec2 bitfieldDeinterleave(glm::uint32 x)
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+ {
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+ glm::uint32 REG1(x);
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+ glm::uint32 REG2(x >>= 1);
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+
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+ REG1 = REG1 & static_cast<glm::uint32>(0x5555555555555555ull);
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+ REG2 = REG2 & static_cast<glm::uint32>(0x5555555555555555ull);
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+
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+ REG1 = ((REG1 >> 1) | REG1) & static_cast<glm::uint32>(0x3333333333333333ull);
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+ REG2 = ((REG2 >> 1) | REG2) & static_cast<glm::uint32>(0x3333333333333333ull);
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+
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+ REG1 = ((REG1 >> 2) | REG1) & static_cast<glm::uint32>(0x0F0F0F0F0F0F0F0Full);
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+ REG2 = ((REG2 >> 2) | REG2) & static_cast<glm::uint32>(0x0F0F0F0F0F0F0F0Full);
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+
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+ REG1 = ((REG1 >> 4) | REG1) & static_cast<glm::uint32>(0x00FF00FF00FF00FFull);
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+ REG2 = ((REG2 >> 4) | REG2) & static_cast<glm::uint32>(0x00FF00FF00FF00FFull);
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+
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+ REG1 = ((REG1 >> 8) | REG1) & static_cast<glm::uint32>(0x0000FFFF0000FFFFull);
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+ REG2 = ((REG2 >> 8) | REG2) & static_cast<glm::uint32>(0x0000FFFF0000FFFFull);
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+
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+ return glm::u16vec2(REG1, REG2);
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+ }
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+
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GLM_FUNC_QUALIFIER int64 bitfieldInterleave(int32 x, int32 y)
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GLM_FUNC_QUALIFIER int64 bitfieldInterleave(int32 x, int32 y)
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{
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{
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union sign32
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union sign32
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@@ -376,6 +432,37 @@ namespace detail
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return detail::bitfieldInterleave<uint32, uint64>(x, y);
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return detail::bitfieldInterleave<uint32, uint64>(x, y);
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}
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}
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+ GLM_FUNC_QUALIFIER glm::uint64 bitfieldInterleave(u32vec2 const& v)
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+ {
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+ return detail::bitfieldInterleave<uint32, uint64>(v.x, v.y);
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+ }
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+
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+ GLM_FUNC_QUALIFIER glm::u32vec2 bitfieldDeinterleave(glm::uint64 x)
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+ {
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+ glm::uint64 REG1(x);
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+ glm::uint64 REG2(x >>= 1);
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+
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+ REG1 = REG1 & static_cast<glm::uint64>(0x5555555555555555ull);
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+ REG2 = REG2 & static_cast<glm::uint64>(0x5555555555555555ull);
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+
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+ REG1 = ((REG1 >> 1) | REG1) & static_cast<glm::uint64>(0x3333333333333333ull);
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+ REG2 = ((REG2 >> 1) | REG2) & static_cast<glm::uint64>(0x3333333333333333ull);
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+
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+ REG1 = ((REG1 >> 2) | REG1) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
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+ REG2 = ((REG2 >> 2) | REG2) & static_cast<glm::uint64>(0x0F0F0F0F0F0F0F0Full);
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+
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+ REG1 = ((REG1 >> 4) | REG1) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
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+ REG2 = ((REG2 >> 4) | REG2) & static_cast<glm::uint64>(0x00FF00FF00FF00FFull);
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+
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+ REG1 = ((REG1 >> 8) | REG1) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
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+ REG2 = ((REG2 >> 8) | REG2) & static_cast<glm::uint64>(0x0000FFFF0000FFFFull);
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+
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+ REG1 = ((REG1 >> 16) | REG1) & static_cast<glm::uint64>(0x00000000FFFFFFFFull);
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+ REG2 = ((REG2 >> 16) | REG2) & static_cast<glm::uint64>(0x00000000FFFFFFFFull);
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+
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+ return glm::u32vec2(REG1, REG2);
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+ }
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+
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GLM_FUNC_QUALIFIER int32 bitfieldInterleave(int8 x, int8 y, int8 z)
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GLM_FUNC_QUALIFIER int32 bitfieldInterleave(int8 x, int8 y, int8 z)
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{
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{
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union sign8
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union sign8
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