fix

main.ml

@@ -448,6 +448,7 @@ and wait_loop boot_com host port =
 				| _ ->
 					if verbose then print_endline ("Reusing  cached module " ^ Ast.s_type_path m.m_path);
 					Typeload.add_module ctx m p;
+					PMap.iter (Hashtbl.add com2.resources) m.m_extra.m_binded_res;
 					PMap.iter (fun _ m2 -> add_modules m0 m2) m.m_extra.m_deps);
 			end
 		in