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@@ -1,6 +1,7 @@
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#define WIN32_LEAN_AND_MEAN
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#define WIN32_LEAN_AND_MEAN
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#define HEAP_SIZE 1024
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#define HEAP_SIZE 1024
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+#define QUEUE_SLOT_COUNT 2
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#include <iron_global.h>
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#include <iron_global.h>
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#include <stdbool.h>
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#include <stdbool.h>
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#include <malloc.h>
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#include <malloc.h>
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@@ -184,12 +185,27 @@ void setup_swapchain() {
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}
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}
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}
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}
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-static void create_root_signature() {
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+void iron_gpu_internal_destroy() {
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+ if (device) {
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+ device->lpVtbl->Release(device);
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+ device = NULL;
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+ }
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+}
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+
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+void iron_gpu_internal_init() {
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+ #ifdef _DEBUG
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+ ID3D12Debug *debugController = NULL;
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+ if (D3D12GetDebugInterface(&IID_ID3D12Debug, &debugController) == S_OK) {
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+ debugController->lpVtbl->EnableDebugLayer(debugController);
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+ }
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+ #endif
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+
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+ D3D12CreateDevice(NULL, D3D_FEATURE_LEVEL_11_0, &IID_ID3D12Device, &device);
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+
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+ // Root signature
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ID3DBlob *rootBlob;
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ID3DBlob *rootBlob;
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ID3DBlob *errorBlob;
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ID3DBlob *errorBlob;
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-
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D3D12_ROOT_PARAMETER parameters[2] = {};
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D3D12_ROOT_PARAMETER parameters[2] = {};
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-
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D3D12_DESCRIPTOR_RANGE range = {
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D3D12_DESCRIPTOR_RANGE range = {
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.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV,
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.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV,
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.NumDescriptors = (UINT)IRON_INTERNAL_G5_TEXTURE_COUNT,
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.NumDescriptors = (UINT)IRON_INTERNAL_G5_TEXTURE_COUNT,
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@@ -201,12 +217,10 @@ static void create_root_signature() {
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parameters[0].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
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parameters[0].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
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parameters[0].DescriptorTable.NumDescriptorRanges = 1;
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parameters[0].DescriptorTable.NumDescriptorRanges = 1;
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parameters[0].DescriptorTable.pDescriptorRanges = ⦥
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parameters[0].DescriptorTable.pDescriptorRanges = ⦥
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-
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parameters[1].ParameterType = D3D12_ROOT_PARAMETER_TYPE_CBV;
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parameters[1].ParameterType = D3D12_ROOT_PARAMETER_TYPE_CBV;
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parameters[1].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
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parameters[1].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
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parameters[1].Descriptor.ShaderRegister = 0;
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parameters[1].Descriptor.ShaderRegister = 0;
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parameters[1].Descriptor.RegisterSpace = 0;
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parameters[1].Descriptor.RegisterSpace = 0;
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-
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D3D12_STATIC_SAMPLER_DESC samplers[IRON_INTERNAL_G5_TEXTURE_COUNT];
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D3D12_STATIC_SAMPLER_DESC samplers[IRON_INTERNAL_G5_TEXTURE_COUNT];
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for (int i = 0; i < IRON_INTERNAL_G5_TEXTURE_COUNT; ++i) {
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for (int i = 0; i < IRON_INTERNAL_G5_TEXTURE_COUNT; ++i) {
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samplers[i].ShaderRegister = i;
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samplers[i].ShaderRegister = i;
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@@ -223,7 +237,6 @@ static void create_root_signature() {
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samplers[i].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
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samplers[i].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
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samplers[i].RegisterSpace = 0;
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samplers[i].RegisterSpace = 0;
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}
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}
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-
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D3D12_ROOT_SIGNATURE_DESC descRootSignature = {
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D3D12_ROOT_SIGNATURE_DESC descRootSignature = {
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.NumParameters = 2,
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.NumParameters = 2,
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.pParameters = parameters,
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.pParameters = parameters,
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@@ -231,30 +244,8 @@ static void create_root_signature() {
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.pStaticSamplers = samplers,
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.pStaticSamplers = samplers,
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.Flags = D3D12_ROOT_SIGNATURE_FLAG_ALLOW_INPUT_ASSEMBLER_INPUT_LAYOUT,
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.Flags = D3D12_ROOT_SIGNATURE_FLAG_ALLOW_INPUT_ASSEMBLER_INPUT_LAYOUT,
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};
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};
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-
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D3D12SerializeRootSignature(&descRootSignature, D3D_ROOT_SIGNATURE_VERSION_1, &rootBlob, &errorBlob);
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D3D12SerializeRootSignature(&descRootSignature, D3D_ROOT_SIGNATURE_VERSION_1, &rootBlob, &errorBlob);
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- device->lpVtbl->CreateRootSignature(device, 0, rootBlob->lpVtbl->GetBufferPointer(rootBlob), rootBlob->lpVtbl->GetBufferSize(rootBlob), &IID_ID3D12RootSignature,
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- &globalRootSignature);
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-}
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-
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-void iron_gpu_internal_destroy() {
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- if (device) {
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- device->lpVtbl->Release(device);
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- device = NULL;
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- }
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-}
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-
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-void iron_gpu_internal_init() {
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- #ifdef _DEBUG
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- ID3D12Debug *debugController = NULL;
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- if (D3D12GetDebugInterface(&IID_ID3D12Debug, &debugController) == S_OK) {
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- debugController->lpVtbl->EnableDebugLayer(debugController);
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- }
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- #endif
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-
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- D3D12CreateDevice(NULL, D3D_FEATURE_LEVEL_11_0, &IID_ID3D12Device, &device);
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-
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- create_root_signature();
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+ device->lpVtbl->CreateRootSignature(device, 0, rootBlob->lpVtbl->GetBufferPointer(rootBlob), rootBlob->lpVtbl->GetBufferSize(rootBlob), &IID_ID3D12RootSignature, &globalRootSignature);
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D3D12_COMMAND_QUEUE_DESC queueDesc = {
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D3D12_COMMAND_QUEUE_DESC queueDesc = {
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.Flags = D3D12_COMMAND_QUEUE_FLAG_NONE,
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.Flags = D3D12_COMMAND_QUEUE_FLAG_NONE,
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@@ -333,7 +324,7 @@ void iron_gpu_begin(iron_gpu_texture_t *renderTarget) {
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++window_current_fence_value;
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++window_current_fence_value;
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wait_for_fence(window_frame_fences[window_current_backbuffer], window_fence_values[window_current_backbuffer],
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wait_for_fence(window_frame_fences[window_current_backbuffer], window_fence_values[window_current_backbuffer],
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- window_frame_fence_events[window_current_backbuffer]);
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+ window_frame_fence_events[window_current_backbuffer]);
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}
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}
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void iron_gpu_end() {
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void iron_gpu_end() {
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@@ -386,20 +377,12 @@ void iron_gpu_command_list_init(struct iron_gpu_command_list *list) {
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void iron_gpu_command_list_destroy(struct iron_gpu_command_list *list) {}
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void iron_gpu_command_list_destroy(struct iron_gpu_command_list *list) {}
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-void iron_gpu_internal_reset_textures(struct iron_gpu_command_list *list) {
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- for (int i = 0; i < IRON_INTERNAL_G5_TEXTURE_COUNT; ++i) {
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- list->impl.currentTextures[i] = NULL;
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- }
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-}
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-
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void iron_gpu_command_list_begin(struct iron_gpu_command_list *list) {
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void iron_gpu_command_list_begin(struct iron_gpu_command_list *list) {
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if (list->impl.fence_value > 0) {
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if (list->impl.fence_value > 0) {
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wait_for_fence(list->impl.fence, list->impl.fence_value, list->impl.fence_event);
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wait_for_fence(list->impl.fence, list->impl.fence_value, list->impl.fence_event);
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list->impl._commandAllocator->lpVtbl->Reset(list->impl._commandAllocator);
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list->impl._commandAllocator->lpVtbl->Reset(list->impl._commandAllocator);
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list->impl._commandList->lpVtbl->Reset(list->impl._commandList, list->impl._commandAllocator, NULL);
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list->impl._commandList->lpVtbl->Reset(list->impl._commandList, list->impl._commandAllocator, NULL);
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}
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}
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-
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- iron_gpu_internal_reset_textures(list);
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}
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}
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void iron_gpu_command_list_end(struct iron_gpu_command_list *list) {
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void iron_gpu_command_list_end(struct iron_gpu_command_list *list) {
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@@ -462,7 +445,47 @@ void iron_gpu_command_list_set_constant_buffer(struct iron_gpu_command_list *lis
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list->impl._commandList->lpVtbl->SetGraphicsRootConstantBufferView(list->impl._commandList, 1, buffer->impl.constant_buffer->lpVtbl->GetGPUVirtualAddress(buffer->impl.constant_buffer) + offset);
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list->impl._commandList->lpVtbl->SetGraphicsRootConstantBufferView(list->impl._commandList, 1, buffer->impl.constant_buffer->lpVtbl->GetGPUVirtualAddress(buffer->impl.constant_buffer) + offset);
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}
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}
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+void iron_gpu_internal_set_textures(iron_gpu_command_list_t *list) {
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+ UINT srv_step = device->lpVtbl->GetDescriptorHandleIncrementSize(device, D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV);
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+ if (list->impl.heapIndex + IRON_INTERNAL_G5_TEXTURE_COUNT > HEAP_SIZE) {
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+ list->impl.heapIndex = 0;
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+ }
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+
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+ D3D12_CPU_DESCRIPTOR_HANDLE cpu_base;
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+ D3D12_GPU_DESCRIPTOR_HANDLE gpu_base;
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+ list->impl.srvHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(list->impl.srvHeap, &cpu_base);
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+ list->impl.srvHeap->lpVtbl->GetGPUDescriptorHandleForHeapStart(list->impl.srvHeap, &gpu_base);
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+ cpu_base.ptr += list->impl.heapIndex * srv_step;
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+ gpu_base.ptr += list->impl.heapIndex * srv_step;
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+
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+ for (int i = 0; i < IRON_INTERNAL_G5_TEXTURE_COUNT; ++i) {
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+ iron_gpu_texture_t *texture = list->impl.currentTextures[i];
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+ if (!texture) continue;
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+
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+ D3D12_CPU_DESCRIPTOR_HANDLE source_cpu;
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+ ID3D12DescriptorHeap *source_heap = (texture->impl.stage_depth == i) ?
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+ texture->impl.srvDepthDescriptorHeap : texture->impl.srvDescriptorHeap;
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+ source_heap->lpVtbl->GetCPUDescriptorHandleForHeapStart(source_heap, &source_cpu);
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+
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+ device->lpVtbl->CopyDescriptorsSimple(device, 1, cpu_base, source_cpu, D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV);
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+ cpu_base.ptr += srv_step;
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+ list->impl.heapIndex++;
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+ }
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+
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+ for (int i = 0; i < IRON_INTERNAL_G5_TEXTURE_COUNT; ++i) {
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+ if (!list->impl.currentTextures[i]) continue;
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+ list->impl.currentTextures[i]->impl.stage = 0;
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+ list->impl.currentTextures[i]->impl.stage_depth = -1;
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+ list->impl.currentTextures[i] = NULL;
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+ }
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+
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+ ID3D12DescriptorHeap *heaps[] = {list->impl.srvHeap};
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+ list->impl._commandList->lpVtbl->SetDescriptorHeaps(list->impl._commandList, 1, heaps);
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+ list->impl._commandList->lpVtbl->SetGraphicsRootDescriptorTable(list->impl._commandList, 0, gpu_base);
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+}
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+
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void iron_gpu_command_list_draw(struct iron_gpu_command_list *list) {
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void iron_gpu_command_list_draw(struct iron_gpu_command_list *list) {
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+ iron_gpu_internal_set_textures(list);
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int start = 0;
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int start = 0;
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int count = list->impl._indexCount;
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int count = list->impl._indexCount;
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list->impl._commandList->lpVtbl->IASetPrimitiveTopology(list->impl._commandList, D3D_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
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list->impl._commandList->lpVtbl->IASetPrimitiveTopology(list->impl._commandList, D3D_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
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@@ -510,45 +533,6 @@ void iron_gpu_command_list_disable_scissor(struct iron_gpu_command_list *list) {
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}
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}
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}
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}
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-void iron_gpu_internal_set_textures(iron_gpu_command_list_t *list) {
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- if (list->impl.currentTextures[0] != NULL) {
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- int srvStep = device->lpVtbl->GetDescriptorHandleIncrementSize(device, D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV);
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-
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- if (list->impl.heapIndex + IRON_INTERNAL_G5_TEXTURE_COUNT >= HEAP_SIZE) {
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- list->impl.heapIndex = 0;
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- }
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-
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- D3D12_GPU_DESCRIPTOR_HANDLE srvGpu;
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- list->impl.srvHeap->lpVtbl->GetGPUDescriptorHandleForHeapStart(list->impl.srvHeap, &srvGpu);
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- srvGpu.ptr += list->impl.heapIndex * srvStep;
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-
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- for (int i = 0; i < IRON_INTERNAL_G5_TEXTURE_COUNT; ++i) {
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- if (list->impl.currentTextures[i] != NULL) {
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- D3D12_CPU_DESCRIPTOR_HANDLE srvCpu;
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- list->impl.srvHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(list->impl.srvHeap, &srvCpu);
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- srvCpu.ptr += list->impl.heapIndex * srvStep;
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- ++list->impl.heapIndex;
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-
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- bool is_depth = list->impl.currentTextures[i]->impl.stage_depth == i;
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- D3D12_CPU_DESCRIPTOR_HANDLE sourceCpu;
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- if (is_depth) {
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- list->impl.currentTextures[i]->impl.srvDepthDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(
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- list->impl.currentTextures[i]->impl.srvDepthDescriptorHeap, &sourceCpu);
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- }
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- else {
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- list->impl.currentTextures[i]->impl.srvDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(
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- list->impl.currentTextures[i]->impl.srvDescriptorHeap, &sourceCpu);
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- }
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- device->lpVtbl->CopyDescriptorsSimple(device, 1, srvCpu, sourceCpu, D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV);
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- }
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- }
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-
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- ID3D12DescriptorHeap *heaps[1] = {list->impl.srvHeap};
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- list->impl._commandList->lpVtbl->SetDescriptorHeaps(list->impl._commandList, 1, heaps);
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- list->impl._commandList->lpVtbl->SetGraphicsRootDescriptorTable(list->impl._commandList, 0, srvGpu);
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- }
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-}
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-
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void iron_gpu_command_list_set_pipeline(struct iron_gpu_command_list *list, iron_gpu_pipeline_t *pipeline) {
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void iron_gpu_command_list_set_pipeline(struct iron_gpu_command_list *list, iron_gpu_pipeline_t *pipeline) {
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list->impl._currentPipeline = pipeline;
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list->impl._currentPipeline = pipeline;
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list->impl._commandList->lpVtbl->SetPipelineState(list->impl._commandList, pipeline->impl.pso);
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list->impl._commandList->lpVtbl->SetPipelineState(list->impl._commandList, pipeline->impl.pso);
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@@ -558,10 +542,6 @@ void iron_gpu_command_list_set_pipeline(struct iron_gpu_command_list *list, iron
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}
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}
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list->impl._commandList->lpVtbl->SetGraphicsRootSignature(list->impl._commandList, globalRootSignature);
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list->impl._commandList->lpVtbl->SetGraphicsRootSignature(list->impl._commandList, globalRootSignature);
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-
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- if (pipeline->impl.textures > 0) {
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- iron_gpu_internal_set_textures(list);
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- }
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}
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}
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void iron_gpu_command_list_set_vertex_buffer(struct iron_gpu_command_list *list, iron_gpu_buffer_t *buffer) {
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void iron_gpu_command_list_set_vertex_buffer(struct iron_gpu_command_list *list, iron_gpu_buffer_t *buffer) {
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@@ -579,6 +559,12 @@ void iron_gpu_command_list_set_index_buffer(struct iron_gpu_command_list *list,
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}
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}
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void iron_gpu_command_list_set_render_targets(struct iron_gpu_command_list *list, iron_gpu_texture_t **targets, int count, unsigned flags, unsigned color, float depth) {
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void iron_gpu_command_list_set_render_targets(struct iron_gpu_command_list *list, iron_gpu_texture_t **targets, int count, unsigned flags, unsigned color, float depth) {
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+ ////
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+ iron_gpu_command_list_end(list);
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+ iron_gpu_command_list_wait(list);
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+ iron_gpu_command_list_begin(list);
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+ ////
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+
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iron_gpu_texture_t *render_target = targets[0];
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iron_gpu_texture_t *render_target = targets[0];
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D3D12_CPU_DESCRIPTOR_HANDLE target_descriptors[16];
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D3D12_CPU_DESCRIPTOR_HANDLE target_descriptors[16];
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@@ -586,9 +572,9 @@ void iron_gpu_command_list_set_render_targets(struct iron_gpu_command_list *list
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targets[i]->impl.renderTargetDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(targets[i]->impl.renderTargetDescriptorHeap, &target_descriptors[i]);
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targets[i]->impl.renderTargetDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(targets[i]->impl.renderTargetDescriptorHeap, &target_descriptors[i]);
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}
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}
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- if (render_target->impl.depthStencilDescriptorHeap != NULL) {
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+ if (render_target->impl.depthDescriptorHeap != NULL) {
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D3D12_CPU_DESCRIPTOR_HANDLE heapStart;
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D3D12_CPU_DESCRIPTOR_HANDLE heapStart;
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- render_target->impl.depthStencilDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(render_target->impl.depthStencilDescriptorHeap, &heapStart);
|
|
|
|
|
|
+ render_target->impl.depthDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(render_target->impl.depthDescriptorHeap, &heapStart);
|
|
list->impl._commandList->lpVtbl->OMSetRenderTargets(list->impl._commandList, count, &target_descriptors[0], false, &heapStart);
|
|
list->impl._commandList->lpVtbl->OMSetRenderTargets(list->impl._commandList, count, &target_descriptors[0], false, &heapStart);
|
|
}
|
|
}
|
|
else {
|
|
else {
|
|
@@ -611,9 +597,9 @@ void iron_gpu_command_list_set_render_targets(struct iron_gpu_command_list *list
|
|
}
|
|
}
|
|
if (flags & IRON_GPU_CLEAR_DEPTH) {
|
|
if (flags & IRON_GPU_CLEAR_DEPTH) {
|
|
D3D12_CLEAR_FLAGS d3dflags = D3D12_CLEAR_FLAG_DEPTH;
|
|
D3D12_CLEAR_FLAGS d3dflags = D3D12_CLEAR_FLAG_DEPTH;
|
|
- if (render_target->impl.depthStencilDescriptorHeap != NULL) {
|
|
|
|
|
|
+ if (render_target->impl.depthDescriptorHeap != NULL) {
|
|
D3D12_CPU_DESCRIPTOR_HANDLE handle;
|
|
D3D12_CPU_DESCRIPTOR_HANDLE handle;
|
|
- render_target->impl.depthStencilDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(render_target->impl.depthStencilDescriptorHeap, &handle);
|
|
|
|
|
|
+ render_target->impl.depthDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(render_target->impl.depthDescriptorHeap, &handle);
|
|
list->impl._commandList->lpVtbl->ClearDepthStencilView(list->impl._commandList, handle, d3dflags, depth, 0, 0, NULL);
|
|
list->impl._commandList->lpVtbl->ClearDepthStencilView(list->impl._commandList, handle, d3dflags, depth, 0, 0, NULL);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
@@ -786,7 +772,6 @@ void iron_gpu_command_list_get_render_target_pixels(iron_gpu_command_list_t *lis
|
|
void iron_gpu_command_list_set_texture(iron_gpu_command_list_t *list, iron_gpu_texture_unit_t unit, iron_gpu_texture_t *texture) {
|
|
void iron_gpu_command_list_set_texture(iron_gpu_command_list_t *list, iron_gpu_texture_unit_t unit, iron_gpu_texture_t *texture) {
|
|
texture->impl.stage = unit.offset;
|
|
texture->impl.stage = unit.offset;
|
|
list->impl.currentTextures[texture->impl.stage] = texture;
|
|
list->impl.currentTextures[texture->impl.stage] = texture;
|
|
- iron_gpu_internal_set_textures(list);
|
|
|
|
}
|
|
}
|
|
|
|
|
|
void iron_gpu_command_list_set_texture_from_render_target_depth(iron_gpu_command_list_t *list, iron_gpu_texture_unit_t unit, iron_gpu_texture_t *texture) {
|
|
void iron_gpu_command_list_set_texture_from_render_target_depth(iron_gpu_command_list_t *list, iron_gpu_texture_unit_t unit, iron_gpu_texture_t *texture) {
|
|
@@ -870,8 +855,6 @@ void iron_gpu_pipeline_compile(iron_gpu_pipeline_t *pipe) {
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
- pipe->impl.textures = pipe->fragment_shader->impl.texturesCount;
|
|
|
|
-
|
|
|
|
const D3D12_DEPTH_STENCILOP_DESC defaultStencilOp = {
|
|
const D3D12_DEPTH_STENCILOP_DESC defaultStencilOp = {
|
|
D3D12_STENCIL_OP_KEEP, D3D12_STENCIL_OP_KEEP, D3D12_STENCIL_OP_KEEP, D3D12_COMPARISON_FUNC_NEVER
|
|
D3D12_STENCIL_OP_KEEP, D3D12_STENCIL_OP_KEEP, D3D12_STENCIL_OP_KEEP, D3D12_COMPARISON_FUNC_NEVER
|
|
};
|
|
};
|
|
@@ -1227,9 +1210,9 @@ void iron_gpu_texture_destroy(iron_gpu_texture_t *render_target) {
|
|
render_target->impl.renderTarget->lpVtbl->Release(render_target->impl.renderTarget);
|
|
render_target->impl.renderTarget->lpVtbl->Release(render_target->impl.renderTarget);
|
|
render_target->impl.renderTargetDescriptorHeap->lpVtbl->Release(render_target->impl.renderTargetDescriptorHeap);
|
|
render_target->impl.renderTargetDescriptorHeap->lpVtbl->Release(render_target->impl.renderTargetDescriptorHeap);
|
|
render_target->impl.srvDescriptorHeap->lpVtbl->Release(render_target->impl.srvDescriptorHeap);
|
|
render_target->impl.srvDescriptorHeap->lpVtbl->Release(render_target->impl.srvDescriptorHeap);
|
|
- if (render_target->impl.depthStencilTexture != NULL) {
|
|
|
|
- render_target->impl.depthStencilTexture->lpVtbl->Release(render_target->impl.depthStencilTexture);
|
|
|
|
- render_target->impl.depthStencilDescriptorHeap->lpVtbl->Release(render_target->impl.depthStencilDescriptorHeap);
|
|
|
|
|
|
+ if (render_target->impl.depthTexture != NULL) {
|
|
|
|
+ render_target->impl.depthTexture->lpVtbl->Release(render_target->impl.depthTexture);
|
|
|
|
+ render_target->impl.depthDescriptorHeap->lpVtbl->Release(render_target->impl.depthDescriptorHeap);
|
|
render_target->impl.srvDepthDescriptorHeap->lpVtbl->Release(render_target->impl.srvDepthDescriptorHeap);
|
|
render_target->impl.srvDepthDescriptorHeap->lpVtbl->Release(render_target->impl.srvDepthDescriptorHeap);
|
|
}
|
|
}
|
|
if (render_target->impl.renderTargetReadback != NULL) {
|
|
if (render_target->impl.renderTargetReadback != NULL) {
|
|
@@ -1374,7 +1357,7 @@ static void render_target_init(iron_gpu_texture_t *render_target, int width, int
|
|
.Type = D3D12_DESCRIPTOR_HEAP_TYPE_DSV,
|
|
.Type = D3D12_DESCRIPTOR_HEAP_TYPE_DSV,
|
|
.Flags = D3D12_DESCRIPTOR_HEAP_FLAG_NONE,
|
|
.Flags = D3D12_DESCRIPTOR_HEAP_FLAG_NONE,
|
|
};
|
|
};
|
|
- device->lpVtbl->CreateDescriptorHeap(device, &dsvHeapDesc, &IID_ID3D12DescriptorHeap, &render_target->impl.depthStencilDescriptorHeap);
|
|
|
|
|
|
+ device->lpVtbl->CreateDescriptorHeap(device, &dsvHeapDesc, &IID_ID3D12DescriptorHeap, &render_target->impl.depthDescriptorHeap);
|
|
|
|
|
|
D3D12_RESOURCE_DESC depthTexture = {
|
|
D3D12_RESOURCE_DESC depthTexture = {
|
|
.Dimension = D3D12_RESOURCE_DIMENSION_TEXTURE2D,
|
|
.Dimension = D3D12_RESOURCE_DIMENSION_TEXTURE2D,
|
|
@@ -1405,12 +1388,12 @@ static void render_target_init(iron_gpu_texture_t *render_target, int width, int
|
|
};
|
|
};
|
|
|
|
|
|
HRESULT result = device->lpVtbl->CreateCommittedResource(device, &heapProperties, D3D12_HEAP_FLAG_NONE, &depthTexture, D3D12_RESOURCE_STATE_DEPTH_WRITE,
|
|
HRESULT result = device->lpVtbl->CreateCommittedResource(device, &heapProperties, D3D12_HEAP_FLAG_NONE, &depthTexture, D3D12_RESOURCE_STATE_DEPTH_WRITE,
|
|
- &clearValue, &IID_ID3D12Resource, &render_target->impl.depthStencilTexture);
|
|
|
|
|
|
+ &clearValue, &IID_ID3D12Resource, &render_target->impl.depthTexture);
|
|
if (result != S_OK) {
|
|
if (result != S_OK) {
|
|
for (int i = 0; i < 10; ++i) {
|
|
for (int i = 0; i < 10; ++i) {
|
|
iron_memory_emergency();
|
|
iron_memory_emergency();
|
|
result = device->lpVtbl->CreateCommittedResource(device, &heapProperties, D3D12_HEAP_FLAG_NONE, &depthTexture, D3D12_RESOURCE_STATE_DEPTH_WRITE,
|
|
result = device->lpVtbl->CreateCommittedResource(device, &heapProperties, D3D12_HEAP_FLAG_NONE, &depthTexture, D3D12_RESOURCE_STATE_DEPTH_WRITE,
|
|
- &clearValue, &IID_ID3D12Resource, &render_target->impl.depthStencilTexture);
|
|
|
|
|
|
+ &clearValue, &IID_ID3D12Resource, &render_target->impl.depthTexture);
|
|
if (result == S_OK) {
|
|
if (result == S_OK) {
|
|
break;
|
|
break;
|
|
}
|
|
}
|
|
@@ -1418,8 +1401,8 @@ static void render_target_init(iron_gpu_texture_t *render_target, int width, int
|
|
}
|
|
}
|
|
|
|
|
|
D3D12_CPU_DESCRIPTOR_HANDLE handle;
|
|
D3D12_CPU_DESCRIPTOR_HANDLE handle;
|
|
- render_target->impl.depthStencilDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(render_target->impl.depthStencilDescriptorHeap, &handle);
|
|
|
|
- device->lpVtbl->CreateDepthStencilView(device, render_target->impl.depthStencilTexture, NULL, handle);
|
|
|
|
|
|
+ render_target->impl.depthDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(render_target->impl.depthDescriptorHeap, &handle);
|
|
|
|
+ device->lpVtbl->CreateDepthStencilView(device, render_target->impl.depthTexture, NULL, handle);
|
|
|
|
|
|
// Reading depth texture as a shader resource
|
|
// Reading depth texture as a shader resource
|
|
D3D12_DESCRIPTOR_HEAP_DESC srvDepthHeapDesc = {
|
|
D3D12_DESCRIPTOR_HEAP_DESC srvDepthHeapDesc = {
|
|
@@ -1440,11 +1423,11 @@ static void render_target_init(iron_gpu_texture_t *render_target, int width, int
|
|
};
|
|
};
|
|
|
|
|
|
render_target->impl.srvDepthDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(render_target->impl.srvDepthDescriptorHeap, &handle);
|
|
render_target->impl.srvDepthDescriptorHeap->lpVtbl->GetCPUDescriptorHandleForHeapStart(render_target->impl.srvDepthDescriptorHeap, &handle);
|
|
- device->lpVtbl->CreateShaderResourceView(device, render_target->impl.depthStencilTexture, &srvDepthViewDesc, handle);
|
|
|
|
|
|
+ device->lpVtbl->CreateShaderResourceView(device, render_target->impl.depthTexture, &srvDepthViewDesc, handle);
|
|
}
|
|
}
|
|
else {
|
|
else {
|
|
- render_target->impl.depthStencilDescriptorHeap = NULL;
|
|
|
|
- render_target->impl.depthStencilTexture = NULL;
|
|
|
|
|
|
+ render_target->impl.depthDescriptorHeap = NULL;
|
|
|
|
+ render_target->impl.depthTexture = NULL;
|
|
render_target->impl.srvDepthDescriptorHeap = NULL;
|
|
render_target->impl.srvDepthDescriptorHeap = NULL;
|
|
}
|
|
}
|
|
|
|
|
|
@@ -1475,9 +1458,9 @@ void iron_gpu_render_target_init_framebuffer(iron_gpu_texture_t *target, int wid
|
|
}
|
|
}
|
|
|
|
|
|
void iron_gpu_render_target_set_depth_from(iron_gpu_texture_t *render_target, iron_gpu_texture_t *source) {
|
|
void iron_gpu_render_target_set_depth_from(iron_gpu_texture_t *render_target, iron_gpu_texture_t *source) {
|
|
- render_target->impl.depthStencilDescriptorHeap = source->impl.depthStencilDescriptorHeap;
|
|
|
|
|
|
+ render_target->impl.depthDescriptorHeap = source->impl.depthDescriptorHeap;
|
|
render_target->impl.srvDepthDescriptorHeap = source->impl.srvDepthDescriptorHeap;
|
|
render_target->impl.srvDepthDescriptorHeap = source->impl.srvDepthDescriptorHeap;
|
|
- render_target->impl.depthStencilTexture = source->impl.depthStencilTexture;
|
|
|
|
|
|
+ render_target->impl.depthTexture = source->impl.depthTexture;
|
|
}
|
|
}
|
|
|
|
|
|
void iron_gpu_vertex_buffer_init(iron_gpu_buffer_t *buffer, int count, iron_gpu_vertex_structure_t *structure, bool gpuMemory) {
|
|
void iron_gpu_vertex_buffer_init(iron_gpu_buffer_t *buffer, int count, iron_gpu_vertex_structure_t *structure, bool gpuMemory) {
|