+ Zb* cpu capabilities

compiler/riscv32/cpuinfo.pas

@@ -204,7 +204,13 @@ Const
       (CPURV_HAS_MUL,
        CPURV_HAS_ATOMIC,
        CPURV_HAS_COMPACT,
-       CPURV_HAS_16REGISTERS
+       CPURV_HAS_16REGISTERS,
+       CPURV_HAS_ZBA,
+       CPURV_HAS_ZBb,
+       CPURV_HAS_ZBC,
+       CPURV_HAS_ZBS,
+       CPURV_HAS_CSR_INSTRUCTIONS,   { extension Zicsr    }
+       CPURV_HAS_FETCH_FENCE         { extension Zifencei }
       );
 
  const

compiler/riscv64/cpuinfo.pas

@@ -123,6 +123,10 @@ Const
       (CPURV_HAS_MUL,
        CPURV_HAS_ATOMIC,
        CPURV_HAS_COMPACT,
+       CPURV_HAS_ZBA,
+       CPURV_HAS_ZBb,
+       CPURV_HAS_ZBC,
+       CPURV_HAS_ZBS,
        CPURV_HAS_CSR_INSTRUCTIONS,   { extension Zicsr    }
        CPURV_HAS_FETCH_FENCE         { extension Zifencei }
       );