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@@ -1417,22 +1417,27 @@ implementation
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if (torddef(rd).ordtype<>u64bit) then
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inserttypeconv(right,u64inttype);
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end
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- { 64 bit cpus do calculations always in 64 bit }
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-{$ifndef cpu64bitaddr}
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- { is there a cardinal? }
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- else if ((torddef(rd).ordtype=u32bit) or (torddef(ld).ordtype=u32bit)) then
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+ { is there a larger int? }
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+ else if is_oversizedint(rd) or is_oversizedint(ld) then
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+ begin
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+ nd:=get_common_intdef(torddef(ld),torddef(rd),false);
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+ inserttypeconv(right,nd);
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+ inserttypeconv(left,nd);
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+ end
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+ { is there a native unsigned int? }
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+ else if is_nativeuint(rd) or is_nativeuint(ld) then
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begin
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- { convert positive constants to u32bit }
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- if (torddef(ld).ordtype<>u32bit) and
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+ { convert positive constants to uinttype }
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+ if (not is_nativeuint(ld)) and
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is_constintnode(left) and
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(tordconstnode(left).value >= 0) then
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- inserttypeconv(left,u32inttype);
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- if (torddef(rd).ordtype<>u32bit) and
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+ inserttypeconv(left,uinttype);
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+ if (not is_nativeuint(rd)) and
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is_constintnode(right) and
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(tordconstnode(right).value >= 0) then
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- inserttypeconv(right,u32inttype);
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+ inserttypeconv(right,uinttype);
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{ when one of the operand is signed or the operation is subn then perform
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- the operation in 64bit, can't use rd/ld here because there
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+ the operation in a larger signed type, can't use rd/ld here because there
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could be already typeconvs inserted.
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This is compatible with the code below for other unsigned types (PFV) }
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if is_signed(left.resultdef) or
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@@ -1442,7 +1447,7 @@ implementation
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if nodetype<>subn then
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CGMessage(type_h_mixed_signed_unsigned);
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{ mark as internal in case added for a subn, so }
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- { ttypeconvnode.simplify can remove the 64 bit }
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+ { ttypeconvnode.simplify can remove the larger }
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{ typecast again if semantically correct. Even }
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{ if we could detect that here already, we }
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{ mustn't do it here because that would change }
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@@ -1452,80 +1457,19 @@ implementation
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not is_signed(right.resultdef)) or
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(nodetype in [orn,xorn]) then
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include(flags,nf_internal);
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- inserttypeconv(left,s64inttype);
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- inserttypeconv(right,s64inttype);
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- end
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- else
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- begin
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- if (torddef(left.resultdef).ordtype<>u32bit) then
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- inserttypeconv(left,u32inttype);
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- if (torddef(right.resultdef).ordtype<>u32bit) then
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- inserttypeconv(right,u32inttype);
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- end;
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- end
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-{$endif cpu64bitaddr}
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- { extra int handling for 16-bit and 8-bit cpus }
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-{$if defined(cpu16bitalu) or defined(cpu8bitalu)}
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- { is there a signed 32 bit type ? }
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- else if ((torddef(rd).ordtype=s32bit) or (torddef(ld).ordtype=s32bit)) then
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- begin
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- if (torddef(ld).ordtype<>s32bit) then
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- inserttypeconv(left,s32inttype);
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- if (torddef(rd).ordtype<>s32bit) then
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- inserttypeconv(right,s32inttype);
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- end
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- { is there a unsigned 32 bit type ? }
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- else if ((torddef(rd).ordtype=u32bit) or (torddef(ld).ordtype=u32bit)) then
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- begin
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- if (torddef(ld).ordtype<>u32bit) then
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- inserttypeconv(left,u32inttype);
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- if (torddef(rd).ordtype<>u32bit) then
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- inserttypeconv(right,u32inttype);
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- end
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- { is there a word? }
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- else if ((torddef(rd).ordtype=u16bit) or (torddef(ld).ordtype=u16bit)) then
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- begin
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- { convert positive constants to u16bit }
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- if (torddef(ld).ordtype<>u16bit) and
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- is_constintnode(left) and
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- (tordconstnode(left).value >= 0) then
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- inserttypeconv(left,u16inttype);
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- if (torddef(rd).ordtype<>u16bit) and
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- is_constintnode(right) and
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- (tordconstnode(right).value >= 0) then
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- inserttypeconv(right,u16inttype);
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- { When one of the operand is signed then perform
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- the operation in 32bit, can't use rd/ld here because there
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- could be already typeconvs inserted.
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- Note that on 16-bit CPUs subn between 2 unsigned ints isn't
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- extended to 32-bit. This is Borland Pascal 7 compatible. }
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- if is_signed(left.resultdef) or
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- is_signed(right.resultdef) then
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- begin
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- { TODO: add new hint message for mixing 16-bit signed and unsigned ints }
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-{ CGMessage(type_h_mixed_signed_unsigned);}
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-
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- { mark as internal in case added for a or/xor, so }
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- { ttypeconvnode.simplify can remove the 32 bit }
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- { typecast again if semantically correct. Even }
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- { if we could detect that here already, we }
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- { mustn't do it here because that would change }
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- { overload choosing behaviour etc. The code in }
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- { ncnv.pas is run after that is already decided }
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- if nodetype in [orn,xorn] then
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- include(flags,nf_internal);
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- inserttypeconv(left,s32inttype);
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- inserttypeconv(right,s32inttype);
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+ { get next larger signed int type }
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+ nd:=get_common_intdef(torddef(sinttype),torddef(uinttype),false);
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+ inserttypeconv(left,nd);
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+ inserttypeconv(right,nd);
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end
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else
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begin
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- if (torddef(left.resultdef).ordtype<>u16bit) then
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- inserttypeconv(left,u16inttype);
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- if (torddef(right.resultdef).ordtype<>u16bit) then
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- inserttypeconv(right,u16inttype);
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+ if not is_nativeuint(left.resultdef) then
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+ inserttypeconv(left,uinttype);
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+ if not is_nativeuint(right.resultdef) then
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+ inserttypeconv(right,uinttype);
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end;
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end
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-{$endif cpu16bitalu or cpu8bitalu}
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{ generic ord conversion is sinttype }
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else
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begin
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@@ -1536,15 +1480,8 @@ implementation
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is_signed(rd) or
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(nodetype=subn) then
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begin
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-{$ifdef cpunodefaultint}
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- { for small cpus we use the smallest common type }
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- nd:=get_common_intdef(torddef(ld),torddef(rd),false);
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- inserttypeconv(right,nd);
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- inserttypeconv(left,nd);
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-{$else cpunodefaultint}
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inserttypeconv(right,sinttype);
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inserttypeconv(left,sinttype);
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-{$endif cpunodefaultint}
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end
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else
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begin
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nickysn