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+ implemented code generation for 16-bit, 32-bit and 64-bit equal and unequal comparisons. </<=/>/>=
are still 8-bit only.

git-svn-id: branches/z80@44974 -

nickysn 5 years ago
parent
commit
08f02cfd87
1 changed files with 86 additions and 2 deletions
  1. 86 2
      compiler/z80/nz80add.pas

+ 86 - 2
compiler/z80/nz80add.pas

@@ -329,6 +329,8 @@ interface
         truelabel,
         falselabel: tasmlabel;
         unsigned  : boolean;
+        i, size: Integer;
+        tmpref: treference;
       begin
         truelabel:=nil;
         falselabel:=nil;
@@ -342,8 +344,90 @@ interface
         current_asmdata.getjumplabel(falselabel);
         location_reset_jump(location,truelabel,falselabel);
 
-        // todo: implement the rest
-        internalerror(2020041601);
+        size:=tcgsize2size[def_cgsize(left.resultdef)];
+
+        if NodeType in [equaln,unequaln] then
+          begin
+            if left.location.loc<>LOC_REGISTER then
+              hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
+
+            if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
+              begin
+                if is_ref_in_opertypes(right.location.reference,[OT_REF_IX_d,OT_REF_IY_d,OT_REF_HL]) then
+                  begin
+                    cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
+                    tmpref:=right.location.reference;
+                    for i:=0 to size-1 do
+                      begin
+                        cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_8,OS_8,tcgz80(cg).GetOffsetReg64(left.location.register,left.location.registerhi,i),NR_A);
+                        current_asmdata.CurrAsmList.Concat(taicpu.op_reg_ref(A_CP,NR_A,tmpref));
+                        case NodeType of
+                          equaln:
+                            cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,falselabel);
+                          unequaln:
+                            cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,falselabel);
+                          else
+                            internalerror(2020042102);
+                        end;
+                        if i<>(size-1) then
+                          tcgz80(cg).adjust_normalized_ref(current_asmdata.CurrAsmList,tmpref,1);
+                      end;
+                    cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
+                    cg.a_jmp_always(current_asmdata.CurrAsmList,truelabel);
+                  end
+                else
+                  hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,false);
+              end;
+            case right.location.loc of
+              LOC_CONSTANT:
+                begin
+                  cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
+                  for i:=0 to size-1 do
+                    begin
+                      cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_8,OS_8,tcgz80(cg).GetOffsetReg64(left.location.register,left.location.registerhi,i),NR_A);
+                      current_asmdata.CurrAsmList.Concat(taicpu.op_reg_const(A_CP,NR_A,byte(right.location.value shr (i*8))));
+                      case NodeType of
+                        equaln:
+                          cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,falselabel);
+                        unequaln:
+                          cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,falselabel);
+                        else
+                          internalerror(2020042102);
+                      end;
+                    end;
+                  cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
+                  cg.a_jmp_always(current_asmdata.CurrAsmList,truelabel);
+                end;
+              LOC_REGISTER,LOC_CREGISTER:
+                begin
+                  cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
+                  for i:=0 to size-1 do
+                    begin
+                      cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_8,OS_8,tcgz80(cg).GetOffsetReg64(left.location.register,left.location.registerhi,i),NR_A);
+                      current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg(A_CP,NR_A,tcgz80(cg).GetOffsetReg64(right.location.register,right.location.registerhi,i)));
+                      case NodeType of
+                        equaln:
+                          cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,falselabel);
+                        unequaln:
+                          cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,falselabel);
+                        else
+                          internalerror(2020042102);
+                      end;
+                    end;
+                  cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
+                  cg.a_jmp_always(current_asmdata.CurrAsmList,truelabel);
+                end;
+              LOC_REFERENCE,LOC_CREFERENCE:
+                begin
+                  { Already handled before the case statement. Nothing to do here. }
+                end;
+              else
+                internalerror(2020042103);
+            end;
+          end
+        else
+          // todo: implement the rest
+          internalerror(2020042104);
       end;