* R2 is a volatile and usable register under darwin/ppc64

  * R13 is a reserved non-volatile register under darwin/ppc64 (tls)

git-svn-id: branches/fpc_2_3@6473 -

compiler/powerpc64/cgcpu.pas

@@ -171,7 +171,7 @@ end;
 
 function cgsize2string(const size : TCgSize) : string;
 const
-  cgsize_strings : array[TCgSize] of string[7] = (
+  cgsize_strings : array[TCgSize] of string[8] = (
     'OS_NO', 'OS_8', 'OS_16', 'OS_32', 'OS_64', 'OS_128', 'OS_S8', 'OS_S16', 'OS_S32',
     'OS_S64', 'OS_S128', 'OS_F32', 'OS_F64', 'OS_F80', 'OS_C64', 'OS_F128',
     'OS_M8', 'OS_M16', 'OS_M32', 'OS_M64', 'OS_M128', 'OS_MS8', 'OS_MS16', 'OS_MS32',
@@ -394,12 +394,21 @@ end;
 procedure tcgppc.init_register_allocators;
 begin
   inherited init_register_allocators;
-  rg[R_INTREGISTER] := trgcpu.create(R_INTREGISTER, R_SUBWHOLE,
-    [RS_R3, RS_R4, RS_R5, RS_R6, RS_R7, RS_R8,
-      RS_R9, RS_R10, RS_R11, RS_R12, RS_R31, RS_R30, RS_R29,
-      RS_R28, RS_R27, RS_R26, RS_R25, RS_R24, RS_R23, RS_R22,
-      RS_R21, RS_R20, RS_R19, RS_R18, RS_R17, RS_R16, RS_R15,
-      RS_R14, RS_R13], first_int_imreg, []);
+  if (target_info.system <> system_powerpc64_darwin) then
+    rg[R_INTREGISTER] := trgcpu.create(R_INTREGISTER, R_SUBWHOLE,
+      [RS_R3, RS_R4, RS_R5, RS_R6, RS_R7, RS_R8,
+        RS_R9, RS_R10, RS_R11, RS_R12, RS_R31, RS_R30, RS_R29,
+        RS_R28, RS_R27, RS_R26, RS_R25, RS_R24, RS_R23, RS_R22,
+       RS_R21, RS_R20, RS_R19, RS_R18, RS_R17, RS_R16, RS_R15,
+       RS_R14, RS_R13], first_int_imreg, [])
+  else
+    { special for darwin/ppc64: r2 available volatile, r13 = tls }
+    rg[R_INTREGISTER] := trgcpu.create(R_INTREGISTER, R_SUBWHOLE,
+      [RS_R2, RS_R3, RS_R4, RS_R5, RS_R6, RS_R7, RS_R8,
+        RS_R9, RS_R10, RS_R11, RS_R12, RS_R31, RS_R30, RS_R29,
+        RS_R28, RS_R27, RS_R26, RS_R25, RS_R24, RS_R23, RS_R22,
+       RS_R21, RS_R20, RS_R19, RS_R18, RS_R17, RS_R16, RS_R15,
+       RS_R14], first_int_imreg, []);	
   rg[R_FPUREGISTER] := trgcpu.create(R_FPUREGISTER, R_SUBNONE,
     [RS_F0, RS_F1, RS_F2, RS_F3, RS_F4, RS_F5, RS_F6, RS_F7, RS_F8, RS_F9,
     RS_F10, RS_F11, RS_F12, RS_F13, RS_F31, RS_F30, RS_F29, RS_F28, RS_F27,

compiler/powerpc64/cpupara.pas

@@ -68,7 +68,9 @@ uses
 function tppcparamanager.get_volatile_registers_int(calloption:
   tproccalloption): tcpuregisterset;
 begin
-  result := [RS_R3..RS_R12];
+  result := [RS_R0,RS_R3..RS_R12];
+  if (target_info.system = system_powerpc64_darwin) then
+    include(result,RS_R2);
 end;
 
 function tppcparamanager.get_volatile_registers_fpu(calloption: