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Эх сурвалжийг харах

* more bitpacked fixes for 64-bit ALU, 32-bit address space

Nikolay Nikolov 5 өдөр өмнө
parent
commit
18492a4179
1 өөрчлөгдсөн 14 нэмэгдсэн , 14 устгасан
  1. 14 14
      compiler/hlcgobj.pas

+ 14 - 14
compiler/hlcgobj.pas

@@ -1552,8 +1552,8 @@ implementation
       loadbitsize:=loadsize.size*8;
       loadbitsize:=loadsize.size*8;
 
 
       { load the (first part) of the bit sequence }
       { load the (first part) of the bit sequence }
-      valuereg:=getintregister(list,osuinttype);
-      a_load_ref_reg(list,loadsize,osuinttype,sref.ref,valuereg);
+      valuereg:=getintregister(list,aluuinttype);
+      a_load_ref_reg(list,loadsize,aluuinttype,sref.ref,valuereg);
 
 
       if not extra_load then
       if not extra_load then
         begin
         begin
@@ -1562,7 +1562,7 @@ implementation
             begin
             begin
               { use subsetreg routine, it may have been overridden with an optimized version }
               { use subsetreg routine, it may have been overridden with an optimized version }
               tosreg.subsetreg:=valuereg;
               tosreg.subsetreg:=valuereg;
-              tosreg.subsetregsize:=def_cgsize(osuinttype);
+              tosreg.subsetregsize:=def_cgsize(aluuinttype);
               { subsetregs always count bits from right to left }
               { subsetregs always count bits from right to left }
               if (target_info.endian=endian_big) then
               if (target_info.endian=endian_big) then
                 tosreg.startbit:=loadbitsize-(sref.startbit+sref.bitlen)
                 tosreg.startbit:=loadbitsize-(sref.startbit+sref.bitlen)
@@ -1578,40 +1578,40 @@ implementation
                 internalerror(2006081510);
                 internalerror(2006081510);
               if (target_info.endian=endian_big) then
               if (target_info.endian=endian_big) then
                 begin
                 begin
-                  a_op_reg_reg(list,OP_SHL,osuinttype,sref.bitindexreg,valuereg);
+                  a_op_reg_reg(list,OP_SHL,aluuinttype,sref.bitindexreg,valuereg);
                   if is_signed(fromsubsetsize) then
                   if is_signed(fromsubsetsize) then
                     begin
                     begin
                       { sign extend to entire register }
                       { sign extend to entire register }
-                      a_op_const_reg(list,OP_SHL,osuinttype,AIntBits-loadbitsize,valuereg);
-                      a_op_const_reg(list,OP_SAR,osuinttype,AIntBits-sref.bitlen,valuereg);
+                      a_op_const_reg(list,OP_SHL,aluuinttype,AIntBits-loadbitsize,valuereg);
+                      a_op_const_reg(list,OP_SAR,aluuinttype,AIntBits-sref.bitlen,valuereg);
                     end
                     end
                   else
                   else
-                    a_op_const_reg(list,OP_SHR,osuinttype,loadbitsize-sref.bitlen,valuereg);
+                    a_op_const_reg(list,OP_SHR,aluuinttype,loadbitsize-sref.bitlen,valuereg);
                 end
                 end
               else
               else
                 begin
                 begin
-                  a_op_reg_reg(list,OP_SHR,osuinttype,sref.bitindexreg,valuereg);
+                  a_op_reg_reg(list,OP_SHR,aluuinttype,sref.bitindexreg,valuereg);
                   if is_signed(fromsubsetsize) then
                   if is_signed(fromsubsetsize) then
                     begin
                     begin
-                      a_op_const_reg(list,OP_SHL,osuinttype,AIntBits-sref.bitlen,valuereg);
-                      a_op_const_reg(list,OP_SAR,osuinttype,AIntBits-sref.bitlen,valuereg);
+                      a_op_const_reg(list,OP_SHL,aluuinttype,AIntBits-sref.bitlen,valuereg);
+                      a_op_const_reg(list,OP_SAR,aluuinttype,AIntBits-sref.bitlen,valuereg);
                     end
                     end
                 end;
                 end;
               { mask other bits/sign extend }
               { mask other bits/sign extend }
               if not is_signed(fromsubsetsize) then
               if not is_signed(fromsubsetsize) then
-                a_op_const_reg(list,OP_AND,osuinttype,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
+                a_op_const_reg(list,OP_AND,aluuinttype,tcgint((aword(1) shl sref.bitlen)-1),valuereg);
             end
             end
         end
         end
       else
       else
         begin
         begin
           { load next value as well }
           { load next value as well }
-          extra_value_reg:=getintregister(list,osuinttype);
+          extra_value_reg:=getintregister(list,aluuinttype);
 
 
           if (sref.bitindexreg=NR_NO) then
           if (sref.bitindexreg=NR_NO) then
             begin
             begin
               tmpref:=sref.ref;
               tmpref:=sref.ref;
               inc(tmpref.offset,loadbitsize div 8);
               inc(tmpref.offset,loadbitsize div 8);
-              a_load_ref_reg(list,loadsize,osuinttype,tmpref,extra_value_reg);
+              a_load_ref_reg(list,loadsize,aluuinttype,tmpref,extra_value_reg);
               { can be overridden to optimize }
               { can be overridden to optimize }
               a_load_subsetref_regs_noindex(list,fromsubsetsize,loadbitsize,sref,valuereg,extra_value_reg)
               a_load_subsetref_regs_noindex(list,fromsubsetsize,loadbitsize,sref,valuereg,extra_value_reg)
             end
             end
@@ -1633,7 +1633,7 @@ implementation
 {$else}
 {$else}
       { can't juggle with register sizes, they are actually typed entities
       { can't juggle with register sizes, they are actually typed entities
         here }
         here }
-      a_load_reg_reg(list,osuinttype,tosize,valuereg,destreg);
+      a_load_reg_reg(list,aluuinttype,tosize,valuereg,destreg);
 {$endif}
 {$endif}
     end;
     end;