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@@ -150,9 +150,13 @@ unit cgcpu;
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src, dst: TRegister);
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var
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op1, op2: TAsmOp;
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+ hl_skip, hl_loop_start: TAsmLabel;
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+ ai: taicpu;
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begin
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check_register_size(size,src);
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check_register_size(size,dst);
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+ if size in [OS_64, OS_S64] then
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+ internalerror(2013030902);
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if size in [OS_32, OS_S32] then
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begin
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case op of
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@@ -177,6 +181,49 @@ unit cgcpu;
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list.concat(taicpu.op_reg_reg(op1, S_W, src, dst));
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list.concat(taicpu.op_reg_reg(op2, S_W, GetNextReg(src), GetNextReg(dst)));
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end;
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+ OP_SHR,OP_SHL,OP_SAR:
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+ begin
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+ getcpuregister(list,NR_CX);
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+ a_load_reg_reg(list,size,OS_16,src,NR_CX);
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+ list.concat(taicpu.op_const_reg(A_AND,S_W,$1f,NR_CX));
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+
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+ current_asmdata.getjumplabel(hl_skip);
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+ ai:=Taicpu.Op_Sym(A_Jcc,S_NO,hl_skip);
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+ ai.SetCondition(C_Z);
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+ ai.is_jmp:=true;
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+ list.concat(ai);
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+
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+ current_asmdata.getjumplabel(hl_loop_start);
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+ a_label(list,hl_loop_start);
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+
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+ case op of
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+ OP_SHR:
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+ begin
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+ list.concat(taicpu.op_const_reg(A_SHR,S_W,1,GetNextReg(dst)));
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+ list.concat(taicpu.op_const_reg(A_RCR,S_W,1,dst));
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+ end;
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+ OP_SAR:
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+ begin
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+ list.concat(taicpu.op_const_reg(A_SAR,S_W,1,GetNextReg(dst)));
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+ list.concat(taicpu.op_const_reg(A_RCR,S_W,1,dst));
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+ end;
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+ OP_SHL:
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+ begin
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+ list.concat(taicpu.op_const_reg(A_SHL,S_W,1,dst));
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+ list.concat(taicpu.op_const_reg(A_RCL,S_W,1,GetNextReg(dst)));
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+ end;
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+ else
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+ internalerror(2013030903);
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+ end;
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+
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+ ai:=Taicpu.Op_Sym(A_LOOP,S_W,hl_loop_start);
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+ ai.is_jmp:=true;
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+ list.concat(ai);
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+
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+ a_label(list,hl_skip);
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+
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+ ungetcpuregister(list,NR_CX);
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+ end;
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else
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internalerror(2013030901);
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end;
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