* RiscV: get rid of ambiguous abi type abi_riscv_hf

  * RiscV: rewrote CPU and FPU type checking in options.pas

compiler/options.pas

@@ -5512,32 +5512,111 @@ begin
 
 {$if defined(riscv32) or defined(riscv64)}
   { RISC-V defaults }
-  if (target_info.abi = abi_riscv_hf) then
-    begin
-    {$ifdef riscv32}
-      if not option.CPUSetExplicitly then
-        init_settings.cputype:=cpu_rv32imafd;
-      if not option.OptCPUSetExplicitly then
-        init_settings.optimizecputype:=cpu_rv32imafd;
-    {$else}
-      if not option.CPUSetExplicitly then
-        init_settings.cputype:=cpu_rv64imafdc;
-      if not option.OptCPUSetExplicitly then
-        init_settings.optimizecputype:=cpu_rv64imafdc;
-    {$endif}
-
-      { Set FPU type }
-      if not(option.FPUSetExplicitly) then
-        init_settings.fputype:=fpu_fd
-      else
-        begin
-          if not (init_settings.fputype in [fpu_fd]) then
-            begin
-              Message(option_illegal_fpu_eabihf);
-              StopOptions(1);
-            end;
-        end;
-    end;
+  case target_info.abi of
+{$ifdef RISCV32}
+    abi_riscv_ilp32f:
+      begin
+        if not option.CPUSetExplicitly then
+          init_settings.cputype:=cpu_rv32imaf;
+        if not option.OptCPUSetExplicitly then
+          init_settings.optimizecputype:=cpu_rv32imaf;
+
+        { Set FPU type }
+        if not(option.FPUSetExplicitly) then
+          init_settings.fputype:=fpu_fd
+        else
+          begin
+            if not (init_settings.fputype in [fpu_fd]) then
+              begin
+                Message(option_illegal_fpu_eabihf);
+                StopOptions(1);
+              end;
+          end;
+      end;
+
+    abi_riscv_ilp32d:
+      begin
+        if not option.CPUSetExplicitly then
+          init_settings.cputype:=cpu_rv32imafd;
+        if not option.OptCPUSetExplicitly then
+          init_settings.optimizecputype:=cpu_rv32imafd;
+
+        { Set FPU type }
+        if not(option.FPUSetExplicitly) then
+          init_settings.fputype:=fpu_fd
+        else
+          begin
+            if not (init_settings.fputype in [fpu_fd]) then
+              begin
+                Message(option_illegal_fpu_eabihf);
+                StopOptions(1);
+              end;
+          end;
+      end;
+{$endif RISCV32}
+{$ifdef RISCV64}
+    abi_riscv_lp64f:
+      begin
+        if not option.CPUSetExplicitly then
+          init_settings.cputype:=cpu_rv64imafdc;
+        if not option.OptCPUSetExplicitly then
+          init_settings.optimizecputype:=cpu_rv64imafdc;
+
+        { Set FPU type }
+        if not(option.FPUSetExplicitly) then
+          init_settings.fputype:=fpu_fd
+        else
+          begin
+            if not (init_settings.fputype in [fpu_fd]) then
+              begin
+                Message(option_illegal_fpu_eabihf);
+                StopOptions(1);
+              end;
+          end;
+      end;
+
+    abi_riscv_lp64d:
+      begin
+        if not option.CPUSetExplicitly then
+          init_settings.cputype:=cpu_rv64imafdc;
+        if not option.OptCPUSetExplicitly then
+          init_settings.optimizecputype:=cpu_rv64imafdc;
+
+        { Set FPU type }
+        if not(option.FPUSetExplicitly) then
+          init_settings.fputype:=fpu_fd
+        else
+          begin
+            if not (init_settings.fputype in [fpu_fd]) then
+              begin
+                Message(option_illegal_fpu_eabihf);
+                StopOptions(1);
+              end;
+          end;
+      end;
+    abi_riscv_lp64q:
+      begin
+        if not option.CPUSetExplicitly then
+          init_settings.cputype:=cpu_rv64imafdc;
+        if not option.OptCPUSetExplicitly then
+          init_settings.optimizecputype:=cpu_rv64imafdc;
+
+        { Set FPU type }
+        if not(option.FPUSetExplicitly) then
+          init_settings.fputype:=fpu_fd
+        else
+          begin
+            if not (init_settings.fputype in [fpu_fd]) then
+              begin
+                Message(option_illegal_fpu_eabihf);
+                StopOptions(1);
+              end;
+          end;
+      end;
+{$endif RISCV64}
+    else
+      ;
+  end;
 
   { check if the fpu type requires the F and D extension }
   if (init_settings.fputype in [fpu_fd]) and not((cpu_capabilities[init_settings.cputype]*[CPURV_HAS_F,CPURV_HAS_D])=[CPURV_HAS_F,CPURV_HAS_D]) then

compiler/riscv/pararv.pas

@@ -139,7 +139,7 @@ implementation
     function trvparamanager.get_volatile_registers_fpu(calloption: tproccalloption): tcpuregisterset;
       begin
         result:=[RS_F0..RS_F31];
-        if target_info.abi in [abi_riscv_hf,abi_riscv_ilp32f,abi_riscv_ilp32d,abi_riscv_lp64f,abi_riscv_lp64d] then
+        if target_info.abi in [abi_riscv_ilp32f,abi_riscv_ilp32d,abi_riscv_lp64f,abi_riscv_lp64d] then
           result:=result-[RS_F8..RS_F9,RS_F18..RS_F27];
       end;
 
@@ -157,7 +157,7 @@ implementation
         saved_regs: tcpuregisterarray = (RS_F8,RS_F9,RS_F18,RS_F19,RS_F20,RS_F21,RS_F22,RS_F23,RS_F24,RS_F25,RS_F26,RS_F27);
         empty_regs: tcpuregisterarray = ();
       begin
-        if target_info.abi in [abi_riscv_hf,abi_riscv_ilp32f,abi_riscv_ilp32d,abi_riscv_lp64f,abi_riscv_lp64d] then
+        if target_info.abi in [abi_riscv_ilp32f,abi_riscv_ilp32d,abi_riscv_lp64f,abi_riscv_lp64d] then
           result:=saved_regs
         else
           result:=empty_regs;

compiler/systems.inc

@@ -385,7 +385,6 @@
             ,abi_eabi,abi_armeb,abi_eabihf
             ,abi_old_win32_gnu
             ,abi_aarch64_darwin
-            ,abi_riscv_hf
             ,abi_riscv_ilp32
             ,abi_riscv_ilp32f
             ,abi_riscv_ilp32d

compiler/systems.pas

@@ -504,7 +504,6 @@ interface
          (name: 'EABIHF' ; supported:{$if defined(arm)}true{$else}false{$endif}),
          (name: 'OLDWIN32GNU'; supported:{$ifdef I386}true{$else}false{$endif}),
          (name: 'AARCH64IOS'; supported:{$ifdef aarch64}true{$else}false{$endif}),
-         (name: 'RISCVHF'; supported:{$if defined(riscv32) or defined(riscv64)}true{$else}false{$endif}),
          (name: 'RISCV32ILP'; supported:{$if defined(riscv32)}true{$else}false{$endif}),
          (name: 'RISCV32ILPF'; supported:{$if defined(riscv32)}true{$else}false{$endif}),
          (name: 'RISCV32ILPD'; supported:{$if defined(riscv32)}true{$else}false{$endif}),

compiler/systems/i_linux.pas

@@ -1381,7 +1381,7 @@ unit i_linux;
             first_parm_offset : 16;
             stacksize    : 10*1024*1024;
             stackalign   : 16;
-            abi : abi_riscv_hf;
+            abi : abi_riscv_ilp32d;
             llvmdatalayout : 'E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:64:64-v128:128:128-n32:64';
           );
 

compiler/systems/t_linux.pas

@@ -308,7 +308,6 @@ begin
           defdynlinker:=defdynlinker_soft_float;
         abi_riscv_ilp32f:
           defdynlinker:=defdynlinker_single_float;
-        abi_riscv_hf,
         abi_riscv_ilp32d:
           defdynlinker:=defdynlinker_double_float;
       else
@@ -324,7 +323,6 @@ begin
           defdynlinker:=defdynlinker_soft_float;
         abi_riscv_lp64f:
           defdynlinker:=defdynlinker_single_float;
-        abi_riscv_hf,
         abi_riscv_lp64d:
           defdynlinker:=defdynlinker_double_float;
       else