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* another 64-bit ALU, 32-bit address fix in tcgvecnode.update_reference_reg_packed

Nikolay Nikolov 4 days ago
parent
5ce613e4dd
commit
2f36ba10f5
1 changed files with 1 additions and 1 deletions
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  1. 1 1
      compiler/ncgmem.pas

+ 1 - 1
compiler/ncgmem.pas
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@@ -730,7 +730,7 @@ implementation
 
            sref.bitindexreg:=hreg;
 
            sref.bitindexreg:=hreg;
 
 {$pop}
 
 {$pop}
 
 
 
-         hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,ossinttype,(1 shl (3+alignpower))-1,sref.bitindexreg);
 
+         hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,aluuinttype,(1 shl (3+alignpower))-1,sref.bitindexreg);
 
          sref.startbit := 0;
 
          sref.startbit := 0;
 
          sref.bitlen := resultdef.packedbitsize;
 
          sref.bitlen := resultdef.packedbitsize;
 
          if (left.location.loc = LOC_REFERENCE) then
 
          if (left.location.loc = LOC_REFERENCE) then