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* RefsHaveIndexReg -> cpurefshaveindexreg
* cpurefshaveindexreg defined properly in fpcdefs.inc

git-svn-id: trunk@20504 -

florian 13 năm trước cách đây
mục cha
commit
2f5ce095ce

+ 0 - 3
compiler/alpha/aoptcpub.pas

@@ -26,10 +26,7 @@ Unit aoptcpub; { Assembler OPTimizer CPU specific Base }
 { enable the following define if memory references can have both a base and }
 { index register in 1 operand                                               }
 
-{$define RefsHaveIndexReg}
-
 { enable the following define if memory references can have a scaled index }
-
 {$define RefsHaveScale}
 
 { enable the following define if memory references can have a segment }

+ 2 - 2
compiler/aoptbase.pas

@@ -138,9 +138,9 @@ unit aoptbase;
   Begin
     Reg := RegMaxSize(Reg);
     RegInRef := (Ref.Base = Reg)
-  {$ifdef RefsHaveIndexReg}
+  {$ifdef cpurefshaveindexreg}
     Or (Ref.Index = Reg)
-  {$endif RefsHaveIndexReg}
+  {$endif cpurefshaveindexreg}
   End;
 
   Function TAOptBase.RegModifiedByInstruction(Reg: TRegister; p1: tai): Boolean;

+ 8 - 8
compiler/aoptcs.pas

@@ -126,10 +126,10 @@ Begin
       Begin
         If OldOp.ref^.base <> R_NO Then
           AddReg(OldOp.ref^.base, NewOp.ref^.base);
-{$ifdef RefsHaveIndexReg}
+{$ifdef cpurefshaveindexreg}
         If OldOp.ref^.index <> R_NO Then
           AddReg(OldOp.ref^.index, NewOp.ref^.index);
-{$endif RefsHaveIndexReg}
+{$endif cpurefshaveindexreg}
       End;
   End;
 End;
@@ -184,9 +184,9 @@ Begin
     RefsEquivalent := (OldRef.Offset+OldRef.OffsetFixup =
                          NewRef.Offset+NewRef.OffsetFixup) And
                       RegsEquivalent(OldRef.Base, NewRef.Base, OpAct)
-{$ifdef RefsHaveindexReg}
+{$ifdef cpurefshaveindexreg}
                       And RegsEquivalent(OldRef.Index, NewRef.Index, OpAct)
-{$endif RefsHaveIndexReg}
+{$endif cpurefshaveindexreg}
 {$ifdef RefsHaveScale}
                       And (OldRef.ScaleFactor = NewRef.ScaleFactor)
 {$endif RefsHaveScale}
@@ -252,10 +252,10 @@ Begin
                     If Not(Base in [ProcInfo.FramePointer, R_NO, STACK_POINTER_REG])
 { it won't do any harm if the register is already in RegsLoadedForRef }
                       Then RegsLoadedForRef := RegsLoadedForRef + [Base];
-{$ifdef RefsHaveIndexReg}
+{$ifdef cpurefshaveindexreg}
                     If Not(Index in [ProcInfo.FramePointer, R_NO, STACK_POINTER_REG])
                       Then RegsLoadedForRef := RegsLoadedForRef + [Index];
-{$endif RefsHaveIndexReg}
+{$endif cpurefshaveindexreg}
                   End;
 { add the registers from the reference (.oper[Src]) to the RegInfo, all }
 { registers from the reference are the same in the old and in the new   }
@@ -290,7 +290,7 @@ Begin
                       Writeln(std_reg2str[base], ' added');
 {$endif csdebug}
                     end;
-{$Ifdef RefsHaveIndexReg}
+{$Ifdef cpurefshaveindexreg}
                 If Not(Index in [ProcInfo.FramePointer,
                                  RegMaxSize(PInstr(NewP)^.oper[LoadDst].reg),
                                  R_NO,StackPtr])
@@ -301,7 +301,7 @@ Begin
                       Writeln(std_reg2str[index], ' added');
 {$endif csdebug}
                     end;
-{$endif RefsHaveIndexReg}
+{$endif cpurefshaveindexreg}
               End;
 
 { now, remove the destination register of the load from the                 }

+ 8 - 8
compiler/aoptobj.pas

@@ -399,9 +399,9 @@ Unit AoptObj;
             If IsLoadMemReg(p) Then
               With PInstr(p)^.oper[LoadSrc]^.ref^ Do
                 If (Base = ProcInfo.FramePointer)
-      {$ifdef RefsHaveIndexReg}
+      {$ifdef cpurefshaveindexreg}
                    And (Index = R_NO)
-      {$endif RefsHaveIndexReg} Then
+      {$endif cpurefshaveindexreg} Then
                   Begin
                     RegsChecked := RegsChecked +
                       [RegMaxSize(PInstr(p)^.oper[LoadDst]^.reg)];
@@ -413,12 +413,12 @@ Unit AoptObj;
                     If (Base = Reg) And
                        Not(Base In RegsChecked)
                       Then TmpResult := True;
-      {$ifdef RefsHaveIndexReg}
+      {$ifdef cpurefshaveindexreg}
                     If Not(TmpResult) And
                        (Index = Reg) And
                          Not(Index In RegsChecked)
                       Then TmpResult := True;
-      {$Endif RefsHaveIndexReg}
+      {$Endif cpurefshaveindexreg}
                   End
             Else TmpResult := RegInInstruction(Reg, p);
             Inc(Counter);
@@ -487,9 +487,9 @@ Unit AoptObj;
             Assigned(Ref.Symbol) Then
           Begin
             If
-      {$ifdef refsHaveIndexReg}
+      {$ifdef cpurefshaveindexreg}
                (Ref.Index = R_NO) And
-      {$endif refsHaveIndexReg}
+      {$endif cpurefshaveindexreg}
                (Not(Assigned(Ref.Symbol)) or
                 (Ref.base = R_NO)) Then
         { local variable which is not an array }
@@ -599,10 +599,10 @@ Unit AoptObj;
       (*!!!!!!
         If Ref^.Base <> R_NO Then
           ReadReg(Ref^.Base);
-      {$ifdef refsHaveIndexReg}
+      {$ifdef cpurefshaveindexreg}
         If Ref^.Index <> R_NO Then
           ReadReg(Ref^.Index);
-      {$endif}
+      {$endif cpurefshaveindexreg}
       *)
       End;
 

+ 24 - 10
compiler/arm/aoptcpub.pas

@@ -28,10 +28,7 @@ Unit aoptcpub; { Assembler OPTimizer CPU specific Base }
 { enable the following define if memory references can have both a base and }
 { index register in 1 operand                                               }
 
-{$define RefsHaveIndexReg}
-
 { enable the following define if memory references can have a scaled index }
-
 { define RefsHaveScale}
 
 { enable the following define if memory references can have a segment }
@@ -42,6 +39,7 @@ Unit aoptcpub; { Assembler OPTimizer CPU specific Base }
 Interface
 
 Uses
+  cgbase,aasmtai,
   cpubase,aasmcpu,AOptBase;
 
 Type
@@ -64,6 +62,7 @@ Type
 { ************************************************************************* }
 
   TAoptBaseCpu = class(TAoptBase)
+    function RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean; override;
   End;
 
 
@@ -109,12 +108,27 @@ Implementation
 { ************************************************************************* }
 { **************************** TCondRegs ********************************** }
 { ************************************************************************* }
-Constructor TCondRegs.init;
-Begin
-End;
-
-Destructor TCondRegs.Done; {$ifdef inl} inline; {$endif inl}
-Begin
-End;
+  Constructor TCondRegs.init;
+    Begin
+    End;
+
+
+  Destructor TCondRegs.Done; {$ifdef inl} inline; {$endif inl}
+    Begin
+    End;
+
+
+  function TAoptBaseCpu.RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean;
+    var
+      i : Longint;
+    begin
+      result:=false;
+      for i:=0 to taicpu(p1).ops-1 do
+        if (taicpu(p1).oper[i]^.typ=top_reg) and (taicpu(p1).oper[i]^.reg=REg) and (taicpu(p1).spilling_get_operation_type(i) in [operand_write,operand_readwrite]) then
+          begin
+            result:=true;
+            exit;
+          end;
+    end;
 
 End.

+ 0 - 6
compiler/avr/aoptcpub.pas

@@ -25,13 +25,7 @@ Unit aoptcpub; { Assembler OPTimizer CPU specific Base }
 
 {$i fpcdefs.inc}
 
-{ enable the following define if memory references can have both a base and }
-{ index register in 1 operand                                               }
-
-{$define RefsHaveIndexReg}
-
 { enable the following define if memory references can have a scaled index }
-
 { define RefsHaveScale}
 
 { enable the following define if memory references can have a segment }

+ 9 - 0
compiler/fpcdefs.inc

@@ -72,6 +72,7 @@
   {$define cputargethasfixedstack}
   {$define cpumm}
   {$define cpurox}
+  {$define cpurefshaveindexreg}
 {$endif x86_64}
 
 {$ifdef ia64}
@@ -85,6 +86,7 @@
 {$ifdef alpha}
   {$define cpu64bitalu}
   {$define cpu64bitaddr}
+  {$define cpurefshaveindexreg}
 {$endif alpha}
 
 {$ifdef sparc}
@@ -93,6 +95,7 @@
   {$define cpu32bitalu}
   {$define cpuflags}
   {$define cputargethasfixedstack}
+  {$define cpurefshaveindexreg}
 {$endif sparc}
 
 {$ifdef powerpc}
@@ -103,6 +106,7 @@
   {$define cputargethasfixedstack}
   {$define cpumm}
   {$define cpurox}
+  {$define cpurefshaveindexreg}
 {$endif powerpc}
 
 {$ifdef powerpc64}
@@ -112,6 +116,7 @@
   {$define cputargethasfixedstack}
   {$define cpumm}
   {$define cpurox}
+  {$define cpurefshaveindexreg}
 {$endif powerpc64}
 
 {$ifdef arm}
@@ -123,6 +128,7 @@
   {$define cpuneedsdiv32helper}
   {$define cpurox}
   {$define cputargethasfixedstack}
+  {$define cpurefshaveindexreg}
   { default to armel }
   {$if not(defined(CPUARM)) and not(defined(CPUARMEB)) and not(defined(FPC_OARM)) and not(defined(FPC_ARMEB))}
     {$define FPC_ARMEL}
@@ -143,6 +149,7 @@
   {$define cpu32bitalu}
   {$define cpuflags}
   {$define cpufpemu}
+  {$define cpurefshaveindexreg}
 {$endif m68k}
 
 {$ifdef avr}
@@ -154,6 +161,7 @@
   {$define cpunodefaultint}
   {$define cpuneedsdiv32helper}
   {$define cpuneedsmulhelper}
+  {$define cpurefshaveindexreg}
 {$endif avr}
 
 {$ifdef mipsel}
@@ -168,6 +176,7 @@
   {$define cputargethasfixedstack}
   {$define cpurequiresproperalignment}
   { define cpumm}
+  {$define cpurefshaveindexreg}
 {$endif mips}
 
 {$IFDEF MACOS}

+ 0 - 5
compiler/m68k/aoptcpub.pas

@@ -25,11 +25,6 @@ Unit aoptcpub; { Assembler OPTimizer CPU specific Base }
 
 {$i fpcdefs.inc}
 
-{ enable the following define if memory references can have both a base and }
-{ index register in 1 operand                                               }
-
-{$define RefsHaveIndexReg}
-
 { enable the following define if memory references can have a scaled index }
 
 { define RefsHaveScale}

+ 0 - 7
compiler/mips/aoptcpub.pas

@@ -24,18 +24,11 @@ Unit aoptcpub; { Assembler OPTimizer CPU specific Base }
 
 {$i fpcdefs.inc}
 
-{ enable the following define if memory references can have both a base and }
-{ index register in 1 operand                                               }
-
-{$define RefsHaveIndexReg}
-
 { enable the following define if memory references can have a scaled index }
-
 { define RefsHaveScale}
 
 { enable the following define if memory references can have a segment }
 { override                                                            }
-
 { define RefsHaveSegment}
 
 Interface

+ 0 - 6
compiler/powerpc/aoptcpub.pas

@@ -25,18 +25,12 @@ Unit aoptcpub; { Assembler OPTimizer CPU specific Base }
 
 {$i fpcdefs.inc}
 
-{ enable the following define if memory references can have both a base and }
-{ index register in 1 operand                                               }
-
-{$define RefsHaveIndexReg}
 
 { enable the following define if memory references can have a scaled index }
-
 { define RefsHaveScale}
 
 { enable the following define if memory references can have a segment }
 { override                                                            }
-
 { define RefsHaveSegment}
 
 Interface

+ 0 - 7
compiler/powerpc64/aoptcpub.pas

@@ -25,18 +25,11 @@ unit aoptcpub; { Assembler OPTimizer CPU specific Base }
 
 {$I fpcdefs.inc}
 
-{ enable the following define if memory references can have both a base and }
-{ index register in 1 operand                                               }
-
-{$DEFINE RefsHaveIndexReg}
-
 { enable the following define if memory references can have a scaled index }
-
 { define RefsHaveScale}
 
 { enable the following define if memory references can have a segment }
 { override                                                            }
-
 { define RefsHaveSegment}
 
 interface

+ 0 - 7
compiler/sparc/aoptcpub.pas

@@ -25,18 +25,11 @@ Unit aoptcpub; { Assembler OPTimizer CPU specific Base }
 
 {$i fpcdefs.inc}
 
-{ enable the following define if memory references can have both a base and }
-{ index register in 1 operand                                               }
-
-{$define RefsHaveIndexReg}
-
 { enable the following define if memory references can have a scaled index }
-
 { define RefsHaveScale}
 
 { enable the following define if memory references can have a segment }
 { override                                                            }
-
 { define RefsHaveSegment}
 
 Interface

+ 0 - 7
compiler/x86_64/aoptcpub.pas

@@ -25,18 +25,11 @@ Unit aoptcpub; { Assembler OPTimizer CPU specific Base }
 
 {$i fpcdefs.inc}
 
-{ enable the following define if memory references can have both a base and }
-{ index register in 1 operand                                               }
-
-{$define RefsHaveIndexReg}
-
 { enable the following define if memory references can have a scaled index }
-
 { define RefsHaveScale}
 
 { enable the following define if memory references can have a segment }
 { override                                                            }
-
 { define RefsHaveSegment}
 
 Interface