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@@ -45,7 +45,8 @@ Implementation
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uses
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cpuinfo,
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aasmbase,aasmcpu,
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- globals,globtype;
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+ globals,globtype,
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+ cgutils;
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function CanBeCond(p : tai) : boolean;
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begin
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@@ -53,6 +54,41 @@ Implementation
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end;
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+ function RefsEqual(const r1, r2: treference): boolean;
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+ begin
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+ refsequal :=
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+ (r1.offset = r2.offset) and
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+ (r1.base = r2.base) and
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+ (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
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+ (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
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+ (r1.relsymbol = r2.relsymbol) and
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+ (r1.addressmode = r2.addressmode);
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+ end;
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+
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+
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+ function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
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+ begin
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+ result:=oper1.typ=oper2.typ;
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+
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+ if result then
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+ case oper1.typ of
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+ top_const:
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+ Result:=oper1.val = oper2.val;
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+ top_reg:
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+ Result:=oper1.reg = oper2.reg;
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+ top_ref:
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+ Result:=RefsEqual(oper1.ref^, oper2.ref^);
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+ else Result:=false;
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+ end
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+ end;
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+
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+
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+ function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
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+ begin
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+ result := (oper.typ = top_reg) and (oper.reg = reg);
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+ end;
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+
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+
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function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
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begin
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If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
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@@ -352,7 +388,26 @@ Implementation
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asml.remove(hp1);
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hp1.free;
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result:=true;
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- end;
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+ end
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+ {
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+ This removes the first mov from
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+ mov rX,...
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+ mov rX,...
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+ }
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+ else if taicpu(hp1).opcode=A_MOV then
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+ while (taicpu(hp1).opcode=A_MOV) and
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+ MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
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+ { don't remove the first mov if the second is a mov rX,rX }
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+ not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
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+ begin
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+ asml.remove(p);
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+ p.free;
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+ p:=hp1;
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+ GetNextInstruction(hp1,hp1);
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+ result:=true;
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+ if not assigned(hp1) then
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+ break;
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+ end;
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end;
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end;
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end;
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