* fix fpu register type

git-svn-id: trunk@20261 -

compiler/mips/itcpugas.pas

@@ -93,9 +93,4 @@ begin
 end;
 
 end.
-{
-  $Log: itcpugas.pas,v $
-  Revision 1.7  2005/02/14 17:13:10  peter
-    * truncate log
 
-}

compiler/mips/mipsreg.dat

@@ -39,38 +39,38 @@ R29,$01,$1d,sp,$29,29,29
 R30,$01,$1e,fp,$30,30,30
 R31,$01,$1f,$a,$31,31,31
 
-F0,$02,$00,F0,f0,32,32
-F1,$02,$01,F1,f1,33,33
-F2,$02,$02,F2,f2,34,34
-F3,$02,$03,F3,f3,35,35
-F4,$02,$04,F4,f4,36,36
-F5,$02,$05,F5,f5,37,37
+F0,$02,$06,F0,f0,32,32
+F1,$02,$06,F1,f1,33,33
+F2,$02,$06,F2,f2,34,34
+F3,$02,$06,F3,f3,35,35
+F4,$02,$06,F4,f4,36,36
+F5,$02,$06,F5,f5,37,37
 F6,$02,$06,F6,f6,38,38
-F7,$02,$07,F7,f7,39,39
-F8,$02,$08,F8,f8,40,40
-F9,$02,$09,F9,f9,41,41
-F10,$02,$0a,F10,f10,42,42
-F11,$02,$0b,F11,f11,43,43
-F12,$02,$0c,F12,f12,44,44
-F13,$02,$0d,F13,f13,45,45
-F14,$02,$0e,F14,f14,46,46
-F15,$02,$0f,F15,f15,47,47
-F16,$02,$10,F16,f16,48,48
-F17,$02,$11,F17,f17,49,49
-F18,$02,$12,F18,f18,50,50
-F19,$02,$13,F19,f19,51,51
-F20,$02,$14,F20,f20,52,52
-F21,$02,$15,F21,f21,53,53
-F22,$02,$16,F22,f22,54,54
-F23,$02,$17,F23,f23,55,55
-F24,$02,$18,F24,f24,56,56
-F25,$02,$19,F25,f25,57,57
-F26,$02,$1a,F26,f26,58,58
-F27,$02,$1b,F27,f27,59,59
-F28,$02,$1c,F28,f28,60,60
-F29,$02,$1d,F29,f29,61,61
-F30,$02,$1e,F30,f30,62,62
-F31,$02,$1f,F31,f31,63,63
+F7,$02,$06,F7,f7,39,39
+F8,$02,$06,F8,f8,40,40
+F9,$02,$06,F9,f9,41,41
+F10,$02,$06,F10,f10,42,42
+F11,$02,$06,F11,f11,43,43
+F12,$02,$06,F12,f12,44,44
+F13,$02,$06,F13,f13,45,45
+F14,$02,$06,F14,f14,46,46
+F15,$02,$06,F15,f15,47,47
+F16,$02,$06,F16,f16,48,48
+F17,$02,$06,F17,f17,49,49
+F18,$02,$06,F18,f18,50,50
+F19,$02,$06,F19,f19,51,51
+F20,$02,$06,F20,f20,52,52
+F21,$02,$06,F21,f21,53,53
+F22,$02,$06,F22,f22,54,54
+F23,$02,$06,F23,f23,55,55
+F24,$02,$06,F24,f24,56,56
+F25,$02,$06,F25,f25,57,57
+F26,$02,$06,F26,f26,58,58
+F27,$02,$06,F27,f27,59,59
+F28,$02,$06,F28,f28,60,60
+F29,$02,$06,F29,f29,61,61
+F30,$02,$06,F30,f30,62,62
+F31,$02,$06,F31,f31,63,63
 
 PC,$05,$00,PC,pc,-1,-1
 HI,$05,$01,HI,hi,68,68

compiler/mips/rmipscon.inc

@@ -32,38 +32,38 @@ NR_R28 = tregister($0100001c);
 NR_R29 = tregister($0100001d);
 NR_R30 = tregister($0100001e);
 NR_R31 = tregister($0100001f);
-NR_F0 = tregister($02000000);
-NR_F1 = tregister($02000001);
-NR_F2 = tregister($02000002);
-NR_F3 = tregister($02000003);
-NR_F4 = tregister($02000004);
-NR_F5 = tregister($02000005);
+NR_F0 = tregister($02000006);
+NR_F1 = tregister($02000006);
+NR_F2 = tregister($02000006);
+NR_F3 = tregister($02000006);
+NR_F4 = tregister($02000006);
+NR_F5 = tregister($02000006);
 NR_F6 = tregister($02000006);
-NR_F7 = tregister($02000007);
-NR_F8 = tregister($02000008);
-NR_F9 = tregister($02000009);
-NR_F10 = tregister($0200000a);
-NR_F11 = tregister($0200000b);
-NR_F12 = tregister($0200000c);
-NR_F13 = tregister($0200000d);
-NR_F14 = tregister($0200000e);
-NR_F15 = tregister($0200000f);
-NR_F16 = tregister($02000010);
-NR_F17 = tregister($02000011);
-NR_F18 = tregister($02000012);
-NR_F19 = tregister($02000013);
-NR_F20 = tregister($02000014);
-NR_F21 = tregister($02000015);
-NR_F22 = tregister($02000016);
-NR_F23 = tregister($02000017);
-NR_F24 = tregister($02000018);
-NR_F25 = tregister($02000019);
-NR_F26 = tregister($0200001a);
-NR_F27 = tregister($0200001b);
-NR_F28 = tregister($0200001c);
-NR_F29 = tregister($0200001d);
-NR_F30 = tregister($0200001e);
-NR_F31 = tregister($0200001f);
+NR_F7 = tregister($02000006);
+NR_F8 = tregister($02000006);
+NR_F9 = tregister($02000006);
+NR_F10 = tregister($02000006);
+NR_F11 = tregister($02000006);
+NR_F12 = tregister($02000006);
+NR_F13 = tregister($02000006);
+NR_F14 = tregister($02000006);
+NR_F15 = tregister($02000006);
+NR_F16 = tregister($02000006);
+NR_F17 = tregister($02000006);
+NR_F18 = tregister($02000006);
+NR_F19 = tregister($02000006);
+NR_F20 = tregister($02000006);
+NR_F21 = tregister($02000006);
+NR_F22 = tregister($02000006);
+NR_F23 = tregister($02000006);
+NR_F24 = tregister($02000006);
+NR_F25 = tregister($02000006);
+NR_F26 = tregister($02000006);
+NR_F27 = tregister($02000006);
+NR_F28 = tregister($02000006);
+NR_F29 = tregister($02000006);
+NR_F30 = tregister($02000006);
+NR_F31 = tregister($02000006);
 NR_PC = tregister($05000000);
 NR_HI = tregister($05000001);
 NR_LO = tregister($05000002);

compiler/mips/rmipsnum.inc

@@ -32,38 +32,38 @@ tregister($0100001c),
 tregister($0100001d),
 tregister($0100001e),
 tregister($0100001f),
-tregister($02000000),
-tregister($02000001),
-tregister($02000002),
-tregister($02000003),
-tregister($02000004),
-tregister($02000005),
-tregister($02000006),
-tregister($02000007),
-tregister($02000008),
-tregister($02000009),
-tregister($0200000a),
-tregister($0200000b),
-tregister($0200000c),
-tregister($0200000d),
-tregister($0200000e),
-tregister($0200000f),
-tregister($02000010),
-tregister($02000011),
-tregister($02000012),
-tregister($02000013),
-tregister($02000014),
-tregister($02000015),
-tregister($02000016),
-tregister($02000017),
-tregister($02000018),
-tregister($02000019),
-tregister($0200001a),
-tregister($0200001b),
-tregister($0200001c),
-tregister($0200001d),
-tregister($0200001e),
-tregister($0200001f),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
+tregister($02000006),
 tregister($05000000),
 tregister($05000001),
 tregister($05000002),

compiler/mips/rmipssup.inc

@@ -32,38 +32,38 @@ RS_R28 = $1c;
 RS_R29 = $1d;
 RS_R30 = $1e;
 RS_R31 = $1f;
-RS_F0 = $00;
-RS_F1 = $01;
-RS_F2 = $02;
-RS_F3 = $03;
-RS_F4 = $04;
-RS_F5 = $05;
+RS_F0 = $06;
+RS_F1 = $06;
+RS_F2 = $06;
+RS_F3 = $06;
+RS_F4 = $06;
+RS_F5 = $06;
 RS_F6 = $06;
-RS_F7 = $07;
-RS_F8 = $08;
-RS_F9 = $09;
-RS_F10 = $0a;
-RS_F11 = $0b;
-RS_F12 = $0c;
-RS_F13 = $0d;
-RS_F14 = $0e;
-RS_F15 = $0f;
-RS_F16 = $10;
-RS_F17 = $11;
-RS_F18 = $12;
-RS_F19 = $13;
-RS_F20 = $14;
-RS_F21 = $15;
-RS_F22 = $16;
-RS_F23 = $17;
-RS_F24 = $18;
-RS_F25 = $19;
-RS_F26 = $1a;
-RS_F27 = $1b;
-RS_F28 = $1c;
-RS_F29 = $1d;
-RS_F30 = $1e;
-RS_F31 = $1f;
+RS_F7 = $06;
+RS_F8 = $06;
+RS_F9 = $06;
+RS_F10 = $06;
+RS_F11 = $06;
+RS_F12 = $06;
+RS_F13 = $06;
+RS_F14 = $06;
+RS_F15 = $06;
+RS_F16 = $06;
+RS_F17 = $06;
+RS_F18 = $06;
+RS_F19 = $06;
+RS_F20 = $06;
+RS_F21 = $06;
+RS_F22 = $06;
+RS_F23 = $06;
+RS_F24 = $06;
+RS_F25 = $06;
+RS_F26 = $06;
+RS_F27 = $06;
+RS_F28 = $06;
+RS_F29 = $06;
+RS_F30 = $06;
+RS_F31 = $06;
 RS_PC = $00;
 RS_HI = $01;
 RS_LO = $02;