Mass typo fixes in comments for compiler.

compiler/aarch64/aasmcpu.pas

@@ -819,7 +819,7 @@ implementation
         { base + immediate offset. Variants:
             * LDR*/STR*:
               - pre- or post-indexed with signed 9 bit immediate
-              - regular with unsiged scaled immediate (multiple of access
+              - regular with unsigned scaled immediate (multiple of access
                 size), in the range 0 to (12 bit * access_size)-1
             * LDP/STP
               - pre- or post-indexed with signed 9 bit immediate
@@ -859,7 +859,7 @@ implementation
                   { only supported for 32/64 bit }
                   if not(oppostfix in [PF_W,PF_SW,PF_None]) then
                     exit;
-                  { offset must be a multple of the access size }
+                  { offset must be a multiple of the access size }
                   if (ref.offset mod accesssize)<>0 then
                     exit;
                   { offset must fit in a signed 7 bit offset }

compiler/aarch64/aoptcpu.pas

@@ -301,7 +301,7 @@ Implementation
          ) and
          (taicpu(movp).ops=2) and
          MatchOperand(taicpu(movp).oper[1]^, taicpu(p).oper[0]^.reg) and
-         { the destination register of the mov might not be used beween p and movp }
+         { the destination register of the mov might not be used between p and movp }
          not(RegUsedBetween(taicpu(movp).oper[0]^.reg,p,movp)) and
          { Take care to only do this for instructions which REALLY load to the first register.
            Otherwise
@@ -420,7 +420,7 @@ Implementation
          (taicpu(hp1).oper[0]^.reg<>NR_SP) and
          (taicpu(hp1).oper[1]^.reg<>NR_SP) and
          (taicpu(hp1).oper[taicpu(hp1).ops-1]^.reg<>NR_SP) and
-         { reg1 might not be modified inbetween }
+         { reg1 might not be modified in between }
          not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
          (
            { Only ONE of the two src operands is allowed to match }
@@ -872,7 +872,7 @@ Implementation
             RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
             { the reference in strb might not use reg2 }
             not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and
-            { reg1 might not be modified inbetween }
+            { reg1 might not be modified in between }
             not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
             begin
               DebugMsg('Peephole SXTHStr2Str done', p);
@@ -893,7 +893,7 @@ Implementation
             (taicpu(hp1).ops=2) and
             MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
             RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-            { reg1 might not be modified inbetween }
+            { reg1 might not be modified in between }
             not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
             begin
               DebugMsg('Peephole SxtwSxtw2Sxtw done', p);

compiler/aarch64/cgcpu.pas

@@ -149,7 +149,7 @@ implementation
             ref.base:=ref.index;
             ref.index:=NR_NO;
           end;
-        { no abitrary scale factor support (the generic code doesn't set it,
+        { no arbitrary scale factor support (the generic code doesn't set it,
           AArch-specific code shouldn't either) }
         if not(ref.scalefactor in [0,1]) then
           internalerror(2014111002);
@@ -372,7 +372,7 @@ implementation
                           begin
                             if preferred_newbasereg=NR_NO then
                               preferred_newbasereg:=getaddressregister(list);
-                            { can we split the offset beween an
+                            { can we split the offset between an
                               "add/sub (imm12 shl 12)" and the load (also an
                               imm12)?
                               -- the offset from the load will always be added,
@@ -1638,7 +1638,7 @@ implementation
 
 
 
-  {*************** compare instructructions ****************}
+  {*************** compare instructions ****************}
 
     procedure tcgaarch64.a_cmp_const_reg_label(list: TAsmList; size: tcgsize; cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel);
       var

compiler/aarch64/cpubase.pas

@@ -653,7 +653,7 @@ unit cpubase;
                 checkpattern:=pattern;
                 while replicatedlen<maxbits do
                   begin
-                    { douplicate current pattern }
+                    { duplicate current pattern }
                     checkpattern:=checkpattern or (checkpattern shl replicatedlen);
                     replicatedlen:=replicatedlen*2;
                   end;

compiler/aarch64/cpupara.pas

@@ -312,7 +312,7 @@ unit cpupara;
            bits filled with unspecified values."
 
            Therefore at caller side force the ordinal result to be always 64-bit, so it
-           will be stripped to the required size and uneeded bits are discarded.
+           will be stripped to the required size and unneeded bits are discarded.
 
            According to Jonas iOS doesn't zero extend results in the callee either
          }

compiler/aarch64/ncpuadd.pas

@@ -489,7 +489,7 @@ interface
     function taarch64addnode.pass_1: tnode;
       begin
         Result:=inherited pass_1;
-        { if the result is not nil, a new node has been generated and the current node will be discarted }
+        { if the result is not nil, a new node has been generated and the current node will be discarded }
         if Result=nil then
           begin
             if left.resultdef.typ=floatdef then

compiler/aarch64/ncpuflw.pas

@@ -412,7 +412,7 @@ procedure taarch64tryexceptnode.pass_generate_code;
     breakexceptlabel:=nil;
 
     include(flowcontrol,fc_inflowcontrol);
-    { this can be called recursivly }
+    { this can be called recursively }
     oldBreakLabel:=nil;
     oldContinueLabel:=nil;
     oldendexceptlabel:=endexceptlabel;

compiler/aarch64/ncpuset.pas

@@ -94,7 +94,7 @@ implementation
                    cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opcgsize, OC_EQ,0,hregister,blocklabel(t^.blockid))
                  else
                    begin
-                     { use unsigned_opcgsize here to avoid uncessary sign extensions, at this place hregister will never be negative, because
+                     { use unsigned_opcgsize here to avoid unnecessary sign extensions, at this place hregister will never be negative, because
                        then genlinearlist wouldn't be used }
                      cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList, OP_SUB, unsigned_opcgsize, aint(t^._low.svalue-last.svalue), hregister, hregister,
                        true,ovloc);
@@ -113,7 +113,7 @@ implementation
                       { have we to adjust the first value ? }
                       if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
                         begin
-                          { use unsigned_opcgsize here to avoid uncessary sign extensions, at this place hregister will never be negative, because
+                          { use unsigned_opcgsize here to avoid unnecessary sign extensions, at this place hregister will never be negative, because
                             then genlinearlist wouldn't be use }
                           cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList, OP_SUB, unsigned_opcgsize, aint(t^._low.svalue), hregister, hregister,
                             true,ovloc);
@@ -125,7 +125,7 @@ implementation
                      { present label then the lower limit can be checked    }
                      { immediately. else check the range in between:       }
 
-                     { use unsigned_opcgsize here to avoid uncessary sign extensions, at this place hregister will never be negative, because
+                     { use unsigned_opcgsize here to avoid unnecessary sign extensions, at this place hregister will never be negative, because
                        then genlinearlist wouldn't be use }
                      cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList, OP_SUB, unsigned_opcgsize, aint(t^._low.svalue - last.svalue), hregister, hregister,
                        true,ovloc);
@@ -135,7 +135,7 @@ implementation
                         (not lastrange) then
                        cg.a_jmp_flags(current_asmdata.CurrAsmList,cond_lt,elselabel);
                    end;
-                 { use unsigned_opcgsize here to avoid uncessary sign extensions, at this place hregister will never be negative, because
+                 { use unsigned_opcgsize here to avoid unnecessary sign extensions, at this place hregister will never be negative, because
                    then genlinearlist wouldn't be use }
                  cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,unsigned_opcgsize,aint(t^._high.svalue - t^._low.svalue), hregister, hregister,
                    true,ovloc);

compiler/aarch64/racpugas.pas

@@ -485,7 +485,7 @@ Unit racpugas;
                   exit;
                 end;
               else
-                begin // elsecase
+                begin // else case
                   Message(asmr_e_invalid_reference_syntax);
                   RecoverConsume(false);
                   exit;

compiler/aasmbase.pas

@@ -60,7 +60,7 @@ interface
          { Label for debug or other non-program information }
          AT_METADATA,
          { label for data that must always be accessed indirectly, because it
-           is handled explcitely in the system unit or (e.g. RTTI and threadvar
+           is handled explicitly in the system unit or (e.g. RTTI and threadvar
            tables) -- never seen in an assembler/assembler writer, always
            changed to AT_DATA }
          AT_DATA_FORCEINDIRECT,
@@ -260,7 +260,7 @@ interface
 
     type
       { Procedure variable to allow for special handling of
-        the occurence of use of a global variable,
+        the occurrence of use of a global variable,
         used by PIC code generation to request GOT loading }
       TGlobalUsedProcedure = procedure;
 

compiler/aasmcnst.pas

@@ -305,7 +305,7 @@ type
      destructor destroy; override;
 
     public
-     { returns a builder for generating data that is only referrenced by the
+     { returns a builder for generating data that is only referenced by the
        typed constant date we are currently generating (e.g. string data for a
        pchar constant). Also returns the label that will be placed at the start
        of that data. list is the tasmlist to which the data will be added.
@@ -472,7 +472,7 @@ type
        supported this is equal to the header size }
      class function get_string_symofs(typ: tstringtype; winlikewidestring: boolean): pint; virtual;
 
-     { returns the offset of the array data relatve to dynamic array constant
+     { returns the offset of the array data relative to dynamic array constant
        labels. On most platforms, this is 0 (with the header at a negative
        offset), but on some platforms such negative offsets are not supported
        and thus this is equal to the header size }

compiler/aasmdata.pas

@@ -155,13 +155,13 @@ interface
          procedure insertListBefore(Item:TLinkedListItem;p : TLinkedList); override;
          { inserts another List after the provided item and make this List empty }
          procedure insertListAfter(Item:TLinkedListItem;p : TLinkedList); override;
-         { concats another List at the end and make this List empty }
+         { concatenate another List at the end and make this List empty }
          procedure concatList(p : TLinkedList); override;
-         { concats another List at the start and makes a copy
+         { concatenate another List at the start and makes a copy
            the list is ordered in reverse.
          }
          procedure insertListcopy(p : TLinkedList); override;
-         { concats another List at the end and makes a copy }
+         { concatenate another List at the end and makes a copy }
          procedure concatListcopy(p : TLinkedList); override;
          { removes all items from the list, the items are not freed }
          procedure RemoveAll; override;

compiler/aasmtai.pas

@@ -89,7 +89,7 @@ interface
           ait_llvmdecl, { llvm symbol declaration (global/external variable, external procdef) }
           ait_llvmmetadatanode, (* llvm metadata node: !id = !{type value, ...} *)
           ait_llvmmetadatareftypedconst, { reference to metadata inside a metadata constant }
-          ait_llvmmetadatarefoperand, { llvm metadata referece: !metadataname !id }
+          ait_llvmmetadatarefoperand, { llvm metadata reference: !metadataname !id }
 {$endif}
 {$ifdef wasm}
           ait_export_name,
@@ -712,7 +712,7 @@ interface
        end;
 
 
-       { Generates an uninitializised data block }
+       { Generates an uninitialized data block }
        tai_datablock = class(tailineinfo)
           is_global : boolean;
           sym       : tasmsymbol;

compiler/aggas.pas

@@ -398,7 +398,7 @@ implementation
             end;
           end;
 
-        { section type user gives the user full controll on the section name }
+        { section type user gives the user full control on the section name }
         if atype=sec_user then
           secname:=aname;
 
@@ -519,7 +519,7 @@ implementation
          system_i386_OS2,
          system_i386_EMX: ;
          system_m68k_atari, { atari tos/mint GNU AS also doesn't seem to like .section (KB) }
-         system_m68k_amiga, { amiga has old GNU AS (2.14), which blews up from .section (KB) }
+         system_m68k_amiga, { amiga has old GNU AS (2.14), which blows up from .section (KB) }
          system_m68k_sinclairql, { same story, only ancient GNU tools available (KB) }
          system_m68k_palmos, { see above... (KB) }
          system_m68k_human68k: { see above... (KB) }
@@ -1355,7 +1355,7 @@ implementation
                          writer.AsmWriteln(tai_label(hp).labsym.name);
                        end;
 {$ifdef arm}
-                     { do no change arm mode accidently, .globl seems to reset the mode }
+                     { do no change arm mode accidentally, .globl seems to reset the mode }
                      if GenerateThumbCode or GenerateThumb2Code then
                        writer.AsmWriteln(#9'.thumb_func'#9);
 {$endif arm}

compiler/aopt.pas

@@ -40,7 +40,7 @@ Unit aopt;
           future register usage without upsetting the current state. }
         TmpUsedRegs: TAllUsedRegs;
 
-        { _AsmL is the PAasmOutpout list that has to be optimized }
+        { _AsmL is the PAasmOutput list that has to be optimized }
         Constructor create(_AsmL: TAsmList); virtual; reintroduce;
 
         { call the necessary optimizer procedures }
@@ -60,7 +60,7 @@ Unit aopt;
       TAsmOptimizerClass = class of TAsmOptimizer;
 
       TAsmScheduler = class(TAoptObj)
-        { _AsmL is the PAasmOutpout list that has to be re-scheduled }
+        { _AsmL is the PAasmOutput list that has to be re-scheduled }
         Constructor Create(_AsmL: TAsmList); virtual; reintroduce;
         Procedure Optimize;
         function SchedulerPass1Cpu(var p: tai): boolean; virtual; abstract;
@@ -205,7 +205,7 @@ Unit aopt;
                             AsmL.Remove(p);
                             InsertLLItem(hp2, tai(hp2.Next), p);
                             { don't remove this deallocation later on when merging dealloc/alloc pairs because
-                              it marks indenpendent use of a register
+                              it marks independent use of a register
 
                               This could be also achieved by a separate passes for merging first and then later
                               moving but I did not choose this solution because it takes more time and code (FK) }

compiler/aoptbase.pas

@@ -77,7 +77,7 @@ unit aoptbase;
         { returns the maximum width component of Reg. Only has to be }
         { overridden for the 80x86 (afaik)                           }
         Function RegMaxSize(Reg: TRegister): TRegister; Virtual;
-        { returns true if Reg1 and Reg2 are of the samae width. Only has to }
+        { returns true if Reg1 and Reg2 are of the same width. Only has to  }
         { overridden for the 80x86 (afaik)                                  }
         Function RegsSameSize(Reg1, Reg2: TRegister): Boolean; Virtual;
         { returns whether P is a load instruction (load contents from a }

compiler/aoptda.pas

@@ -44,7 +44,7 @@ Unit aoptda;
         { at the end of every instruction                                  }
         Procedure DoDFA;
 
-        { handles the processor dependent dataflow analizing               }
+        { handles the processor dependent dataflow analyzing               }
         Procedure CpuDFA(p: PInstr); Virtual; Abstract;
 
         { convert a TInsChange value into the corresponding register }
@@ -75,7 +75,7 @@ Unit aoptda;
       UsedRegs.Create;
       UsedRegs.Update(p);
       NewBlockStart := SkipHead(p);
-      { done implicitely by the constructor
+      { done implicitly by the constructor
       FillChar(InstrSinceLastMod, SizeOf(InstrSinceLastMod), 0); }
       While (P <> BlockEnd) Do
         Begin

compiler/aoptobj.pas

@@ -73,7 +73,7 @@ Unit AoptObj;
       TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
 
     { ************************************************************************* }
-    { * Object to hold information on which regiters are in use and which not * }
+    { * Object to hold information on which registers are in use and which not *}
     { ************************************************************************* }
 
       { TUsedRegs }
@@ -114,10 +114,10 @@ Unit AoptObj;
         { content of this register. If Typ = con_const, then   }
         { Longint(StartMod) = value of the constant)           }
         StartMod: Tai;
-        { starts at 0, gets increased everytime the register is }
+        { starts at 0, gets increased every time the register is}
         { written to                                            }
         WState: TStateInt;
-        { starts at 0, gets increased everytime the register is read }
+        { starts at 0, gets increased every time the register is read}
         { from                                                       }
         RState: TStateInt;
         { how many instructions starting with StarMod does the block }
@@ -262,7 +262,7 @@ Unit AoptObj;
 
         UsedRegs: TAllUsedRegs;
 
-        { _AsmL is the PAasmOutpout list that has to be optimized,     }
+        { _AsmL is the PAasmOutput list that has to be optimized,      }
         { _BlockStart and _BlockEnd the start and the end of the block }
         { that has to be optimized and _LabelInfo a pointer to a       }
         { TLabelInfo record                                            }
@@ -307,7 +307,7 @@ Unit AoptObj;
         { inserts new_one between prev and foll in AsmL }
         Procedure InsertLLItem(prev, foll, new_one: TLinkedListItem);
 
-        { If P is a Tai object releveant to the optimizer, P is returned
+        { If P is a Tai object relevant to the optimizer, P is returned
           If it is not relevant tot he optimizer, the first object after P
           that is relevant is returned                                     }
         class function SkipHead(P: Tai): Tai; static;
@@ -364,7 +364,7 @@ Unit AoptObj;
         { removes hp from asml then frees it }
         procedure RemoveInstruction(const hp: tai); inline;
 
-       { traces sucessive jumps to their final destination and sets it, e.g.
+       { traces successive jumps to their final destination and sets it, e.g.
          je l1                je l3
          <code>               <code>
          l1:       becomes    l1:
@@ -373,7 +373,7 @@ Unit AoptObj;
          l2:                  l2:
          jmp l3               jmp l3
 
-         the level parameter denotes how deeep we have already followed the jump,
+         the level parameter denotes how deep we have already followed the jump,
          to avoid endless loops with constructs such as "l5: ; jmp l5"           }
         function GetFinalDestination(hp: taicpu; level: longint): boolean;
 
@@ -450,7 +450,7 @@ Unit AoptObj;
       private
         procedure DebugMsg(const s: string; p: tai);
 
-        { Utilty function for the UpdateUsedRegs family of methods }
+        { Utility function for the UpdateUsedRegs family of methods }
         class function GetNextRegUpdatePoint(var p : Tai; pTerm: tai): Boolean; static;
       End;
 
@@ -765,10 +765,10 @@ Unit AoptObj;
           End
         Else
       {write something to a pointer location, so
-         * with uncertain optimzations on:
+         * with uncertain optimizations on:
             - do not destroy registers which contain a local/global variable or a
               parameter, except if DestroyRefs is called because of a "movsl"
-         * with uncertain optimzations off:
+         * with uncertain optimizations off:
             - destroy every register which contains a memory location
             }
             For Counter := LoGPReg to HiGPReg Do
@@ -794,7 +794,7 @@ Unit AoptObj;
 
       Procedure TPaiProp.DestroyAllRegs(var InstrSinceLastMod: TInstrSinceLastMod);
       {Var Counter: TRegister;}
-      Begin {initializes/desrtoys all registers}
+      Begin {initializes/destroys all registers}
       (*!!!!!!!!!
         For Counter := LoGPReg To HiGPReg Do
           Begin
@@ -1523,7 +1523,7 @@ Unit AoptObj;
         if (reg = NR_STACK_POINTER_REG) or
           (reg = current_procinfo.framepointer) or
            not(assigned(p1)) then
-          { this happens with registers which are loaded implicitely, outside the }
+          { this happens with registers which are loaded implicitly, outside the  }
           { current block (e.g. esi with self)                                    }
           exit;
 
@@ -1807,7 +1807,7 @@ Unit AoptObj;
 {$endif}
 {$endif not avr}
 {$ifdef mips}
-        { MIPS conditional jump instructions also conntain register
+        { MIPS conditional jump instructions also contain register
           operands. A proper implementation is needed here. }
         internalerror(2020071301);
 {$endif}
@@ -2469,7 +2469,7 @@ Unit AoptObj;
 
 
     function TAOptObj.GetFinalDestination(hp: taicpu; level: longint): boolean;
-      {traces sucessive jumps to their final destination and sets it, e.g.
+      {traces successive jumps to their final destination and sets it, e.g.
        je l1                je l3       <code>               <code>
        l1:       becomes    l1:
        je l2                je l3

compiler/arm/aasmcpu.pas

@@ -1284,7 +1284,7 @@ implementation
                       if GenerateThumb2Code then
                         penalty:=multiplier;
                         { check if the next instruction fits as well
-                          or if we splitted after the it so split before }
+                          or if we split after the it so split before }
                         CheckLimit(hp,1);
                     end;
                   A_ITE,
@@ -1293,7 +1293,7 @@ implementation
                       if GenerateThumb2Code then
                         penalty:=2*multiplier;
                         { check if the next two instructions fit as well
-                          or if we splitted them so split before }
+                          or if we split them so split before }
                         CheckLimit(hp,2);
                     end;
                   A_ITEE,
@@ -1304,7 +1304,7 @@ implementation
                       if GenerateThumb2Code then
                         penalty:=3*multiplier;
                         { check if the next three instructions fit as well
-                          or if we splitted them so split before }
+                          or if we split them so split before }
                         CheckLimit(hp,3);
                     end;
                   A_ITEEE,
@@ -1319,7 +1319,7 @@ implementation
                       if GenerateThumb2Code then
                         penalty:=4*multiplier;
                         { check if the next three instructions fit as well
-                          or if we splitted them so split before }
+                          or if we split them so split before }
                       CheckLimit(hp,4);
                     end;
                   else
@@ -2157,10 +2157,10 @@ implementation
         { Error? }
         if (Insentry=nil) and (InsSize=-1) then
           exit;
-        { set the file postion }
+        { set the file position }
         current_filepos:=fileinfo;
 
-        { tranlate LDR+postfix to complete opcode }
+        { translate LDR+postfix to complete opcode }
         if (opcode=A_LDR) and (oppostfix=PF_D) then
           begin
             opcode:=A_LDRD;
@@ -2348,7 +2348,7 @@ implementation
                   if ref^.refaddr=addr_no then
                     begin
                       { create ot field }
-                      { we should get the size here dependend on the
+                      { we should get the size here dependent on the
                         instruction }
                       if (ot and OT_SIZE_MASK)=0 then
                         ot:=OT_MEMORY or OT_BITS32
@@ -2443,7 +2443,7 @@ implementation
                 end;
               top_local :
                 begin
-                  { we should get the size here dependend on the
+                  { we should get the size here dependent on the
                     instruction }
                   if (ot and OT_SIZE_MASK)=0 then
                     ot:=OT_MEMORY or OT_BITS32
@@ -2465,7 +2465,7 @@ implementation
               top_none :
                 begin
                   { generated when there was an error in the
-                    assembler reader. It never happends when generating
+                    assembler reader. It never happens when generating
                     assembler }
                 end;
               top_shifterop:
@@ -2583,7 +2583,7 @@ implementation
          end;
 
       { check postfixes:
-        the existance of a certain postfix requires a
+        the existence of a certain postfix requires a
         particular code }
 
         { update condition flags
@@ -2794,7 +2794,7 @@ implementation
            create_ot(objdata);
 
            BuildArmMasks(objdata);
-           { set the file postion }
+           { set the file position }
            current_filepos:=fileinfo;
          end
         else
@@ -5860,7 +5860,7 @@ implementation
             end;
         end;
 
-        { Todo: Decide whether the code above should take care of writing data in an order that makes senes }
+        { Todo: Decide whether the code above should take care of writing data in an order that makes sense }
         if (insentry^.code[0] in [#$80..#$96]) and (bytelen=4) then
           bytes:=((bytes shr 16) and $FFFF) or ((bytes and $FFFF) shl 16);
 

compiler/arm/aoptcpu.pas

@@ -383,7 +383,7 @@ Implementation
          ) and
          (taicpu(movp).ops=2) and
          MatchOperand(taicpu(movp).oper[1]^, taicpu(p).oper[0]^.reg) and
-         { the destination register of the mov might not be used beween p and movp }
+         { the destination register of the mov might not be used between p and movp }
          not(RegUsedBetween(taicpu(movp).oper[0]^.reg,p,movp)) and
          { Take care to only do this for instructions which REALLY load to the first register.
            Otherwise
@@ -606,7 +606,7 @@ Implementation
              )
             ) do
             begin
-              { neither reg1 nor reg2 might be changed inbetween }
+              { neither reg1 nor reg2 might be changed in between }
               if RegModifiedBetween(taicpu(p).oper[0]^.reg,p,hp1) or
                 RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1) then
                 break;
@@ -1196,7 +1196,7 @@ Implementation
             mov reg1,reg0, shift imm1+imm2
           }
           else if (taicpu(p).oper[2]^.shifterop^.shiftmode=taicpu(hp1).oper[2]^.shifterop^.shiftmode) or
-            { asr makes no use after a lsr, the asr can be foled into the lsr }
+            { asr makes no use after a lsr, the asr can be folded into the lsr }
              ((taicpu(p).oper[2]^.shifterop^.shiftmode=SM_LSR) and (taicpu(hp1).oper[2]^.shifterop^.shiftmode=SM_ASR) ) then
             begin
               inc(taicpu(p).oper[2]^.shifterop^.shiftimm,taicpu(hp1).oper[2]^.shifterop^.shiftimm);
@@ -1409,7 +1409,7 @@ Implementation
                  end;
              end;
 
-          { 2-operald mov optimisations }
+          { 2-operand mov optimisations }
           if (taicpu(p).ops = 2) then
             begin
               {
@@ -1597,7 +1597,7 @@ Implementation
                 end
             end
 
-          { 3-operald mov optimisations }
+          { 3-operand mov optimisations }
           else if (taicpu(p).ops = 3) then
             begin
 
@@ -1630,7 +1630,7 @@ Implementation
                     (taicpu(hpfar1).ops=3) and
                     MatchOperand(taicpu(p).oper[0]^, taicpu(hpfar1).oper[1]^) and
                     (taicpu(hpfar1).oper[2]^.typ = top_const) and
-                    { Check if the BIC actually would only mask out bits beeing already zero because of the shift }
+                    { Check if the BIC actually would only mask out bits being already zero because of the shift }
                     (taicpu(hpfar1).oper[2]^.val<>0) and
                     (BsfDWord(taicpu(hpfar1).oper[2]^.val)>=32-taicpu(p).oper[2]^.shifterop^.shiftimm) then
                     begin
@@ -1679,7 +1679,7 @@ Implementation
                    (hpfar1 = hp1)
                  )
                ) and
-               { reg1 might not be modified inbetween }
+               { reg1 might not be modified in between }
                not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hpfar1)) and
                { The shifterop can contain a register, might not be modified}
                (
@@ -1776,7 +1776,7 @@ Implementation
                (taicpu(p).oper[1]^.typ = top_reg) and
                (taicpu(p).oper[2]^.typ = top_shifterop) and
                { RRX is tough to handle, because it requires tracking the C-Flag,
-                 it is also extremly unlikely to be emitted this way}
+                 it is also extremely unlikely to be emitted this way}
                (taicpu(p).oper[2]^.shifterop^.shiftmode <> SM_RRX) and
                (taicpu(p).oper[2]^.shifterop^.shiftimm <> 0) and
                (taicpu(p).oppostfix = PF_NONE) and
@@ -1911,7 +1911,7 @@ Implementation
           (taicpu(hp1).oper[1]^.typ=top_reg) and
           MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg))) and
         assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) and
-        { reg1 might not be modified inbetween }
+        { reg1 might not be modified in between }
         not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
         begin
           DebugMsg(SPeepholeOptimization + 'MvnAnd2Bic done', p);
@@ -2533,7 +2533,7 @@ Implementation
                 Exit(True);
 
               { Instruction sets CPSR register due to S suffix (floating-point
-                instructios won't raise false positives) }
+                instructions won't raise false positives) }
               if (taicpu(p1).oppostfix = PF_S) then
                 Exit(True)
             end;
@@ -2669,7 +2669,7 @@ Implementation
                 (taicpu(hp1).oper[1]^.ref^.offset=0)
                 )
                ) or
-               { try to prove that the memory accesses don't overlapp }
+               { try to prove that the memory accesses don't overlap }
                ((taicpu(p).opcode in [A_STRB,A_STRH,A_STR]) and
                 (taicpu(p).oper[1]^.typ = top_ref) and
                 (taicpu(p).oper[1]^.ref^.base=taicpu(hp1).oper[1]^.ref^.base) and
@@ -2677,7 +2677,7 @@ Implementation
                 (taicpu(hp1).oppostfix=PF_None) and
                 (taicpu(p).oper[1]^.ref^.index=NR_NO) and
                 (taicpu(hp1).oper[1]^.ref^.index=NR_NO) and
-                { get operand sizes and check if the offset distance is large enough to ensure no overlapp }
+                { get operand sizes and check if the offset distance is large enough to ensure no overlap }
                 (abs(taicpu(p).oper[1]^.ref^.offset-taicpu(hp1).oper[1]^.ref^.offset)>=max(tcgsize2size[reg_cgsize(taicpu(p).oper[0]^.reg)],tcgsize2size[reg_cgsize(taicpu(hp1).oper[0]^.reg)]))
               )
             )

compiler/arm/aoptcpub.pas

@@ -129,7 +129,7 @@ Implementation
             Exit(True);
 
           { Instruction sets CPSR register due to S suffix (floating-point
-            instructios won't raise false positives) }
+            instructions won't raise false positives) }
           if (taicpu(p1).oppostfix = PF_S) then
             Exit(True);
 

compiler/arm/cgcpu.pas

@@ -2674,7 +2674,7 @@ unit cgcpu;
 
     procedure tbasecgarm.g_concatcopy_internal(list : TAsmList;const source,dest : treference;len : tcgint;aligned : boolean);
       const
-        maxtmpreg_arm = 10; {roozbeh: can be reduced to 8 or lower if might conflick with reserved ones,also +2 is used becouse of regs required for referencing}
+        maxtmpreg_arm = 10; {roozbeh: can be reduced to 8 or lower if might conflict with reserved ones,also +2 is used because of regs required for referencing}
         maxtmpreg_thumb = 5;
 
       type
@@ -2987,7 +2987,7 @@ unit cgcpu;
                 countreg:=getintregister(list,OS_32);
 
 //            if cs_opt_size in current_settings.optimizerswitches  then
-                { roozbeh : it seems loading 1 byte is faster becouse of caching/fetching(?) }
+                { roozbeh : it seems loading 1 byte is faster because of caching/fetching(?) }
                 {if aligned then
                 genloop(len,4)
                 else}
@@ -3534,7 +3534,7 @@ unit cgcpu;
             end;
             if size=OS_64 then
               begin
-                { the arm has an weired opinion how flags for SUB/ADD are handled }
+                { the arm has an weird opinion how flags for SUB/ADD are handled }
                 ovloc.loc:=LOC_FLAGS;
                 case op of
                   OP_ADD:
@@ -3640,7 +3640,7 @@ unit cgcpu;
             ovloc.loc:=LOC_FLAGS;
             if size=OS_64 then
               begin
-                { arm has a weired opinion how flags for SUB/ADD are handled }
+                { arm has a weird opinion how flags for SUB/ADD are handled }
                 case op of
                   OP_ADD:
                     ovloc.resflags:=F_CS;

compiler/arm/cpuelf.pas

@@ -739,7 +739,7 @@ implementation
                   begin
                     { initial addend must be determined by parsing the instruction }
                     tmp:=address and $FF;
-                    rotation:=(address and $F00) shr 7;  { is in multpile of 2 bits }
+                    rotation:=(address and $F00) shr 7;  { is in multiple of 2 bits }
                     if rotation<>0 then
                       tmp:=RorDword(tmp,rotation);
                     case (address and $1E00000) of

compiler/arm/cpupara.pas

@@ -749,7 +749,7 @@ unit cpupara;
                 end;
                 repeat
                   paraloc^.loc:=LOC_MMREGISTER;
-                  { mm registers are strangly ordered in the arm compiler }
+                  { mm registers are strangely ordered in the arm compiler }
                   case retcgsize of
                     OS_32,OS_F32:
                       begin

compiler/arm/cpupi.pas

@@ -77,7 +77,7 @@ unit cpupi;
           the local offsets after generating the code could cause trouble because
           "shifter" constants could change to non-"shifter" constants. This
           is especially a problem when taking the address of a local. For now,
-          this extra memory should hurt less than generating all local contants with offsets
+          this extra memory should hurt less than generating all local constants with offsets
           >256 as non shifter constants }
         if (po_nostackframe in procdef.procoptions) then
           begin
@@ -227,7 +227,7 @@ unit cpupi;
                     point to lower end of area)
                 o in this case, firsttemp starts right after the saved int
                   registers area (or a bit further, because it's calculated for
-                  the worst-case scenario, when all non-volative integer
+                  the worst-case scenario, when all non-volatile integer
                   registers have to be saved) -> we store the floating point
                   registers between the last temp and the parameter pushing area
                -> fp+(-result) points to the top of the stack (= end of

compiler/arm/narmadd.pas

@@ -442,7 +442,7 @@ interface
             { Optimize for the common case of int64 < 0 }
             if nodetype in [ltn, gtn] then
               begin
-                {Just check for the MSB in reghi to be set or not, this is independed from nf_swapped}
+                {Just check for the MSB in reghi to be set or not, this is independent from nf_swapped}
                 location.resflags:=F_NE;
                 current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_TST,left.location.register64.reghi, aint($80000000)));
               end
@@ -520,7 +520,7 @@ interface
                 end;
                 cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
                 current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reglo,right.location.register64.reglo));
-                { the comparisaion of the low dword have to be
+                { the comparison of the low dword have to be
                    always unsigned!                            }
                 cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.truelabel);
                 cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);

compiler/arm/narmmat.pas

@@ -76,7 +76,7 @@ implementation
            (right.nodetype=ordconstn) and
            (nodetype=divn) and
            not(is_64bit(resultdef)) and
-           {Only the ARM and thumb2-isa support umull and smull, which are required for arbitary division by const optimization}
+           {Only the ARM and thumb2-isa support umull and smull, which are required for arbitrary division by const optimization}
            (((GenerateArmCode or
              GenerateThumb2Code) and (CPUARM_HAS_UMULL in cpu_capabilities[current_settings.cputype])) or
             (ispowerof2(tordconstnode(right).value,power) or

compiler/arm/narmset.pas

@@ -328,7 +328,7 @@ implementation
                   else
                     begin
                       tbasecgarm(cg).cgsetflags:=true;
-                      { use OS_32 here to avoid uncessary sign extensions, at this place hregister will never be negative, because
+                      { use OS_32 here to avoid unnecessary sign extensions, at this place hregister will never be negative, because
                         then genlinearlist wouldn't be used }
                       cg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, OS_32, aint(int64(t^._low-last)), hregister);
                       tbasecgarm(cg).cgsetflags:=false;
@@ -348,7 +348,7 @@ implementation
                        if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
                          begin
                            tbasecgarm(cg).cgsetflags:=true;
-                           { use OS_32 here to avoid uncessary sign extensions, at this place hregister will never be negative, because
+                           { use OS_32 here to avoid unnecessary sign extensions, at this place hregister will never be negative, because
                              then genlinearlist wouldn't be use }
                            cg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, OS_32, aint(int64(t^._low)), hregister);
                            tbasecgarm(cg).cgsetflags:=false;
@@ -361,7 +361,7 @@ implementation
                       { immediately. else check the range in between:       }
 
                       tbasecgarm(cg).cgsetflags:=true;
-                      { use OS_32 here to avoid uncessary sign extensions, at this place hregister will never be negative, because
+                      { use OS_32 here to avoid unnecessary sign extensions, at this place hregister will never be negative, because
                         then genlinearlist wouldn't be use }
                       cg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, OS_32, aint(int64(t^._low-last)), hregister);
                       tbasecgarm(cg).cgsetflags:=false;
@@ -372,7 +372,7 @@ implementation
                         cg.a_jmp_flags(current_asmdata.CurrAsmList,cond_lt,elselabel);
                     end;
                   tbasecgarm(cg).cgsetflags:=true;
-                  { use OS_32 here to avoid uncessary sign extensions, at this place hregister will never be negative, because
+                  { use OS_32 here to avoid unnecessary sign extensions, at this place hregister will never be negative, because
                     then genlinearlist wouldn't be use }
                   cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,OS_32,aint(int64(t^._high-t^._low)),hregister);
                   tbasecgarm(cg).cgsetflags:=false;

compiler/arm/raarmgas.pas

@@ -516,7 +516,7 @@ Unit raarmgas;
                     end;
                 end;
               else
-                begin // elsecase
+                begin // else case
                   Message(asmr_e_invalid_reference_syntax);
                   RecoverConsume(false);
                   exit;

compiler/armgen/aoptarm.pas

@@ -226,7 +226,7 @@ Implementation
          MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg))
         ) and
         RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-        { reg1 might not be modified inbetween }
+        { reg1 might not be modified in between }
         not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
         begin
           DebugMsg('Peephole '+gas_op2str[taicpu(p).opcode]+gas_op2str[taicpu(hp1).opcode]+'2'+gas_op2str[taicpu(hp1).opcode]+' done', p);
@@ -287,7 +287,7 @@ Implementation
         MatchOperand(taicpu(movp).oper[1]^, taicpu(p).oper[0]^.reg) and
         { don't mess with moves to fp }
         (taicpu(movp).oper[0]^.reg<>current_procinfo.framepointer) and
-        { the destination register of the mov might not be used beween p and movp }
+        { the destination register of the mov might not be used between p and movp }
         not(RegUsedBetween(taicpu(movp).oper[0]^.reg,p,movp)) and
 {$ifdef ARM}
         { PC should be changed only by moves }
@@ -664,7 +664,7 @@ Implementation
                         end;
                     end;
 
-                  { On low optimisation settions, don't search more than one instruction ahead }
+                  { On low optimisation sections, don't search more than one instruction ahead }
                   if not(cs_opt_level3 in current_settings.optimizerswitches) or
                     { Stop at procedure calls and jumps }
                     is_calljmp(taicpu(next_hp).opcode) or
@@ -822,7 +822,7 @@ Implementation
                 assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) and
                 { the reference in strb might not use reg2 }
                 not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole UxtbStrb2Strb done', p);
@@ -841,7 +841,7 @@ Implementation
                 (taicpu(hp1).ops = 2) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole UxtbUxth2Uxtb done', p);
@@ -863,7 +863,7 @@ Implementation
                 (taicpu(hp1).ops = 2) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole UxtbUxtb2Uxtb done', p);
@@ -887,7 +887,7 @@ Implementation
                 ((taicpu(hp1).oper[2]^.val and $FF)=$FF) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole UxtbAndImm2Uxtb done', p);
@@ -936,7 +936,7 @@ Implementation
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
                 { the reference in strb might not use reg2 }
                 not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole UXTHStrh2Strh done', p);
@@ -955,7 +955,7 @@ Implementation
                 (taicpu(hp1).ops=2) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole UxthUxth2Uxth done', p);
@@ -978,7 +978,7 @@ Implementation
                 ((taicpu(hp1).oper[2]^.val and $FFFF)=$FFFF) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole UxthAndImm2Uxth done', p);
@@ -1027,7 +1027,7 @@ Implementation
                 assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) and
                 { the reference in strb might not use reg2 }
                 not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole SxtbStrb2Strb done', p);
@@ -1046,7 +1046,7 @@ Implementation
                 (taicpu(hp1).ops = 2) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole SxtbSxth2Sxtb done', p);
@@ -1068,7 +1068,7 @@ Implementation
                 (taicpu(hp1).ops = 2) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole SxtbSxtb2Sxtb done', p);
@@ -1092,7 +1092,7 @@ Implementation
                 ((taicpu(hp1).oper[2]^.val and $FF)=$FF) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole SxtbAndImm2Uxtb done', p);
@@ -1143,7 +1143,7 @@ Implementation
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
                 { the reference in strb might not use reg2 }
                 not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole SxthStrh2Strh done', p);
@@ -1164,7 +1164,7 @@ Implementation
                 (taicpu(hp1).ops=2) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole SxthSxth2Sxth done', p);
@@ -1188,7 +1188,7 @@ Implementation
                 (taicpu(hp1).ops=2) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole SxthSxtw2Sxth done', p);
@@ -1214,7 +1214,7 @@ Implementation
                 ((taicpu(hp1).oper[2]^.val and $FFFF)=$FFFF) and
                 MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                 RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
-                { reg1 might not be modified inbetween }
+                { reg1 might not be modified in between }
                 not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
                 begin
                   DebugMsg('Peephole SxthAndImm2Uxth done', p);
@@ -1601,7 +1601,7 @@ Implementation
             assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) and
             { the reference in strb might not use reg2 }
             not(RegInRef(taicpu(p).oper[0]^.reg,taicpu(hp1).oper[1]^.ref^)) and
-            { reg1 might not be modified inbetween }
+            { reg1 might not be modified in between }
             not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
             begin
               DebugMsg('Peephole AndStrb2Strb done', p);
@@ -1630,7 +1630,7 @@ Implementation
             (taicpu(hp1).ops = 2) and
             RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
             MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
-            { reg1 might not be modified inbetween }
+            { reg1 might not be modified in between }
             not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
             begin
               DebugMsg('Peephole AndUxt2And done', p);
@@ -1652,7 +1652,7 @@ Implementation
             (taicpu(hp1).ops = 2) and
             RegEndofLife(taicpu(p).oper[0]^.reg,taicpu(hp1)) and
             MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
-            { reg1 might not be modified inbetween }
+            { reg1 might not be modified in between }
             not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
             begin
               DebugMsg('Peephole AndSxt2And done', p);

compiler/assemble.pas

@@ -1540,7 +1540,7 @@ Implementation
                       have_second_symbol:=true;
                       if not have_first_symbol then
                         internalerror(2007032202);
-                      { second symbol should substracted to first }
+                      { second symbol should subtracted to first }
                       if not dosub then
                         internalerror(2007032203);
                       if (relocsym.objsection<>sym.objsection) then
@@ -1987,7 +1987,7 @@ Implementation
                      Tai_align_abstract(hp).fillsize:=align(ObjData.CurrObjSec.Size,Tai_align_abstract(hp).aligntype)-
                        ObjData.CurrObjSec.Size;
 
-                     { maximum number of bytes for alignment exeeded? }
+                     { maximum number of bytes for alignment exceeded? }
                      if (Tai_align_abstract(hp).aligntype<>Tai_align_abstract(hp).maxbytes) and
                        (Tai_align_abstract(hp).fillsize>Tai_align_abstract(hp).maxbytes) then
                        Tai_align_abstract(hp).fillsize:=align(ObjData.CurrObjSec.Size,Byte(Tai_align_abstract(hp).aligntype div 2))-

compiler/avr/aasmcpu.pas

@@ -327,7 +327,7 @@ implementation
         { Error? }
         if (Insentry=nil) and (InsSize=-1) then
           exit;
-        { set the file postion }
+        { set the file position }
         current_filepos:=fileinfo;
 
         { Get InsEntry }
@@ -576,7 +576,7 @@ implementation
                       ra_alloc:
                         if (tai_regalloc(curtai).reg=NR_DEFAULTFLAGS) then
                           begin
-                            { there are still douple allocations/deallocations in the cg, so
+                            { there are still couple allocations/deallocations in the cg, so
                               this ie cannot be enabled
                               if flagsallocated then
                                 Internalerror(2022050101);
@@ -586,7 +586,7 @@ implementation
                       ra_dealloc:
                         if (tai_regalloc(curtai).reg=NR_DEFAULTFLAGS) then
                           begin
-                            { there are still douple allocations/deallocations in the cg, so
+                            { there are still couple allocations/deallocations in the cg, so
                               this ie cannot be enabled
                               if not(flagsallocated) then
                                 Internalerror(2022050102);

compiler/avr/cpuinfo.pas

@@ -886,7 +886,7 @@ Const
        CPUAVR_2_BYTE_PC,        // 2 byte PC is used (for devices with <= 128 kB flash)
        CPUAVR_3_BYTE_PC,        // 3 byte PC is used (for devices with > 128 kB flash), implies EIND register
        CPUAVR_16_REGS,          // avrtiny device with only 16 core registers
-       CPUAVR_NOMEMMAPPED_REGS  // Core registers not accesible in data space
+       CPUAVR_NOMEMMAPPED_REGS  // Core registers not accessible in data space
       );
 
  const

compiler/avr/raavrgas.pas

@@ -371,7 +371,7 @@ Unit raavrgas;
                   oper.InitRef;
                   oper.opr.ref.offset:=BuildConstExpression(True,False);
 
-                  { absolute memory addresss? }
+                  { absolute memory address? }
                   if ((actopcode = A_LDS) and (actasmtoken <> AS_SEPARATOR)) or
                      ((actopcode = A_STS) and (actasmtoken <> AS_COMMA)) then
                     begin

compiler/blockutl.pas

@@ -208,7 +208,7 @@ implementation
         end;
       { bare copy, so that self etc are not inserted }
       result:=tprocdef(orgpd.getcopyas(procdef,pc_bareproc,'',true));
-      { will be called accoding to the ABI conventions }
+      { will be called according to the ABI conventions }
       result.proccalloption:=pocall_cdecl;
       { add po_is_block so that a block "self" pointer gets added (of the type
         returned by get_block_literal_type_for_proc()) }

compiler/browcol.pas

@@ -1567,7 +1567,7 @@ end;
   procedure ProcessDefIfStruct(Symbol: PSymbol; definition: tdef);
   begin
     { still led to infinite recursions
-      only useful for unamed types PM }
+      only useful for unnamed types PM }
     if assigned(definition) and not assigned(definition.typesym) then
     begin
       case definition.typ of
@@ -1994,7 +1994,7 @@ begin
 
   if (cs_browser in current_settings.moduleswitches) then
     BuildObjectInfo;
-  { can allways be done
+  { can always be done
     needed to know when recompilation of sources is necessary }
   BuildSourceList;
 end;

compiler/cclasses.pas

@@ -364,7 +364,7 @@ type
           procedure InsertBefore(Item,Loc : TLinkedListItem);
           { inserts an Item after Loc }
           procedure InsertAfter(Item,Loc : TLinkedListItem);virtual;
-          { concats an Item }
+          { concatenate an Item }
           procedure Concat(Item:TLinkedListItem);
           { deletes an Item }
           procedure Remove(Item:TLinkedListItem);
@@ -378,13 +378,13 @@ type
           procedure insertListBefore(Item:TLinkedListItem;p : TLinkedList); virtual;
           { inserts another List after the provided item and make this List empty }
           procedure insertListAfter(Item:TLinkedListItem;p : TLinkedList); virtual;
-          { concats another List at the end and make this List empty }
+          { concatenate another List at the end and make this List empty }
           procedure concatList(p : TLinkedList); virtual;
-          { concats another List at the start and makes a copy
+          { concatenate another List at the start and makes a copy
             the list is ordered in reverse.
           }
           procedure insertListcopy(p : TLinkedList); virtual;
-          { concats another List at the end and makes a copy }
+          { concatenate another List at the end and makes a copy }
           procedure concatListcopy(p : TLinkedList); virtual;
           { removes all items from the list, the items are not freed }
           procedure RemoveAll; virtual;
@@ -417,7 +417,7 @@ type
           constructor Create_No_Double;
           { inserts an Item }
           procedure Insert(const s:TCmdStr);
-          { concats an Item }
+          { concatenate an Item }
           procedure Concat(const s:TCmdStr);
           { deletes an Item }
           procedure Remove(const s:TCmdStr);
@@ -431,7 +431,7 @@ type
           function Find(const s:TCmdStr):TCmdStrListItem;
           { inserts an item }
           procedure InsertItem(item:TCmdStrListItem);
-          { concats an item }
+          { concatenate an item }
           procedure ConcatItem(item:TCmdStrListItem);
           property Doubles:boolean read FDoubles write FDoubles;
        end;

compiler/cfidwarf.pas

@@ -276,7 +276,7 @@ implementation
 
 
 {$if defined(i386)}
-    { if more cpu dependend stuff is implemented, this needs more refactoring }
+    { if more cpu dependent stuff is implemented, this needs more refactoring }
     procedure TDwarfAsmCFILowLevel.generate_initial_instructions(list:TAsmList);
       begin
         list.concat(tai_const.create_8bit(DW_CFA_def_cfa));
@@ -324,7 +324,7 @@ implementation
         list.concat(tai_const.create_uleb128bit(0));
       end;
 {$else}
-    { if more cpu dependend stuff is implemented, this needs more refactoring }
+    { if more cpu dependent stuff is implemented, this needs more refactoring }
     procedure TDwarfAsmCFILowLevel.generate_initial_instructions(list:TAsmList);
       begin
         list.concat(tai_const.create_8bit(DW_CFA_def_cfa));

compiler/cfileutl.pas

@@ -834,7 +834,7 @@ end;
                 end
               else if (oldpos + 1 > oldlen) or (path[oldPos + 1] in ['/', '\']) then
                 begin
-                  {It is "./" or "."  ignor it }
+                  {It is "./" or "."  ignore it }
                   oldPos := oldPos + 2;
                   continue;  {Start over again}
                 end;

compiler/cg64f32.pas

@@ -3,7 +3,7 @@
     Member of the Free Pascal development team
 
     This unit implements the code generation for 64 bit int
-    arithmethics on 32 bit processors
+    arithmetics on 32 bit processors
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
@@ -21,7 +21,7 @@
 
  ****************************************************************************
 }
-{# This unit implements the code generation for 64 bit int arithmethics on
+{# This unit implements the code generation for 64 bit int arithmetics on
    32 bit processors.
 }
 unit cg64f32;
@@ -1057,7 +1057,7 @@ unit cg64f32;
               (from_signed or
                (torddef(fromdef).ordtype = u64bit)) then
              begin
-               { in all cases, there is only a problem if the higest bit is set }
+               { in all cases, there is only a problem if the highest bit is set }
                if l.loc in [LOC_REGISTER,LOC_CREGISTER] then
                  begin
                    if is_64bit(fromdef) then

compiler/cgbase.pas

@@ -441,7 +441,7 @@ interface
        OS_SPAIR = OS_S16;
 {$endif}
 
-       { Table to convert tcgsize variables to the correspondending
+       { Table to convert tcgsize variables to the corresponding
          unsigned types }
        tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
          OS_8,    OS_16,   OS_32,   OS_64,   OS_128,
@@ -531,7 +531,7 @@ interface
     { returns true, if the shuffle describes only a move of the scalar at index 0 }
     function shufflescalar(shuffle : pmmshuffle) : boolean;
 
-    { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
+    { removes shuffling from shuffle, this means that the destination index of each shuffle is copied to
       the source }
     procedure removeshuffles(var shuffle : tmmshuffle);
 

compiler/cgobj.pas

@@ -21,7 +21,7 @@
  ****************************************************************************
 }
 {# @abstract(Abstract code generator unit)
-   Abstreact code generator unit. This contains the base class
+   Abstract code generator unit. This contains the base class
    to implement for all new supported processors.
 
    WARNING: None of the routines implemented in these modules,
@@ -600,7 +600,7 @@ implementation
        cpuinfo;
 
 {*****************************************************************************
-                            basic functionallity
+                            basic functionality
 ******************************************************************************}
 
     constructor tcg.create;
@@ -1903,7 +1903,7 @@ implementation
               end;
             LOC_REGISTER,LOC_CREGISTER:
               begin
-                { paramfpu_ref does the check_simpe_location check here if necessary }
+                { paramfpu_ref does the check_simple_location check here if necessary }
                 tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
                 a_loadfpu_reg_ref(list,size,size,r,ref);
                 a_loadfpu_ref_cgpara(list,size,ref,cgpara);

compiler/compinnr.pas

@@ -180,7 +180,7 @@ type
      in_max_quad         = 150,
 
 { MMX functions }
-{ these contants are used by the mmx unit }
+{ these constants are used by the mmx unit }
 
      { MMX }
      in_mmx_pcmpeqb      = 200,

compiler/cprofile.pas

@@ -21,7 +21,7 @@
 }
 unit cprofile;
 
-{ to use this profile intrastructure, the epiktimer sources must be available, the official repository is currently:
+{ to use this profile infrastructure, the epiktimer sources must be available, the official repository is currently:
 
   https://github.com/graemeg/epiktimer.git
 
@@ -29,7 +29,7 @@ unit cprofile;
   <base dir>/fpc/compiler
   <base dir>/epiktimer
 
-  As the offical branch requires the use of the classes units, I recommend to
+  As the official branch requires the use of the classes units, I recommend to
   use my modified version of epiktimer which allows to disable the use of the classes unit,
   this is done automatically by the compiler sources through a define. You can get my epiktimer source from
 

compiler/cstreams.pas

@@ -59,7 +59,7 @@ var
   CStreamError : longint;
 
 type
-{ Fake TComponent class, it isn't used any futher }
+{ Fake TComponent class, it isn't used any further }
   TCComponent = class(TObject)
   end;
 
@@ -217,7 +217,7 @@ implementation
 
     begin
     // We do nothing. Pipe streams don't support this
-    // As well as possible read-ony streams !!
+    // As well as possible read-only streams !!
     end;
 
   procedure TCStream.ReadBuffer(var Buffer; Count: Longint);

compiler/cutils.pas

@@ -48,7 +48,7 @@ interface
     function max(a,b : int64) : int64;{$ifdef USEINLINE}inline;{$endif}
     function max(a,b : qword) : qword;{$ifdef USEINLINE}inline;{$endif}
 
-    { These functions are intenionally put here and not in the constexp unit.
+    { These functions are intentionally put here and not in the constexp unit.
       Since Tconstexprint may be automatically converted to int, which causes
       loss of data and since there are already min and max functions for ints in
       this unit, we put min and max for Tconstexprint as well. This way we avoid
@@ -134,7 +134,7 @@ interface
     function CompareStr(const S1, S2: string): Integer;
     function CompareText(S1, S2: string): integer;
 
-    { releases the string p and assignes nil to p }
+    { releases the string p and assigns nil to p  }
     { if p=nil then freemem isn't called          }
     procedure stringdispose(var p : pshortstring);{$ifdef USEINLINE}inline;{$endif}
 

compiler/dbgbase.pas

@@ -607,7 +607,7 @@ implementation
           begin
             if not pu.u.is_dbginfo_written and not assigned(pu.u.package) then
               begin
-                { prevent infinte loop for circular dependencies }
+                { prevent infinite loop for circular dependencies }
                 pu.u.is_dbginfo_written:=true;
                 { write type info from used units, use a depth first
                   strategy to reduce the recursion in writing all

compiler/dbgdwarf.pas

@@ -22,7 +22,7 @@
 {
   This units contains support for DWARF debug info generation.
 
-  Currently a lot of code looks like being mergable with dbgstabs. This might
+  Currently a lot of code looks like being mergeable with dbgstabs. This might
   change however when improved dwarf info is generated, so the stuff shouldn't be
   merged yet. (FK)
 
@@ -4121,7 +4121,7 @@ implementation
         var
           upperopcodes: longint;
         begin
-          { deref=true -> ansi/unicde/widestring; deref = false -> short/longstring }
+          { deref=true -> ansi/unicode/widestring; deref = false -> short/longstring }
           if assigned(def.typesym) then
             append_entry(DW_TAG_array_type,true,[
               DW_AT_name,DW_FORM_string,name+#0,

compiler/defcmp.pas

@@ -360,7 +360,7 @@ implementation
              if assigned(tstoreddef(def_from).genconstraintdata) or
                  assigned(tstoreddef(def_to).genconstraintdata) then
                begin
-                 { this is bascially a poor man's type checking, if there is a chance
+                 { this is basically a poor man's type checking, if there is a chance
                    that the types are equal considering the constraints, this needs probably
                    to be improved and maybe factored out or even result in a recursive compare_defs_ext }
                  if (def_from.typ<>def_to.typ) and
@@ -658,7 +658,7 @@ implementation
                          begin
                            doconv := tc_string_2_string;
 
-                           { prefere conversion to utf8 codepage }
+                           { prefer conversion to utf8 codepage }
                            if tstringdef(def_to).encoding = globals.CP_UTF8 then
                              eq:=te_convert_l1
                            { else to AnsiString type }
@@ -1147,8 +1147,8 @@ implementation
                                     else if subeq>te_convert_l6 then
                                       eq:=pred(subeq)
                                     else if subeq=te_convert_operator then
-                                      { the operater needs to be applied by element, so we tell
-                                        the caller that it's some unpreffered conversion and let
+                                      { the operator needs to be applied by element, so we tell
+                                        the caller that it's some unpreferred conversion and let
                                         it handle the per-element stuff }
                                       eq:=te_convert_l6
                                     else
@@ -1409,7 +1409,7 @@ implementation
                        end;
                      variantdef :
                        begin
-                         { doing this in the compiler avoids a lot of unncessary
+                         { doing this in the compiler avoids a lot of unnecessary
                            copying }
                          if (tvariantdef(def_from).varianttype=vt_olevariant) and
                            (tvariantdef(def_to).varianttype=vt_normalvariant) then
@@ -1622,7 +1622,7 @@ implementation
                              eq:=te_equal
                            end
                          else
-                          { child class pointer can be assigned to anchestor pointers }
+                          { child class pointer can be assigned to ancestor pointers }
                           if (
                               (tpointerdef(def_from).pointeddef.typ=objectdef) and
                               (tpointerdef(def_to).pointeddef.typ=objectdef) and
@@ -1715,7 +1715,7 @@ implementation
                      else if (is_objc_class_or_protocol(def_from) and
                               (def_to=objc_idtype)) or
                              { classrefs are also instances in Objective-C,
-                               hence they're also assignment-cpmpatible with
+                               hence they're also assignment-compatible with
                                id }
                              (is_objcclassref(def_from) and
                               ((def_to=objc_metaclasstype) or
@@ -1816,7 +1816,7 @@ implementation
                         eq:=te_convert_l1;
                       end
                      else
-                      { for example delphi allows the assignement from pointers }
+                      { for example delphi allows the assignment from pointers  }
                       { to procedure variables                                  }
                       if (m_pointer_2_procedure in current_settings.modeswitches) and
                          is_void(tpointerdef(def_from).pointeddef) and
@@ -2061,8 +2061,8 @@ implementation
              begin
                { typed files are all equal to the abstract file type
                name TYPEDFILE in system.pp in is_equal in types.pas
-               the problem is that it sholud be also compatible to FILE
-               but this would leed to a problem for ASSIGN RESET and REWRITE
+               the problem is that it should be also compatible to FILE
+               but this would lead to a problem for ASSIGN RESET and REWRITE
                when trying to find the good overloaded function !!
                so all file function are doubled in system.pp
                this is not very beautiful !!}

compiler/defutil.pas

@@ -329,7 +329,7 @@ interface
   type
     tperformrangecheck = (
       rc_internal,  { nothing, internal conversion }
-      rc_explicit,  { no, but this is an explcit user conversion and hence can still give warnings in some cases (or errors in case of enums) }
+      rc_explicit,  { no, but this is an explicit user conversion and hence can still give warnings in some cases (or errors in case of enums) }
       rc_implicit,  { no, but this is an implicit conversion and hence can still give warnings/errors in some cases }
       rc_yes        { yes }
     );
@@ -368,7 +368,7 @@ interface
        to note that the value returned can be @var(OS_NO) }
     function def_cgsize(def: tdef): tcgsize;
 
-    { #Return an orddef (integer) correspondig to a tcgsize }
+    { #Return an orddef (integer) corresponding to a tcgsize }
     function cgsize_orddef(size: tcgsize): torddef;
 
     {# Same as def_cgsize, except that it will interpret certain arrays as
@@ -386,11 +386,11 @@ interface
 
     { # returns the smallest base integer type whose range encompasses that of
         both ld and rd; if keep_sign_if_equal, then if ld and rd have the same
-        signdness, the result will also get that signdness }
+        signedness, the result will also get that signedness }
     function get_common_intdef(ld, rd: torddef; keep_sign_if_equal: boolean): torddef;
 
     { # calculates "not v" based on the provided def; returns true if the def
-        was negatable, false otherwise }
+        was negligible, false otherwise }
     function calc_not_ordvalue(var v:Tconstexprint; var def:tdef):boolean;
 
     { # returns whether the type is potentially a valid type of/for an "univ" parameter

compiler/finput.pas

@@ -156,7 +156,7 @@ interface
           { paths and filenames }
           paramallowoutput : boolean;  { original allowoutput parameter }
           modulename,               { name of the module in uppercase }
-          realmodulename: pshortstring; { name of the module in the orignal case }
+          realmodulename: pshortstring; { name of the module in the original case }
           paramfn,                  { original filename }
           mainsource,               { name of the main sourcefile }
           objfilename,              { fullname of the objectfile }
@@ -339,7 +339,7 @@ uses
         tempopen:=false;
         if is_macro then
          begin
-           { seek buffer postion to bufstart }
+           { seek buffer position to bufstart }
            if bufstart>0 then
             begin
               move(buf[bufstart],buf[0],bufsize-bufstart+1);
@@ -624,7 +624,7 @@ uses
          staticlibfilename:=p+target_info.staticlibprefix+n+target_info.staticlibext;
          exportfilename:=p+'exp'+n+target_info.objext;
 
-         { output dir of exe can be specified separatly }
+         { output dir of exe can be specified separately }
          if AllowOutput and (OutputExeDir<>'') then
            p:=OutputExeDir
          else

compiler/fmodule.pas

@@ -33,7 +33,7 @@ unit fmodule;
   {$define shortasmprefix}
 {$endif}
 {$ifdef OS2}
-  { Allthough OS/2 supports long filenames I play it safe and
+  { Although OS/2 supports long filenames I play it safe and
     use 8.3 filenames, because this allows the compiler to run
     on a FAT partition. (DM) }
   {$define shortasmprefix}
@@ -250,7 +250,7 @@ interface
 
         {create creates a new module which name is stored in 's'. LoadedFrom
         points to the module calling it. It is nil for the first compiled
-        module. This allow inheritence of all path lists. MUST pay attention
+        module. This allow inheritance of all path lists. MUST pay attention
         to that when creating link.res!!!!(mazen)}
         constructor create(LoadedFrom:TModule;const amodulename: string; const afilename:TPathStr;_is_unit:boolean);
         destructor destroy;override;

compiler/globals.pas

@@ -1299,7 +1299,7 @@ implementation
            ishexstr(copy(s,16,4)) and ishexstr(copy(s,21,4)) and
            ishexstr(copy(s,26,12)) then begin
           GUID.D1:=dword(hexstr2longint(copy(s,2,8)));
-          { these values are arealdy in the correct range (4 chars = word) }
+          { these values are already in the correct range (4 chars = word) }
           GUID.D2:=word(hexstr2longint(copy(s,11,4)));
           GUID.D3:=word(hexstr2longint(copy(s,16,4)));
           for i:=0 to 1 do

compiler/globtype.pas

@@ -29,7 +29,7 @@ interface
 
     type
        { TCmdStr is used to pass command line parameters to an external program to be
-         executed from the FPC application. In some circomstances, this can be more
+         executed from the FPC application. In some circumstances, this can be more
          than 255 characters. That's why using Ansi Strings}
        TCmdStr = AnsiString;
        TPathStr = AnsiString;
@@ -290,7 +290,7 @@ interface
            constants in order to reduce the generated code size (Java routines
            are limited to 64kb of bytecode) }
          ts_compact_int_array_init,
-         { for the JVM target: intialize enum fields in constructors with the
+         { for the JVM target: initialize enum fields in constructors with the
            enum class instance corresponding to ordinal value 0 (not done by
            default because this initialization can only be performed after the
            inherited constructors have run, and if they call a virtual method
@@ -437,7 +437,7 @@ interface
     type
        ttargetswitchinfo = record
           name: string[22];
-          { target switch can have an arbitratry value, not only on/off }
+          { target switch can have an arbitrary value, not only on/off }
           hasvalue: boolean;
           { target switch can be used only globally }
           isglobal: boolean;
@@ -519,7 +519,7 @@ interface
          m_tp_procvar,          { tp style procvars (no @ needed) }
          m_mac_procvar,         { macpas style procvars }
          m_repeat_forward,      { repeating forward declarations is needed }
-         m_pointer_2_procedure, { allows the assignement of pointers to
+         m_pointer_2_procedure, { allows the assignment of pointers to
                                   procedure variables                     }
          m_autoderef,           { does auto dereferencing of struct. vars }
          m_initfinal,           { initialization/finalization for units }

compiler/hlcg2ll.pas

@@ -1141,7 +1141,7 @@ implementation
           {Do not bother to recycle the existing register. The register
            allocator eliminates unnecessary moves, so it's not needed
            and trying to recycle registers can cause problems because
-           the registers changes size and may need aditional constraints.
+           the registers changes size and may need additional constraints.
 
            Not if it's about LOC_CREGISTER's (JM)
            }
@@ -1186,7 +1186,7 @@ implementation
               begin
                 { load_loc_reg can only handle size >= l.size, when the
                   new size is smaller then we need to adjust the size
-                  of the orignal and maybe recalculate l.register for i386 }
+                  of the original and maybe recalculate l.register for i386 }
                 if (TCGSize2Size[dst_cgsize]<TCGSize2Size[l.size]) then
                  begin
                    if (l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
@@ -1426,7 +1426,7 @@ implementation
        begin
          { initialize refcounted paras, and trash others. Needed here
            instead of in gen_initialize_code, because when a reference is
-           intialised or trashed while the pointer to that reference is kept
+           initialized or trashed while the pointer to that reference is kept
            in a regvar, we add a register move and that one again has to
            come after the parameter loading code as far as the register
            allocator is concerned }

compiler/hlcgobj.pas

@@ -1067,7 +1067,7 @@ implementation
                          inc(tmpref.offset,4);
                          reghasvalue:=true;
                        end;
-{$endif defind(cpu64bitalu) or defined(cpuhighleveltarget)}
+{$endif defined(cpu64bitalu) or defined(cpuhighleveltarget)}
                      if sizeleft>=2 then
                        begin
                          tmpreg:=getintregister(list,location^.def);
@@ -2775,7 +2775,7 @@ implementation
             end;
           LOC_REGISTER,LOC_CREGISTER:
             begin
-              { paramfpu_ref does the check_simpe_location check here if necessary }
+              { paramfpu_ref does the check_simple_location check here if necessary }
               tg.gethltemp(list,fromsize,fromsize.size,tt_normal,ref);
               a_loadfpu_reg_ref(list,fromsize,fromsize,r,ref);
               a_loadfpu_ref_cgpara(list,fromsize,ref,cgpara);
@@ -4433,7 +4433,7 @@ implementation
           begin
             { load_loc_reg can only handle size >= l.size, when the
               new size is smaller then we need to adjust the size
-              of the orignal and maybe recalculate l.register for i386 }
+              of the original and maybe recalculate l.register for i386 }
             if (dst_size.size<src_size.size) then
               begin
                 hregister2:=getregisterfordef(list,src_size);
@@ -5178,7 +5178,7 @@ implementation
       if (tsym(p).typ=staticvarsym) and not(tstaticvarsym(p).noregvarinitneeded) then
        begin
          { Static variables can have the initialloc only set to LOC_CxREGISTER
-           or LOC_INVALID, for explaination see gen_alloc_symtable (PFV) }
+           or LOC_INVALID, for explanation see gen_alloc_symtable (PFV) }
          case tstaticvarsym(p).initialloc.loc of
            LOC_CREGISTER :
              begin
@@ -5397,7 +5397,7 @@ implementation
         begin
           { initialize refcounted paras, and trash others. Needed here
             instead of in gen_initialize_code, because when a reference is
-            intialised or trashed while the pointer to that reference is kept
+            initialized or trashed while the pointer to that reference is kept
             in a regvar, we add a register move and that one again has to
             come after the parameter loading code as far as the register
             allocator is concerned }
@@ -5788,7 +5788,7 @@ implementation
       else
         new_section(current_asmdata.asmlists[alt],sec_code,lower(pd.mangledname),getprocalign);
       current_asmdata.asmlists[alt].concatlist(code);
-      { save local data (casetable) also in the same file }
+      { save local data (castable) also in the same file }
       if assigned(data) and
          (not data.empty) then
         current_asmdata.asmlists[alt].concatlist(data);

compiler/htypechk.pas

@@ -972,7 +972,7 @@ implementation
           exit;
 
         { operator overload is possible }
-        { if we only check for the existance of the overload, then we assume that
+        { if we only check for the existence of the overload, then we assume that
           it is not overloaded }
         result:=not (ocf_check_only in ocf);
 
@@ -1491,7 +1491,7 @@ implementation
                                typecasted to this type, and then we "assign" to
                                this typecasted function result) -> always
                                disallow, since property accessors should be
-                               transparantly changeable to functions at all
+                               transparently changeable to functions at all
                                times
                        }
                        not(gottypeconv) and
@@ -3054,7 +3054,7 @@ implementation
                    { is_in_limit(def_from, def_to) means that def_from.low >= def_to.low and def_from.high <= def_to.high. }
                    hp^.increment_ordinal_distance(torddef(def_from).low-torddef(def_to).low);
                    hp^.increment_ordinal_distance(torddef(def_to).high-torddef(def_from).high);
-                   { Give wrong sign a small penalty, this is need to get a diffrence
+                   { Give wrong sign a small penalty, this is need to get a difference
                      from word->[longword,longint] }
                    if (is_signed(def_from)<>is_signed(def_to)) then
                      inc(hp^.ordinal_distance_secondary);
@@ -3099,7 +3099,7 @@ implementation
                      end;
                  end
                { compare_defs_ext compares sets and array constructors very poorly because
-                 it has too little information. So we do explicitly a detailed comparisation,
+                 it has too little information. So we do explicitly a detailed comparison,
                  see also bug #11288 (FK)
                }
                else if assigned(def_to) and (def_to.typ=setdef) and is_array_constructor(currpt.left.resultdef) then
@@ -3137,7 +3137,7 @@ implementation
                   check_valid_var:=false;
                 end
               else
-              { generic type comparision }
+              { generic type comparison }
                begin
                  if (hp^.data.procoptions*[po_rtlproc,po_compilerproc]=[]) and
                     is_ansistring(def_from) and
@@ -3763,7 +3763,7 @@ implementation
           deeper down the next chain
         }
 
-        { for the intial implementation, let's first do some more consistency checking}
+        { for the initial implementation, let's first do some more consistency checking}
         res := 0;
         hp := FCandidateProcs;
         while assigned(hp) do

compiler/i386/cgcpu.pas

@@ -236,7 +236,7 @@ unit cgcpu;
         dirref:=r;
 
         { this could probably done in a more optimized way, but for now this
-          is sufficent }
+          is sufficient }
         make_direct_ref(list,dirref);
 
         with dirref do
@@ -399,7 +399,7 @@ unit cgcpu;
            { complex return values are removed from stack in C code PM }
            { but not on win32 }
            { and not for safecall with hidden exceptions, because the result }
-           { wich contains the exception is passed in EAX }
+           { which contains the exception is passed in EAX }
            if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
              list.concat(tai_regalloc.dealloc(NR_STACK_POINTER_REG,nil));
 

compiler/i386/cpupara.pas

@@ -561,7 +561,7 @@ unit cpupara;
                       if not(po_nostackframe in p.procoptions) then
                         inc(paraloc^.reference.offset,target_info.first_parm_offset)
                       else
-                        { return addres }
+                        { return address }
                         inc(paraloc^.reference.offset,4);
                     parasize:=align(parasize+l,varalign);
                     dec(paralen,l);

compiler/i386/n386add.pas

@@ -302,7 +302,7 @@ interface
            case nodetype of
               ltn,gtn,lten,gten:
                 begin
-                   { the comparisaion of the low dword have to be }
+                   { the comparison of the low dword have to be   }
                    {  always unsigned!                            }
                    cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.truelabel);
                    cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);

compiler/i386/n386flw.pas

@@ -509,7 +509,7 @@ procedure ti386tryexceptnode.pass_generate_code;
 
     oldflowcontrol:=flowcontrol;
     flowcontrol:=[fc_inflowcontrol];
-    { this can be called recursivly }
+    { this can be called recursively }
     oldBreakLabel:=nil;
     oldContinueLabel:=nil;
     oldendexceptlabel:=endexceptlabel;

compiler/i8086/cgcpu.pas

@@ -2480,7 +2480,7 @@ unit cgcpu;
            { complex return values are removed from stack in C code PM }
            { but not on win32 }
            { and not for safecall with hidden exceptions, because the result }
-           { wich contains the exception is passed in EAX }
+           { which contains the exception is passed in EAX }
            if (target_info.system <> system_i386_win32) and
               not ((current_procinfo.procdef.proccalloption = pocall_safecall) and
                (tf_safecall_exceptions in target_info.flags)) and

compiler/i8086/cpupara.pas

@@ -532,7 +532,7 @@ unit cpupara;
                         if not(po_nostackframe in p.procoptions) then
                           inc(paraloc^.reference.offset,target_info.first_parm_offset)
                         else
-                          { return addres }
+                          { return address }
                           inc(paraloc^.reference.offset,2);
                         if is_proc_far(p) then
                           inc(paraloc^.reference.offset,2);

compiler/i8086/n8086add.pas

@@ -579,7 +579,7 @@ interface
            case nodetype of
               ltn,gtn:
                 begin
-                   { the comparisaion of the low word have to be }
+                   { the comparison of the low word have to be   }
                    {  always unsigned!                           }
                    cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.truelabel);
                    { cheat a little bit for the negative test }
@@ -619,7 +619,7 @@ interface
            case nodetype of
               ltn,gtn,lten,gten:
                 begin
-                   { the comparisaion of the low word have to be }
+                   { the comparison of the low word have to be   }
                    {  always unsigned!                           }
                    cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.truelabel);
                    cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
@@ -797,7 +797,7 @@ interface
            case nodetype of
               ltn,gtn,lten,gten:
                 begin
-                   { the comparisaion of the low dword have to be }
+                   { the comparison of the low dword have to be   }
                    {  always unsigned!                            }
                    cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),location.truelabel);
                    cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);

compiler/jvm/agjasmin.pas

@@ -770,7 +770,7 @@ implementation
             result:='TODO: add support for constant sets';
           constpointer:
             { can only be null, but that's the default value and should not
-              be written; there's no primitive type that can hold nill }
+              be written; there's no primitive type that can hold nil }
             internalerror(2011021201);
           constnil:
             internalerror(2011021202);
@@ -829,7 +829,7 @@ implementation
               if sym.owner.symtabletype=globalsymtable then
                 result:='public '
               else
-                { package visbility }
+                { package visibility }
                 result:='';
             end;
           fieldvarsym,

compiler/jvm/hlcgcpu.pas

@@ -2360,10 +2360,10 @@ implementation
             continue;
           { vo_is_external and vo_has_local_copy means a staticvarsym that is
             alias for a constsym, whose sole purpose is for allocating and
-            intialising the constant }
+            initializing the constant }
           if [vo_is_external,vo_has_local_copy]*vs.varoptions=[vo_is_external] then
              continue;
-          { threadvar innitializations are handled at the node tree level }
+          { threadvar initializations are handled at the node tree level }
           if vo_is_thread_var in vs.varoptions then
             begin
               { nothing }

compiler/jvm/jvmdef.pas

@@ -358,7 +358,7 @@ implementation
                   if not jvmaddencodedtype(tarraydef(def).elementdef,false,encodedstr,forcesignature,founderror) then
                     begin
                       result:=false;
-                      { report the exact (nested) error defintion }
+                      { report the exact (nested) error definition }
                       exit;
                     end;
                 end;

compiler/jvm/njvmcnv.pas

@@ -74,7 +74,7 @@ interface
 
        tjvmasnode = class(tcgasnode)
         protected
-         { to discern beween "obj as tclassref" and "tclassref(obj)" }
+         { to discern between "obj as tclassref" and "tclassref(obj)" }
          classreftypecast: boolean;
          function target_specific_typecheck: boolean;override;
         public
@@ -437,7 +437,7 @@ implementation
             while st.symtabletype=localsymtable do
               st:=st.defowner.owner;
             if st.symtabletype in [objectsymtable,recordsymtable] then
-              { nested routine in method -> part of encloding class }
+              { nested routine in method -> part of enclosing class }
               procload:=cloadvmtaddrnode.create(ctypenode.create(tdef(st.defowner)))
             else
               begin
@@ -801,7 +801,7 @@ implementation
        else
          thlcgjvm(hlcg).a_load_const_stack(current_asmdata.CurrAsmList,resultdef,-1,R_INTREGISTER);
        { we jump over the next constant load -> they don't appear on the
-         stack simulataneously }
+         stack simultaneously }
        thlcgjvm(hlcg).decstack(current_asmdata.CurrAsmList,1);
        hlcg.a_jmp_always(current_asmdata.CurrAsmList,hlabel2);
        hlcg.a_label(current_asmdata.CurrAsmList,hlabel1);

compiler/jvm/njvmcon.pas

@@ -61,7 +61,7 @@ interface
            keep the set constant instead }
          sct_notransform,
          { actually construct a JUBitSet/JUEnumSet that contains the set value
-           (for initializing the sets contstants) }
+           (for initializing the sets constants) }
          sct_construct
          );
        tjvmsetconstnode = class(tcgsetconstnode)

compiler/jvm/njvmflw.pas

@@ -187,7 +187,7 @@ implementation
 
          oldflowcontrol:=flowcontrol;
          flowcontrol:=[fc_inflowcontrol];
-         { this can be called recursivly }
+         { this can be called recursively }
          oldbegintrylabel:=begintrylabel;
          oldendtrylabel:=endtrylabel;
          oldendexceptlabel:=endexceptlabel;

compiler/jvm/njvmld.pas

@@ -205,7 +205,7 @@ function tjvmloadnode.handle_threadvar_access: tnode;
       begin
         { in these cases, the threadvar was internally constructed as an
           "array of jlobject", while the variable itself is a different kind of
-          pointer (dynarmic array, class, interface, pointer type). We cannot
+          pointer (dynamic array, class, interface, pointer type). We cannot
           typecast an "array of jlobject" to e.g. an "array of array of byte",
           even if all elements inside the array are "array of byte" (since the
           outer array type is simply different) -> first dereference (= select
@@ -231,7 +231,7 @@ function tjvmloadnode.keep_param_address_in_nested_struct: boolean;
   begin
     { we don't need an extra load when implicit pointer types  are passed as
       var/out/constref parameter (since they are already pointers). However,
-      when transfering them into a nestedfp struct, we do want to transfer the
+      when transferring them into a nestedfp struct, we do want to transfer the
       pointer and not make a deep copy in case they are var/out/constref (since
       changes made to the var/out parameter should propagate up) }
     result:=

compiler/jvm/njvmtcon.pas

@@ -199,7 +199,7 @@ implementation
                   if n.nodetype<>stringconstn then
                     internalerror(2010033010);
                   ca:=pbyte(tstringconstnode(n).asconstpchar);
-                { For tp7 the maximum lentgh can be 255 }
+                { For tp7 the maximum length can be 255 }
                 if (m_tp7 in current_settings.modeswitches) and
                    (len>255) then
                  len:=255;

compiler/jvm/pjvm.pas

@@ -32,7 +32,7 @@ interface
 
     { records are emulated via Java classes. They require a default constructor
       to initialise temps, a deep copy helper for assignments, and clone()
-      to initialse dynamic arrays }
+      to initialize dynamic arrays }
     procedure add_java_default_record_methods_intf(def: trecorddef);
 
     procedure jvm_maybe_create_enum_class(const name: TIDString; def: tdef);

compiler/jvm/symcpu.pas

@@ -267,7 +267,7 @@ implementation
           may not be visible at the Pascal level }
 
         explicitwrapper:=
-          { private methods are not visibile outside the current class, so
+          { private methods are not visible outside the current class, so
             no use in making life harder for us by introducing potential
             (future or current) naming conflicts }
           (visibility<>vis_private) and
@@ -535,7 +535,7 @@ implementation
             { if the visibility of the field is lower than the
               visibility of the property, wrap it in a getter
               so that we can access it from all contexts in
-              which the property is visibile }
+              which the property is visible }
             if (pprefix^<>'') or
                (tfieldvarsym(sym).visibility<visibility) then
               create_getter_or_setter_for_property(nil,getset=palt_read);

compiler/llvm/aasmllvmmetadata.pas

@@ -160,7 +160,7 @@ interface
       procedure addstring(const aitemname: TSymStr; const stringval: TSymStr);
       procedure addenum(const aitemname: TSymStr; const enumval: TSymStr);
       { only allowed before adding any items; needed because when generating
-        debug info, we first generat everything as DIDerivedType (works for
+        debug info, we first generate everything as DIDerivedType (works for
         typedefs and most other types, and switch it later when necessary).
         Make it an explicit proc rather than a setter for kind to avoid
         accidental usage }

compiler/llvm/hlcgllvm.pas

@@ -1849,7 +1849,7 @@ implementation
       result.def:=llvmgetcgparadef(result,true,callerside);
       if assigned(result.location^.next) then
         begin
-          { unify the result into a sinlge location; unlike for parameters,
+          { unify the result into a single location; unlike for parameters,
             we are not responsible for splitting up results into multiple
             locations }
           { set the first location to the type of the function result }
@@ -1932,7 +1932,7 @@ implementation
          reusepara then
         exit;
       { get the equivalent llvm def used to pass the parameter (e.g. a record
-        with two int64 fields for passing a record consisiting of 8 bytes on
+        with two int64 fields for passing a record consisting of 8 bytes on
         x86-64) }
       llvmparadef:=llvmgetcgparadef(para,true,calleeside);
       userecord:=
@@ -2172,7 +2172,7 @@ implementation
               retpara.location^.llvmvalueloc:=false;
               retpara.location^.llvmloc.loc:=LOC_REGISTER;
               retpara.location^.llvmloc.reg:=rettemp.base;
-              { for the rest (normally not used, but cleaner to set it correclty) }
+              { for the rest (normally not used, but cleaner to set it correctly) }
               retpara.location^.loc:=LOC_REFERENCE;
               retpara.location^.reference.index:=rettemp.base;
               retpara.location^.reference.offset:=0;

compiler/llvm/llvmdef.pas

@@ -49,7 +49,7 @@ interface
 
     { returns the identifier to use as typename for a def in llvm (llvm only
       allows naming struct types) -- only supported for tabstractrecorddef
-      descendantds and complex procvars }
+      descendants and complex procvars }
     function llvmtypeidentifier(def: tdef): TSymStr;
 
     { encode a type into the internal format used by LLVM (for a type
@@ -96,7 +96,7 @@ interface
       which we know that they should be passed on the stack }
     function llvmbyvalparaloc(paraloc: pcgparalocation): boolean;
 
-    { returns whether a def is representated by an aggregate type in llvm
+    { returns whether a def is represented by an aggregate type in llvm
       (struct, array) }
     function llvmaggregatetype(def: tdef): boolean;
 

compiler/llvm/llvmpara.pas

@@ -37,7 +37,7 @@ unit llvmpara;
         aggregate parameters into multiple simple parameters in case they have
         to be passed in special registers (such as floating point or SSE), and
         also for indicating whether e.g. 8 bit parameters need to be sign or
-        zero exntended. This corresponds to pretty much what we do when creating
+        zero extended. This corresponds to pretty much what we do when creating
         parameter locations, so we reuse the original parameter manager and then
         process its output.
 

compiler/llvm/llvmtype.pas

@@ -513,7 +513,7 @@ implementation
         sec: tasmsectiontype;
         i: longint;
       begin
-        { Necessery for "external" declarations for symbols not declared in the
+        { Necessary for "external" declarations for symbols not declared in the
           current unit. We can't create these declarations when the alias is
           initially generated, because the symbol may still be defined later at
           that point.

compiler/llvm/nllvmcnv.pas

@@ -123,7 +123,7 @@ function tllvmtypeconvnode.first_int_to_real: tnode;
     if (llvmflag_constrained_fptoi_itofp in llvmversion_properties[current_settings.llvmversion]) and
        { these are converted to 80 bits first in any case }
        not(tfloatdef(resultdef).floattype in [s64currency,s64comp]) and
-       { no actuual int -> floating point conversion }
+       { no actual int -> floating point conversion }
        (torddef(left.resultdef).ordtype<>scurrency) and
        ((left.resultdef.size>=resultdef.size) or
         ((torddef(left.resultdef).ordtype=u64bit) and

compiler/llvm/nllvmcon.pas

@@ -65,7 +65,7 @@ implementation
         inherited;
         if def=llvm_metadatatype then
           begin
-            { astringdef is only used if the constant type is ansitring }
+            { astringdef is only used if the constant type is ansistring }
             cst_type:=cst_ansistring;
             astringdef:=def;
           end;

compiler/llvm/nllvmtcon.pas

@@ -374,7 +374,7 @@ implementation
         exit;
       inherited;
       { we can only check here whether the aggregate does not match our
-        cononical llvm definition, as the tail padding may cause a mismatch
+        canonical llvm definition, as the tail padding may cause a mismatch
         (in case not all fields have been defined), and we can't do it inside
         end_aggregate_internal as its inherited method (which calls this
         method) frees curagginfo before it returns }

compiler/loongarch64/aasmcpu.pas

@@ -38,7 +38,7 @@ uses
 
 
     type
-      { TODO: Branch condition? TRefernece and Symbol? }
+      { TODO: Branch condition? TReference and Symbol? }
       { taicpu }
 
       taicpu = class(tai_cpu_abstract_sym)

compiler/loongarch64/cgcpu.pas

@@ -515,7 +515,7 @@ implementation
       begin
         href:=ref;
         fixref(list,href,fr_normal,tmpreg,tmpreg2);
-        { Fixref, so simplely work here. }
+        { Fixref, so simply work here. }
         if href.offset=0 then
           a_load_reg_reg(list,OS_ADDR,OS_ADDR,href.base,r)
         else if is_simm12(href.offset) and (href.base<>NR_NO) then
@@ -969,7 +969,7 @@ implementation
               regs:=regs+[RS_RETURN_ADDRESS_REG];
             { Float registers }
             fregs:=rg[R_FPUREGISTER].used_in_proc-paramanager.get_volatile_registers_fpu(pocall_stdcall);
-            { Calculate the stackcount of all regesters. }
+            { Calculate the stackcount of all registers. }
             stackcount:=16;
             for r:=RS_R1 to RS_R31 do
               if (r in regs) and (r<>RS_FRAME_POINTER_REG) and (r<>RS_RETURN_ADDRESS_REG) then
@@ -1041,7 +1041,7 @@ implementation
                   list.concat(taicpu.op_reg_ref(A_FST_D,newreg(R_FPUREGISTER,r,R_SUBWHOLE),href));
                   current_asmdata.asmcfi.cfa_offset(list,newreg(R_FPUREGISTER,r,R_SUBWHOLE),href.offset);
                 end;
-            { Decrese the remaining stack size. }
+            { Decrease the remaining stack size. }
             if (localsize-stackadjust)>2048 then
               begin
                 a_load_const_reg(list,OS_INT,localsize-stackadjust,NR_RETURN_ADDRESS_REG);
@@ -1565,7 +1565,7 @@ implementation
             else { ref.index=NR_NO }
               ref.index:=tmpreg;
           end
-        { Refernce only offset, make offset become a reg. }
+        { Reference only offset, make offset become a reg. }
         else if (ref.index=NR_NO) and (ref.base=NR_NO) then
           begin
             tmpreg:=getintregister(list,OS_INT);

compiler/loongarch64/ncpuadd.pas

@@ -400,7 +400,7 @@ implementation
     function tloongarch64addnode.pass_1: tnode;
       begin
         Result:=inherited pass_1;
-        { if the result is not nil, a new node has been generated and the current node will be discarted }
+        { if the result is not nil, a new node has been generated and the current node will be discarded }
         if Result=nil then
           begin
             if left.resultdef.typ=floatdef then

compiler/loongarch64/racpugas.pas

@@ -326,7 +326,7 @@ unit racpugas;
       begin
         instr:=tloongarch64instruction.create(tloongarch64operand);
         BuildOpCode(instr);
-        { TODO insruction field }
+        { TODO instruction field }
         instr.ConcatInstruction(curlist);
         instr.Free;
       end;

compiler/m68k/aasmcpu.pas

@@ -765,7 +765,7 @@ type
           ot: toperandtype;
         begin
           // fix me: this function could use some improvements, in particular checking
-          // agains for example CF or 68000 limitations, etc
+          // against for example CF or 68000 limitations, etc
           result:=false;
 
           for ot in ots do
@@ -871,7 +871,7 @@ type
 
         if (InsEntry=nil) then
           begin
-            { set the file postion }
+            { set the file position }
             current_filepos:=fileinfo;
           end
         else
@@ -969,7 +969,7 @@ type
         { Error? }
         if (InsEntry=nil) and (InsSize=-1) then
           exit;
-        { set the file postion }
+        { set the file position }
         current_filepos:=fileinfo;
         { Get InsEntry }
         if FindInsEntry(ObjData) then

compiler/m68k/aoptcpu.pas

@@ -563,7 +563,7 @@ unit aoptcpu;
 
                       Actually, as in this case the stack pointer is no used as a frame pointer and
                       there will be more instructions to restore the stack frame before jsr, so this
-                      is unlikedly to happen }
+                      is unlikely to happen }
                     (current_procinfo.maxpushedparasize=0) then
                     begin
                       DebugMsg('Optimizer: JSR, RTS to JMP',p);

compiler/m68k/cpuinfo.pas

@@ -169,7 +169,7 @@ type
       CPUM68K_HAS_INDEXSCALE,   { CPU supports scaling the index register with 2 or 4       }
       CPUM68K_HAS_INDEXSCALE8,  { CPU supports scaling the index register with 2, 4 or 8    }
       CPUM68K_HAS_INDEXWORD,    { CPU supports indexing with 16bit index                    }
-      CPUM68K_HAS_BYTEWORDMATH, { CPU supports supports 8 and 16bit aritmetic operations    }
+      CPUM68K_HAS_BYTEWORDMATH, { CPU supports supports 8 and 16bit arithmetic operations   }
       CPUM68K_HAS_BITFIELD,     { CPU supports bitfield instructions                        }
       CPUM68K_HAS_LONGENCODING, { CPU supports long instruction encoding (i.e. non-CF)      }
       CPUM68K_HAS_TSTAREG       { CPU supports TST on address registers                     }

compiler/m68k/ra68kmot.pas

@@ -39,7 +39,7 @@ unit ra68kmot;
 {      presently only (an,dn) is supported for indexing --                  }
 {        size defaults to LONG.                                             }
 {  o Add support for MC68020 opcodes.                                       }
-{  o Add support for MC68020 adressing modes.                               }
+{  o Add support for MC68020 addressing modes.                              }
 {  o Add operand checking with m68k opcode table in ConcatOpCode            }
 {  o Add Floating point support                                             }
 {---------------------------------------------------------------------------}
@@ -262,7 +262,7 @@ const
 
     if not (c in [#10,#13,'{',';','(','/']) then
      current_scanner.gettokenpos;
-    { Possiblities for first token in a statement:                }
+    { Possibilities for first token in a statement:               }
     {   Local Label, Label, Directive, Prefix or Opcode....       }
     if firsttoken and not (c in [#10,#13,'{',';','(','/']) then
     begin
@@ -317,7 +317,7 @@ const
     begin
       case c of
 
-         '@':   { possiblities : - local label reference , such as in jmp @local1 }
+         '@':   { possibilities : - local label reference , such as in jmp @local1}
                 {                - @Result, @Code or @Data special variables.     }
                             begin
                              actasmpattern := c;

compiler/macho.pas

@@ -156,13 +156,13 @@ const
  *
  * The subtype definitions here are unusual for historical reasons.
  * NeXT used to consider 68030 code as generic 68000 code.  For
- * backwards compatability:
+ * backwards compatibility:
  *
  *	CPU_SUBTYPE_MC68030 symbol has been preserved for source code
- *	compatability.
+ *	compatibility.
  *
  *	CPU_SUBTYPE_MC680x0_ALL has been defined to be the same
- *	subtype as CPU_SUBTYPE_MC68030 for binary comatability.
+ *	subtype as CPU_SUBTYPE_MC68030 for binary compatibility.
  *
  *	CPU_SUBTYPE_MC68030_ONLY has been added to allow new object
  *	files to be tagged as containing 68030-specific instructions.
@@ -413,11 +413,11 @@ const
    * segment padding greatly increases its size.
    *
    * The file type MH_PRELOAD is an executable format intended for things that
-   * are not executed under the kernel (proms, stand alones, kernels, etc).  The
+   * are not executed under the kernel (proms, stand alone, kernels, etc).  The
    * format can be executed under the kernel but may demand paged it and not
    * preload it before execution.
    *
-   * A core file is in MH_CORE format and can be any in an arbritray legal
+   * A core file is in MH_CORE format and can be any in an arbitrary legal
    * Mach-O file.
    *
    * Constants for the filetype field of the mach_header }
@@ -439,14 +439,14 @@ const
 
   MH_NOUNDEFS     = $1;   { the object file has no undefined references  }
   MH_INCRLINK     = $2;   { the object file is the output of an  incremental link against a base file and can't be link edited again  }
-  MH_DYLDLINK     = $4;   { the object file is input for the dynamic linker and can't be staticly link edited again  }
+  MH_DYLDLINK     = $4;   { the object file is input for the dynamic linker and can't be statically link edited again  }
   MH_BINDATLOAD   = $8;   { the object file's undefined references are bound by the dynamic linker when loaded.  }
   MH_PREBOUND     = $10;  { the file has its dynamic undefined references prebound.  }
   MH_SPLIT_SEGS   = $20;  { the file has its read-only and read-write segments split  }
   MH_LAZY_INIT    = $40;  { the shared library init routine is to be run lazily via catching memory faults to its writeable segments (obsolete)  }
   MH_TWOLEVEL     = $80;  { the image is using two-level name space bindings  }
   MH_FORCE_FLAT   = $100; { the executable is forcing all images to use flat name space bindings  }
-  MH_NOMULTIDEFS  = $200; { this umbrella guarantees no multiple defintions of symbols in its sub-images so the two-level namespace hints can always be used.  }
+  MH_NOMULTIDEFS  = $200; { this umbrella guarantees no multiple definitions of symbols in its sub-images so the two-level namespace hints can always be used.  }
   MH_NOFIXPREBINDING = $400;  { do not have dyld notify the prebinding agent about this executable  }
   MH_PREBINDABLE     = $800;  { the binary is not prebound but can have its prebinding redone. only used when MH_PREBOUND is not set.  }
   MH_ALLMODSBOUND    = $1000; { indicates that this binary binds to  all two-level namespace modules of                }
@@ -809,7 +809,7 @@ const
   SEG_UNIXSTACK = '__UNIXSTACK'; { the unix stack segment  }
 
   SEG_IMPORT = '__IMPORT'; { the segment for the self (dyld)  }
-                           { modifing code stubs that has read, write and execute permissions  }
+                           { modifying code stubs that has read, write and execute permissions  }
 
   {* Fixed virtual memory shared libraries are identified by two things.  The
    * target pathname (the name of the library as found for execution), and the
@@ -836,7 +836,7 @@ type
   end;
   pfvmlib_command = ^fvmlib_command;
 
-  {* Dynamicly linked shared libraries are identified by two things.  The
+  {* Dynamically linked shared libraries are identified by two things.  The
    * pathname (the name of the library as found for execution), and the
    * compatibility version number.  The pathname must match and the compatibility
    * number in the user of the library must be greater than or equal to the
@@ -900,9 +900,9 @@ type
    * A dynamically linked shared library may be a sub_umbrella of an umbrella
    * framework.  If so it will be linked with "-sub_umbrella umbrella_name" where
    * Where "umbrella_name" is the name of the sub_umbrella framework.  When
-   * staticly linking when -twolevel_namespace is in effect a twolevel namespace
+   * statically linking when -twolevel_namespace is in effect a twolevel namespace
    * umbrella framework will only cause its subframeworks and those frameworks
-   * listed as sub_umbrella frameworks to be implicited linked in.  Any other
+   * listed as sub_umbrella frameworks to be implicated linked in.  Any other
    * dependent dynamic libraries will not be linked it when -twolevel_namespace
    * is in effect.  The primary library recorded by the static linker when
    * resolving a symbol in these libraries will be the umbrella framework.
@@ -919,10 +919,10 @@ type
   {* A dynamically linked shared library may be a sub_library of another shared
    * library.  If so it will be linked with "-sub_library library_name" where
    * Where "library_name" is the name of the sub_library shared library.  When
-   * staticly linking when -twolevel_namespace is in effect a twolevel namespace
+   * statically linking when -twolevel_namespace is in effect a twolevel namespace
    * shared library will only cause its subframeworks and those frameworks
    * listed as sub_umbrella frameworks and libraries listed as sub_libraries to
-   * be implicited linked in.  Any other dependent dynamic libraries will not be
+   * be implicated linked in.  Any other dependent dynamic libraries will not be
    * linked it when -twolevel_namespace is in effect.  The primary library
    * recorded by the static linker when resolving a symbol in these libraries
    * will be the umbrella framework (or dynamic library). Zero or more sub_library
@@ -1193,14 +1193,14 @@ type
     nextrel         : uint32_t; { number of external relocation entries  }
     {   * All the local relocation entries are grouped together (they are not
        * grouped by their module since they are only used if the object is moved
-       * from it staticly link edited address).      }
+       * from it statically link edited address).      }
     locreloff       : uint32_t; { offset to local relocation entries  }
     nlocrel         : uint32_t; { number of local relocation entries  }
   end;
 
   {
    * An indirect symbol table entry is simply a 32bit index into the symbol table
-   * to the symbol that the pointer or stub is refering to.  Unless it is for a
+   * to the symbol that the pointer or stub is referring to.  Unless it is for a
    * non-lazy symbol pointer section for a defined symbol which strip(1) as
    * removed.  In which case it has the value INDIRECT_SYMBOL_LOCAL.  If the
    * symbol was also absolute INDIRECT_SYMBOL_ABS is or'ed with that.
@@ -1388,7 +1388,7 @@ type
     cmdsize   : uint32_t; { sizeof(struct encryption_info_command)  }
     cryptoff  : uint32_t; { file offset of encrypted range  }
     cryptsize : uint32_t; { file size of encrypted range  }
-    cryptid   : uint32_t; { which enryption system, 0 means not-encrypted yet  }
+    cryptid   : uint32_t; { which encryption system, 0 means not-encrypted yet  }
   end;
   pencryption_info_command = ^encryption_info_command;
 
@@ -1437,7 +1437,7 @@ type
 
 
   {* This header file describes the structures of the file format for "fat"
-   * architecture specific file (wrapper design).  At the begining of the file
+   * architecture specific file (wrapper design).  At the beginning of the file
    * there is one fat_header structure followed by a number of fat_arch
    * structures.  For each architecture in the file, specified by a pair of
    * cputype and cpusubtype, the fat_header describes the file offset, file
@@ -1601,7 +1601,7 @@ const
 
   {* To simplify stripping of objects that use are used with the dynamic link
    * editor, the static link editor marks the symbols defined an object that are
-   * referenced by a dynamicly bound object (dynamic shared libraries, bundles).
+   * referenced by a dynamically bound object (dynamic shared libraries, bundles).
    * With this marking strip knows not to strip these symbols.}
   REFERENCED_DYNAMICALLY = $0010;
 
@@ -1657,7 +1657,7 @@ const
 
   {* The N_DESC_DISCARDED bit of the n_desc field never appears in linked image.
    * But is used in very rare cases by the dynamic link editor to mark an in
-   * memory symbol as discared and longer used for linking. }
+   * memory symbol as discard and longer used for linking. }
   N_DESC_DISCARDED = $0020; { symbol is discarded  }
 
   {* The N_WEAK_REF bit of the n_desc field indicates to the dynamic linker that
@@ -1667,16 +1667,16 @@ const
 
   {* The N_WEAK_DEF bit of the n_desc field indicates to the static and dynamic
    * linkers that the symbol definition is weak, allowing a non-weak symbol to
-   * also be used which causes the weak definition to be discared.  Currently this
-   * is only supported for symbols in coalesed sections. }
-  N_WEAK_DEF = $0080; { coalesed symbol is a weak definition  }
+   * also be used which causes the weak definition to be discard.  Currently this
+   * is only supported for symbols in coalesced sections. }
+  N_WEAK_DEF = $0080; { coalesced symbol is a weak definition  }
 
   {* The N_REF_TO_WEAK bit of the n_desc field indicates to the dynamic linker
    * that the undefined symbol should be resolved using flat namespace searching. }
   N_REF_TO_WEAK = $0080; { reference to a weak symbol  }
 
   {* The N_ARM_THUMB_DEF bit of the n_desc field indicates that the symbol is
-   * a defintion of a Thumb function. }
+   * a definition of a Thumb function. }
   N_ARM_THUMB_DEF = $0008; { symbol is a Thumb function (ARM)  }
 
   {* There are two known orders of table of contents for archives.  The first is
@@ -1751,7 +1751,7 @@ const
    * In 4.3BSD a.out objects this offset is from the start of the "segment" for
    * which relocation entry is for (text or data).  For Mach-O object files it is
    * also an offset but from the start of the "section" for which the relocation
-   * entry is for.  See comments in <mach-o/loader.h> about the r_address feild
+   * entry is for.  See comments in <mach-o/loader.h> about the r_address field
    * in images for used with the dynamic linker.
    *
    * In 4.3BSD a.out objects if r_extern is zero then r_symbolnum is an ordinal
@@ -1824,7 +1824,7 @@ type
                   		    r_length:2, 	/* 0=byte, 1=word, 2=long, 3=quad */
                   		    r_type:4,   	/* if not 0, machine specific relocation type */
                           r_address:24;	/* offset in the section to what is being relocated */}
-    r_value : int32_t;  {* the value the item to be relocated is refering to (without any offset added) *}
+    r_value : int32_t;  {* the value the item to be relocated is referring to (without any offset added) *}
     {$else}
     r_value : int32_t;
     r_info  : longint; {*	r_address:24,	  /* offset in the section to what is being relocated */
@@ -1837,7 +1837,7 @@ type
 
   {
    * Relocation types used in a generic implementation.  Relocation entries for
-   * normal things use the generic relocation as discribed above and their r_type
+   * normal things use the generic relocation as described above and their r_type
    * is GENERIC_RELOC_VANILLA (a value of zero).
    *
    * Another type of generic relocation, GENERIC_RELOC_SECTDIFF, is to support
@@ -1848,14 +1848,14 @@ type
    * symbol1 is stored in the first relocation entry's r_value field and the
    * value of symbol2 is stored in the pair's r_value field.
    *
-   * A special case for a prebound lazy pointer is needed to beable to set the
+   * A special case for a prebound lazy pointer is needed to be able to set the
    * value of the lazy pointer back to its non-prebound state.  This is done
    * using the GENERIC_RELOC_PB_LA_PTR r_type.  This is a scattered relocation
-   * entry where the r_value feild is the value of the lazy pointer not prebound.
+   * entry where the r_value field is the value of the lazy pointer not prebound.
     }
 
 const
-  GENERIC_RELOC_VANILLA        = 0; { generic relocation as discribed above  }
+  GENERIC_RELOC_VANILLA        = 0; { generic relocation as described above  }
   GENERIC_RELOC_PAIR           = 1; { Only follows a GENERIC_RELOC_SECTDIFF  }
   GENERIC_RELOC_SECTDIFF       = 2;
   GENERIC_RELOC_PB_LA_PTR      = 3; { prebound lazy pointer  }
@@ -2017,7 +2017,7 @@ const
 
 
   {* Relocation types used in the ppc implementation.  Relocation entries for
-   * things other than instructions use the same generic relocation as discribed
+   * things other than instructions use the same generic relocation as described
    * above and their r_type is RELOC_VANILLA.  The rest of the relocation types
    * are for instructions.  Since they are for instructions the r_address field
    * indicates the 32 bit instruction that the relocation is to be preformed on.
@@ -2032,7 +2032,7 @@ const
     }
 
 const
-  PPC_RELOC_VANILLA   = 0; { generic relocation as discribed above  }
+  PPC_RELOC_VANILLA   = 0; { generic relocation as described above  }
   PPC_RELOC_PAIR      = 1; { the second relocation entry of a pair  }
   PPC_RELOC_BR14      = 2; { 14 bit branch displacement (to a word address)  }
   PPC_RELOC_BR24      = 3; { 24 bit branch displacement (to a word address)  }
@@ -2062,7 +2062,7 @@ const
    *
    * where n_type is the defined constant and not listed in the comment.  Other
    * fields not listed are zero. n_sect is the section ordinal the entry is
-   * refering to.
+   * referring to.
     }
 
 const

compiler/mips/aasmcpu.pas

@@ -551,7 +551,7 @@ procedure fixup_jmps(list: TAsmList);
         { ait_const is for jump tables }
         case p.typ of
           ait_instruction:
-            { probleim here: pseudo-instructions can translate into
+            { problem here: pseudo-instructions can translate into
               several CPU instructions, possibly depending on assembler options,
               to obe on safe side, let's assume a mean of two. }
             inc(instrpos,2);

compiler/mips/cgcpu.pas

@@ -1018,7 +1018,7 @@ end;
 
 
 
-{*************** compare instructructions ****************}
+{*************** compare instructions ****************}
 
 procedure TCGMIPS.a_cmp_const_reg_label(list: tasmlist; size: tcgsize; cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel);
 var
@@ -1927,7 +1927,7 @@ begin
         else
           cg.a_load_reg_reg(list,OS_32,OS_32,regsrc.reglo,regdst.reglo);
 
-        { With overflow checking and unsigned args, this generates slighly suboptimal code
+        { With overflow checking and unsigned args, this generates slightly suboptimal code
          ($80000000 constant loaded twice). Other cases are fine. Getting it perfect does not
          look worth the effort. }
         cg.a_op_const_reg_reg_checkoverflow(list,OP_ADD,hisize,aint(hi(value)),regsrc.reghi,regdst.reghi,setflags,ovloc);

compiler/mips/cpupara.pas

@@ -544,7 +544,7 @@ implementation
                 firstparaloc:=false;
               end;
           end;
-        { O32 ABI reqires at least 16 bytes }
+        { O32 ABI requires at least 16 bytes }
         if (intparasize < 16) then
           intparasize := 16;
       end;

compiler/nadd.pas

@@ -94,7 +94,7 @@ interface
           function use_mul_helper: boolean; virtual;
 {$endif cpuneedsmulhelper}
 
-          { shall be overriden if the target cpu supports
+          { shall be overridden if the target cpu supports
             an fma instruction
           }
           function use_fma : boolean; virtual;
@@ -242,7 +242,7 @@ const
         v           : tconstexprint;
       begin
         result:=false;
-        { check for comparision with known result because the ranges of the operands don't overlap }
+        { check for comparison with known result because the ranges of the operands don't overlap }
         if (is_constintnode(right) and (left.resultdef.typ=orddef) and
             { don't ignore type checks }
             is_subequal(right.resultdef,left.resultdef)) or
@@ -958,7 +958,7 @@ const
             }
             else if (left.nodetype=nodetype) and
               { there might be a mul operation e.g. longint*longint => int64 in this case
-                we cannot do this optimziation, see e.g. tests/webtbs/tw36587.pp on arm }
+                we cannot do this optimization, see e.g. tests/webtbs/tw36587.pp on arm }
               (compare_defs(resultdef,ld,nothingn)=te_exact) then
               begin
                 if is_constintnode(taddnode(left).left) then
@@ -1313,7 +1313,7 @@ const
              exit;
           end;
 
-        { concating strings ? }
+        { concatenating strings ? }
         concatstrings:=false;
 
         if (lt=ordconstn) and (rt=ordconstn) and
@@ -1495,7 +1495,7 @@ const
               end;
           end;
 
-        { optimze @<proc>=/<>@<proc>,
+        { optimize @<proc>=/<>@<proc>,
           such code might appear in generic specializations }
         if (nodetype in [equaln,unequaln]) and
           (left.nodetype=typeconvn) and (is_voidpointer(left.resultdef)) and (ttypeconvnode(left).left.nodetype=typeconvn) and
@@ -1604,7 +1604,7 @@ const
                     { SwapRightWithLeftLeft moves the nodes around in way that we need to insert a minus
                       on left.right: a-b-c becomes b-c-a so we
                       need
-                      1) insert a minus bevor b
+                      1) insert a minus before b
                       2) make the current node an add node, see below
                     }
                     if nodetype=subn then
@@ -1784,7 +1784,7 @@ const
                         ;
                     end;
                   end
-                { short to full boolean evalution possible and useful? }
+                { short to full boolean evaluation possible and useful? }
                 else if not(might_have_sideeffects(right,[mhs_exceptions])) and doshortbooleval(self) then
                   begin
                     case nodetype of
@@ -2827,7 +2827,7 @@ const
                   end;
               end;
           end
-         { pointer comparision and subtraction }
+         { pointer comparison and subtraction }
          else if (
                   (rd.typ=pointerdef) and (ld.typ=pointerdef)
                  ) or
@@ -4614,7 +4614,7 @@ const
          { if both are orddefs then check sub types }
          else if (ld.typ=orddef) and (rd.typ=orddef) then
            begin
-             { optimize multiplacation by a power of 2 }
+             { optimize multiplication by a power of 2 }
              if not(cs_check_overflow in current_settings.localswitches) and
                 (nodetype = muln) and
                 (((left.nodetype = ordconstn) and
@@ -4869,7 +4869,7 @@ const
                 exit;
             end
 
-         { pointer comperation and subtraction }
+         { pointer comparison and subtraction }
          else if (ld.typ=pointerdef) then
             begin
               if nodetype in [addn,subn,muln,andn,orn,xorn] then

compiler/nbas.pas

@@ -314,7 +314,7 @@ interface
         { a node which removes a temp }
         ttempdeletenode = class(ttempbasenode)
           constructor create(const temp: ttempcreatenode); virtual;
-          { this will convert the persistant temp to a normal temp
+          { this will convert the persistent temp to a normal temp
             for returning to the other nodes }
           constructor create_normal_temp(const temp: ttempcreatenode);
           constructor ppuload(t:tnodetype;ppufile:tcompilerppufile);override;

compiler/ncal.pas

@@ -1239,7 +1239,7 @@ implementation
                     else
                      begin
                        include(tarrayconstructornode(left).arrayconstructornodeflags,acnf_novariaallowed);
-                       { now that the resultting type is know we can insert the required
+                       { now that the resulting type is know we can insert the required
                          typeconvs for the array constructor }
                        if parasym.vardef.typ=arraydef then
                          tarrayconstructornode(left).force_type(tarraydef(parasym.vardef).elementdef);
@@ -1602,7 +1602,7 @@ implementation
             assigned(current_procinfo) then
            begin
             { only needed when calling a destructor from an exception block in a
-              contructor of a TP-style object }
+              constructor of a TP-style object }
             if (current_procinfo.procdef.proctypeoption=potype_constructor) and
                (cnf_create_failed in callflags) then
               if is_object(current_structdef) then
@@ -2453,7 +2453,7 @@ implementation
                       maybe_load_in_temp(p);
                       hightree:=geninlinenode(in_ord_x,false,geninlinenode(in_high_x,false,p.getcopy));
                       typecheckpass(hightree);
-                      { only substract low(array) if it's <> 0 }
+                      { only subtract low(array) if it's <> 0 }
                       temp:=geninlinenode(in_ord_x,false,geninlinenode(in_low_x,false,p.getcopy));
                       typecheckpass(temp);
                       if (temp.nodetype <> ordconstn) or
@@ -3313,7 +3313,7 @@ implementation
                       if called from a constructor then
                         don't call afterconstruction, vmt=0
                       else
-                        call afterconstrution but not NewInstance, vmt=-1 }
+                        call afterconstruction but not NewInstance, vmt=-1 }
                   if (procdefinition.proctypeoption=potype_destructor) then
                     if (current_procinfo.procdef.proctypeoption<>potype_constructor) then
                       vmttree:=cpointerconstnode.create(1,voidpointertype)
@@ -3834,7 +3834,7 @@ implementation
           end;
         { Remove value of old array of const parameter, but keep it
           in the list because it is required for bind_parasym.
-          Generate a nothign to keep callparanoed.left valid }
+          Generate a nothing to keep callparanoed.left valid }
         oldleft.left.free;
         oldleft.left:=cnothingnode.create;
       end;
@@ -4634,7 +4634,7 @@ implementation
         hpfirst:=nil;
         hpcurr:=tcallparanode(left);
         { cache all info about parameters containing stack tainting calls,
-          since we will need it a lot below and calculting it can be expensive }
+          since we will need it a lot below and calculating it can be expensive }
         while assigned(hpcurr) do
           begin
             { Also remember the original parameter order for the sake of
@@ -4686,7 +4686,7 @@ implementation
               because they will prevent any other parameters from being put
               in their final place; if both the current and the next para
               contain a stack tainting call, don't do anything to prevent
-              them from keeping on chasing eachother's tail }
+              them from keeping on chasing each other's tail }
             while assigned(hp) do
               begin
                 if paramanager.use_fixed_stack and
@@ -4756,7 +4756,7 @@ implementation
         left:=hpfirst;
         { now mark each parameter that is followed by a stack-tainting call,
           to determine on use_fixed_stack targets which ones can immediately be
-          put in their final destination. Unforunately we can never put register
+          put in their final destination. Unfortunately we can never put register
           parameters immediately in their final destination (even on register-
           rich architectures such as the PowerPC), because the code generator
           can still insert extra calls that only make use of register
@@ -4887,7 +4887,7 @@ implementation
                 parameter and we can pass the address transparently (but
                 that is handled by make_not_regable if ra_addr_regable is
                 passed, and make_not_regable always needs to called for
-                the ra_addr_taken info for non-invisble parameters) }
+                the ra_addr_taken info for non-invisible parameters) }
               if (not (cpf_varargs_para in hp.callparaflags)) and (
                   not(
                       (vo_is_hidden_para in hp.parasym.varoptions) and

compiler/ncgcal.pas

@@ -1318,7 +1318,7 @@ implementation
            really adjusted because a ret xxx was done, depends on
            pop_parasize which uses pushedparasize to determine this
 
-           This does not apply to interrupt procedures, their ret statment never clears any stack parameters }
+           This does not apply to interrupt procedures, their ret statement never clears any stack parameters }
          else if paramanager.use_fixed_stack and
                  not(po_interrupt in procdefinition.procoptions) and
                  (target_info.abi=abi_i386_dynalignedstack) then

compiler/ncgcnv.pas

@@ -102,7 +102,7 @@ interface
       begin
         newsize:=def_cgsize(resultdef);
 
-        { insert range check if not explicit or interally generated conversion }
+        { insert range check if not explicit or internally generated conversion }
         if (flags*[nf_explicit,nf_internal])=[] then
           hlcg.g_rangecheck(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef);
 
@@ -149,7 +149,7 @@ interface
           begin
             { no special loading is required, reuse current location }
 
-            { that's not true, if you go from signed to unsiged or   }
+            { that's not true, if you go from signed to unsigned or  }
             { vice versa, you need sign extension/removal if the     }
             { value is already in a register (at least for archs     }
             { which don't have 8bit register components etc) (JM)    }

compiler/ncgflw.pas

@@ -566,7 +566,7 @@ implementation
          breakexceptlabel:=nil;
          doobjectdestroyandreraisestate:=Default(tcgexceptionstatehandler.texceptionstate);
 
-         { this can be called recursivly }
+         { this can be called recursively }
          oldBreakLabel:=nil;
          oldContinueLabel:=nil;
          oldendexceptlabel:=endexceptlabel;
@@ -1038,7 +1038,7 @@ implementation
          { don't generate line info for internal cleanup }
          current_asmdata.CurrAsmList.concat(tai_marker.create(mark_NoLineInfoStart));
 
-         { same level as before try, but this part is only executed if an exception occcurred
+         { same level as before try, but this part is only executed if an exception occurred
            -> always fc_in_flowcontrol }
          flowcontrol:=finallyexceptionstate.oldflowcontrol*[fc_catching_exceptions];
          include(flowcontrol,fc_inflowcontrol);
@@ -1055,12 +1055,12 @@ implementation
                  if current_procinfo.procdef.generate_safecall_wrapper then
                    begin
                      handle_safecall_exception;
-                     { we have to jump immediatly as we have to return the value of FPC_SAFECALL }
+                     { we have to jump immediately as we have to return the value of FPC_SAFECALL }
                      hlcg.a_jmp_always(current_asmdata.CurrAsmList,oldCurrExitLabel);
                    end
                  else
                    cexceptionstatehandler.handle_reraise(current_asmdata.CurrAsmList,excepttemps,finallyexceptionstate,exceptframekind);
-                 { we have to load 0 into the execepttemp, else the program thinks an exception happended }
+                 { we have to load 0 into the execepttemp, else the program thinks an exception happened }
                  emit_jump_out_of_try_finally_frame(current_asmdata.CurrAsmList,0,finallyexceptionstate.exceptionlabel,excepttemps,exitfinallylabel);
                end
              else