Make MRS and MSR use the right encoding on Thumb architectures.

Set regnumber_count_bsstart to 128 to be able to search all registers.

git-svn-id: branches/laksen/armiw@30150 -

compiler/arm/armins.dat

@@ -299,7 +299,6 @@ reg32,reg32         \321\300\1\x11\101            ARM32,ARMv4
 [LDMcc]
 memam4,reglist              \x69\xC8            THUMB,ARMv4T
 reglo,reglist               \x69\xC8            THUMB,ARMv4T
-reg32,reglist		   \x26\x81			ARM7
 
 memam4,reglist              \x8C\xE8\x10\x0\x0  THUMB32,WIDE,ARMv6T2
 reg32,reglist               \x8C\xE8\x10\x0\x0  THUMB32,WIDE,ARMv6T2
@@ -396,11 +395,11 @@ reg32,reg32,shifterop   \xA\x1\xA0                       ARM32,ARMv4
 reg32,immshifter        \xB\x1\xA0                       ARM32,ARMv4
 
 [MRScc]
-reg32,regf          \x90\xF3\xEF\x80\x0                 THUMB32,ARMv6
+reg32,regf          \x96\xF3\xEF\x80\x0                 THUMB32,ARMv6
 reg32,regf          \x10\x01\x0F                        ARM32,ARMv4
 
 [MSRcc]
-regf,reg32          \x90\xF3\x80\x80\x0                 THUMB32,ARMv6
+regf,reg32          \x96\xF3\x80\x80\x0                 THUMB32,ARMv6
 
 regf,reg32          \x12\x01\x20\xF0                    ARM32,ARMv4
 regf,immshifter     \x13\x03\x20\xF0                    ARM32,ARMv4

compiler/arm/armtab.inc

@@ -1327,7 +1327,7 @@
     opcode  : A_MRS;
     ops     : 2;
     optypes : (ot_reg32,ot_regf,ot_none,ot_none,ot_none,ot_none);
-    code    : #144#243#239#128#0;
+    code    : #150#243#239#128#0;
     flags   : if_thumb32 or if_armv6
   ),
   (
@@ -1341,7 +1341,7 @@
     opcode  : A_MSR;
     ops     : 2;
     optypes : (ot_regf,ot_reg32,ot_none,ot_none,ot_none,ot_none);
-    code    : #144#243#128#128#0;
+    code    : #150#243#128#128#0;
     flags   : if_thumb32 or if_armv6
   ),
   (

compiler/arm/cpubase.pas

@@ -93,7 +93,7 @@ unit cpubase;
       first_mm_imreg     = $30;
 
 { TODO: Calculate bsstart}
-      regnumber_count_bsstart = 64;
+      regnumber_count_bsstart = 128;
 
       regnumber_table : array[tregisterindex] of tregister = (
         {$i rarmnum.inc}

compiler/arm/raarmgas.pas

@@ -1217,7 +1217,8 @@ Unit raarmgas;
                 break;
               end;
           else
-            if (instr.opcode = A_MSR) and (operandnum = 1) then
+            if ((instr.opcode = A_MRS) and (operandnum = 2)) or
+               ((instr.opcode = A_MSR) and (operandnum = 1)) then
               BuildSpecialreg(instr.Operands[operandnum] as tarmoperand)
             else
               BuildOperand(instr.Operands[operandnum] as tarmoperand);