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@@ -78,9 +78,9 @@ function fpc_int64_to_double(i: int64): double; compilerproc;assembler;
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{from "PowerPC Microprocessor Family: Programming Environments Manual for 64 and 32-Bit Microprocessors", v2.0, pg. 698 }
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var temp : int64;
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asm
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- std r3,temp // store dword
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- lfd f0,temp // load float
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- fcfid f0,f0 // convert to fpu int
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+ std r3,temp // store dword
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+ lfd f0,temp // load float
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+ fcfid f0,f0 // convert to fpu int
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end;
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{$define FPC_SYSTEM_HAS_QWORD_TO_DOUBLE}
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@@ -94,21 +94,21 @@ const
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var
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temp1, temp2: qword;
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asm
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- // load 2^32 into f4
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- lis r4, longint_to_real_helper@highesta
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- ori r4, r4, longint_to_real_helper@highera
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- sldi r4, r4, 32
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- oris r4, r4, longint_to_real_helper@ha
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- lfd f4, longint_to_real_helper@l(r4)
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+ // load 2^32 into f4
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+ lis r4, longint_to_real_helper@highesta
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+ ori r4, r4, longint_to_real_helper@highera
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+ sldi r4, r4, 32
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+ oris r4, r4, longint_to_real_helper@ha
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+ lfd f4, longint_to_real_helper@l(r4)
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- rldicl r4,r3,32,32 // isolate high half
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- rldicl r0,r3,0,32 // isolate low half
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- std r4,temp1 // store dword both
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- std r0,temp2
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- lfd f2,temp1 // load float both
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- lfd f0,temp2 // load float both
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- fcfid f2,f2 // convert each half to
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- fcfid f0,f0 // fpu int (no rnd)
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- fmadd f0,f4,f2,f0 // (2**32)*high+low (only add can rnd)
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+ rldicl r4,r3,32,32 // isolate high half
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+ rldicl r0,r3,0,32 // isolate low half
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+ std r4,temp1 // store dword both
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+ std r0,temp2
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+ lfd f2,temp1 // load float both
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+ lfd f0,temp2 // load float both
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+ fcfid f2,f2 // convert each half to
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+ fcfid f0,f0 // fpu int (no rnd)
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+ fmadd f0,f4,f2,f0 // (2**32)*high+low (only add can rnd)
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end;
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