Merge of rev21558-59-60 by Foxsen

21558:
use inherited first_int_to_real to avoid mixing doubles and singles
it fixes the failure of test/cg/taddcurr.pp

21559:
set default round mode to round nearest instead of round to zero
it fix test/cg/taddcurr.pp

21560:
enable softfpu, default first_int_to_real depends on int64_to_float64/32 etc.
It is needed by the patch of r21558

git-svn-id: trunk@21601 -

compiler/mips/ncpucnv.pas

@@ -70,39 +70,28 @@ uses
                              FirstTypeConv
 *****************************************************************************}
 
-function tMIPSELtypeconvnode.first_int_to_real: tnode;
+function tmipseltypeconvnode.first_int_to_real: tnode;
 var
   fname: string[19];
 begin
   { converting a 64bit integer to a float requires a helper }
   if is_64bitint(left.resultdef) or
-    is_currency(left.resultdef) then
-  begin
-            { hack to avoid double division by 10000, as it's
-              already done by resulttypepass.resulttype_int_to_real }
-    if is_currency(left.resultdef) then
-      left.resultdef := s64inttype;
-    if is_signed(left.resultdef) then
-      fname := 'fpc_int64_to_double'
-    else
-      fname := 'fpc_qword_to_double';
-    Result := ccallnode.createintern(fname, ccallparanode.Create(
-      left, nil));
-    left := nil;
-    firstpass(Result);
-    exit;
-  end
+     is_currency(left.resultdef) then
+    begin
+      result:=inherited first_int_to_real;
+      exit;
+    end
   else
     { other integers are supposed to be 32 bit }
-  begin
-    if is_signed(left.resultdef) then
-      inserttypeconv(left, s32inttype)
-    else
-      inserttypeconv(left, u32inttype);
-    firstpass(left);
-  end;
-  Result := nil;
-  expectloc := LOC_FPUREGISTER;
+    begin
+      if is_signed(left.resultdef) then
+        inserttypeconv(left,s32inttype)
+      else
+        inserttypeconv(left,u32inttype);
+      firstpass(left);
+    end;
+  result := nil;
+  expectloc:=LOC_FPUREGISTER;
 end;
 
 

rtl/linux/system.pp

@@ -36,13 +36,13 @@ Unit System;
 function get_cmdline:Pchar; 
 property cmdline:Pchar read get_cmdline;
 
-{$if defined(CPUARM) or defined(CPUM68K) or defined(CPUSPARC)}
+{$if defined(CPUARM) or defined(CPUM68K) or defined(CPUSPARC) or defined(CPUMIPS)}
 
 {$define fpc_softfpu_interface}
 {$i softfpu.pp}
 {$undef fpc_softfpu_interface}
 
-{$endif defined(CPUARM) or defined(CPUM68K) or defined(CPUSPARC)}
+{$endif defined(CPUARM) or defined(CPUM68K) or defined(CPUSPARC) or defined(CPUMIPS)}
 
 {*****************************************************************************}
                                  implementation
@@ -55,7 +55,7 @@ var
 
 const calculated_cmdline:Pchar=nil;
 
-{$if defined(CPUARM) or defined(CPUM68K) or defined(CPUSPARC)}
+{$if defined(CPUARM) or defined(CPUM68K) or defined(CPUSPARC) or defined(CPUMIPS)}
 
 {$define fpc_softfpu_implementation}
 {$i softfpu.pp}
@@ -73,7 +73,7 @@ const calculated_cmdline:Pchar=nil;
 {$define FPC_SYSTEM_HAS_extractFloat32Exp}
 {$define FPC_SYSTEM_HAS_extractFloat32Sign}
 
-{$endif defined(CPUARM) or defined(CPUM68K) or defined(CPUSPARC)}
+{$endif defined(CPUARM) or defined(CPUM68K) or defined(CPUSPARC) or defined(CPUMIPS)}
 
 {$I system.inc}
 

rtl/mips/mips.inc

@@ -46,10 +46,10 @@ var
     if not IsLibrary then
       begin
         { enable div by 0 and invalid operation fpu exceptions }
-        { round towards zero; ieee compliant arithmetics }
+        { round towards nearest; ieee compliant arithmetics }
 
         tmp32 := get_fsr();
-        set_fsr((tmp32 and $fffffffc) or $00000001);
+        set_fsr(tmp32 and $fffffffc);
       end;
   end;