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@@ -5607,7 +5607,11 @@ unit aoptx86;
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Exit;
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Exit;
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end
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end
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- else if (taicpu(p).oper[1]^.typ = top_reg) then
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+ else if (taicpu(p).oper[1]^.typ = top_reg)
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+{$ifdef x86_64}
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+ and (taicpu(p).opsize <> S_Q) { S_Q will never happen: cmp with 64 bit constants is not possible }
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+{$endif x86_64}
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+ then
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begin
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begin
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{ cmp register,$8000 neg register
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{ cmp register,$8000 neg register
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je target --> jo target
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je target --> jo target
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@@ -5617,9 +5621,6 @@ unit aoptx86;
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S_B: v:=$80;
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S_B: v:=$80;
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S_W: v:=$8000;
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S_W: v:=$8000;
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S_L: v:=qword($80000000);
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S_L: v:=qword($80000000);
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- { S_Q will never happen: cmp with 64 bit constants is not possible }
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- S_Q:
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- Exit;
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else
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else
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internalerror(2013112905);
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internalerror(2013112905);
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end;
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end;
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@@ -5943,12 +5944,15 @@ unit aoptx86;
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begin
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begin
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taicpu(p).loadoper(0, taicpu(hp1).oper[1]^);
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taicpu(p).loadoper(0, taicpu(hp1).oper[1]^);
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RemoveInstruction(hp1);
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RemoveInstruction(hp1);
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+ if taicpu(hp1).oper[1]^.typ = top_reg then
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+ AllocRegBetween(taicpu(hp1).oper[1]^.reg, p, hp2, UsedRegs);
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end
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end
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else
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else
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begin
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begin
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{ Will be a register because the size can't be S_B otherwise }
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{ Will be a register because the size can't be S_B otherwise }
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ThisReg := newreg(R_INTREGISTER,getsupreg(taicpu(hp1).oper[1]^.reg), R_SUBL);
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ThisReg := newreg(R_INTREGISTER,getsupreg(taicpu(hp1).oper[1]^.reg), R_SUBL);
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taicpu(p).loadreg(0, ThisReg);
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taicpu(p).loadreg(0, ThisReg);
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+ AllocRegBetween(ThisReg, p, hp2, UsedRegs);
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if (cs_opt_size in current_settings.optimizerswitches) and IsMOVZXAcceptable then
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if (cs_opt_size in current_settings.optimizerswitches) and IsMOVZXAcceptable then
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begin
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begin
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@@ -9770,6 +9774,18 @@ unit aoptx86;
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taicpu(p).opcode := A_XOR;
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taicpu(p).opcode := A_XOR;
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taicpu(p).loadReg(0,taicpu(p).oper[1]^.reg);
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taicpu(p).loadReg(0,taicpu(p).oper[1]^.reg);
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Result := True;
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Result := True;
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+{$ifdef x86_64}
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+ end
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+ else if (taicpu(p).opsize = S_Q) then
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+ begin
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+ RegName := debug_regname(taicpu(p).oper[1]^.reg); { 64-bit register name }
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+
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+ { The actual optimization }
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+ setsubreg(taicpu(p).oper[1]^.reg, R_SUBD);
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+ taicpu(p).changeopsize(S_L);
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+
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+ DebugMsg(SPeepholeOptimization + 'movq $0,' + RegName + ' -> movl $0,' + debug_regname(taicpu(p).oper[1]^.reg) + ' (immediate can be represented with just 32 bits)', p);
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+ Result := True;
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end;
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end;
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$1..$FFFFFFFF:
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$1..$FFFFFFFF:
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begin
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begin
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@@ -9791,6 +9807,7 @@ unit aoptx86;
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else
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else
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{ Do nothing };
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{ Do nothing };
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end;
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end;
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+{$endif x86_64}
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end;
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end;
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-1:
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-1:
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{ Don't make this optimisation if the CPU flags are required, since OR scrambles them }
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{ Don't make this optimisation if the CPU flags are required, since OR scrambles them }
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@@ -9807,6 +9824,8 @@ unit aoptx86;
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taicpu(p).opcode := A_OR;
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taicpu(p).opcode := A_OR;
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Result := True;
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Result := True;
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end;
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end;
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+ else
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+ { Do nothing };
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end;
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end;
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end;
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end;
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end;
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end;
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J. Gareth "Kit" Moreton