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@@ -131,12 +131,6 @@ unit cgcpu;
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const
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const
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-{
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- TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_ADD,A_AND,A_DIVWU,
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- A_DIVW,A_MULLW, A_MULLW, A_NEG,A_NOT,A_OR,
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- A_SRAW,A_SLW,A_SRW,A_SUB,A_XOR);
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-}
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-
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TOpCG2AsmOpConstLo: Array[topcg] of TAsmOp = (A_NONE,A_ADDI,A_ANDI_,A_DIVWU,
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TOpCG2AsmOpConstLo: Array[topcg] of TAsmOp = (A_NONE,A_ADDI,A_ANDI_,A_DIVWU,
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A_DIVW,A_MULLW, A_MULLW, A_NONE,A_NONE,A_ORI,
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A_DIVW,A_MULLW, A_MULLW, A_NONE,A_NONE,A_ORI,
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A_SRAWI,A_SLWI,A_SRWI,A_SUBI,A_XORI);
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A_SRAWI,A_SLWI,A_SRWI,A_SUBI,A_XORI);
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@@ -267,13 +261,13 @@ const
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begin
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begin
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if (longint(a) >= low(smallint)) and
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if (longint(a) >= low(smallint)) and
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(longint(a) <= high(smallint)) then
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(longint(a) <= high(smallint)) then
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- list.concat(taicpu.op_reg_const(A_LI,reg,longint(a)))
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+ list.concat(taicpu.op_reg_const(A_LI,reg,smallint(a)))
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else if ((a and $ffff) <> 0) then
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else if ((a and $ffff) <> 0) then
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begin
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begin
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list.concat(taicpu.op_reg_const(A_LI,reg,smallint(a and $ffff)));
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list.concat(taicpu.op_reg_const(A_LI,reg,smallint(a and $ffff)));
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if ((a shr 16) <> 0) then
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if ((a shr 16) <> 0) then
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list.concat(taicpu.op_reg_const(A_ADDIS,reg,
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list.concat(taicpu.op_reg_const(A_ADDIS,reg,
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- (a shr 16)+ord(smallint(a and $ffff) < 0)))
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+ smallint((a shr 16)+ord(smallint(a and $ffff) < 0))))
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end
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end
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else
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else
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list.concat(taicpu.op_reg_const(A_LIS,reg,smallint(a shr 16)));
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list.concat(taicpu.op_reg_const(A_LIS,reg,smallint(a shr 16)));
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@@ -452,20 +446,33 @@ const
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result := false;
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result := false;
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if (smallint(a) > 0) then
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if (smallint(a) > 0) then
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begin
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begin
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- list.concat(taicpu.op_reg_reg_const(oplo,dst,src,word(a)));
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- list.concat(taicpu.op_reg_reg_const(ophi,dst,dst,a shr 16));
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+ list.concat(taicpu.op_reg_reg_const(oplo,dst,src,smallint(a)));
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+ list.concat(taicpu.op_reg_reg_const(ophi,dst,dst,smallint(a shr 16)));
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result := true;
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result := true;
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end;
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end;
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end;
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end;
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begin
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begin
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+ if op = OP_SUB then
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+ begin
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+{$ifopt q+}
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+{$q-}
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+{$define overflowon}
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+{$endif}
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+ a_op_const_reg_reg(list,op,size,aword(-a),src,dst);
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+{$ifdef overflowon}
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+{$q+}
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+{$undef overflowon}
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+{$endif}
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+ exit;
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+ end;
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ophi := TOpCG2AsmOpConstHi[op];
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ophi := TOpCG2AsmOpConstHi[op];
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oplo := TOpCG2AsmOpConstLo[op];
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oplo := TOpCG2AsmOpConstLo[op];
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gotrlwi := get_rlwi_const(a,l1,l2);
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gotrlwi := get_rlwi_const(a,l1,l2);
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{ constants in a PPC instruction are always interpreted as signed }
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{ constants in a PPC instruction are always interpreted as signed }
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{ 16bit values, so if the value is between low(smallint) and }
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{ 16bit values, so if the value is between low(smallint) and }
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{ high(smallint), it's easy }
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{ high(smallint), it's easy }
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- if (op in [OP_ADD,OP_SUB,OP_AND,OP_OR,OP_XOR]) then
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+ if (op in [OP_ADD,OP_AND,OP_OR,OP_XOR]) then
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begin
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begin
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if (a = 0) then
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if (a = 0) then
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begin
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begin
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@@ -482,10 +489,10 @@ const
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end
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end
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else if (longint(a) >= low(smallint)) and
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else if (longint(a) >= low(smallint)) and
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(longint(a) <= high(smallint)) and
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(longint(a) <= high(smallint)) and
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- (not(op = OP_AND) or
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- not gotrlwi) then
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+ ((op <> OP_AND) or
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+ not gotrlwi) then
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begin
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begin
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- list.concat(taicpu.op_reg_reg_const(oplo,dst,src,a));
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+ list.concat(taicpu.op_reg_reg_const(oplo,dst,src,smallint(a)));
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exit;
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exit;
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end;
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end;
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{ all basic constant instructions also have a shifted form that }
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{ all basic constant instructions also have a shifted form that }
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@@ -495,7 +502,7 @@ const
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(not(op = OP_AND) or
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(not(op = OP_AND) or
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not gotrlwi) then
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not gotrlwi) then
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begin
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begin
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- list.concat(taicpu.op_reg_reg_const(ophi,dst,src,hi(a)));
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+ list.concat(taicpu.op_reg_reg_const(ophi,dst,src,smallint(a shr 16)));
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exit;
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exit;
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end;
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end;
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end;
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end;
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@@ -508,14 +515,14 @@ const
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OP_IMUL, OP_MUL:
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OP_IMUL, OP_MUL:
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if (longint(a) >= low(smallint)) and
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if (longint(a) >= low(smallint)) and
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(longint(a) <= high(smallint)) then
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(longint(a) <= high(smallint)) then
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- list.concat(taicpu.op_reg_reg_const(A_MULLI,dst,src,a))
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+ list.concat(taicpu.op_reg_reg_const(A_MULLI,dst,src,smallint(a)))
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else
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else
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usereg := true;
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usereg := true;
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- OP_ADD,OP_SUB:
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+ OP_ADD:
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begin
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begin
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list.concat(taicpu.op_reg_reg_const(oplo,dst,src,smallint(a)));
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list.concat(taicpu.op_reg_reg_const(oplo,dst,src,smallint(a)));
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list.concat(taicpu.op_reg_reg_const(ophi,dst,dst,
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list.concat(taicpu.op_reg_reg_const(ophi,dst,dst,
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- (a shr 16) + ord(smallint(a) < 0)));
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+ smallint((a shr 16) + ord(smallint(a) < 0))));
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end;
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end;
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OP_OR:
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OP_OR:
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{ try to use rlwimi }
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{ try to use rlwimi }
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@@ -1453,7 +1460,10 @@ begin
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end.
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end.
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{
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{
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$Log$
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$Log$
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- Revision 1.31 2002-07-30 20:50:44 florian
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+ Revision 1.32 2002-08-02 11:10:42 jonas
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+ * some misc constant fixes
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+
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+ Revision 1.31 2002/07/30 20:50:44 florian
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* the code generator knows now if parameters are in registers
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* the code generator knows now if parameters are in registers
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Revision 1.30 2002/07/29 21:23:44 florian
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Revision 1.30 2002/07/29 21:23:44 florian
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