* synchronized with trunk

git-svn-id: branches/wasm@47135 -

.gitattributes

@@ -15622,6 +15622,7 @@ tests/test/tpropdef.pp svneol=native#text/plain
 tests/test/tpushpop1.pp svneol=native#text/pascal
 tests/test/tpushpop2.pp svneol=native#text/pascal
 tests/test/tpushpop3.pp svneol=native#text/pascal
+tests/test/traa641.pp svneol=native#text/plain
 tests/test/trange1.pp svneol=native#text/plain
 tests/test/trange2.pp svneol=native#text/plain
 tests/test/trange3.pp svneol=native#text/plain
@@ -18497,6 +18498,7 @@ tests/webtbs/tw37322.pp svneol=native#text/pascal
 tests/webtbs/tw37323.pp svneol=native#text/pascal
 tests/webtbs/tw37339.pp svneol=native#text/pascal
 tests/webtbs/tw37355.pp svneol=native#text/pascal
+tests/webtbs/tw37382.pp svneol=native#text/pascal
 tests/webtbs/tw37393.pp svneol=native#text/pascal
 tests/webtbs/tw37397.pp svneol=native#text/plain
 tests/webtbs/tw37398.pp svneol=native#text/pascal
@@ -18531,6 +18533,7 @@ tests/webtbs/tw37806.pp svneol=native#text/pascal
 tests/webtbs/tw3782.pp svneol=native#text/plain
 tests/webtbs/tw37823.pp svneol=native#text/pascal
 tests/webtbs/tw37844.pp svneol=native#text/pascal
+tests/webtbs/tw37926.pp svneol=native#text/pascal
 tests/webtbs/tw3796.pp svneol=native#text/plain
 tests/webtbs/tw3805.pp svneol=native#text/plain
 tests/webtbs/tw3814.pp svneol=native#text/plain

compiler/Makefile

@@ -451,6 +451,18 @@ endif
 ifndef RTLOPT
 RTLOPT:=$(OPT)
 endif
+DATE_FMT = +%Y/%m/%d
+ifdef SOURCE_DATE_EPOCH
+    DATESTR ?= $(shell date -u -d "@$(SOURCE_DATE_EPOCH)" "$(DATE_FMT)" 2>/dev/null || date -u -r "$(SOURCE_DATE_EPOCH)" "$(DATE_FMT)" 2>/dev/null || date -u "$(DATE_FMT)")
+else
+   GIT_DIR = $(wildcard ../.git)
+   ifneq ($(GIT_DIR),)
+      DATESTR:=$(shell git log -1 --pretty=%cd --date=format:'%Y/%m/%d')
+   endif
+endif
+ifdef DATESTR
+override OPTNEW+=-DD$(DATESTR)
+endif
 ifdef CYCLELEVEL
 ifeq ($(CYCLELEVEL),1)
 override LOCALOPT+=$(OPTLEVEL1)

compiler/Makefile.fpc

@@ -168,6 +168,22 @@ ifndef RTLOPT
 RTLOPT:=$(OPT)
 endif
 
+DATE_FMT = +%Y/%m/%d
+ifdef SOURCE_DATE_EPOCH
+    COMPDATESTR ?= $(shell date -u -d "@$(SOURCE_DATE_EPOCH)" "$(DATE_FMT)" 2>/dev/null || date -u -r "$(SOURCE_DATE_EPOCH)" "$(DATE_FMT)" 2>/dev/null || date -u "$(DATE_FMT)")
+else
+   # does a git directory exist? ...
+   GIT_DIR = $(wildcard ../.git)
+   ifneq ($(GIT_DIR),)
+      # ... then take date from head
+      COMPDATESTR:=$(shell git log -1 --pretty=%cd --date=format:'%Y/%m/%d')
+   endif
+endif
+
+ifdef COMPDATESTR
+override OPTNEW+=-DD$(COMPDATESTR)
+endif
+
 ifdef CYCLELEVEL
 ifeq ($(CYCLELEVEL),1)
 override LOCALOPT+=$(OPTLEVEL1)

compiler/aarch64/a64att.inc

@@ -47,18 +47,6 @@
 'ldaxr',
 'stlxr',
 'stlxp',
-'ld1',
-'ld2',
-'ld3',
-'ld4',
-'st1',
-'st2',
-'st3',
-'st4',
-'ld1r',
-'ld2r',
-'ld3r',
-'ld4r',
 'prfm',
 'prfum',
 'add',
@@ -111,35 +99,11 @@
 'csneg',
 'ccmn',
 'ccmp',
-'nop',
-'yield',
-'wfe',
-'wfi',
-'sev',
-'sevl',
-'mov',
-'bfi',
-'bfxil',
-'sbfiz',
-'sbfx',
-'ubfiz',
-'ubfx',
-'asr',
-'lsl',
-'lsr',
-'ror',
-'sxtb',
-'sxth',
-'sxtw',
-'uxtb',
-'uxth',
-'neg',
 'ngc',
 'mvn',
 'mneg',
 'mul',
 'smnegl',
-'smull',
 'umnegl',
 'umull',
 'cset',
@@ -147,20 +111,102 @@
 'cinc',
 'cinv',
 'cneg',
-'fmov',
+'sxtb',
+'sxth',
+'sxtw',
+'uxtb',
+'uxth',
+'bfi',
+'bfxil',
+'sbfiz',
+'sbfx',
+'ubfiz',
+'ubfx',
+'yield',
+'wfe',
+'wfi',
+'sev',
+'sevl',
+'mov',
+'addhn',
+'addhn2',
+'addp',
+'addv',
+'aesd',
+'aese',
+'aesimc',
+'easmc',
+'bif',
+'bit',
+'bsl',
+'cmeq',
+'cmge',
+'cmgt',
+'cmhi',
+'cmhs',
+'cmle',
+'cmlt',
+'cmtst',
+'cnt',
+'dup',
+'ext',
+'fabd',
+'bacge',
+'fabs',
+'facgt',
+'fadd',
+'fccmp',
+'fccmpe',
+'fcmeq',
+'fcmge',
+'fcmgt',
+'fcmle',
+'fcmlt',
+'fcmp',
+'fcmpe',
+'fcsel',
 'fcvt',
 'fcvtas',
 'fcvtau',
+'fcvtl',
+'fcvtl2',
 'fcvtms',
 'fcvtmu',
 'fcvtns',
 'fcvtnu',
 'fcvtps',
 'fcvtpu',
+'fcvtxn',
+'fcvtxn2',
 'fcvtzs',
 'fcvtzu',
-'scvtf',
-'ucvtf',
+'fdiv',
+'fmadd',
+'fmax',
+'fmaxnm',
+'fmaxnmp',
+'fmanmv',
+'fmaxp',
+'fmaxv',
+'fmin',
+'fminnm',
+'fminnmp',
+'fminnmv',
+'fminp',
+'fminv',
+'fmla',
+'fmls',
+'fmov',
+'fmsub',
+'fmul',
+'fmulx',
+'fneg',
+'fnmadd',
+'fnmsub',
+'fnmul',
+'frecpe',
+'frecps',
+'frecpx',
 'frinta',
 'frinti',
 'frintm',
@@ -168,28 +214,188 @@
 'frintp',
 'frintx',
 'frintz',
-'fabs',
-'fneg',
+'frsqrte',
+'frsqrts',
 'fsqrt',
-'fadd',
-'fdiv',
-'fmul',
-'fnmul',
 'fsub',
-'fmax',
-'fmin',
-'fminnm',
-'fmadd',
-'fmsub',
-'fnmadd',
-'fnmsub',
-'fcmp',
-'fcmpe',
-'fccmp',
-'fcmmpe',
-'fcsel',
-'umov',
-'ins',
+'ld1',
+'ld1r',
+'ld2',
+'ld2r',
+'ld3',
+'ld3r',
+'ld4',
+'ld4r',
+'mla',
+'mls',
 'movi',
-'veor'
+'mvni',
+'pmul',
+'pmull',
+'pmull2',
+'raddhn',
+'raddhn2',
+'rev64',
+'rshrn',
+'rshrn2',
+'srubhn',
+'rsubhn2',
+'saba',
+'sabal',
+'sabal2',
+'sadalp',
+'saddl',
+'saddl2',
+'saddlp',
+'saddlv',
+'saddw',
+'saddw2',
+'scvtf',
+'shac1c',
+'sha1h',
+'sha1m',
+'sha1p',
+'sha1su0',
+'sha1su1',
+'sha256h2',
+'sha256h',
+'sha256su0',
+'sha256su1',
+'shadd',
+'shl',
+'shll',
+'shll2',
+'shrn',
+'shrn2',
+'shsub',
+'sli',
+'smax',
+'smaxp',
+'smaxc',
+'smin',
+'sminp',
+'sminv',
+'smlal',
+'smlal2',
+'smlsl',
+'smlsl2',
+'smov',
+'smull',
+'smull2',
+'sqabs',
+'sqadd',
+'sqdmlal',
+'sqdmlal2',
+'sqdmlsl',
+'sqdmlsl2',
+'sqdmulh',
+'sqdmull',
+'sqdmull2',
+'sqneg',
+'sqrdmulh',
+'sqrshl',
+'sqrshrn',
+'sqrshrn2',
+'sqrshrun',
+'sqrshrun2',
+'sqshl',
+'sqshlu',
+'sqshrn',
+'sqsrhn2',
+'sqshrun',
+'sqshrun2',
+'sqsub',
+'sqxtn',
+'sqxtn2',
+'sqxtun',
+'sqxtun2',
+'srhqdd',
+'sri',
+'srshl',
+'srshr',
+'srsra',
+'sshl',
+'sshll',
+'sshll2',
+'sshr',
+'ssra',
+'ssubl',
+'ssubl2',
+'ssubw',
+'ssubw2',
+'st1',
+'st2',
+'st3',
+'st4',
+'subqadd',
+'sxtl',
+'tbl',
+'tbx',
+'trn1',
+'trn2',
+'uaba',
+'uabal',
+'uabal2',
+'uabd',
+'uabdl',
+'uabdl2',
+'uadalp',
+'uaddll',
+'uaddll2',
+'uaddlp',
+'uaddlv',
+'uaddw',
+'uaddw2',
+'ucvtf',
+'uhadd',
+'uhsub',
+'umax',
+'umaxp',
+'umaxv',
+'umin',
+'uminp',
+'uminv',
+'umlal',
+'umlal2',
+'umlsl',
+'umlsl2',
+'umov',
+'uqadd',
+'uqrshl',
+'uqrshrn',
+'uqrshrn2',
+'uqshl',
+'uqshrn',
+'uqsub',
+'uqxtn',
+'uqxtn2',
+'urecpe',
+'urhadd',
+'urshl',
+'urshr',
+'ursqrte',
+'ursra',
+'ushl',
+'ushll2',
+'ushr',
+'usqadd',
+'usra',
+'usubl',
+'usubl2',
+'usubw',
+'usubw2',
+'uxtl',
+'uzp1',
+'uzp2',
+'xtn1',
+'xtn2',
+'zip1',
+'zip2',
+'nop',
+'asr',
+'lsl',
+'lsr',
+'ror',
+'neg',
+'ins'
 );

compiler/aarch64/a64atts.inc

@@ -191,5 +191,211 @@ attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
 attsufNONE
 );

compiler/aarch64/a64ins.dat

@@ -93,30 +93,6 @@
 
 [STLXP]
 
-[LD1]
-
-[LD2]
-
-[LD3]
-
-[LD4]
-
-[ST1]
-
-[ST2]
-
-[ST3]
-
-[ST4]
-
-[LD1R]
-
-[LD2R]
-
-[LD3R]
-
-[LD4R]
-
 [PRFM]
 
 [PRFUM]
@@ -221,21 +197,39 @@
 
 [CCMP]
 
-; Aliases
-; they are not generated by the compiler, they are only used for inline assembler
-[NOP]
+[NGC]
 
-[YIELD]
+[MVN]
 
-[WFE]
+[MNEG]
 
-[WFI]
+[MUL]
 
-[SEV]
+[SMNEGL]
 
-[SEVL]
+[UMNEGL]
 
-[MOV]
+[UMULL]
+
+[CSET]
+
+[CSETM]
+
+[CINC]
+
+[CINV]
+
+[CNEG]
+
+[SXTB]
+
+[SXTH]
+
+[SXTW]
+
+[UXTB]
+
+[UXTH]
 
 [BFI]
 
@@ -249,53 +243,92 @@
 
 [UBFX]
 
-[ASR]
+[YIELD]
 
-[LSL]
+[WFE]
 
-[LSR]
+[WFI]
 
-[ROR]
+[SEV]
 
-[SXTB]
+[SEVL]
 
-[SXTH]
+[MOV]
 
-[SXTW]
+; Vector/float instructions
+[ADDHN]
 
-[UXTB]
+[ADDHN2]
 
-[UXTH]
+[ADDP]
 
-[NEG]
+[ADDV]
 
-[NGC]
+[AESD]
 
-[MVN]
+[AESE]
 
-[MNEG]
+[AESIMC]
 
-[MUL]
+[EASMC]
 
-[SMNEGL]
+[BIF]
 
-[SMULL]
+[BIT]
 
-[UMNEGL]
+[BSL]
 
-[UMULL]
+[CMEQ]
 
-[CSET]
+[CMGE]
 
-[CSETM]
+[CMGT]
 
-[CINC]
+[CMHI]
 
-[CINV]
+[CMHS]
 
-[CNEG]
+[CMLE]
 
-[FMOV]
+[CMLT]
+
+[CMTST]
+
+[CNT]
+
+[DUP]
+
+[EXT]
+
+[FABD]
+
+[BACGE]
+
+[FABS]
+
+[FACGT]
+
+[FADD]
+
+[FCCMP]
+
+[FCCMPE]
+
+[FCMEQ]
+
+[FCMGE]
+
+[FCMGT]
+
+[FCMLE]
+
+[FCMLT]
+
+[FCMP]
+
+[FCMPE]
+
+[FCSEL]
 
 [FCVT]
 
@@ -303,6 +336,10 @@
 
 [FCVTAU]
 
+[FCVTL]
+
+[FCVTL2]
+
 [FCVTMS]
 
 [FCVTMU]
@@ -315,13 +352,67 @@
 
 [FCVTPU]
 
+[FCVTXN]
+
+[FCVTXN2]
+
 [FCVTZS]
 
 [FCVTZU]
 
-[SCVTF]
+[FDIV]
 
-[UCVTF]
+[FMADD]
+
+[FMAX]
+
+[FMAXNM]
+
+[FMAXNMP]
+
+[FMANMV]
+
+[FMAXP]
+
+[FMAXV]
+
+[FMIN]
+
+[FMINNM]
+
+[FMINNMP]
+
+[FMINNMV]
+
+[FMINP]
+
+[FMINV]
+
+[FMLA]
+
+[FMLS]
+
+[FMOV]
+
+[FMSUB]
+
+[FMUL]
+
+[FMULX]
+
+[FNEG]
+
+[FNMADD]
+
+[FNMSUB]
+
+[FNMUL]
+
+[FRECPE]
+
+[FRECPS]
+
+[FRECPX]
 
 [FRINTA]
 
@@ -337,50 +428,373 @@
 
 [FRINTZ]
 
-[FABS]
+[FRSQRTE]
 
-[FNEG]
+[FRSQRTS]
 
 [FSQRT]
 
-[FADD]
+[FSUB]
 
-[FDIV]
+[LD1]
 
-[FMUL]
+[LD1R]
 
-[FNMUL]
+[LD2]
 
-[FSUB]
+[LD2R]
 
-[FMAX]
+[LD3]
 
-[FMIN]
+[LD3R]
 
-[FMINNM]
+[LD4]
 
-[FMADD]
+[LD4R]
 
-[FMSUB]
+[MLA]
 
-[FNMADD]
+[MLS]
 
-[FNMSUB]
+[MOVI]
 
-[FCMP]
+[MVNI]
 
-[FCMPE]
+[PMUL]
 
-[FCCMP]
+[PMULL]
 
-[FCMMPE]
+[PMULL2]
 
-[FCSEL]
+[RADDHN]
+
+[RADDHN2]
+
+[REV64]
+
+[RSHRN]
+
+[RSHRN2]
+
+[SRUBHN]
+
+[RSUBHN2]
+
+[SABA]
+
+[SABAL]
+
+[SABAL2]
+
+[SADALP]
+
+[SADDL]
+
+[SADDL2]
+
+[SADDLP]
+
+[SADDLV]
+
+[SADDW]
+
+[SADDW2]
+
+[SCVTF]
+
+[SHAC1C]
+
+[SHA1H]
+
+[SHA1M]
+
+[SHA1P]
+
+[SHA1SU0]
+
+[SHA1SU1]
+
+[SHA256H2]
+
+[SHA256H]
+
+[SHA256SU0]
+
+[SHA256SU1]
+
+[SHADD]
+
+[SHL]
+
+[SHLL]
+
+[SHLL2]
+
+[SHRN]
+
+[SHRN2]
+
+[SHSUB]
+
+[SLI]
+
+[SMAX]
+
+[SMAXP]
+
+[SMAXC]
+
+[SMIN]
+
+[SMINP]
+
+[SMINV]
+
+[SMLAL]
+
+[SMLAL2]
+
+[SMLSL]
+
+[SMLSL2]
+
+[SMOV]
+
+[SMULL]
+
+[SMULL2]
+
+[SQABS]
+
+[SQADD]
+
+[SQDMLAL]
+
+[SQDMLAL2]
+
+[SQDMLSL]
+
+[SQDMLSL2]
+
+[SQDMULH]
+
+[SQDMULL]
+
+[SQDMULL2]
+
+[SQNEG]
+
+[SQRDMULH]
+
+[SQRSHL]
+
+[SQRSHRN]
+
+[SQRSHRN2]
+
+[SQRSHRUN]
+
+[SQRSHRUN2]
+
+[SQSHL]
+
+[SQSHLU]
+
+[SQSHRN]
+
+[SQSRHN2]
+
+[SQSHRUN]
+
+[SQSHRUN2]
+
+[SQSUB]
+
+[SQXTN]
+
+[SQXTN2]
+
+[SQXTUN]
+
+[SQXTUN2]
+
+[SRHQDD]
+
+[SRI]
+
+[SRSHL]
+
+[SRSHR]
+
+[SRSRA]
+
+[SSHL]
+
+[SSHLL]
+
+[SSHLL2]
+
+[SSHR]
+
+[SSRA]
+
+[SSUBL]
+
+[SSUBL2]
+
+[SSUBW]
+
+[SSUBW2]
+
+[ST1]
+
+[ST2]
+
+[ST3]
+
+[ST4]
+
+[SUBQADD]
+
+[SXTL]
+
+[TBL]
+
+[TBX]
+
+[TRN1]
+
+[TRN2]
+
+[UABA]
+
+[UABAL]
+
+[UABAL2]
+
+[UABD]
+
+[UABDL]
+
+[UABDL2]
+
+[UADALP]
+
+[UADDLL]
+
+[UADDLL2]
+
+[UADDLP]
+
+[UADDLV]
+
+[UADDW]
+
+[UADDW2]
+
+[UCVTF]
+
+[UHADD]
+
+[UHSUB]
+
+[UMAX]
+
+[UMAXP]
+
+[UMAXV]
+
+[UMIN]
+
+[UMINP]
+
+[UMINV]
+
+[UMLAL]
+
+[UMLAL2]
+
+[UMLSL]
+
+[UMLSL2]
 
 [UMOV]
 
-[INS]
+[UQADD]
 
-[MOVI]
+[UQRSHL]
+
+[UQRSHRN]
+
+[UQRSHRN2]
+
+[UQSHL]
+
+[UQSHRN]
+
+[UQSUB]
+
+[UQXTN]
+
+[UQXTN2]
+
+[URECPE]
+
+[URHADD]
+
+[URSHL]
+
+[URSHR]
+
+[URSQRTE]
+
+[URSRA]
+
+[USHL]
+
+[USHLL2]
+
+[USHR]
+
+[USQADD]
+
+[USRA]
+
+[USUBL]
+
+[USUBL2]
+
+[USUBW]
+
+[USUBW2]
+
+[UXTL]
+
+[UZP1]
+
+[UZP2]
+
+[XTN1]
+
+[XTN2]
+
+[ZIP1]
+
+[ZIP2]
+
+; Aliases
+; they are not generated by the compiler, they are only used for inline assembler
+[NOP]
+
+[ASR]
+
+[LSL]
+
+[LSR]
+
+[ROR]
+
+[NEG]
+
+[INS]
 
-[VEOR]

compiler/aarch64/a64op.inc

@@ -47,18 +47,6 @@ A_STLR,
 A_LDAXR,
 A_STLXR,
 A_STLXP,
-A_LD1,
-A_LD2,
-A_LD3,
-A_LD4,
-A_ST1,
-A_ST2,
-A_ST3,
-A_ST4,
-A_LD1R,
-A_LD2R,
-A_LD3R,
-A_LD4R,
 A_PRFM,
 A_PRFUM,
 A_ADD,
@@ -111,35 +99,11 @@ A_CSINV,
 A_CSNEG,
 A_CCMN,
 A_CCMP,
-A_NOP,
-A_YIELD,
-A_WFE,
-A_WFI,
-A_SEV,
-A_SEVL,
-A_MOV,
-A_BFI,
-A_BFXIL,
-A_SBFIZ,
-A_SBFX,
-A_UBFIZ,
-A_UBFX,
-A_ASR,
-A_LSL,
-A_LSR,
-A_ROR,
-A_SXTB,
-A_SXTH,
-A_SXTW,
-A_UXTB,
-A_UXTH,
-A_NEG,
 A_NGC,
 A_MVN,
 A_MNEG,
 A_MUL,
 A_SMNEGL,
-A_SMULL,
 A_UMNEGL,
 A_UMULL,
 A_CSET,
@@ -147,20 +111,102 @@ A_CSETM,
 A_CINC,
 A_CINV,
 A_CNEG,
-A_FMOV,
+A_SXTB,
+A_SXTH,
+A_SXTW,
+A_UXTB,
+A_UXTH,
+A_BFI,
+A_BFXIL,
+A_SBFIZ,
+A_SBFX,
+A_UBFIZ,
+A_UBFX,
+A_YIELD,
+A_WFE,
+A_WFI,
+A_SEV,
+A_SEVL,
+A_MOV,
+A_ADDHN,
+A_ADDHN2,
+A_ADDP,
+A_ADDV,
+A_AESD,
+A_AESE,
+A_AESIMC,
+A_EASMC,
+A_BIF,
+A_BIT,
+A_BSL,
+A_CMEQ,
+A_CMGE,
+A_CMGT,
+A_CMHI,
+A_CMHS,
+A_CMLE,
+A_CMLT,
+A_CMTST,
+A_CNT,
+A_DUP,
+A_EXT,
+A_FABD,
+A_BACGE,
+A_FABS,
+A_FACGT,
+A_FADD,
+A_FCCMP,
+A_FCCMPE,
+A_FCMEQ,
+A_FCMGE,
+A_FCMGT,
+A_FCMLE,
+A_FCMLT,
+A_FCMP,
+A_FCMPE,
+A_FCSEL,
 A_FCVT,
 A_FCVTAS,
 A_FCVTAU,
+A_FCVTL,
+A_FCVTL2,
 A_FCVTMS,
 A_FCVTMU,
 A_FCVTNS,
 A_FCVTNU,
 A_FCVTPS,
 A_FCVTPU,
+A_FCVTXN,
+A_FCVTXN2,
 A_FCVTZS,
 A_FCVTZU,
-A_SCVTF,
-A_UCVTF,
+A_FDIV,
+A_FMADD,
+A_FMAX,
+A_FMAXNM,
+A_FMAXNMP,
+A_FMANMV,
+A_FMAXP,
+A_FMAXV,
+A_FMIN,
+A_FMINNM,
+A_FMINNMP,
+A_FMINNMV,
+A_FMINP,
+A_FMINV,
+A_FMLA,
+A_FMLS,
+A_FMOV,
+A_FMSUB,
+A_FMUL,
+A_FMULX,
+A_FNEG,
+A_FNMADD,
+A_FNMSUB,
+A_FNMUL,
+A_FRECPE,
+A_FRECPS,
+A_FRECPX,
 A_FRINTA,
 A_FRINTI,
 A_FRINTM,
@@ -168,28 +214,188 @@ A_FRINTN,
 A_FRINTP,
 A_FRINTX,
 A_FRINTZ,
-A_FABS,
-A_FNEG,
+A_FRSQRTE,
+A_FRSQRTS,
 A_FSQRT,
-A_FADD,
-A_FDIV,
-A_FMUL,
-A_FNMUL,
 A_FSUB,
-A_FMAX,
-A_FMIN,
-A_FMINNM,
-A_FMADD,
-A_FMSUB,
-A_FNMADD,
-A_FNMSUB,
-A_FCMP,
-A_FCMPE,
-A_FCCMP,
-A_FCMMPE,
-A_FCSEL,
-A_UMOV,
-A_INS,
+A_LD1,
+A_LD1R,
+A_LD2,
+A_LD2R,
+A_LD3,
+A_LD3R,
+A_LD4,
+A_LD4R,
+A_MLA,
+A_MLS,
 A_MOVI,
-A_VEOR
+A_MVNI,
+A_PMUL,
+A_PMULL,
+A_PMULL2,
+A_RADDHN,
+A_RADDHN2,
+A_REV64,
+A_RSHRN,
+A_RSHRN2,
+A_SRUBHN,
+A_RSUBHN2,
+A_SABA,
+A_SABAL,
+A_SABAL2,
+A_SADALP,
+A_SADDL,
+A_SADDL2,
+A_SADDLP,
+A_SADDLV,
+A_SADDW,
+A_SADDW2,
+A_SCVTF,
+A_SHAC1C,
+A_SHA1H,
+A_SHA1M,
+A_SHA1P,
+A_SHA1SU0,
+A_SHA1SU1,
+A_SHA256H2,
+A_SHA256H,
+A_SHA256SU0,
+A_SHA256SU1,
+A_SHADD,
+A_SHL,
+A_SHLL,
+A_SHLL2,
+A_SHRN,
+A_SHRN2,
+A_SHSUB,
+A_SLI,
+A_SMAX,
+A_SMAXP,
+A_SMAXC,
+A_SMIN,
+A_SMINP,
+A_SMINV,
+A_SMLAL,
+A_SMLAL2,
+A_SMLSL,
+A_SMLSL2,
+A_SMOV,
+A_SMULL,
+A_SMULL2,
+A_SQABS,
+A_SQADD,
+A_SQDMLAL,
+A_SQDMLAL2,
+A_SQDMLSL,
+A_SQDMLSL2,
+A_SQDMULH,
+A_SQDMULL,
+A_SQDMULL2,
+A_SQNEG,
+A_SQRDMULH,
+A_SQRSHL,
+A_SQRSHRN,
+A_SQRSHRN2,
+A_SQRSHRUN,
+A_SQRSHRUN2,
+A_SQSHL,
+A_SQSHLU,
+A_SQSHRN,
+A_SQSRHN2,
+A_SQSHRUN,
+A_SQSHRUN2,
+A_SQSUB,
+A_SQXTN,
+A_SQXTN2,
+A_SQXTUN,
+A_SQXTUN2,
+A_SRHQDD,
+A_SRI,
+A_SRSHL,
+A_SRSHR,
+A_SRSRA,
+A_SSHL,
+A_SSHLL,
+A_SSHLL2,
+A_SSHR,
+A_SSRA,
+A_SSUBL,
+A_SSUBL2,
+A_SSUBW,
+A_SSUBW2,
+A_ST1,
+A_ST2,
+A_ST3,
+A_ST4,
+A_SUBQADD,
+A_SXTL,
+A_TBL,
+A_TBX,
+A_TRN1,
+A_TRN2,
+A_UABA,
+A_UABAL,
+A_UABAL2,
+A_UABD,
+A_UABDL,
+A_UABDL2,
+A_UADALP,
+A_UADDLL,
+A_UADDLL2,
+A_UADDLP,
+A_UADDLV,
+A_UADDW,
+A_UADDW2,
+A_UCVTF,
+A_UHADD,
+A_UHSUB,
+A_UMAX,
+A_UMAXP,
+A_UMAXV,
+A_UMIN,
+A_UMINP,
+A_UMINV,
+A_UMLAL,
+A_UMLAL2,
+A_UMLSL,
+A_UMLSL2,
+A_UMOV,
+A_UQADD,
+A_UQRSHL,
+A_UQRSHRN,
+A_UQRSHRN2,
+A_UQSHL,
+A_UQSHRN,
+A_UQSUB,
+A_UQXTN,
+A_UQXTN2,
+A_URECPE,
+A_URHADD,
+A_URSHL,
+A_URSHR,
+A_URSQRTE,
+A_URSRA,
+A_USHL,
+A_USHLL2,
+A_USHR,
+A_USQADD,
+A_USRA,
+A_USUBL,
+A_USUBL2,
+A_USUBW,
+A_USUBW2,
+A_UXTL,
+A_UZP1,
+A_UZP2,
+A_XTN1,
+A_XTN2,
+A_ZIP1,
+A_ZIP2,
+A_NOP,
+A_ASR,
+A_LSL,
+A_LSR,
+A_ROR,
+A_NEG,
+A_INS
 );

compiler/aarch64/a64reg.dat

@@ -76,235 +76,586 @@ XZR,$01,$05,$1F,xzr,31,31
 WSP,$01,$04,$20,wsp,31,31
 SP,$01,$05,$20,sp,31,31
 
+NZCV,$05,$00,$00,nzcv,0,0
+FPCR,$05,$00,$01,fpcr,0,0
+FPSR,$05,$00,$02,fpsr,0,0
+TPIDR_EL0,$05,$00,$03,tpidr_el0,0,0
+
 ; vfp registers
 ; generated by fpc/compiler/utils/gena64vfp.pp to avoid tedious typing
 B0,$04,$01,$00,b0,64,64
 H0,$04,$03,$00,h0,64,64
 S0,$04,$09,$00,s0,64,64
 D0,$04,$0a,$00,d0,64,64
-Q0,$04,$05,$00,q0,64,64
-V08B,$04,$17,$00,v0.8b,64,64
-V016B,$04,$18,$00,v0.16b,64,64
+Q0,$04,$0b,$00,q0,64,64
+V0,$04,$00,$00,v0,64,64
+V0_B,$04,$20,$00,v0.b,64,64
+V0_H,$04,$21,$00,v0.h,64,64
+V0_S,$04,$22,$00,v0.s,64,64
+V0_D,$04,$23,$00,v0.d,64,64
+V0_8B,$04,$18,$00,v0.8b,64,64
+V0_16B,$04,$19,$00,v0.16b,64,64
+V0_4H,$04,$1a,$00,v0.4h,64,64
+V0_8H,$04,$1b,$00,v0.8h,64,64
+V0_2S,$04,$1c,$00,v0.2s,64,64
+V0_4S,$04,$1d,$00,v0.4s,64,64
+V0_1D,$04,$1e,$00,v0.1d,64,64
+V0_2D,$04,$1f,$00,v0.2d,64,64
 B1,$04,$01,$01,b1,65,65
 H1,$04,$03,$01,h1,65,65
 S1,$04,$09,$01,s1,65,65
 D1,$04,$0a,$01,d1,65,65
-Q1,$04,$05,$01,q1,65,65
-V18B,$04,$17,$01,v1.8b,65,65
-V116B,$04,$18,$01,v1.16b,65,65
+Q1,$04,$0b,$01,q1,65,65
+V1,$04,$00,$01,v1,65,65
+V1_B,$04,$20,$01,v1.b,65,65
+V1_H,$04,$21,$01,v1.h,65,65
+V1_S,$04,$22,$01,v1.s,65,65
+V1_D,$04,$23,$01,v1.d,65,65
+V1_8B,$04,$18,$01,v1.8b,65,65
+V1_16B,$04,$19,$01,v1.16b,65,65
+V1_4H,$04,$1a,$01,v1.4h,65,65
+V1_8H,$04,$1b,$01,v1.8h,65,65
+V1_2S,$04,$1c,$01,v1.2s,65,65
+V1_4S,$04,$1d,$01,v1.4s,65,65
+V1_1D,$04,$1e,$01,v1.1d,65,65
+V1_2D,$04,$1f,$01,v1.2d,65,65
 B2,$04,$01,$02,b2,66,66
 H2,$04,$03,$02,h2,66,66
 S2,$04,$09,$02,s2,66,66
 D2,$04,$0a,$02,d2,66,66
-Q2,$04,$05,$02,q2,66,66
-V28B,$04,$17,$02,v2.8b,66,66
-V216B,$04,$18,$02,v2.16b,66,66
+Q2,$04,$0b,$02,q2,66,66
+V2,$04,$00,$02,v2,66,66
+V2_B,$04,$20,$02,v2.b,66,66
+V2_H,$04,$21,$02,v2.h,66,66
+V2_S,$04,$22,$02,v2.s,66,66
+V2_D,$04,$23,$02,v2.d,66,66
+V2_8B,$04,$18,$02,v2.8b,66,66
+V2_16B,$04,$19,$02,v2.16b,66,66
+V2_4H,$04,$1a,$02,v2.4h,66,66
+V2_8H,$04,$1b,$02,v2.8h,66,66
+V2_2S,$04,$1c,$02,v2.2s,66,66
+V2_4S,$04,$1d,$02,v2.4s,66,66
+V2_1D,$04,$1e,$02,v2.1d,66,66
+V2_2D,$04,$1f,$02,v2.2d,66,66
 B3,$04,$01,$03,b3,67,67
 H3,$04,$03,$03,h3,67,67
 S3,$04,$09,$03,s3,67,67
 D3,$04,$0a,$03,d3,67,67
-Q3,$04,$05,$03,q3,67,67
-V38B,$04,$17,$03,v3.8b,67,67
-V316B,$04,$18,$03,v3.16b,67,67
+Q3,$04,$0b,$03,q3,67,67
+V3,$04,$00,$03,v3,67,67
+V3_B,$04,$20,$03,v3.b,67,67
+V3_H,$04,$21,$03,v3.h,67,67
+V3_S,$04,$22,$03,v3.s,67,67
+V3_D,$04,$23,$03,v3.d,67,67
+V3_8B,$04,$18,$03,v3.8b,67,67
+V3_16B,$04,$19,$03,v3.16b,67,67
+V3_4H,$04,$1a,$03,v3.4h,67,67
+V3_8H,$04,$1b,$03,v3.8h,67,67
+V3_2S,$04,$1c,$03,v3.2s,67,67
+V3_4S,$04,$1d,$03,v3.4s,67,67
+V3_1D,$04,$1e,$03,v3.1d,67,67
+V3_2D,$04,$1f,$03,v3.2d,67,67
 B4,$04,$01,$04,b4,68,68
 H4,$04,$03,$04,h4,68,68
 S4,$04,$09,$04,s4,68,68
 D4,$04,$0a,$04,d4,68,68
-Q4,$04,$05,$04,q4,68,68
-V48B,$04,$17,$04,v4.8b,68,68
-V416B,$04,$18,$04,v4.16b,68,68
+Q4,$04,$0b,$04,q4,68,68
+V4,$04,$00,$04,v4,68,68
+V4_B,$04,$20,$04,v4.b,68,68
+V4_H,$04,$21,$04,v4.h,68,68
+V4_S,$04,$22,$04,v4.s,68,68
+V4_D,$04,$23,$04,v4.d,68,68
+V4_8B,$04,$18,$04,v4.8b,68,68
+V4_16B,$04,$19,$04,v4.16b,68,68
+V4_4H,$04,$1a,$04,v4.4h,68,68
+V4_8H,$04,$1b,$04,v4.8h,68,68
+V4_2S,$04,$1c,$04,v4.2s,68,68
+V4_4S,$04,$1d,$04,v4.4s,68,68
+V4_1D,$04,$1e,$04,v4.1d,68,68
+V4_2D,$04,$1f,$04,v4.2d,68,68
 B5,$04,$01,$05,b5,69,69
 H5,$04,$03,$05,h5,69,69
 S5,$04,$09,$05,s5,69,69
 D5,$04,$0a,$05,d5,69,69
-Q5,$04,$05,$05,q5,69,69
-V58B,$04,$17,$05,v5.8b,69,69
-V516B,$04,$18,$05,v5.16b,69,69
+Q5,$04,$0b,$05,q5,69,69
+V5,$04,$00,$05,v5,69,69
+V5_B,$04,$20,$05,v5.b,69,69
+V5_H,$04,$21,$05,v5.h,69,69
+V5_S,$04,$22,$05,v5.s,69,69
+V5_D,$04,$23,$05,v5.d,69,69
+V5_8B,$04,$18,$05,v5.8b,69,69
+V5_16B,$04,$19,$05,v5.16b,69,69
+V5_4H,$04,$1a,$05,v5.4h,69,69
+V5_8H,$04,$1b,$05,v5.8h,69,69
+V5_2S,$04,$1c,$05,v5.2s,69,69
+V5_4S,$04,$1d,$05,v5.4s,69,69
+V5_1D,$04,$1e,$05,v5.1d,69,69
+V5_2D,$04,$1f,$05,v5.2d,69,69
 B6,$04,$01,$06,b6,70,70
 H6,$04,$03,$06,h6,70,70
-S6,$04,$09,$06,s6,70,70                                                                     gena64vfp.pp
+S6,$04,$09,$06,s6,70,70
 D6,$04,$0a,$06,d6,70,70
-Q6,$04,$05,$06,q6,70,70
-V68B,$04,$17,$06,v6.8b,70,70
-V616B,$04,$18,$06,v6.16b,70,70
+Q6,$04,$0b,$06,q6,70,70
+V6,$04,$00,$06,v6,70,70
+V6_B,$04,$20,$06,v6.b,70,70
+V6_H,$04,$21,$06,v6.h,70,70
+V6_S,$04,$22,$06,v6.s,70,70
+V6_D,$04,$23,$06,v6.d,70,70
+V6_8B,$04,$18,$06,v6.8b,70,70
+V6_16B,$04,$19,$06,v6.16b,70,70
+V6_4H,$04,$1a,$06,v6.4h,70,70
+V6_8H,$04,$1b,$06,v6.8h,70,70
+V6_2S,$04,$1c,$06,v6.2s,70,70
+V6_4S,$04,$1d,$06,v6.4s,70,70
+V6_1D,$04,$1e,$06,v6.1d,70,70
+V6_2D,$04,$1f,$06,v6.2d,70,70
 B7,$04,$01,$07,b7,71,71
 H7,$04,$03,$07,h7,71,71
 S7,$04,$09,$07,s7,71,71
 D7,$04,$0a,$07,d7,71,71
-Q7,$04,$05,$07,q7,71,71
-V78B,$04,$17,$07,v7.8b,71,71
-V716B,$04,$18,$07,v7.16b,71,71
+Q7,$04,$0b,$07,q7,71,71
+V7,$04,$00,$07,v7,71,71
+V7_B,$04,$20,$07,v7.b,71,71
+V7_H,$04,$21,$07,v7.h,71,71
+V7_S,$04,$22,$07,v7.s,71,71
+V7_D,$04,$23,$07,v7.d,71,71
+V7_8B,$04,$18,$07,v7.8b,71,71
+V7_16B,$04,$19,$07,v7.16b,71,71
+V7_4H,$04,$1a,$07,v7.4h,71,71
+V7_8H,$04,$1b,$07,v7.8h,71,71
+V7_2S,$04,$1c,$07,v7.2s,71,71
+V7_4S,$04,$1d,$07,v7.4s,71,71
+V7_1D,$04,$1e,$07,v7.1d,71,71
+V7_2D,$04,$1f,$07,v7.2d,71,71
 B8,$04,$01,$08,b8,72,72
 H8,$04,$03,$08,h8,72,72
 S8,$04,$09,$08,s8,72,72
 D8,$04,$0a,$08,d8,72,72
-Q8,$04,$05,$08,q8,72,72
-V88B,$04,$17,$08,v8.8b,72,72
-V816B,$04,$18,$08,v8.16b,72,72
+Q8,$04,$0b,$08,q8,72,72
+V8,$04,$00,$08,v8,72,72
+V8_B,$04,$20,$08,v8.b,72,72
+V8_H,$04,$21,$08,v8.h,72,72
+V8_S,$04,$22,$08,v8.s,72,72
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 H26,$04,$03,$1A,h26,90,90
 S26,$04,$09,$1A,s26,90,90
 D26,$04,$0a,$1A,d26,90,90
-Q26,$04,$05,$1A,q26,90,90
-V268B,$04,$17,$1A,v26.8b,90,90
-V2616B,$04,$18,$1A,v26.16b,90,90
+Q26,$04,$0b,$1A,q26,90,90
+V26,$04,$00,$1A,v26,90,90
+V26_B,$04,$20,$1A,v26.b,90,90
+V26_H,$04,$21,$1A,v26.h,90,90
+V26_S,$04,$22,$1A,v26.s,90,90
+V26_D,$04,$23,$1A,v26.d,90,90
+V26_8B,$04,$18,$1A,v26.8b,90,90
+V26_16B,$04,$19,$1A,v26.16b,90,90
+V26_4H,$04,$1a,$1A,v26.4h,90,90
+V26_8H,$04,$1b,$1A,v26.8h,90,90
+V26_2S,$04,$1c,$1A,v26.2s,90,90
+V26_4S,$04,$1d,$1A,v26.4s,90,90
+V26_1D,$04,$1e,$1A,v26.1d,90,90
+V26_2D,$04,$1f,$1A,v26.2d,90,90
 B27,$04,$01,$1B,b27,91,91
 H27,$04,$03,$1B,h27,91,91
 S27,$04,$09,$1B,s27,91,91
 D27,$04,$0a,$1B,d27,91,91
-Q27,$04,$05,$1B,q27,91,91
-V278B,$04,$17,$1B,v27.8b,91,91
-V2716B,$04,$18,$1B,v27.16b,91,91
+Q27,$04,$0b,$1B,q27,91,91
+V27,$04,$00,$1B,v27,91,91
+V27_B,$04,$20,$1B,v27.b,91,91
+V27_H,$04,$21,$1B,v27.h,91,91
+V27_S,$04,$22,$1B,v27.s,91,91
+V27_D,$04,$23,$1B,v27.d,91,91
+V27_8B,$04,$18,$1B,v27.8b,91,91
+V27_16B,$04,$19,$1B,v27.16b,91,91
+V27_4H,$04,$1a,$1B,v27.4h,91,91
+V27_8H,$04,$1b,$1B,v27.8h,91,91
+V27_2S,$04,$1c,$1B,v27.2s,91,91
+V27_4S,$04,$1d,$1B,v27.4s,91,91
+V27_1D,$04,$1e,$1B,v27.1d,91,91
+V27_2D,$04,$1f,$1B,v27.2d,91,91
 B28,$04,$01,$1C,b28,92,92
 H28,$04,$03,$1C,h28,92,92
 S28,$04,$09,$1C,s28,92,92
 D28,$04,$0a,$1C,d28,92,92
-Q28,$04,$05,$1C,q28,92,92
-V288B,$04,$17,$1C,v28.8b,92,92
-V2816B,$04,$18,$1C,v28.16b,92,92
+Q28,$04,$0b,$1C,q28,92,92
+V28,$04,$00,$1C,v28,92,92
+V28_B,$04,$20,$1C,v28.b,92,92
+V28_H,$04,$21,$1C,v28.h,92,92
+V28_S,$04,$22,$1C,v28.s,92,92
+V28_D,$04,$23,$1C,v28.d,92,92
+V28_8B,$04,$18,$1C,v28.8b,92,92
+V28_16B,$04,$19,$1C,v28.16b,92,92
+V28_4H,$04,$1a,$1C,v28.4h,92,92
+V28_8H,$04,$1b,$1C,v28.8h,92,92
+V28_2S,$04,$1c,$1C,v28.2s,92,92
+V28_4S,$04,$1d,$1C,v28.4s,92,92
+V28_1D,$04,$1e,$1C,v28.1d,92,92
+V28_2D,$04,$1f,$1C,v28.2d,92,92
 B29,$04,$01,$1D,b29,93,93
 H29,$04,$03,$1D,h29,93,93
 S29,$04,$09,$1D,s29,93,93
 D29,$04,$0a,$1D,d29,93,93
-Q29,$04,$05,$1D,q29,93,93
-V298B,$04,$17,$1D,v29.8b,93,93
-V2916B,$04,$18,$1D,v29.16b,93,93
+Q29,$04,$0b,$1D,q29,93,93
+V29,$04,$00,$1D,v29,93,93
+V29_B,$04,$20,$1D,v29.b,93,93
+V29_H,$04,$21,$1D,v29.h,93,93
+V29_S,$04,$22,$1D,v29.s,93,93
+V29_D,$04,$23,$1D,v29.d,93,93
+V29_8B,$04,$18,$1D,v29.8b,93,93
+V29_16B,$04,$19,$1D,v29.16b,93,93
+V29_4H,$04,$1a,$1D,v29.4h,93,93
+V29_8H,$04,$1b,$1D,v29.8h,93,93
+V29_2S,$04,$1c,$1D,v29.2s,93,93
+V29_4S,$04,$1d,$1D,v29.4s,93,93
+V29_1D,$04,$1e,$1D,v29.1d,93,93
+V29_2D,$04,$1f,$1D,v29.2d,93,93
 B30,$04,$01,$1E,b30,94,94
 H30,$04,$03,$1E,h30,94,94
 S30,$04,$09,$1E,s30,94,94
 D30,$04,$0a,$1E,d30,94,94
-Q30,$04,$05,$1E,q30,94,94
-V308B,$04,$17,$1E,v30.8b,94,94
-V3016B,$04,$18,$1E,v30.16b,94,94
+Q30,$04,$0b,$1E,q30,94,94
+V30,$04,$00,$1E,v30,94,94
+V30_B,$04,$20,$1E,v30.b,94,94
+V30_H,$04,$21,$1E,v30.h,94,94
+V30_S,$04,$22,$1E,v30.s,94,94
+V30_D,$04,$23,$1E,v30.d,94,94
+V30_8B,$04,$18,$1E,v30.8b,94,94
+V30_16B,$04,$19,$1E,v30.16b,94,94
+V30_4H,$04,$1a,$1E,v30.4h,94,94
+V30_8H,$04,$1b,$1E,v30.8h,94,94
+V30_2S,$04,$1c,$1E,v30.2s,94,94
+V30_4S,$04,$1d,$1E,v30.4s,94,94
+V30_1D,$04,$1e,$1E,v30.1d,94,94
+V30_2D,$04,$1f,$1E,v30.2d,94,94
 B31,$04,$01,$1F,b31,95,95
 H31,$04,$03,$1F,h31,95,95
 S31,$04,$09,$1F,s31,95,95
 D31,$04,$0a,$1F,d31,95,95
-Q31,$04,$05,$1F,q31,95,95
-V318B,$04,$17,$1F,v31.8b,95,95
-V3116B,$04,$18,$1F,v31.16b,95,95
-
-NZCV,$05,$00,$00,nzcv,0,0
-FPCR,$05,$00,$01,fpcr,0,0
-FPSR,$05,$00,$02,fpsr,0,0
-TPIDR_EL0,$05,$00,$03,tpidr_el0,0,0
-
+Q31,$04,$0b,$1F,q31,95,95
+V31,$04,$00,$1F,v31,95,95
+V31_B,$04,$20,$1F,v31.b,95,95
+V31_H,$04,$21,$1F,v31.h,95,95
+V31_S,$04,$22,$1F,v31.s,95,95
+V31_D,$04,$23,$1F,v31.d,95,95
+V31_8B,$04,$18,$1F,v31.8b,95,95
+V31_16B,$04,$19,$1F,v31.16b,95,95
+V31_4H,$04,$1a,$1F,v31.4h,95,95
+V31_8H,$04,$1b,$1F,v31.8h,95,95
+V31_2S,$04,$1c,$1F,v31.2s,95,95
+V31_4S,$04,$1d,$1F,v31.4s,95,95
+V31_1D,$04,$1e,$1F,v31.1d,95,95
+V31_2D,$04,$1f,$1F,v31.2d,95,95

compiler/aarch64/aasmcpu.pas

@@ -158,6 +158,8 @@ uses
          procedure loadshifterop(opidx:longint;const so:tshifterop);
          procedure loadconditioncode(opidx: longint; const c: tasmcond);
          procedure loadrealconst(opidx: longint; const _value: bestreal);
+         procedure loadregset(opidx: longint; _basereg: tregister; _nregs: byte; _regsetindex: byte = 255);
+         procedure loadindexedreg(opidx: longint; _indexedreg: tregister; _regindex: byte);
 
          constructor op_none(op : tasmop);
 
@@ -172,6 +174,9 @@ uses
          constructor op_reg_const_shifterop(op : tasmop;_op1: tregister; _op2: aint;_op3 : tshifterop);
          constructor op_reg_realconst(op: tasmop; _op1: tregister; _op2: bestreal);
 
+         constructor op_indexedreg_reg(op : tasmop;_op1: tregister; _op1index: byte; _op2 : tregister);
+         constructor op_reg_indexedreg(op : tasmop;_op1: tregister; _op2 : tregister; _op2index: byte);
+
          constructor op_reg_reg_reg(op : tasmop;_op1,_op2,_op3 : tregister);
          constructor op_reg_reg_reg_reg(op : tasmop;_op1,_op2,_op3,_op4 : tregister);
          constructor op_reg_reg_const(op : tasmop;_op1,_op2 : tregister; _op3: aint);
@@ -186,6 +191,9 @@ uses
          { this is for Jmp instructions }
          constructor op_cond_sym(op : tasmop;cond:TAsmCond;_op1 : tasmsymbol);
 
+         { ldN(r)/stN }
+         constructor op_regset_reg_ref(op: tasmop; basereg: tregister; nregs: byte; const ref: treference);
+
          constructor op_sym(op : tasmop;_op1 : tasmsymbol);
          constructor op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
          constructor op_reg_sym_ofs(op : tasmop;_op1 : tregister;_op2:tasmsymbol;_op2ofs : longint);
@@ -295,6 +303,35 @@ implementation
       end;
 
 
+    procedure taicpu.loadregset(opidx: longint; _basereg: tregister; _nregs: byte; _regsetindex: byte = 255);
+      begin
+        allocate_oper(opidx+1);
+        with oper[opidx]^ do
+          begin
+            if typ<>top_regset then
+              clearop(opidx);
+            basereg:=_basereg;
+            nregs:=_nregs;
+            regsetindex:=_regsetindex;
+            typ:=top_regset;
+          end;
+      end;
+
+
+    procedure taicpu.loadindexedreg(opidx: longint; _indexedreg: tregister; _regindex: byte);
+      begin
+        allocate_oper(opidx+1);
+        with oper[opidx]^ do
+          begin
+            if typ<>top_indexedreg then
+              clearop(opidx);
+            indexedreg:=_indexedreg;
+            regindex:=_regindex;
+            typ:=top_indexedreg;
+          end;
+      end;
+
+
 {*****************************************************************************
                                  taicpu Constructors
 *****************************************************************************}
@@ -406,6 +443,24 @@ implementation
       end;
 
 
+    constructor taicpu.op_indexedreg_reg(op: tasmop; _op1: tregister; _op1index: byte; _op2: tregister);
+      begin
+        inherited create(op);
+        ops:=2;
+        loadindexedreg(0,_op1,_op1index);
+        loadreg(1,_op2);
+      end;
+
+
+    constructor taicpu.op_reg_indexedreg(op: tasmop; _op1: tregister; _op2: tregister; _op2index: byte);
+      begin
+        inherited create(op);
+        ops:=2;
+        loadreg(0,_op1);
+        loadindexedreg(1,_op2,_op2index);
+      end;
+
+
      constructor taicpu.op_reg_reg_const(op : tasmop;_op1,_op2 : tregister; _op3: aint);
        begin
          inherited create(op);
@@ -497,6 +552,14 @@ implementation
          loadsymbol(0,_op1,0);
       end;
 
+    constructor taicpu.op_regset_reg_ref(op: tasmop; basereg: tregister; nregs: byte; const ref: treference);
+      begin
+        inherited create(op);
+        ops:=2;
+        loadregset(0,basereg,nregs);
+        loadref(1, ref);
+      end;
+
 
     constructor taicpu.op_sym(op : tasmop;_op1 : tasmsymbol);
       begin
@@ -552,7 +615,7 @@ implementation
       const
         { invalid sizes for aarch64 are 0 }
         subreg2bytesize: array[TSubRegister] of byte =
-          (0,0,0,0,4,8,0,0,0,4,8,0,0,0,0,0,0,0,0,0,0,0,0,8,16,0);
+          (0,0,0,0,4,8,0,0,0,4,8,0,0,0,0,0,0,0,0,0,0,0,0,8,16,0,16,16,16,16,16,16,16,16,16,16);
       var
         scalefactor: byte;
       begin
@@ -639,7 +702,9 @@ implementation
         result:=sr_internal_illegal;
         { post-indexed is only allowed for vector and immediate loads/stores }
         if (ref.addressmode=AM_POSTINDEXED) and
-           not(op in [A_LD1,A_LD2,A_LD3,A_LD4,A_ST1,A_ST2,A_ST3,A_ST4]) and
+           not((op = A_LD1) or (op = A_LD2) or (op = A_LD3) or (op = A_LD4) or
+               (op = A_LD1R) or (op = A_LD2R) or (op = A_LD3R) or (op = A_LD4R) or
+               (op = A_ST1) or (op = A_ST2) or (op = A_ST3) or (op = A_ST4)) and
            (not(op in [A_LDR,A_STR,A_LDP,A_STP]) or
             (ref.base=NR_NO) or
             (ref.index<>NR_NO)) then
@@ -682,32 +747,46 @@ implementation
             * can scale with the size of the access
             * can zero/sign extend 32 bit index register, and/or multiple by
               access size
-            * no pre/post-indexing
+            * no pre/post-indexing except for ldN(r)/stN
         }
         if (ref.base<>NR_NO) and
            (ref.index<>NR_NO) then
           begin
-            if ref.addressmode in [AM_PREINDEXED,AM_POSTINDEXED] then
-              exit;
             case op of
               { this holds for both integer and fpu/vector loads }
               A_LDR,A_STR:
-                if (ref.offset=0) and
-                   (((ref.shiftmode=SM_None) and
-                     (ref.shiftimm=0)) or
-                    ((ref.shiftmode in [SM_LSL,SM_UXTW,SM_SXTW]) and
-                     (ref.shiftimm=tcgsizep2size[size]))) then
-                  result:=sr_simple
-                else
-                  result:=sr_complex;
-              { todo }
+                begin
+                  if ref.addressmode in [AM_PREINDEXED,AM_POSTINDEXED] then
+                    exit;
+                  if (ref.offset=0) and
+                     (((ref.shiftmode=SM_None) and
+                       (ref.shiftimm=0)) or
+                      ((ref.shiftmode in [SM_LSL,SM_UXTW,SM_SXTW]) and
+                       (ref.shiftimm=tcgsizep2size[size]))) then
+                    result:=sr_simple
+                  else
+                    result:=sr_complex;
+                end;
               A_LD1,A_LD2,A_LD3,A_LD4,
+              A_LD1R,A_LD2R,A_LD3R,A_LD4R,
               A_ST1,A_ST2,A_ST3,A_ST4:
-                internalerror(2014110704);
+                begin
+                  if ref.addressmode in [AM_PREINDEXED] then
+                    exit;
+                  if (ref.offset=0) and
+                     (ref.addressmode=AM_POSTINDEXED) then
+                    result:=sr_simple
+                  else
+                   result:=sr_complex;
+                end;
               { these don't support base+index }
               A_LDUR,A_STUR,
               A_LDP,A_STP:
-                result:=sr_complex;
+                begin
+                  if ref.addressmode in [AM_PREINDEXED,AM_POSTINDEXED] then
+                    exit;
+                  result:=sr_complex;
+                end
               else
                 { nothing: result is already sr_internal_illegal };
             end;
@@ -724,6 +803,8 @@ implementation
               - regular with signed 9 bit immediate
             * LDUR*/STUR*:
               - regular with signed 9 bit immediate
+            * ldN(r)/stN
+              - 0 or with postindex
         }
         if ref.base<>NR_NO then
           begin
@@ -767,17 +848,28 @@ implementation
                 end;
               A_LDUR,A_STUR:
                 begin
-                  if (ref.addressmode=AM_OFFSET) and
-                     (ref.offset>=-256) and
+                  if ref.addressmode in [AM_PREINDEXED,AM_POSTINDEXED] then
+                    exit;
+                  if (ref.offset>=-256) and
                      (ref.offset<=255) then
                     result:=sr_simple
                   else
                     result:=sr_complex;
                 end;
-              { todo }
               A_LD1,A_LD2,A_LD3,A_LD4,
+              A_LD1R,A_LD2R,A_LD3R,A_LD4R,
               A_ST1,A_ST2,A_ST3,A_ST4:
-                internalerror(2014110907);
+                begin
+                  if ref.addressmode in [AM_PREINDEXED] then
+                    exit;
+                  if (ref.offset=0) or
+                     ((ref.addressmode=AM_POSTINDEXED) and
+                      { to check the validity of the offset, we'd have to analyse the regset argument }
+                      (ref.offset>0)) then
+                    result:=sr_simple
+                  else
+                    result:=sr_complex;
+                end;
               A_LDAR,
               A_LDAXR,
               A_LDXR,

compiler/aarch64/agcpugas.pas

@@ -673,26 +673,13 @@ unit agcpugas;
 
 
     function getopstr(asminfo: pasminfo; hp: taicpu; opnr: longint; const o: toper): string;
+      var
+        i: longint;
+        reg: tregister;
       begin
         case o.typ of
           top_reg:
-            { we cannot yet represent "umov w0, v4.s[0]" or "ins v4.d[0], x1",
-              so for now we use "s4" or "d4" instead -> translate here }
-            if ((hp.opcode=A_INS) or
-                (hp.opcode=A_UMOV)) and
-               (getregtype(hp.oper[opnr]^.reg)=R_MMREGISTER) then
-              begin
-                case getsubreg(hp.oper[opnr]^.reg) of
-                  R_SUBMMS:
-                    getopstr:='v'+tostr(getsupreg(hp.oper[opnr]^.reg))+'.S[0]';
-                  R_SUBMMD:
-                    getopstr:='v'+tostr(getsupreg(hp.oper[opnr]^.reg))+'.D[0]';
-                  else
-                    internalerror(2014122907);
-                end;
-              end
-            else
-              getopstr:=gas_regname(o.reg);
+            getopstr:=gas_regname(o.reg);
           top_shifterop:
             begin
               getopstr:=gas_shiftmode2str[o.shifterop^.shiftmode];
@@ -725,7 +712,24 @@ unit agcpugas;
             begin
               str(o.val_real,Result);
               Result:='#'+Result;
-            end
+            end;
+          top_regset:
+            begin
+              reg:=o.basereg;
+              result:='{'+gas_regname(reg);
+              for i:=1 to o.nregs-1 do
+                begin
+                  setsupreg(reg,succ(getsupreg(reg)) mod 32);
+                  result:=result+', '+gas_regname(reg);
+                end;
+              result:=result+'}';
+              if o.regsetindex<>255 then
+                result:=result+'['+tostr(o.regsetindex)+']'
+            end;
+          top_indexedreg:
+            begin
+              result:=gas_regname(o.indexedreg)+'['+tostr(o.regindex)+']';
+            end;
           else
             internalerror(2014121507);
         end;

compiler/aarch64/cgcpu.pas

@@ -1162,10 +1162,17 @@ implementation
        begin
          if not shufflescalar(shuffle) then
            internalerror(2014122801);
-         if not(tcgsize2size[fromsize] in [4,8]) or
-            (tcgsize2size[fromsize]<>tcgsize2size[tosize]) then
+         if tcgsize2size[fromsize]<>tcgsize2size[tosize] then
            internalerror(2014122803);
-         list.concat(taicpu.op_reg_reg(A_INS,mmreg,intreg));
+         case tcgsize2size[tosize] of
+           4:
+             setsubreg(mmreg,R_SUBMMS);
+           8:
+             setsubreg(mmreg,R_SUBMMD);
+           else
+             internalerror(2020101310);
+         end;
+         list.concat(taicpu.op_indexedreg_reg(A_INS,mmreg,0,intreg));
        end;
 
 
@@ -1175,14 +1182,21 @@ implementation
        begin
          if not shufflescalar(shuffle) then
            internalerror(2014122802);
-         if not(tcgsize2size[fromsize] in [4,8]) or
-            (tcgsize2size[fromsize]>tcgsize2size[tosize]) then
+         if tcgsize2size[fromsize]>tcgsize2size[tosize] then
            internalerror(2014122804);
+         case tcgsize2size[fromsize] of
+           4:
+             setsubreg(mmreg,R_SUBMMS);
+           8:
+             setsubreg(mmreg,R_SUBMMD);
+           else
+             internalerror(2020101311);
+           end;
          if tcgsize2size[fromsize]<tcgsize2size[tosize] then
            r:=makeregsize(intreg,fromsize)
          else
            r:=intreg;
-         list.concat(taicpu.op_reg_reg(A_UMOV,r,mmreg));
+         list.concat(taicpu.op_reg_indexedreg(A_UMOV,r,mmreg,0));
        end;
 
 

compiler/aarch64/cpubase.pas

@@ -48,9 +48,8 @@ unit cpubase;
     type
       TAsmOp= {$i a64op.inc}
 
-      TAsmOps = set of TAsmOp;
-      { AArch64 has less than 256 opcodes so far }
-      TCommonAsmOps = Set of TAsmOp;
+      { See comment for this type in arm/cpubase.pas }
+      TCommonAsmOps = Set of A_NONE..A_MOV;
 
       { This should define the array of instructions as string }
       op2strtable=array[tasmop] of string[11];
@@ -75,6 +74,7 @@ unit cpubase;
 
       RS_IP0 = RS_X16;
       RS_IP1 = RS_X17;
+      RS_XR = RS_X8;
 
       R_SUBWHOLE = R_SUBQ;
 
@@ -83,6 +83,7 @@ unit cpubase;
 
       NR_IP0 = NR_X16;
       NR_IP1 = NR_X17;
+      NR_XR = NR_X8;
 
       { Integer Super registers first and last }
       first_int_supreg = RS_X0;
@@ -108,7 +109,7 @@ unit cpubase;
       std_param_align = 8;
 
       { TODO: Calculate bsstart}
-      regnumber_count_bsstart = 256;
+      regnumber_count_bsstart = 512;
 
       regnumber_table : array[tregisterindex] of tregister = (
         {$i ra64num.inc}
@@ -406,6 +407,23 @@ unit cpubase;
                   result:=OS_F64;
                 R_SUBMMS:
                   result:=OS_F32;
+                { always use OS_M128, because these could be the top or bottom bytes (or middle in some cases) }
+                R_SUBMM8B:
+                  result:=OS_M128;
+                R_SUBMM16B:
+                  result:=OS_M128;
+                R_SUBMM4H:
+                  result:=OS_M128;
+                R_SUBMM8H:
+                  result:=OS_M128;
+                R_SUBMM2S:
+                  result:=OS_M128;
+                R_SUBMM4S:
+                  result:=OS_M128;
+                R_SUBMM1D:
+                  result:=OS_M128;
+                R_SUBMM2D:
+                  result:=OS_M128;
                 R_SUBMMWHOLE:
                   result:=OS_M128;
                 else

compiler/aarch64/cpupara.pas

@@ -266,7 +266,7 @@ unit cpupara;
                     size:=OS_ADDR;
                     def:=hp.paraloc[side].def;
                     loc:=LOC_REGISTER;
-                    register:=NR_X8;
+                    register:=NR_XR;
                   end
               end
             else

compiler/aarch64/ra64con.inc

@@ -66,231 +66,583 @@ NR_WZR = tregister($0104001F);
 NR_XZR = tregister($0105001F);
 NR_WSP = tregister($01040020);
 NR_SP = tregister($01050020);
+NR_NZCV = tregister($05000000);
+NR_FPCR = tregister($05000001);
+NR_FPSR = tregister($05000002);
+NR_TPIDR_EL0 = tregister($05000003);
 NR_B0 = tregister($04010000);
 NR_H0 = tregister($04030000);
 NR_S0 = tregister($04090000);
 NR_D0 = tregister($040a0000);
-NR_Q0 = tregister($04050000);
-NR_V08B = tregister($04170000);
-NR_V016B = tregister($04180000);
+NR_Q0 = tregister($040b0000);
+NR_V0 = tregister($04000000);
+NR_V0_B = tregister($04200000);
+NR_V0_H = tregister($04210000);
+NR_V0_S = tregister($04220000);
+NR_V0_D = tregister($04230000);
+NR_V0_8B = tregister($04180000);
+NR_V0_16B = tregister($04190000);
+NR_V0_4H = tregister($041a0000);
+NR_V0_8H = tregister($041b0000);
+NR_V0_2S = tregister($041c0000);
+NR_V0_4S = tregister($041d0000);
+NR_V0_1D = tregister($041e0000);
+NR_V0_2D = tregister($041f0000);
 NR_B1 = tregister($04010001);
 NR_H1 = tregister($04030001);
 NR_S1 = tregister($04090001);
 NR_D1 = tregister($040a0001);
-NR_Q1 = tregister($04050001);
-NR_V18B = tregister($04170001);
-NR_V116B = tregister($04180001);
+NR_Q1 = tregister($040b0001);
+NR_V1 = tregister($04000001);
+NR_V1_B = tregister($04200001);
+NR_V1_H = tregister($04210001);
+NR_V1_S = tregister($04220001);
+NR_V1_D = tregister($04230001);
+NR_V1_8B = tregister($04180001);
+NR_V1_16B = tregister($04190001);
+NR_V1_4H = tregister($041a0001);
+NR_V1_8H = tregister($041b0001);
+NR_V1_2S = tregister($041c0001);
+NR_V1_4S = tregister($041d0001);
+NR_V1_1D = tregister($041e0001);
+NR_V1_2D = tregister($041f0001);
 NR_B2 = tregister($04010002);
 NR_H2 = tregister($04030002);
 NR_S2 = tregister($04090002);
 NR_D2 = tregister($040a0002);
-NR_Q2 = tregister($04050002);
-NR_V28B = tregister($04170002);
-NR_V216B = tregister($04180002);
+NR_Q2 = tregister($040b0002);
+NR_V2 = tregister($04000002);
+NR_V2_B = tregister($04200002);
+NR_V2_H = tregister($04210002);
+NR_V2_S = tregister($04220002);
+NR_V2_D = tregister($04230002);
+NR_V2_8B = tregister($04180002);
+NR_V2_16B = tregister($04190002);
+NR_V2_4H = tregister($041a0002);
+NR_V2_8H = tregister($041b0002);
+NR_V2_2S = tregister($041c0002);
+NR_V2_4S = tregister($041d0002);
+NR_V2_1D = tregister($041e0002);
+NR_V2_2D = tregister($041f0002);
 NR_B3 = tregister($04010003);
 NR_H3 = tregister($04030003);
 NR_S3 = tregister($04090003);
 NR_D3 = tregister($040a0003);
-NR_Q3 = tregister($04050003);
-NR_V38B = tregister($04170003);
-NR_V316B = tregister($04180003);
+NR_Q3 = tregister($040b0003);
+NR_V3 = tregister($04000003);
+NR_V3_B = tregister($04200003);
+NR_V3_H = tregister($04210003);
+NR_V3_S = tregister($04220003);
+NR_V3_D = tregister($04230003);
+NR_V3_8B = tregister($04180003);
+NR_V3_16B = tregister($04190003);
+NR_V3_4H = tregister($041a0003);
+NR_V3_8H = tregister($041b0003);
+NR_V3_2S = tregister($041c0003);
+NR_V3_4S = tregister($041d0003);
+NR_V3_1D = tregister($041e0003);
+NR_V3_2D = tregister($041f0003);
 NR_B4 = tregister($04010004);
 NR_H4 = tregister($04030004);
 NR_S4 = tregister($04090004);
 NR_D4 = tregister($040a0004);
-NR_Q4 = tregister($04050004);
-NR_V48B = tregister($04170004);
-NR_V416B = tregister($04180004);
+NR_Q4 = tregister($040b0004);
+NR_V4 = tregister($04000004);
+NR_V4_B = tregister($04200004);
+NR_V4_H = tregister($04210004);
+NR_V4_S = tregister($04220004);
+NR_V4_D = tregister($04230004);
+NR_V4_8B = tregister($04180004);
+NR_V4_16B = tregister($04190004);
+NR_V4_4H = tregister($041a0004);
+NR_V4_8H = tregister($041b0004);
+NR_V4_2S = tregister($041c0004);
+NR_V4_4S = tregister($041d0004);
+NR_V4_1D = tregister($041e0004);
+NR_V4_2D = tregister($041f0004);
 NR_B5 = tregister($04010005);
 NR_H5 = tregister($04030005);
 NR_S5 = tregister($04090005);
 NR_D5 = tregister($040a0005);
-NR_Q5 = tregister($04050005);
-NR_V58B = tregister($04170005);
-NR_V516B = tregister($04180005);
+NR_Q5 = tregister($040b0005);
+NR_V5 = tregister($04000005);
+NR_V5_B = tregister($04200005);
+NR_V5_H = tregister($04210005);
+NR_V5_S = tregister($04220005);
+NR_V5_D = tregister($04230005);
+NR_V5_8B = tregister($04180005);
+NR_V5_16B = tregister($04190005);
+NR_V5_4H = tregister($041a0005);
+NR_V5_8H = tregister($041b0005);
+NR_V5_2S = tregister($041c0005);
+NR_V5_4S = tregister($041d0005);
+NR_V5_1D = tregister($041e0005);
+NR_V5_2D = tregister($041f0005);
 NR_B6 = tregister($04010006);
 NR_H6 = tregister($04030006);
 NR_S6 = tregister($04090006);
 NR_D6 = tregister($040a0006);
-NR_Q6 = tregister($04050006);
-NR_V68B = tregister($04170006);
-NR_V616B = tregister($04180006);
+NR_Q6 = tregister($040b0006);
+NR_V6 = tregister($04000006);
+NR_V6_B = tregister($04200006);
+NR_V6_H = tregister($04210006);
+NR_V6_S = tregister($04220006);
+NR_V6_D = tregister($04230006);
+NR_V6_8B = tregister($04180006);
+NR_V6_16B = tregister($04190006);
+NR_V6_4H = tregister($041a0006);
+NR_V6_8H = tregister($041b0006);
+NR_V6_2S = tregister($041c0006);
+NR_V6_4S = tregister($041d0006);
+NR_V6_1D = tregister($041e0006);
+NR_V6_2D = tregister($041f0006);
 NR_B7 = tregister($04010007);
 NR_H7 = tregister($04030007);
 NR_S7 = tregister($04090007);
 NR_D7 = tregister($040a0007);
-NR_Q7 = tregister($04050007);
-NR_V78B = tregister($04170007);
-NR_V716B = tregister($04180007);
+NR_Q7 = tregister($040b0007);
+NR_V7 = tregister($04000007);
+NR_V7_B = tregister($04200007);
+NR_V7_H = tregister($04210007);
+NR_V7_S = tregister($04220007);
+NR_V7_D = tregister($04230007);
+NR_V7_8B = tregister($04180007);
+NR_V7_16B = tregister($04190007);
+NR_V7_4H = tregister($041a0007);
+NR_V7_8H = tregister($041b0007);
+NR_V7_2S = tregister($041c0007);
+NR_V7_4S = tregister($041d0007);
+NR_V7_1D = tregister($041e0007);
+NR_V7_2D = tregister($041f0007);
 NR_B8 = tregister($04010008);
 NR_H8 = tregister($04030008);
 NR_S8 = tregister($04090008);
 NR_D8 = tregister($040a0008);
-NR_Q8 = tregister($04050008);
-NR_V88B = tregister($04170008);
-NR_V816B = tregister($04180008);
+NR_Q8 = tregister($040b0008);
+NR_V8 = tregister($04000008);
+NR_V8_B = tregister($04200008);
+NR_V8_H = tregister($04210008);
+NR_V8_S = tregister($04220008);
+NR_V8_D = tregister($04230008);
+NR_V8_8B = tregister($04180008);
+NR_V8_16B = tregister($04190008);
+NR_V8_4H = tregister($041a0008);
+NR_V8_8H = tregister($041b0008);
+NR_V8_2S = tregister($041c0008);
+NR_V8_4S = tregister($041d0008);
+NR_V8_1D = tregister($041e0008);
+NR_V8_2D = tregister($041f0008);
 NR_B9 = tregister($04010009);
 NR_H9 = tregister($04030009);
 NR_S9 = tregister($04090009);
 NR_D9 = tregister($040a0009);
-NR_Q9 = tregister($04050009);
-NR_V98B = tregister($04170009);
-NR_V916B = tregister($04180009);
+NR_Q9 = tregister($040b0009);
+NR_V9 = tregister($04000009);
+NR_V9_B = tregister($04200009);
+NR_V9_H = tregister($04210009);
+NR_V9_S = tregister($04220009);
+NR_V9_D = tregister($04230009);
+NR_V9_8B = tregister($04180009);
+NR_V9_16B = tregister($04190009);
+NR_V9_4H = tregister($041a0009);
+NR_V9_8H = tregister($041b0009);
+NR_V9_2S = tregister($041c0009);
+NR_V9_4S = tregister($041d0009);
+NR_V9_1D = tregister($041e0009);
+NR_V9_2D = tregister($041f0009);
 NR_B10 = tregister($0401000A);
 NR_H10 = tregister($0403000A);
 NR_S10 = tregister($0409000A);
 NR_D10 = tregister($040a000A);
-NR_Q10 = tregister($0405000A);
-NR_V108B = tregister($0417000A);
-NR_V1016B = tregister($0418000A);
+NR_Q10 = tregister($040b000A);
+NR_V10 = tregister($0400000A);
+NR_V10_B = tregister($0420000A);
+NR_V10_H = tregister($0421000A);
+NR_V10_S = tregister($0422000A);
+NR_V10_D = tregister($0423000A);
+NR_V10_8B = tregister($0418000A);
+NR_V10_16B = tregister($0419000A);
+NR_V10_4H = tregister($041a000A);
+NR_V10_8H = tregister($041b000A);
+NR_V10_2S = tregister($041c000A);
+NR_V10_4S = tregister($041d000A);
+NR_V10_1D = tregister($041e000A);
+NR_V10_2D = tregister($041f000A);
 NR_B11 = tregister($0401000B);
 NR_H11 = tregister($0403000B);
 NR_S11 = tregister($0409000B);
 NR_D11 = tregister($040a000B);
-NR_Q11 = tregister($0405000B);
-NR_V118B = tregister($0417000B);
-NR_V1116B = tregister($0418000B);
+NR_Q11 = tregister($040b000B);
+NR_V11 = tregister($0400000B);
+NR_V11_B = tregister($0420000B);
+NR_V11_H = tregister($0421000B);
+NR_V11_S = tregister($0422000B);
+NR_V11_D = tregister($0423000B);
+NR_V11_8B = tregister($0418000B);
+NR_V11_16B = tregister($0419000B);
+NR_V11_4H = tregister($041a000B);
+NR_V11_8H = tregister($041b000B);
+NR_V11_2S = tregister($041c000B);
+NR_V11_4S = tregister($041d000B);
+NR_V11_1D = tregister($041e000B);
+NR_V11_2D = tregister($041f000B);
 NR_B12 = tregister($0401000C);
 NR_H12 = tregister($0403000C);
 NR_S12 = tregister($0409000C);
 NR_D12 = tregister($040a000C);
-NR_Q12 = tregister($0405000C);
-NR_V128B = tregister($0417000C);
-NR_V1216B = tregister($0418000C);
+NR_Q12 = tregister($040b000C);
+NR_V12 = tregister($0400000C);
+NR_V12_B = tregister($0420000C);
+NR_V12_H = tregister($0421000C);
+NR_V12_S = tregister($0422000C);
+NR_V12_D = tregister($0423000C);
+NR_V12_8B = tregister($0418000C);
+NR_V12_16B = tregister($0419000C);
+NR_V12_4H = tregister($041a000C);
+NR_V12_8H = tregister($041b000C);
+NR_V12_2S = tregister($041c000C);
+NR_V12_4S = tregister($041d000C);
+NR_V12_1D = tregister($041e000C);
+NR_V12_2D = tregister($041f000C);
 NR_B13 = tregister($0401000D);
 NR_H13 = tregister($0403000D);
 NR_S13 = tregister($0409000D);
 NR_D13 = tregister($040a000D);
-NR_Q13 = tregister($0405000D);
-NR_V138B = tregister($0417000D);
-NR_V1316B = tregister($0418000D);
+NR_Q13 = tregister($040b000D);
+NR_V13 = tregister($0400000D);
+NR_V13_B = tregister($0420000D);
+NR_V13_H = tregister($0421000D);
+NR_V13_S = tregister($0422000D);
+NR_V13_D = tregister($0423000D);
+NR_V13_8B = tregister($0418000D);
+NR_V13_16B = tregister($0419000D);
+NR_V13_4H = tregister($041a000D);
+NR_V13_8H = tregister($041b000D);
+NR_V13_2S = tregister($041c000D);
+NR_V13_4S = tregister($041d000D);
+NR_V13_1D = tregister($041e000D);
+NR_V13_2D = tregister($041f000D);
 NR_B14 = tregister($0401000E);
 NR_H14 = tregister($0403000E);
 NR_S14 = tregister($0409000E);
 NR_D14 = tregister($040a000E);
-NR_Q14 = tregister($0405000E);
-NR_V148B = tregister($0417000E);
-NR_V1416B = tregister($0418000E);
+NR_Q14 = tregister($040b000E);
+NR_V14 = tregister($0400000E);
+NR_V14_B = tregister($0420000E);
+NR_V14_H = tregister($0421000E);
+NR_V14_S = tregister($0422000E);
+NR_V14_D = tregister($0423000E);
+NR_V14_8B = tregister($0418000E);
+NR_V14_16B = tregister($0419000E);
+NR_V14_4H = tregister($041a000E);
+NR_V14_8H = tregister($041b000E);
+NR_V14_2S = tregister($041c000E);
+NR_V14_4S = tregister($041d000E);
+NR_V14_1D = tregister($041e000E);
+NR_V14_2D = tregister($041f000E);
 NR_B15 = tregister($0401000F);
 NR_H15 = tregister($0403000F);
 NR_S15 = tregister($0409000F);
 NR_D15 = tregister($040a000F);
-NR_Q15 = tregister($0405000F);
-NR_V158B = tregister($0417000F);
-NR_V1516B = tregister($0418000F);
+NR_Q15 = tregister($040b000F);
+NR_V15 = tregister($0400000F);
+NR_V15_B = tregister($0420000F);
+NR_V15_H = tregister($0421000F);
+NR_V15_S = tregister($0422000F);
+NR_V15_D = tregister($0423000F);
+NR_V15_8B = tregister($0418000F);
+NR_V15_16B = tregister($0419000F);
+NR_V15_4H = tregister($041a000F);
+NR_V15_8H = tregister($041b000F);
+NR_V15_2S = tregister($041c000F);
+NR_V15_4S = tregister($041d000F);
+NR_V15_1D = tregister($041e000F);
+NR_V15_2D = tregister($041f000F);
 NR_B16 = tregister($04010010);
 NR_H16 = tregister($04030010);
 NR_S16 = tregister($04090010);
 NR_D16 = tregister($040a0010);
-NR_Q16 = tregister($04050010);
-NR_V168B = tregister($04170010);
-NR_V1616B = tregister($04180010);
+NR_Q16 = tregister($040b0010);
+NR_V16 = tregister($04000010);
+NR_V16_B = tregister($04200010);
+NR_V16_H = tregister($04210010);
+NR_V16_S = tregister($04220010);
+NR_V16_D = tregister($04230010);
+NR_V16_8B = tregister($04180010);
+NR_V16_16B = tregister($04190010);
+NR_V16_4H = tregister($041a0010);
+NR_V16_8H = tregister($041b0010);
+NR_V16_2S = tregister($041c0010);
+NR_V16_4S = tregister($041d0010);
+NR_V16_1D = tregister($041e0010);
+NR_V16_2D = tregister($041f0010);
 NR_B17 = tregister($04010011);
 NR_H17 = tregister($04030011);
 NR_S17 = tregister($04090011);
 NR_D17 = tregister($040a0011);
-NR_Q17 = tregister($04050011);
-NR_V178B = tregister($04170011);
-NR_V1716B = tregister($04180011);
+NR_Q17 = tregister($040b0011);
+NR_V17 = tregister($04000011);
+NR_V17_B = tregister($04200011);
+NR_V17_H = tregister($04210011);
+NR_V17_S = tregister($04220011);
+NR_V17_D = tregister($04230011);
+NR_V17_8B = tregister($04180011);
+NR_V17_16B = tregister($04190011);
+NR_V17_4H = tregister($041a0011);
+NR_V17_8H = tregister($041b0011);
+NR_V17_2S = tregister($041c0011);
+NR_V17_4S = tregister($041d0011);
+NR_V17_1D = tregister($041e0011);
+NR_V17_2D = tregister($041f0011);
 NR_B18 = tregister($04010012);
 NR_H18 = tregister($04030012);
 NR_S18 = tregister($04090012);
 NR_D18 = tregister($040a0012);
-NR_Q18 = tregister($04050012);
-NR_V188B = tregister($04170012);
-NR_V1816B = tregister($04180012);
+NR_Q18 = tregister($040b0012);
+NR_V18 = tregister($04000012);
+NR_V18_B = tregister($04200012);
+NR_V18_H = tregister($04210012);
+NR_V18_S = tregister($04220012);
+NR_V18_D = tregister($04230012);
+NR_V18_8B = tregister($04180012);
+NR_V18_16B = tregister($04190012);
+NR_V18_4H = tregister($041a0012);
+NR_V18_8H = tregister($041b0012);
+NR_V18_2S = tregister($041c0012);
+NR_V18_4S = tregister($041d0012);
+NR_V18_1D = tregister($041e0012);
+NR_V18_2D = tregister($041f0012);
 NR_B19 = tregister($04010013);
 NR_H19 = tregister($04030013);
 NR_S19 = tregister($04090013);
 NR_D19 = tregister($040a0013);
-NR_Q19 = tregister($04050013);
-NR_V198B = tregister($04170013);
-NR_V1916B = tregister($04180013);
+NR_Q19 = tregister($040b0013);
+NR_V19 = tregister($04000013);
+NR_V19_B = tregister($04200013);
+NR_V19_H = tregister($04210013);
+NR_V19_S = tregister($04220013);
+NR_V19_D = tregister($04230013);
+NR_V19_8B = tregister($04180013);
+NR_V19_16B = tregister($04190013);
+NR_V19_4H = tregister($041a0013);
+NR_V19_8H = tregister($041b0013);
+NR_V19_2S = tregister($041c0013);
+NR_V19_4S = tregister($041d0013);
+NR_V19_1D = tregister($041e0013);
+NR_V19_2D = tregister($041f0013);
 NR_B20 = tregister($04010014);
 NR_H20 = tregister($04030014);
 NR_S20 = tregister($04090014);
 NR_D20 = tregister($040a0014);
-NR_Q20 = tregister($04050014);
-NR_V208B = tregister($04170014);
-NR_V2016B = tregister($04180014);
+NR_Q20 = tregister($040b0014);
+NR_V20 = tregister($04000014);
+NR_V20_B = tregister($04200014);
+NR_V20_H = tregister($04210014);
+NR_V20_S = tregister($04220014);
+NR_V20_D = tregister($04230014);
+NR_V20_8B = tregister($04180014);
+NR_V20_16B = tregister($04190014);
+NR_V20_4H = tregister($041a0014);
+NR_V20_8H = tregister($041b0014);
+NR_V20_2S = tregister($041c0014);
+NR_V20_4S = tregister($041d0014);
+NR_V20_1D = tregister($041e0014);
+NR_V20_2D = tregister($041f0014);
 NR_B21 = tregister($04010015);
 NR_H21 = tregister($04030015);
 NR_S21 = tregister($04090015);
 NR_D21 = tregister($040a0015);
-NR_Q21 = tregister($04050015);
-NR_V218B = tregister($04170015);
-NR_V2116B = tregister($04180015);
+NR_Q21 = tregister($040b0015);
+NR_V21 = tregister($04000015);
+NR_V21_B = tregister($04200015);
+NR_V21_H = tregister($04210015);
+NR_V21_S = tregister($04220015);
+NR_V21_D = tregister($04230015);
+NR_V21_8B = tregister($04180015);
+NR_V21_16B = tregister($04190015);
+NR_V21_4H = tregister($041a0015);
+NR_V21_8H = tregister($041b0015);
+NR_V21_2S = tregister($041c0015);
+NR_V21_4S = tregister($041d0015);
+NR_V21_1D = tregister($041e0015);
+NR_V21_2D = tregister($041f0015);
 NR_B22 = tregister($04010016);
 NR_H22 = tregister($04030016);
 NR_S22 = tregister($04090016);
 NR_D22 = tregister($040a0016);
-NR_Q22 = tregister($04050016);
-NR_V228B = tregister($04170016);
-NR_V2216B = tregister($04180016);
+NR_Q22 = tregister($040b0016);
+NR_V22 = tregister($04000016);
+NR_V22_B = tregister($04200016);
+NR_V22_H = tregister($04210016);
+NR_V22_S = tregister($04220016);
+NR_V22_D = tregister($04230016);
+NR_V22_8B = tregister($04180016);
+NR_V22_16B = tregister($04190016);
+NR_V22_4H = tregister($041a0016);
+NR_V22_8H = tregister($041b0016);
+NR_V22_2S = tregister($041c0016);
+NR_V22_4S = tregister($041d0016);
+NR_V22_1D = tregister($041e0016);
+NR_V22_2D = tregister($041f0016);
 NR_B23 = tregister($04010017);
 NR_H23 = tregister($04030017);
 NR_S23 = tregister($04090017);
 NR_D23 = tregister($040a0017);
-NR_Q23 = tregister($04050017);
-NR_V238B = tregister($04170017);
-NR_V2316B = tregister($04180017);
+NR_Q23 = tregister($040b0017);
+NR_V23 = tregister($04000017);
+NR_V23_B = tregister($04200017);
+NR_V23_H = tregister($04210017);
+NR_V23_S = tregister($04220017);
+NR_V23_D = tregister($04230017);
+NR_V23_8B = tregister($04180017);
+NR_V23_16B = tregister($04190017);
+NR_V23_4H = tregister($041a0017);
+NR_V23_8H = tregister($041b0017);
+NR_V23_2S = tregister($041c0017);
+NR_V23_4S = tregister($041d0017);
+NR_V23_1D = tregister($041e0017);
+NR_V23_2D = tregister($041f0017);
 NR_B24 = tregister($04010018);
 NR_H24 = tregister($04030018);
 NR_S24 = tregister($04090018);
 NR_D24 = tregister($040a0018);
-NR_Q24 = tregister($04050018);
-NR_V248B = tregister($04170018);
-NR_V2416B = tregister($04180018);
+NR_Q24 = tregister($040b0018);
+NR_V24 = tregister($04000018);
+NR_V24_B = tregister($04200018);
+NR_V24_H = tregister($04210018);
+NR_V24_S = tregister($04220018);
+NR_V24_D = tregister($04230018);
+NR_V24_8B = tregister($04180018);
+NR_V24_16B = tregister($04190018);
+NR_V24_4H = tregister($041a0018);
+NR_V24_8H = tregister($041b0018);
+NR_V24_2S = tregister($041c0018);
+NR_V24_4S = tregister($041d0018);
+NR_V24_1D = tregister($041e0018);
+NR_V24_2D = tregister($041f0018);
 NR_B25 = tregister($04010019);
 NR_H25 = tregister($04030019);
 NR_S25 = tregister($04090019);
 NR_D25 = tregister($040a0019);
-NR_Q25 = tregister($04050019);
-NR_V258B = tregister($04170019);
-NR_V2516B = tregister($04180019);
+NR_Q25 = tregister($040b0019);
+NR_V25 = tregister($04000019);
+NR_V25_B = tregister($04200019);
+NR_V25_H = tregister($04210019);
+NR_V25_S = tregister($04220019);
+NR_V25_D = tregister($04230019);
+NR_V25_8B = tregister($04180019);
+NR_V25_16B = tregister($04190019);
+NR_V25_4H = tregister($041a0019);
+NR_V25_8H = tregister($041b0019);
+NR_V25_2S = tregister($041c0019);
+NR_V25_4S = tregister($041d0019);
+NR_V25_1D = tregister($041e0019);
+NR_V25_2D = tregister($041f0019);
 NR_B26 = tregister($0401001A);
 NR_H26 = tregister($0403001A);
 NR_S26 = tregister($0409001A);
 NR_D26 = tregister($040a001A);
-NR_Q26 = tregister($0405001A);
-NR_V268B = tregister($0417001A);
-NR_V2616B = tregister($0418001A);
+NR_Q26 = tregister($040b001A);
+NR_V26 = tregister($0400001A);
+NR_V26_B = tregister($0420001A);
+NR_V26_H = tregister($0421001A);
+NR_V26_S = tregister($0422001A);
+NR_V26_D = tregister($0423001A);
+NR_V26_8B = tregister($0418001A);
+NR_V26_16B = tregister($0419001A);
+NR_V26_4H = tregister($041a001A);
+NR_V26_8H = tregister($041b001A);
+NR_V26_2S = tregister($041c001A);
+NR_V26_4S = tregister($041d001A);
+NR_V26_1D = tregister($041e001A);
+NR_V26_2D = tregister($041f001A);
 NR_B27 = tregister($0401001B);
 NR_H27 = tregister($0403001B);
 NR_S27 = tregister($0409001B);
 NR_D27 = tregister($040a001B);
-NR_Q27 = tregister($0405001B);
-NR_V278B = tregister($0417001B);
-NR_V2716B = tregister($0418001B);
+NR_Q27 = tregister($040b001B);
+NR_V27 = tregister($0400001B);
+NR_V27_B = tregister($0420001B);
+NR_V27_H = tregister($0421001B);
+NR_V27_S = tregister($0422001B);
+NR_V27_D = tregister($0423001B);
+NR_V27_8B = tregister($0418001B);
+NR_V27_16B = tregister($0419001B);
+NR_V27_4H = tregister($041a001B);
+NR_V27_8H = tregister($041b001B);
+NR_V27_2S = tregister($041c001B);
+NR_V27_4S = tregister($041d001B);
+NR_V27_1D = tregister($041e001B);
+NR_V27_2D = tregister($041f001B);
 NR_B28 = tregister($0401001C);
 NR_H28 = tregister($0403001C);
 NR_S28 = tregister($0409001C);
 NR_D28 = tregister($040a001C);
-NR_Q28 = tregister($0405001C);
-NR_V288B = tregister($0417001C);
-NR_V2816B = tregister($0418001C);
+NR_Q28 = tregister($040b001C);
+NR_V28 = tregister($0400001C);
+NR_V28_B = tregister($0420001C);
+NR_V28_H = tregister($0421001C);
+NR_V28_S = tregister($0422001C);
+NR_V28_D = tregister($0423001C);
+NR_V28_8B = tregister($0418001C);
+NR_V28_16B = tregister($0419001C);
+NR_V28_4H = tregister($041a001C);
+NR_V28_8H = tregister($041b001C);
+NR_V28_2S = tregister($041c001C);
+NR_V28_4S = tregister($041d001C);
+NR_V28_1D = tregister($041e001C);
+NR_V28_2D = tregister($041f001C);
 NR_B29 = tregister($0401001D);
 NR_H29 = tregister($0403001D);
 NR_S29 = tregister($0409001D);
 NR_D29 = tregister($040a001D);
-NR_Q29 = tregister($0405001D);
-NR_V298B = tregister($0417001D);
-NR_V2916B = tregister($0418001D);
+NR_Q29 = tregister($040b001D);
+NR_V29 = tregister($0400001D);
+NR_V29_B = tregister($0420001D);
+NR_V29_H = tregister($0421001D);
+NR_V29_S = tregister($0422001D);
+NR_V29_D = tregister($0423001D);
+NR_V29_8B = tregister($0418001D);
+NR_V29_16B = tregister($0419001D);
+NR_V29_4H = tregister($041a001D);
+NR_V29_8H = tregister($041b001D);
+NR_V29_2S = tregister($041c001D);
+NR_V29_4S = tregister($041d001D);
+NR_V29_1D = tregister($041e001D);
+NR_V29_2D = tregister($041f001D);
 NR_B30 = tregister($0401001E);
 NR_H30 = tregister($0403001E);
 NR_S30 = tregister($0409001E);
 NR_D30 = tregister($040a001E);
-NR_Q30 = tregister($0405001E);
-NR_V308B = tregister($0417001E);
-NR_V3016B = tregister($0418001E);
+NR_Q30 = tregister($040b001E);
+NR_V30 = tregister($0400001E);
+NR_V30_B = tregister($0420001E);
+NR_V30_H = tregister($0421001E);
+NR_V30_S = tregister($0422001E);
+NR_V30_D = tregister($0423001E);
+NR_V30_8B = tregister($0418001E);
+NR_V30_16B = tregister($0419001E);
+NR_V30_4H = tregister($041a001E);
+NR_V30_8H = tregister($041b001E);
+NR_V30_2S = tregister($041c001E);
+NR_V30_4S = tregister($041d001E);
+NR_V30_1D = tregister($041e001E);
+NR_V30_2D = tregister($041f001E);
 NR_B31 = tregister($0401001F);
 NR_H31 = tregister($0403001F);
 NR_S31 = tregister($0409001F);
 NR_D31 = tregister($040a001F);
-NR_Q31 = tregister($0405001F);
-NR_V318B = tregister($0417001F);
-NR_V3116B = tregister($0418001F);
-NR_NZCV = tregister($05000000);
-NR_FPCR = tregister($05000001);
-NR_FPSR = tregister($05000002);
-NR_TPIDR_EL0 = tregister($05000003);
+NR_Q31 = tregister($040b001F);
+NR_V31 = tregister($0400001F);
+NR_V31_B = tregister($0420001F);
+NR_V31_H = tregister($0421001F);
+NR_V31_S = tregister($0422001F);
+NR_V31_D = tregister($0423001F);
+NR_V31_8B = tregister($0418001F);
+NR_V31_16B = tregister($0419001F);
+NR_V31_4H = tregister($041a001F);
+NR_V31_8H = tregister($041b001F);
+NR_V31_2S = tregister($041c001F);
+NR_V31_4S = tregister($041d001F);
+NR_V31_1D = tregister($041e001F);
+NR_V31_2D = tregister($041f001F);

compiler/aarch64/ra64dwa.inc

@@ -66,6 +66,18 @@
 31,
 31,
 31,
+0,
+0,
+0,
+0,
+64,
+64,
+64,
+64,
+64,
+64,
+64,
+64,
 64,
 64,
 64,
@@ -73,6 +85,17 @@
 64,
 64,
 64,
+64,
+64,
+64,
+65,
+65,
+65,
+65,
+65,
+65,
+65,
+65,
 65,
 65,
 65,
@@ -80,6 +103,17 @@
 65,
 65,
 65,
+65,
+65,
+65,
+66,
+66,
+66,
+66,
+66,
+66,
+66,
+66,
 66,
 66,
 66,
@@ -87,6 +121,17 @@
 66,
 66,
 66,
+66,
+66,
+66,
+67,
+67,
+67,
+67,
+67,
+67,
+67,
+67,
 67,
 67,
 67,
@@ -94,6 +139,18 @@
 67,
 67,
 67,
+67,
+67,
+67,
+68,
+68,
+68,
+68,
+68,
+68,
+68,
+68,
+68,
 68,
 68,
 68,
@@ -101,6 +158,17 @@
 68,
 68,
 68,
+68,
+68,
+69,
+69,
+69,
+69,
+69,
+69,
+69,
+69,
+69,
 69,
 69,
 69,
@@ -108,13 +176,34 @@
 69,
 69,
 69,
+69,
+69,
+70,
+70,
+70,
+70,
+70,
+70,
+70,
+70,
+70,
 70,
 70,
-70                                                             ,
 70,
 70,
 70,
 70,
+70,
+70,
+70,
+71,
+71,
+71,
+71,
+71,
+71,
+71,
+71,
 71,
 71,
 71,
@@ -122,6 +211,18 @@
 71,
 71,
 71,
+71,
+71,
+71,
+72,
+72,
+72,
+72,
+72,
+72,
+72,
+72,
+72,
 72,
 72,
 72,
@@ -129,6 +230,17 @@
 72,
 72,
 72,
+72,
+72,
+73,
+73,
+73,
+73,
+73,
+73,
+73,
+73,
+73,
 73,
 73,
 73,
@@ -136,6 +248,17 @@
 73,
 73,
 73,
+73,
+73,
+74,
+74,
+74,
+74,
+74,
+74,
+74,
+74,
+74,
 74,
 74,
 74,
@@ -143,6 +266,17 @@
 74,
 74,
 74,
+74,
+74,
+75,
+75,
+75,
+75,
+75,
+75,
+75,
+75,
+75,
 75,
 75,
 75,
@@ -150,6 +284,18 @@
 75,
 75,
 75,
+75,
+75,
+76,
+76,
+76,
+76,
+76,
+76,
+76,
+76,
+76,
+76,
 76,
 76,
 76,
@@ -157,6 +303,17 @@
 76,
 76,
 76,
+76,
+77,
+77,
+77,
+77,
+77,
+77,
+77,
+77,
+77,
+77,
 77,
 77,
 77,
@@ -164,6 +321,17 @@
 77,
 77,
 77,
+77,
+78,
+78,
+78,
+78,
+78,
+78,
+78,
+78,
+78,
+78,
 78,
 78,
 78,
@@ -171,6 +339,17 @@
 78,
 78,
 78,
+78,
+79,
+79,
+79,
+79,
+79,
+79,
+79,
+79,
+79,
+79,
 79,
 79,
 79,
@@ -178,6 +357,18 @@
 79,
 79,
 79,
+79,
+80,
+80,
+80,
+80,
+80,
+80,
+80,
+80,
+80,
+80,
+80,
 80,
 80,
 80,
@@ -192,6 +383,17 @@
 81,
 81,
 81,
+81,
+81,
+81,
+81,
+81,
+81,
+81,
+81,
+81,
+81,
+81,
 82,
 82,
 82,
@@ -199,6 +401,28 @@
 82,
 82,
 82,
+82,
+82,
+82,
+82,
+82,
+82,
+82,
+82,
+82,
+82,
+82,
+83,
+83,
+83,
+83,
+83,
+83,
+83,
+83,
+83,
+83,
+83,
 83,
 83,
 83,
@@ -213,6 +437,18 @@
 84,
 84,
 84,
+84,
+84,
+84,
+84,
+84,
+84,
+84,
+84,
+84,
+84,
+84,
+85,
 85,
 85,
 85,
@@ -220,6 +456,17 @@
 85,
 85,
 85,
+85,
+85,
+85,
+85,
+85,
+85,
+85,
+85,
+85,
+85,
+86,
 86,
 86,
 86,
@@ -227,6 +474,17 @@
 86,
 86,
 86,
+86,
+86,
+86,
+86,
+86,
+86,
+86,
+86,
+86,
+86,
+87,
 87,
 87,
 87,
@@ -234,6 +492,17 @@
 87,
 87,
 87,
+87,
+87,
+87,
+87,
+87,
+87,
+87,
+87,
+87,
+87,
+88,
 88,
 88,
 88,
@@ -241,6 +510,18 @@
 88,
 88,
 88,
+88,
+88,
+88,
+88,
+88,
+88,
+88,
+88,
+88,
+88,
+89,
+89,
 89,
 89,
 89,
@@ -248,6 +529,17 @@
 89,
 89,
 89,
+89,
+89,
+89,
+89,
+89,
+89,
+89,
+89,
+89,
+90,
+90,
 90,
 90,
 90,
@@ -255,6 +547,17 @@
 90,
 90,
 90,
+90,
+90,
+90,
+90,
+90,
+90,
+90,
+90,
+90,
+91,
+91,
 91,
 91,
 91,
@@ -262,6 +565,17 @@
 91,
 91,
 91,
+91,
+91,
+91,
+91,
+91,
+91,
+91,
+91,
+91,
+92,
+92,
 92,
 92,
 92,
@@ -269,6 +583,17 @@
 92,
 92,
 92,
+92,
+92,
+92,
+92,
+92,
+92,
+92,
+92,
+92,
+93,
+93,
 93,
 93,
 93,
@@ -276,6 +601,26 @@
 93,
 93,
 93,
+93,
+93,
+93,
+93,
+93,
+93,
+93,
+93,
+93,
+94,
+94,
+94,
+94,
+94,
+94,
+94,
+94,
+94,
+94,
+94,
 94,
 94,
 94,
@@ -290,7 +635,14 @@
 95,
 95,
 95,
-0,
-0,
-0,
-0
+95,
+95,
+95,
+95,
+95,
+95,
+95,
+95,
+95,
+95,
+95

compiler/aarch64/ra64nor.inc

@@ -1,2 +1,2 @@
 { don't edit, this file is generated from a64reg.dat }
-295
+647

compiler/aarch64/ra64num.inc

@@ -66,231 +66,583 @@ tregister($0104001F),
 tregister($0105001F),
 tregister($01040020),
 tregister($01050020),
+tregister($05000000),
+tregister($05000001),
+tregister($05000002),
+tregister($05000003),
 tregister($04010000),
 tregister($04030000),
 tregister($04090000),
 tregister($040a0000),
-tregister($04050000),
-tregister($04170000),
+tregister($040b0000),
+tregister($04000000),
+tregister($04200000),
+tregister($04210000),
+tregister($04220000),
+tregister($04230000),
 tregister($04180000),
+tregister($04190000),
+tregister($041a0000),
+tregister($041b0000),
+tregister($041c0000),
+tregister($041d0000),
+tregister($041e0000),
+tregister($041f0000),
 tregister($04010001),
 tregister($04030001),
 tregister($04090001),
 tregister($040a0001),
-tregister($04050001),
-tregister($04170001),
+tregister($040b0001),
+tregister($04000001),
+tregister($04200001),
+tregister($04210001),
+tregister($04220001),
+tregister($04230001),
 tregister($04180001),
+tregister($04190001),
+tregister($041a0001),
+tregister($041b0001),
+tregister($041c0001),
+tregister($041d0001),
+tregister($041e0001),
+tregister($041f0001),
 tregister($04010002),
 tregister($04030002),
 tregister($04090002),
 tregister($040a0002),
-tregister($04050002),
-tregister($04170002),
+tregister($040b0002),
+tregister($04000002),
+tregister($04200002),
+tregister($04210002),
+tregister($04220002),
+tregister($04230002),
 tregister($04180002),
+tregister($04190002),
+tregister($041a0002),
+tregister($041b0002),
+tregister($041c0002),
+tregister($041d0002),
+tregister($041e0002),
+tregister($041f0002),
 tregister($04010003),
 tregister($04030003),
 tregister($04090003),
 tregister($040a0003),
-tregister($04050003),
-tregister($04170003),
+tregister($040b0003),
+tregister($04000003),
+tregister($04200003),
+tregister($04210003),
+tregister($04220003),
+tregister($04230003),
 tregister($04180003),
+tregister($04190003),
+tregister($041a0003),
+tregister($041b0003),
+tregister($041c0003),
+tregister($041d0003),
+tregister($041e0003),
+tregister($041f0003),
 tregister($04010004),
 tregister($04030004),
 tregister($04090004),
 tregister($040a0004),
-tregister($04050004),
-tregister($04170004),
+tregister($040b0004),
+tregister($04000004),
+tregister($04200004),
+tregister($04210004),
+tregister($04220004),
+tregister($04230004),
 tregister($04180004),
+tregister($04190004),
+tregister($041a0004),
+tregister($041b0004),
+tregister($041c0004),
+tregister($041d0004),
+tregister($041e0004),
+tregister($041f0004),
 tregister($04010005),
 tregister($04030005),
 tregister($04090005),
 tregister($040a0005),
-tregister($04050005),
-tregister($04170005),
+tregister($040b0005),
+tregister($04000005),
+tregister($04200005),
+tregister($04210005),
+tregister($04220005),
+tregister($04230005),
 tregister($04180005),
+tregister($04190005),
+tregister($041a0005),
+tregister($041b0005),
+tregister($041c0005),
+tregister($041d0005),
+tregister($041e0005),
+tregister($041f0005),
 tregister($04010006),
 tregister($04030006),
 tregister($04090006),
 tregister($040a0006),
-tregister($04050006),
-tregister($04170006),
+tregister($040b0006),
+tregister($04000006),
+tregister($04200006),
+tregister($04210006),
+tregister($04220006),
+tregister($04230006),
 tregister($04180006),
+tregister($04190006),
+tregister($041a0006),
+tregister($041b0006),
+tregister($041c0006),
+tregister($041d0006),
+tregister($041e0006),
+tregister($041f0006),
 tregister($04010007),
 tregister($04030007),
 tregister($04090007),
 tregister($040a0007),
-tregister($04050007),
-tregister($04170007),
+tregister($040b0007),
+tregister($04000007),
+tregister($04200007),
+tregister($04210007),
+tregister($04220007),
+tregister($04230007),
 tregister($04180007),
+tregister($04190007),
+tregister($041a0007),
+tregister($041b0007),
+tregister($041c0007),
+tregister($041d0007),
+tregister($041e0007),
+tregister($041f0007),
 tregister($04010008),
 tregister($04030008),
 tregister($04090008),
 tregister($040a0008),
-tregister($04050008),
-tregister($04170008),
+tregister($040b0008),
+tregister($04000008),
+tregister($04200008),
+tregister($04210008),
+tregister($04220008),
+tregister($04230008),
 tregister($04180008),
+tregister($04190008),
+tregister($041a0008),
+tregister($041b0008),
+tregister($041c0008),
+tregister($041d0008),
+tregister($041e0008),
+tregister($041f0008),
 tregister($04010009),
 tregister($04030009),
 tregister($04090009),
 tregister($040a0009),
-tregister($04050009),
-tregister($04170009),
+tregister($040b0009),
+tregister($04000009),
+tregister($04200009),
+tregister($04210009),
+tregister($04220009),
+tregister($04230009),
 tregister($04180009),
+tregister($04190009),
+tregister($041a0009),
+tregister($041b0009),
+tregister($041c0009),
+tregister($041d0009),
+tregister($041e0009),
+tregister($041f0009),
 tregister($0401000A),
 tregister($0403000A),
 tregister($0409000A),
 tregister($040a000A),
-tregister($0405000A),
-tregister($0417000A),
+tregister($040b000A),
+tregister($0400000A),
+tregister($0420000A),
+tregister($0421000A),
+tregister($0422000A),
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 tregister($0418000A),
+tregister($0419000A),
+tregister($041a000A),
+tregister($041b000A),
+tregister($041c000A),
+tregister($041d000A),
+tregister($041e000A),
+tregister($041f000A),
 tregister($0401000B),
 tregister($0403000B),
 tregister($0409000B),
 tregister($040a000B),
-tregister($0405000B),
-tregister($0417000B),
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+tregister($0400000B),
+tregister($0420000B),
+tregister($0421000B),
+tregister($0422000B),
+tregister($0423000B),
 tregister($0418000B),
+tregister($0419000B),
+tregister($041a000B),
+tregister($041b000B),
+tregister($041c000B),
+tregister($041d000B),
+tregister($041e000B),
+tregister($041f000B),
 tregister($0401000C),
 tregister($0403000C),
 tregister($0409000C),
 tregister($040a000C),
-tregister($0405000C),
-tregister($0417000C),
+tregister($040b000C),
+tregister($0400000C),
+tregister($0420000C),
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 tregister($0418000C),
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+tregister($041c000C),
+tregister($041d000C),
+tregister($041e000C),
+tregister($041f000C),
 tregister($0401000D),
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 tregister($0409000D),
 tregister($040a000D),
-tregister($0405000D),
-tregister($0417000D),
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+tregister($0400000D),
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 tregister($0418000D),
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+tregister($041e000D),
+tregister($041f000D),
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 tregister($040a000E),
-tregister($0405000E),
-tregister($0417000E),
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 tregister($0418000E),
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 tregister($0401000F),
 tregister($0403000F),
 tregister($0409000F),
 tregister($040a000F),
-tregister($0405000F),
-tregister($0417000F),
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 tregister($0418000F),
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 tregister($040a0010),
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-tregister($04170010),
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 tregister($04180010),
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+tregister($041b0010),
+tregister($041c0010),
+tregister($041d0010),
+tregister($041e0010),
+tregister($041f0010),
 tregister($04010011),
 tregister($04030011),
 tregister($04090011),
 tregister($040a0011),
-tregister($04050011),
-tregister($04170011),
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+tregister($04000011),
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+tregister($04220011),
+tregister($04230011),
 tregister($04180011),
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+tregister($041a0011),
+tregister($041b0011),
+tregister($041c0011),
+tregister($041d0011),
+tregister($041e0011),
+tregister($041f0011),
 tregister($04010012),
 tregister($04030012),
 tregister($04090012),
 tregister($040a0012),
-tregister($04050012),
-tregister($04170012),
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+tregister($04000012),
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 tregister($04180012),
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+tregister($041b0012),
+tregister($041c0012),
+tregister($041d0012),
+tregister($041e0012),
+tregister($041f0012),
 tregister($04010013),
 tregister($04030013),
 tregister($04090013),
 tregister($040a0013),
-tregister($04050013),
-tregister($04170013),
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+tregister($04200013),
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+tregister($04230013),
 tregister($04180013),
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+tregister($041c0013),
+tregister($041d0013),
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+tregister($041f0013),
 tregister($04010014),
 tregister($04030014),
 tregister($04090014),
 tregister($040a0014),
-tregister($04050014),
-tregister($04170014),
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 tregister($04180014),
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 tregister($040a0015),
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 tregister($04180015),
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 tregister($04010016),
 tregister($04030016),
 tregister($04090016),
 tregister($040a0016),
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-tregister($04170016),
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 tregister($04180016),
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 tregister($04010017),
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 tregister($04090017),
 tregister($040a0017),
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 tregister($04180017),
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+tregister($041b001F),
+tregister($041c001F),
+tregister($041d001F),
+tregister($041e001F),
+tregister($041f001F)

compiler/aarch64/ra64rni.inc

@@ -66,231 +66,583 @@
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compiler/aarch64/ra64sri.inc

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compiler/aarch64/ra64sta.inc

@@ -66,6 +66,18 @@
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compiler/aarch64/ra64std.inc

@@ -66,231 +66,583 @@
 'xzr',
 'wsp',
 'sp',
+'nzcv',
+'fpcr',
+'fpsr',
+'tpidr_el0',
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+'v0.2d',
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+'v3.4h',
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+'v3.4s',
+'v3.1d',
+'v3.2d',
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 'd4',
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+'v4',
+'v4.b',
+'v4.h',
+'v4.s',
+'v4.d',
 'v4.8b',
 'v4.16b',
+'v4.4h',
+'v4.8h',
+'v4.2s',
+'v4.4s',
+'v4.1d',
+'v4.2d',
 'b5',
 'h5',
 's5',
 'd5',
 'q5',
+'v5',
+'v5.b',
+'v5.h',
+'v5.s',
+'v5.d',
 'v5.8b',
 'v5.16b',
+'v5.4h',
+'v5.8h',
+'v5.2s',
+'v5.4s',
+'v5.1d',
+'v5.2d',
 'b6',
 'h6',
 's6',
 'd6',
 'q6',
+'v6',
+'v6.b',
+'v6.h',
+'v6.s',
+'v6.d',
 'v6.8b',
 'v6.16b',
+'v6.4h',
+'v6.8h',
+'v6.2s',
+'v6.4s',
+'v6.1d',
+'v6.2d',
 'b7',
 'h7',
 's7',
 'd7',
 'q7',
+'v7',
+'v7.b',
+'v7.h',
+'v7.s',
+'v7.d',
 'v7.8b',
 'v7.16b',
+'v7.4h',
+'v7.8h',
+'v7.2s',
+'v7.4s',
+'v7.1d',
+'v7.2d',
 'b8',
 'h8',
 's8',
 'd8',
 'q8',
+'v8',
+'v8.b',
+'v8.h',
+'v8.s',
+'v8.d',
 'v8.8b',
 'v8.16b',
+'v8.4h',
+'v8.8h',
+'v8.2s',
+'v8.4s',
+'v8.1d',
+'v8.2d',
 'b9',
 'h9',
 's9',
 'd9',
 'q9',
+'v9',
+'v9.b',
+'v9.h',
+'v9.s',
+'v9.d',
 'v9.8b',
 'v9.16b',
+'v9.4h',
+'v9.8h',
+'v9.2s',
+'v9.4s',
+'v9.1d',
+'v9.2d',
 'b10',
 'h10',
 's10',
 'd10',
 'q10',
+'v10',
+'v10.b',
+'v10.h',
+'v10.s',
+'v10.d',
 'v10.8b',
 'v10.16b',
+'v10.4h',
+'v10.8h',
+'v10.2s',
+'v10.4s',
+'v10.1d',
+'v10.2d',
 'b11',
 'h11',
 's11',
 'd11',
 'q11',
+'v11',
+'v11.b',
+'v11.h',
+'v11.s',
+'v11.d',
 'v11.8b',
 'v11.16b',
+'v11.4h',
+'v11.8h',
+'v11.2s',
+'v11.4s',
+'v11.1d',
+'v11.2d',
 'b12',
 'h12',
 's12',
 'd12',
 'q12',
+'v12',
+'v12.b',
+'v12.h',
+'v12.s',
+'v12.d',
 'v12.8b',
 'v12.16b',
+'v12.4h',
+'v12.8h',
+'v12.2s',
+'v12.4s',
+'v12.1d',
+'v12.2d',
 'b13',
 'h13',
 's13',
 'd13',
 'q13',
+'v13',
+'v13.b',
+'v13.h',
+'v13.s',
+'v13.d',
 'v13.8b',
 'v13.16b',
+'v13.4h',
+'v13.8h',
+'v13.2s',
+'v13.4s',
+'v13.1d',
+'v13.2d',
 'b14',
 'h14',
 's14',
 'd14',
 'q14',
+'v14',
+'v14.b',
+'v14.h',
+'v14.s',
+'v14.d',
 'v14.8b',
 'v14.16b',
+'v14.4h',
+'v14.8h',
+'v14.2s',
+'v14.4s',
+'v14.1d',
+'v14.2d',
 'b15',
 'h15',
 's15',
 'd15',
 'q15',
+'v15',
+'v15.b',
+'v15.h',
+'v15.s',
+'v15.d',
 'v15.8b',
 'v15.16b',
+'v15.4h',
+'v15.8h',
+'v15.2s',
+'v15.4s',
+'v15.1d',
+'v15.2d',
 'b16',
 'h16',
 's16',
 'd16',
 'q16',
+'v16',
+'v16.b',
+'v16.h',
+'v16.s',
+'v16.d',
 'v16.8b',
 'v16.16b',
+'v16.4h',
+'v16.8h',
+'v16.2s',
+'v16.4s',
+'v16.1d',
+'v16.2d',
 'b17',
 'h17',
 's17',
 'd17',
 'q17',
+'v17',
+'v17.b',
+'v17.h',
+'v17.s',
+'v17.d',
 'v17.8b',
 'v17.16b',
+'v17.4h',
+'v17.8h',
+'v17.2s',
+'v17.4s',
+'v17.1d',
+'v17.2d',
 'b18',
 'h18',
 's18',
 'd18',
 'q18',
+'v18',
+'v18.b',
+'v18.h',
+'v18.s',
+'v18.d',
 'v18.8b',
 'v18.16b',
+'v18.4h',
+'v18.8h',
+'v18.2s',
+'v18.4s',
+'v18.1d',
+'v18.2d',
 'b19',
 'h19',
 's19',
 'd19',
 'q19',
+'v19',
+'v19.b',
+'v19.h',
+'v19.s',
+'v19.d',
 'v19.8b',
 'v19.16b',
+'v19.4h',
+'v19.8h',
+'v19.2s',
+'v19.4s',
+'v19.1d',
+'v19.2d',
 'b20',
 'h20',
 's20',
 'd20',
 'q20',
+'v20',
+'v20.b',
+'v20.h',
+'v20.s',
+'v20.d',
 'v20.8b',
 'v20.16b',
+'v20.4h',
+'v20.8h',
+'v20.2s',
+'v20.4s',
+'v20.1d',
+'v20.2d',
 'b21',
 'h21',
 's21',
 'd21',
 'q21',
+'v21',
+'v21.b',
+'v21.h',
+'v21.s',
+'v21.d',
 'v21.8b',
 'v21.16b',
+'v21.4h',
+'v21.8h',
+'v21.2s',
+'v21.4s',
+'v21.1d',
+'v21.2d',
 'b22',
 'h22',
 's22',
 'd22',
 'q22',
+'v22',
+'v22.b',
+'v22.h',
+'v22.s',
+'v22.d',
 'v22.8b',
 'v22.16b',
+'v22.4h',
+'v22.8h',
+'v22.2s',
+'v22.4s',
+'v22.1d',
+'v22.2d',
 'b23',
 'h23',
 's23',
 'd23',
 'q23',
+'v23',
+'v23.b',
+'v23.h',
+'v23.s',
+'v23.d',
 'v23.8b',
 'v23.16b',
+'v23.4h',
+'v23.8h',
+'v23.2s',
+'v23.4s',
+'v23.1d',
+'v23.2d',
 'b24',
 'h24',
 's24',
 'd24',
 'q24',
+'v24',
+'v24.b',
+'v24.h',
+'v24.s',
+'v24.d',
 'v24.8b',
 'v24.16b',
+'v24.4h',
+'v24.8h',
+'v24.2s',
+'v24.4s',
+'v24.1d',
+'v24.2d',
 'b25',
 'h25',
 's25',
 'd25',
 'q25',
+'v25',
+'v25.b',
+'v25.h',
+'v25.s',
+'v25.d',
 'v25.8b',
 'v25.16b',
+'v25.4h',
+'v25.8h',
+'v25.2s',
+'v25.4s',
+'v25.1d',
+'v25.2d',
 'b26',
 'h26',
 's26',
 'd26',
 'q26',
+'v26',
+'v26.b',
+'v26.h',
+'v26.s',
+'v26.d',
 'v26.8b',
 'v26.16b',
+'v26.4h',
+'v26.8h',
+'v26.2s',
+'v26.4s',
+'v26.1d',
+'v26.2d',
 'b27',
 'h27',
 's27',
 'd27',
 'q27',
+'v27',
+'v27.b',
+'v27.h',
+'v27.s',
+'v27.d',
 'v27.8b',
 'v27.16b',
+'v27.4h',
+'v27.8h',
+'v27.2s',
+'v27.4s',
+'v27.1d',
+'v27.2d',
 'b28',
 'h28',
 's28',
 'd28',
 'q28',
+'v28',
+'v28.b',
+'v28.h',
+'v28.s',
+'v28.d',
 'v28.8b',
 'v28.16b',
+'v28.4h',
+'v28.8h',
+'v28.2s',
+'v28.4s',
+'v28.1d',
+'v28.2d',
 'b29',
 'h29',
 's29',
 'd29',
 'q29',
+'v29',
+'v29.b',
+'v29.h',
+'v29.s',
+'v29.d',
 'v29.8b',
 'v29.16b',
+'v29.4h',
+'v29.8h',
+'v29.2s',
+'v29.4s',
+'v29.1d',
+'v29.2d',
 'b30',
 'h30',
 's30',
 'd30',
 'q30',
+'v30',
+'v30.b',
+'v30.h',
+'v30.s',
+'v30.d',
 'v30.8b',
 'v30.16b',
+'v30.4h',
+'v30.8h',
+'v30.2s',
+'v30.4s',
+'v30.1d',
+'v30.2d',
 'b31',
 'h31',
 's31',
 'd31',
 'q31',
+'v31',
+'v31.b',
+'v31.h',
+'v31.s',
+'v31.d',
 'v31.8b',
 'v31.16b',
-'nzcv',
-'fpcr',
-'fpsr',
-'tpidr_el0'
+'v31.4h',
+'v31.8h',
+'v31.2s',
+'v31.4s',
+'v31.1d',
+'v31.2d'

compiler/aarch64/ra64sup.inc

@@ -66,231 +66,583 @@ RS_WZR = $1F;
 RS_XZR = $1F;
 RS_WSP = $20;
 RS_SP = $20;
+RS_NZCV = $00;
+RS_FPCR = $01;
+RS_FPSR = $02;
+RS_TPIDR_EL0 = $03;
 RS_B0 = $00;
 RS_H0 = $00;
 RS_S0 = $00;
 RS_D0 = $00;
 RS_Q0 = $00;
-RS_V08B = $00;
-RS_V016B = $00;
+RS_V0 = $00;
+RS_V0_B = $00;
+RS_V0_H = $00;
+RS_V0_S = $00;
+RS_V0_D = $00;
+RS_V0_8B = $00;
+RS_V0_16B = $00;
+RS_V0_4H = $00;
+RS_V0_8H = $00;
+RS_V0_2S = $00;
+RS_V0_4S = $00;
+RS_V0_1D = $00;
+RS_V0_2D = $00;
 RS_B1 = $01;
 RS_H1 = $01;
 RS_S1 = $01;
 RS_D1 = $01;
 RS_Q1 = $01;
-RS_V18B = $01;
-RS_V116B = $01;
+RS_V1 = $01;
+RS_V1_B = $01;
+RS_V1_H = $01;
+RS_V1_S = $01;
+RS_V1_D = $01;
+RS_V1_8B = $01;
+RS_V1_16B = $01;
+RS_V1_4H = $01;
+RS_V1_8H = $01;
+RS_V1_2S = $01;
+RS_V1_4S = $01;
+RS_V1_1D = $01;
+RS_V1_2D = $01;
 RS_B2 = $02;
 RS_H2 = $02;
 RS_S2 = $02;
 RS_D2 = $02;
 RS_Q2 = $02;
-RS_V28B = $02;
-RS_V216B = $02;
+RS_V2 = $02;
+RS_V2_B = $02;
+RS_V2_H = $02;
+RS_V2_S = $02;
+RS_V2_D = $02;
+RS_V2_8B = $02;
+RS_V2_16B = $02;
+RS_V2_4H = $02;
+RS_V2_8H = $02;
+RS_V2_2S = $02;
+RS_V2_4S = $02;
+RS_V2_1D = $02;
+RS_V2_2D = $02;
 RS_B3 = $03;
 RS_H3 = $03;
 RS_S3 = $03;
 RS_D3 = $03;
 RS_Q3 = $03;
-RS_V38B = $03;
-RS_V316B = $03;
+RS_V3 = $03;
+RS_V3_B = $03;
+RS_V3_H = $03;
+RS_V3_S = $03;
+RS_V3_D = $03;
+RS_V3_8B = $03;
+RS_V3_16B = $03;
+RS_V3_4H = $03;
+RS_V3_8H = $03;
+RS_V3_2S = $03;
+RS_V3_4S = $03;
+RS_V3_1D = $03;
+RS_V3_2D = $03;
 RS_B4 = $04;
 RS_H4 = $04;
 RS_S4 = $04;
 RS_D4 = $04;
 RS_Q4 = $04;
-RS_V48B = $04;
-RS_V416B = $04;
+RS_V4 = $04;
+RS_V4_B = $04;
+RS_V4_H = $04;
+RS_V4_S = $04;
+RS_V4_D = $04;
+RS_V4_8B = $04;
+RS_V4_16B = $04;
+RS_V4_4H = $04;
+RS_V4_8H = $04;
+RS_V4_2S = $04;
+RS_V4_4S = $04;
+RS_V4_1D = $04;
+RS_V4_2D = $04;
 RS_B5 = $05;
 RS_H5 = $05;
 RS_S5 = $05;
 RS_D5 = $05;
 RS_Q5 = $05;
-RS_V58B = $05;
-RS_V516B = $05;
+RS_V5 = $05;
+RS_V5_B = $05;
+RS_V5_H = $05;
+RS_V5_S = $05;
+RS_V5_D = $05;
+RS_V5_8B = $05;
+RS_V5_16B = $05;
+RS_V5_4H = $05;
+RS_V5_8H = $05;
+RS_V5_2S = $05;
+RS_V5_4S = $05;
+RS_V5_1D = $05;
+RS_V5_2D = $05;
 RS_B6 = $06;
 RS_H6 = $06;
 RS_S6 = $06;
 RS_D6 = $06;
 RS_Q6 = $06;
-RS_V68B = $06;
-RS_V616B = $06;
+RS_V6 = $06;
+RS_V6_B = $06;
+RS_V6_H = $06;
+RS_V6_S = $06;
+RS_V6_D = $06;
+RS_V6_8B = $06;
+RS_V6_16B = $06;
+RS_V6_4H = $06;
+RS_V6_8H = $06;
+RS_V6_2S = $06;
+RS_V6_4S = $06;
+RS_V6_1D = $06;
+RS_V6_2D = $06;
 RS_B7 = $07;
 RS_H7 = $07;
 RS_S7 = $07;
 RS_D7 = $07;
 RS_Q7 = $07;
-RS_V78B = $07;
-RS_V716B = $07;
+RS_V7 = $07;
+RS_V7_B = $07;
+RS_V7_H = $07;
+RS_V7_S = $07;
+RS_V7_D = $07;
+RS_V7_8B = $07;
+RS_V7_16B = $07;
+RS_V7_4H = $07;
+RS_V7_8H = $07;
+RS_V7_2S = $07;
+RS_V7_4S = $07;
+RS_V7_1D = $07;
+RS_V7_2D = $07;
 RS_B8 = $08;
 RS_H8 = $08;
 RS_S8 = $08;
 RS_D8 = $08;
 RS_Q8 = $08;
-RS_V88B = $08;
-RS_V816B = $08;
+RS_V8 = $08;
+RS_V8_B = $08;
+RS_V8_H = $08;
+RS_V8_S = $08;
+RS_V8_D = $08;
+RS_V8_8B = $08;
+RS_V8_16B = $08;
+RS_V8_4H = $08;
+RS_V8_8H = $08;
+RS_V8_2S = $08;
+RS_V8_4S = $08;
+RS_V8_1D = $08;
+RS_V8_2D = $08;
 RS_B9 = $09;
 RS_H9 = $09;
 RS_S9 = $09;
 RS_D9 = $09;
 RS_Q9 = $09;
-RS_V98B = $09;
-RS_V916B = $09;
+RS_V9 = $09;
+RS_V9_B = $09;
+RS_V9_H = $09;
+RS_V9_S = $09;
+RS_V9_D = $09;
+RS_V9_8B = $09;
+RS_V9_16B = $09;
+RS_V9_4H = $09;
+RS_V9_8H = $09;
+RS_V9_2S = $09;
+RS_V9_4S = $09;
+RS_V9_1D = $09;
+RS_V9_2D = $09;
 RS_B10 = $0A;
 RS_H10 = $0A;
 RS_S10 = $0A;
 RS_D10 = $0A;
 RS_Q10 = $0A;
-RS_V108B = $0A;
-RS_V1016B = $0A;
+RS_V10 = $0A;
+RS_V10_B = $0A;
+RS_V10_H = $0A;
+RS_V10_S = $0A;
+RS_V10_D = $0A;
+RS_V10_8B = $0A;
+RS_V10_16B = $0A;
+RS_V10_4H = $0A;
+RS_V10_8H = $0A;
+RS_V10_2S = $0A;
+RS_V10_4S = $0A;
+RS_V10_1D = $0A;
+RS_V10_2D = $0A;
 RS_B11 = $0B;
 RS_H11 = $0B;
 RS_S11 = $0B;
 RS_D11 = $0B;
 RS_Q11 = $0B;
-RS_V118B = $0B;
-RS_V1116B = $0B;
+RS_V11 = $0B;
+RS_V11_B = $0B;
+RS_V11_H = $0B;
+RS_V11_S = $0B;
+RS_V11_D = $0B;
+RS_V11_8B = $0B;
+RS_V11_16B = $0B;
+RS_V11_4H = $0B;
+RS_V11_8H = $0B;
+RS_V11_2S = $0B;
+RS_V11_4S = $0B;
+RS_V11_1D = $0B;
+RS_V11_2D = $0B;
 RS_B12 = $0C;
 RS_H12 = $0C;
 RS_S12 = $0C;
 RS_D12 = $0C;
 RS_Q12 = $0C;
-RS_V128B = $0C;
-RS_V1216B = $0C;
+RS_V12 = $0C;
+RS_V12_B = $0C;
+RS_V12_H = $0C;
+RS_V12_S = $0C;
+RS_V12_D = $0C;
+RS_V12_8B = $0C;
+RS_V12_16B = $0C;
+RS_V12_4H = $0C;
+RS_V12_8H = $0C;
+RS_V12_2S = $0C;
+RS_V12_4S = $0C;
+RS_V12_1D = $0C;
+RS_V12_2D = $0C;
 RS_B13 = $0D;
 RS_H13 = $0D;
 RS_S13 = $0D;
 RS_D13 = $0D;
 RS_Q13 = $0D;
-RS_V138B = $0D;
-RS_V1316B = $0D;
+RS_V13 = $0D;
+RS_V13_B = $0D;
+RS_V13_H = $0D;
+RS_V13_S = $0D;
+RS_V13_D = $0D;
+RS_V13_8B = $0D;
+RS_V13_16B = $0D;
+RS_V13_4H = $0D;
+RS_V13_8H = $0D;
+RS_V13_2S = $0D;
+RS_V13_4S = $0D;
+RS_V13_1D = $0D;
+RS_V13_2D = $0D;
 RS_B14 = $0E;
 RS_H14 = $0E;
 RS_S14 = $0E;
 RS_D14 = $0E;
 RS_Q14 = $0E;
-RS_V148B = $0E;
-RS_V1416B = $0E;
+RS_V14 = $0E;
+RS_V14_B = $0E;
+RS_V14_H = $0E;
+RS_V14_S = $0E;
+RS_V14_D = $0E;
+RS_V14_8B = $0E;
+RS_V14_16B = $0E;
+RS_V14_4H = $0E;
+RS_V14_8H = $0E;
+RS_V14_2S = $0E;
+RS_V14_4S = $0E;
+RS_V14_1D = $0E;
+RS_V14_2D = $0E;
 RS_B15 = $0F;
 RS_H15 = $0F;
 RS_S15 = $0F;
 RS_D15 = $0F;
 RS_Q15 = $0F;
-RS_V158B = $0F;
-RS_V1516B = $0F;
+RS_V15 = $0F;
+RS_V15_B = $0F;
+RS_V15_H = $0F;
+RS_V15_S = $0F;
+RS_V15_D = $0F;
+RS_V15_8B = $0F;
+RS_V15_16B = $0F;
+RS_V15_4H = $0F;
+RS_V15_8H = $0F;
+RS_V15_2S = $0F;
+RS_V15_4S = $0F;
+RS_V15_1D = $0F;
+RS_V15_2D = $0F;
 RS_B16 = $10;
 RS_H16 = $10;
 RS_S16 = $10;
 RS_D16 = $10;
 RS_Q16 = $10;
-RS_V168B = $10;
-RS_V1616B = $10;
+RS_V16 = $10;
+RS_V16_B = $10;
+RS_V16_H = $10;
+RS_V16_S = $10;
+RS_V16_D = $10;
+RS_V16_8B = $10;
+RS_V16_16B = $10;
+RS_V16_4H = $10;
+RS_V16_8H = $10;
+RS_V16_2S = $10;
+RS_V16_4S = $10;
+RS_V16_1D = $10;
+RS_V16_2D = $10;
 RS_B17 = $11;
 RS_H17 = $11;
 RS_S17 = $11;
 RS_D17 = $11;
 RS_Q17 = $11;
-RS_V178B = $11;
-RS_V1716B = $11;
+RS_V17 = $11;
+RS_V17_B = $11;
+RS_V17_H = $11;
+RS_V17_S = $11;
+RS_V17_D = $11;
+RS_V17_8B = $11;
+RS_V17_16B = $11;
+RS_V17_4H = $11;
+RS_V17_8H = $11;
+RS_V17_2S = $11;
+RS_V17_4S = $11;
+RS_V17_1D = $11;
+RS_V17_2D = $11;
 RS_B18 = $12;
 RS_H18 = $12;
 RS_S18 = $12;
 RS_D18 = $12;
 RS_Q18 = $12;
-RS_V188B = $12;
-RS_V1816B = $12;
+RS_V18 = $12;
+RS_V18_B = $12;
+RS_V18_H = $12;
+RS_V18_S = $12;
+RS_V18_D = $12;
+RS_V18_8B = $12;
+RS_V18_16B = $12;
+RS_V18_4H = $12;
+RS_V18_8H = $12;
+RS_V18_2S = $12;
+RS_V18_4S = $12;
+RS_V18_1D = $12;
+RS_V18_2D = $12;
 RS_B19 = $13;
 RS_H19 = $13;
 RS_S19 = $13;
 RS_D19 = $13;
 RS_Q19 = $13;
-RS_V198B = $13;
-RS_V1916B = $13;
+RS_V19 = $13;
+RS_V19_B = $13;
+RS_V19_H = $13;
+RS_V19_S = $13;
+RS_V19_D = $13;
+RS_V19_8B = $13;
+RS_V19_16B = $13;
+RS_V19_4H = $13;
+RS_V19_8H = $13;
+RS_V19_2S = $13;
+RS_V19_4S = $13;
+RS_V19_1D = $13;
+RS_V19_2D = $13;
 RS_B20 = $14;
 RS_H20 = $14;
 RS_S20 = $14;
 RS_D20 = $14;
 RS_Q20 = $14;
-RS_V208B = $14;
-RS_V2016B = $14;
+RS_V20 = $14;
+RS_V20_B = $14;
+RS_V20_H = $14;
+RS_V20_S = $14;
+RS_V20_D = $14;
+RS_V20_8B = $14;
+RS_V20_16B = $14;
+RS_V20_4H = $14;
+RS_V20_8H = $14;
+RS_V20_2S = $14;
+RS_V20_4S = $14;
+RS_V20_1D = $14;
+RS_V20_2D = $14;
 RS_B21 = $15;
 RS_H21 = $15;
 RS_S21 = $15;
 RS_D21 = $15;
 RS_Q21 = $15;
-RS_V218B = $15;
-RS_V2116B = $15;
+RS_V21 = $15;
+RS_V21_B = $15;
+RS_V21_H = $15;
+RS_V21_S = $15;
+RS_V21_D = $15;
+RS_V21_8B = $15;
+RS_V21_16B = $15;
+RS_V21_4H = $15;
+RS_V21_8H = $15;
+RS_V21_2S = $15;
+RS_V21_4S = $15;
+RS_V21_1D = $15;
+RS_V21_2D = $15;
 RS_B22 = $16;
 RS_H22 = $16;
 RS_S22 = $16;
 RS_D22 = $16;
 RS_Q22 = $16;
-RS_V228B = $16;
-RS_V2216B = $16;
+RS_V22 = $16;
+RS_V22_B = $16;
+RS_V22_H = $16;
+RS_V22_S = $16;
+RS_V22_D = $16;
+RS_V22_8B = $16;
+RS_V22_16B = $16;
+RS_V22_4H = $16;
+RS_V22_8H = $16;
+RS_V22_2S = $16;
+RS_V22_4S = $16;
+RS_V22_1D = $16;
+RS_V22_2D = $16;
 RS_B23 = $17;
 RS_H23 = $17;
 RS_S23 = $17;
 RS_D23 = $17;
 RS_Q23 = $17;
-RS_V238B = $17;
-RS_V2316B = $17;
+RS_V23 = $17;
+RS_V23_B = $17;
+RS_V23_H = $17;
+RS_V23_S = $17;
+RS_V23_D = $17;
+RS_V23_8B = $17;
+RS_V23_16B = $17;
+RS_V23_4H = $17;
+RS_V23_8H = $17;
+RS_V23_2S = $17;
+RS_V23_4S = $17;
+RS_V23_1D = $17;
+RS_V23_2D = $17;
 RS_B24 = $18;
 RS_H24 = $18;
 RS_S24 = $18;
 RS_D24 = $18;
 RS_Q24 = $18;
-RS_V248B = $18;
-RS_V2416B = $18;
+RS_V24 = $18;
+RS_V24_B = $18;
+RS_V24_H = $18;
+RS_V24_S = $18;
+RS_V24_D = $18;
+RS_V24_8B = $18;
+RS_V24_16B = $18;
+RS_V24_4H = $18;
+RS_V24_8H = $18;
+RS_V24_2S = $18;
+RS_V24_4S = $18;
+RS_V24_1D = $18;
+RS_V24_2D = $18;
 RS_B25 = $19;
 RS_H25 = $19;
 RS_S25 = $19;
 RS_D25 = $19;
 RS_Q25 = $19;
-RS_V258B = $19;
-RS_V2516B = $19;
+RS_V25 = $19;
+RS_V25_B = $19;
+RS_V25_H = $19;
+RS_V25_S = $19;
+RS_V25_D = $19;
+RS_V25_8B = $19;
+RS_V25_16B = $19;
+RS_V25_4H = $19;
+RS_V25_8H = $19;
+RS_V25_2S = $19;
+RS_V25_4S = $19;
+RS_V25_1D = $19;
+RS_V25_2D = $19;
 RS_B26 = $1A;
 RS_H26 = $1A;
 RS_S26 = $1A;
 RS_D26 = $1A;
 RS_Q26 = $1A;
-RS_V268B = $1A;
-RS_V2616B = $1A;
+RS_V26 = $1A;
+RS_V26_B = $1A;
+RS_V26_H = $1A;
+RS_V26_S = $1A;
+RS_V26_D = $1A;
+RS_V26_8B = $1A;
+RS_V26_16B = $1A;
+RS_V26_4H = $1A;
+RS_V26_8H = $1A;
+RS_V26_2S = $1A;
+RS_V26_4S = $1A;
+RS_V26_1D = $1A;
+RS_V26_2D = $1A;
 RS_B27 = $1B;
 RS_H27 = $1B;
 RS_S27 = $1B;
 RS_D27 = $1B;
 RS_Q27 = $1B;
-RS_V278B = $1B;
-RS_V2716B = $1B;
+RS_V27 = $1B;
+RS_V27_B = $1B;
+RS_V27_H = $1B;
+RS_V27_S = $1B;
+RS_V27_D = $1B;
+RS_V27_8B = $1B;
+RS_V27_16B = $1B;
+RS_V27_4H = $1B;
+RS_V27_8H = $1B;
+RS_V27_2S = $1B;
+RS_V27_4S = $1B;
+RS_V27_1D = $1B;
+RS_V27_2D = $1B;
 RS_B28 = $1C;
 RS_H28 = $1C;
 RS_S28 = $1C;
 RS_D28 = $1C;
 RS_Q28 = $1C;
-RS_V288B = $1C;
-RS_V2816B = $1C;
+RS_V28 = $1C;
+RS_V28_B = $1C;
+RS_V28_H = $1C;
+RS_V28_S = $1C;
+RS_V28_D = $1C;
+RS_V28_8B = $1C;
+RS_V28_16B = $1C;
+RS_V28_4H = $1C;
+RS_V28_8H = $1C;
+RS_V28_2S = $1C;
+RS_V28_4S = $1C;
+RS_V28_1D = $1C;
+RS_V28_2D = $1C;
 RS_B29 = $1D;
 RS_H29 = $1D;
 RS_S29 = $1D;
 RS_D29 = $1D;
 RS_Q29 = $1D;
-RS_V298B = $1D;
-RS_V2916B = $1D;
+RS_V29 = $1D;
+RS_V29_B = $1D;
+RS_V29_H = $1D;
+RS_V29_S = $1D;
+RS_V29_D = $1D;
+RS_V29_8B = $1D;
+RS_V29_16B = $1D;
+RS_V29_4H = $1D;
+RS_V29_8H = $1D;
+RS_V29_2S = $1D;
+RS_V29_4S = $1D;
+RS_V29_1D = $1D;
+RS_V29_2D = $1D;
 RS_B30 = $1E;
 RS_H30 = $1E;
 RS_S30 = $1E;
 RS_D30 = $1E;
 RS_Q30 = $1E;
-RS_V308B = $1E;
-RS_V3016B = $1E;
+RS_V30 = $1E;
+RS_V30_B = $1E;
+RS_V30_H = $1E;
+RS_V30_S = $1E;
+RS_V30_D = $1E;
+RS_V30_8B = $1E;
+RS_V30_16B = $1E;
+RS_V30_4H = $1E;
+RS_V30_8H = $1E;
+RS_V30_2S = $1E;
+RS_V30_4S = $1E;
+RS_V30_1D = $1E;
+RS_V30_2D = $1E;
 RS_B31 = $1F;
 RS_H31 = $1F;
 RS_S31 = $1F;
 RS_D31 = $1F;
 RS_Q31 = $1F;
-RS_V318B = $1F;
-RS_V3116B = $1F;
-RS_NZCV = $00;
-RS_FPCR = $01;
-RS_FPSR = $02;
-RS_TPIDR_EL0 = $03;
+RS_V31 = $1F;
+RS_V31_B = $1F;
+RS_V31_H = $1F;
+RS_V31_S = $1F;
+RS_V31_D = $1F;
+RS_V31_8B = $1F;
+RS_V31_16B = $1F;
+RS_V31_4H = $1F;
+RS_V31_8H = $1F;
+RS_V31_2S = $1F;
+RS_V31_4S = $1F;
+RS_V31_1D = $1F;
+RS_V31_2D = $1F;

compiler/aarch64/racpu.pas

@@ -69,9 +69,16 @@ unit racpu;
           internalerror(2014122001);
         if (ops=1) and (operands[1].opr.typ=OPR_REFERENCE) then
           exit(OS_NO);
-        if operands[1].opr.typ<>OPR_REGISTER then
-          internalerror(2014122002);
-        result:=reg_cgsize(operands[1].opr.reg);
+        case operands[1].opr.typ of
+          OPR_REGISTER:
+            result:=reg_cgsize(operands[1].opr.reg);
+          OPR_INDEXEDREG:
+            result:=reg_cgsize(operands[1].opr.indexedreg);
+          OPR_REGSET:
+            result:=OS_NO;
+          else
+           internalerror(2014122002);
+        end;
         { a 32 bit integer register could actually be 16 or 8 bit }
         if result=OS_32 then
           case oppostfix of

compiler/aarch64/racpugas.pas

@@ -29,7 +29,7 @@ Unit racpugas;
     uses
       raatt,racpu,
       aasmtai,
-      cpubase;
+      cgbase,cpubase;
 
     type
 
@@ -37,12 +37,14 @@ Unit racpugas;
 
       taarch64attreader = class(tattreader)
         actoppostfix : TOpPostfix;
+        actinsmmsubreg : TSubRegister;
         actsehdirective : TAsmSehDirective;
         function is_asmopcode(const s: string):boolean;override;
         function is_register(const s:string):boolean;override;
         function is_targetdirective(const s: string): boolean;override;
         procedure handleopcode;override;
         procedure handletargetdirective; override;
+       protected
         procedure BuildReference(oper: taarch64operand; is64bit: boolean);
         procedure BuildOperand(oper: taarch64operand; is64bit: boolean);
         function TryBuildShifterOp(instr: taarch64instruction; opnr: longint) : boolean;
@@ -50,6 +52,8 @@ Unit racpugas;
         procedure ReadSym(oper: taarch64operand; is64bit: boolean);
         procedure ConvertCalljmp(instr: taarch64instruction);
         function ToConditionCode(const hs: string; is_operand: boolean): tasmcond;
+        function ParseArrangementSpecifier(const hs: string): TSubRegister;
+        function ParseRegIndex(const hs: string): byte;
       end;
 
 
@@ -65,7 +69,7 @@ Unit racpugas;
       symconst,symsym,symdef,
       procinfo,
       rabase,rautils,
-      cgbase,cgutils,paramgr;
+      cgutils,paramgr;
 
 
     function taarch64attreader.is_register(const s:string):boolean;
@@ -76,9 +80,10 @@ Unit racpugas;
         end;
 
       const
-        extraregs : array[0..3] of treg2str = (
+        extraregs : array[0..4] of treg2str = (
           (name: 'FP' ; reg: NR_FP),
           (name: 'LR' ; reg: NR_LR),
+          (name: 'XR' ; reg: NR_XR),
           (name: 'IP0'; reg: NR_IP0),
           (name: 'IP1'; reg: NR_IP1));
 
@@ -88,9 +93,9 @@ Unit racpugas;
       begin
         result:=inherited is_register(s);
         { reg found?
-          possible aliases are always 2 or 3 chars
+          possible aliases are always 2 chars
         }
-        if result or not(length(s) in [2,3]) then
+        if result or not(length(s) in [2]) then
           exit;
         for i:=low(extraregs) to high(extraregs) do
           begin
@@ -577,6 +582,50 @@ Unit racpugas;
       end;
 
 
+    function taarch64attreader.ParseArrangementSpecifier(const hs: string): TSubRegister;
+{$push}{$j-}
+      const
+        arrangements: array[R_SUBMM8B..R_SUBMM2D] of string[4] =
+          ('.8B','.16B','.4H','.8H','.2S','.4S','.1D','.2D');
+{$pop}
+      begin
+        if length(hs)>2 then
+          begin
+            for result:=low(arrangements) to high(arrangements) do
+              if hs=arrangements[result] then
+                exit;
+            result:=R_SUBNONE;
+          end
+        else
+          case hs of
+            '.B': result:=R_SUBMMB1;
+            '.H': result:=R_SUBMMH1;
+            '.S': result:=R_SUBMMS1;
+            '.D': result:=R_SUBMMD1;
+            else
+              result:=R_SUBNONE;
+          end
+      end;
+
+
+    function taarch64attreader.ParseRegIndex(const hs: string): byte;
+      var
+        b: cardinal;
+        error: longint;
+      begin
+        b:=0;
+        val(hs,b,error);
+        if (error<>0) then
+          Message(asmr_e_syn_constant)
+        else if b > 31 then
+          begin
+            Message(asmr_e_constant_out_of_bounds);
+            b:=0;
+          end;
+        result:=b;
+      end;
+
+
     Procedure taarch64attreader.BuildOperand(oper: taarch64operand; is64bit: boolean);
       var
         expr: string;
@@ -723,11 +772,50 @@ Unit racpugas;
             end; { end case }
           end;
 
+      function parsereg: tregister;
+         var
+           subreg: tsubregister;
+        begin
+          result:=actasmregister;
+          Consume(AS_REGISTER);
+          if (actasmtoken=AS_ID) and
+             (actasmpattern[1]='.') then
+            begin
+              subreg:=ParseArrangementSpecifier(upper(actasmpattern));
+              if (subreg<>R_SUBNONE) and
+                 (getregtype(result)=R_MMREGISTER) and
+                 ((actinsmmsubreg=R_SUBNONE) or
+                  (actinsmmsubreg=subreg)) then
+                begin
+                  setsubreg(result,subreg);
+                  { they all have to be the same }
+                  actinsmmsubreg:=subreg;
+                end
+              else
+                Message1(asmr_e_invalid_arrangement,actasmpattern);
+              Consume(AS_ID);
+            end
+          else if (getregtype(result)=R_MMREGISTER) then
+            begin
+              if actinsmmsubreg<>R_SUBNONE then
+                begin
+                  if (getsubreg(result)=R_SUBNONE) or
+                     (getsubreg(result)=actinsmmsubreg) then
+                    setsubreg(result,actinsmmsubreg)
+                  else
+                     Message1(asmr_e_invalid_arrangement,actasmpattern);
+                end
+              else if getsubreg(result)=R_SUBNONE then
+                { Vxx without an arrangement is invalid, use Qxx to specify the entire 128 bits}
+                Message1(asmr_e_invalid_arrangement,'');
+            end;
+        end;
 
       var
         tempreg: tregister;
         hl: tasmlabel;
         icond: tasmcond;
+        regindex: byte;
       Begin
         expr:='';
         case actasmtoken of
@@ -737,6 +825,35 @@ Unit racpugas;
               BuildReference(oper,is64bit);
             end;
 
+          AS_LSBRACKET: { register set }
+            begin
+              consume(AS_LSBRACKET);
+              oper.opr.typ:=OPR_REGSET;
+              oper.opr.basereg:=parsereg;
+              oper.opr.nregs:=1;
+              while (oper.opr.nregs<4) and
+                    (actasmtoken=AS_COMMA) do
+                begin
+                  consume(AS_COMMA);
+                  tempreg:=parsereg;
+                  if getsupreg(tempreg)<>((getsupreg(oper.opr.basereg)+oper.opr.nregs) mod 32) then
+                    Message(asmr_e_a64_invalid_regset);
+                  inc(oper.opr.nregs);
+                end;
+              consume(AS_RSBRACKET);
+              if actasmtoken=AS_LBRACKET then
+                begin
+                  consume(AS_LBRACKET);
+                  oper.opr.regsetindex:=ParseRegIndex(actasmpattern);
+                  consume(AS_INTNUM);
+                  consume(AS_RBRACKET);
+                end
+              else
+                oper.opr.regsetindex:=255;
+              if not(actasmtoken in [AS_END,AS_SEPARATOR,AS_COMMA]) then
+                Message(asmr_e_syn_operand);
+            end;
+
           AS_HASH: { Constant expression  }
             Begin
               Consume(AS_HASH);
@@ -872,14 +989,31 @@ Unit racpugas;
           AS_REGISTER:
             Begin
               { save the type of register used. }
-              tempreg:=actasmregister;
-              Consume(AS_REGISTER);
-              if (actasmtoken in [AS_end,AS_SEPARATOR,AS_COMMA]) then
-                Begin
-                  if not (oper.opr.typ in [OPR_NONE,OPR_REGISTER]) then
+              tempreg:=parsereg;
+              regindex:=255;
+              if (getregtype(tempreg)=R_MMREGISTER) and
+                 (actasmtoken=AS_LBRACKET) then
+                begin
+                  consume(AS_LBRACKET);
+                  regindex:=ParseRegIndex(actasmpattern);
+                  consume(AS_INTNUM);
+                  consume(AS_RBRACKET);
+                end;
+              if actasmtoken in [AS_END,AS_SEPARATOR,AS_COMMA] then
+                begin
+                  if (oper.opr.typ<>OPR_NONE) then
                     Message(asmr_e_invalid_operand_type);
-                  oper.opr.typ:=OPR_REGISTER;
-                  oper.opr.reg:=tempreg;
+                  if regindex=255 then
+                    begin
+                      oper.opr.typ:=OPR_REGISTER;
+                      oper.opr.reg:=tempreg;
+                    end
+                  else
+                    begin
+                      oper.opr.typ:=OPR_INDEXEDREG;
+                      oper.opr.indexedreg:=tempreg;
+                      oper.opr.regindex:=regindex;
+                    end;
                 end
               else
                 Message(asmr_e_syn_operand);
@@ -985,6 +1119,13 @@ Unit racpugas;
           PF_B,PF_H,PF_W,
           PF_S);
 
+                      { store replicate }
+        ldst14: array[boolean,boolean,'1'..'4'] of tasmop =
+          (((A_LD1,A_LD2,A_LD3,A_LD4),
+            (A_LD1R,A_LD2R,A_LD3R,A_LD4R)),
+           ((A_ST1,A_ST2,A_ST3,A_ST4),
+            (A_NONE,A_NONE,A_NONE,A_NONE)));
+
       var
         j  : longint;
         hs : string;
@@ -1011,6 +1152,29 @@ Unit racpugas;
             exit;
           end;
 
+        (* ldN(r)/stN.size ? (shorthand for "ldN(r)/stN { Vx.size, Vy.size } ..."
+          supported by clang and possibly gas *)
+        actinsmmsubreg:=R_SUBNONE;
+        if (length(s)>=5) and
+           (((hs[1]='L') and
+             (hs[2]='D')) or
+            ((hs[1]='S') and
+             (hs[2]='T'))) and
+           (hs[3] in ['1'..'4']) and
+           ((hs[4]='.') or
+            ((hs[4]='R') and
+             (hs[5]='.'))) then
+          begin
+            actinsmmsubreg:=ParseArrangementSpecifier(copy(hs,4+ord(hs[4]='R'),255));
+            if actinsmmsubreg=R_SUBNONE then
+              exit;
+            actopcode:=ldst14[hs[1]='S',hs[4]='R',hs[3]];
+            actasmtoken:=AS_OPCODE;
+            if actopcode<>A_NONE then
+              is_asmopcode:=true;
+            exit;
+          end;
+
         maxlen:=max(length(hs),7);
         actopcode:=A_NONE;
         for j:=maxlen downto 1 do

compiler/aasmtai.pas

@@ -253,15 +253,18 @@ interface
       toptype=(top_none,top_reg,top_ref,top_const,top_bool,top_local
 {$ifdef arm}
        { ARM only }
-       ,top_regset
        ,top_modeflags
        ,top_specialreg
 {$endif arm}
 {$if defined(arm) or defined(aarch64)}
+       ,top_regset
        ,top_conditioncode
        ,top_shifterop
        ,top_realconst
 {$endif defined(arm) or defined(aarch64)}
+{$ifdef aarch64}
+       ,top_indexedreg
+{$endif}
 {$ifdef m68k}
        { m68k only }
        ,top_regset
@@ -496,6 +499,10 @@ interface
             top_conditioncode : (cc : TAsmCond);
             top_realconst : (val_real:bestreal);
         {$endif defined(arm) or defined(aarch64)}
+        {$ifdef aarch64}
+            top_regset : (basereg: tregister; nregs, regsetindex: byte);
+            top_indexedreg : (indexedreg: tregister; regindex: byte);
+        {$endif}
         {$ifdef m68k}
             top_regset : (dataregset,addrregset,fpuregset: tcpuregisterset);
             top_regpair : (reghi,reglo: tregister);

compiler/armgen/aoptarm.pas

@@ -53,7 +53,7 @@ Type
   function MatchInstruction(const instr: tai; const op: TCommonAsmOps; const cond: TAsmConds; const postfix: TOpPostfixes): boolean;
   function MatchInstruction(const instr: tai; const op: TAsmOp; const cond: TAsmConds; const postfix: TOpPostfixes): boolean;
 {$ifdef AARCH64}
-  function MatchInstruction(const instr: tai; const op: TAsmOps; const postfix: TOpPostfixes): boolean;
+  function MatchInstruction(const instr: tai; const ops : array of TAsmOp; const postfix: TOpPostfixes): boolean;
 {$endif AARCH64}
   function MatchInstruction(const instr: tai; const op: TAsmOp; const postfix: TOpPostfixes): boolean;
 
@@ -104,12 +104,22 @@ Implementation
 
 
 {$ifdef AARCH64}
-  function MatchInstruction(const instr: tai; const op: TAsmOps; const postfix: TOpPostfixes): boolean;
-    begin
-      result :=
-        (instr.typ = ait_instruction) and
-        ((op = []) or (taicpu(instr).opcode in op)) and
-        ((postfix = []) or (taicpu(instr).oppostfix in postfix));
+  function MatchInstruction(const instr: tai; const ops : array of TAsmOp; const postfix: TOpPostfixes): boolean;
+  var
+    op : TAsmOp;
+  begin
+    result:=false;
+    if instr.typ <> ait_instruction then
+      exit;
+    for op in ops do
+      begin
+        if (taicpu(instr).opcode = op) and
+           ((postfix = []) or (taicpu(instr).oppostfix in postfix)) then
+          begin
+            result:=true;
+            exit;
+          end;
+      end;
     end;
 {$endif AARCH64}
 

compiler/avr/cgcpu.pas

@@ -2530,7 +2530,7 @@ unit cgcpu;
             SrcQuickRef:=false;
             DestQuickRef:=false;
             if ((CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) and
-              not((source.Base=NR_NO) and (source.Index=NR_NO) and (source.symbol=nil) and (source.Offset in [0..192-len]))) or
+              not((source.Base=NR_NO) and (source.Index=NR_NO) and (source.Offset in [0..192-len]))) or
               (
                  not((source.addressmode=AM_UNCHANGED) and
                      (source.symbol=nil) and
@@ -2552,7 +2552,7 @@ unit cgcpu;
               end;
 
             if ((CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) and
-              not((dest.Base=NR_NO) and (dest.Index=NR_NO) and (dest.symbol=nil) and (dest.Offset in [0..192-len]))) or
+              not((dest.Base=NR_NO) and (dest.Index=NR_NO) and (dest.Offset in [0..192-len]))) or
               (
                  not((dest.addressmode=AM_UNCHANGED) and
                    (dest.symbol=nil) and

compiler/cgbase.pas

@@ -261,10 +261,22 @@ interface
         R_SUBFLAGINTERRUPT, { = 21; Interrupt enable flag }
         R_SUBFLAGDIRECTION, { = 22; Direction flag }
 {$endif Z80}
-        R_SUBMM8B,          { = 23; for part of v regs on aarch64 }
-        R_SUBMM16B,         { = 24; for part of v regs on aarch64 }
         { subregisters for the metadata register (llvm) }
-        R_SUBMETASTRING     { = 25 }
+        R_SUBMETASTRING    { = 23 }
+{$ifdef aarch64}
+        , R_SUBMM8B          { = 24; for arrangement of v regs on aarch64 }
+        , R_SUBMM16B         { = 25; for arrangement of v regs on aarch64 }
+        , R_SUBMM4H          { = 26; for arrangement of v regs on aarch64 }
+        , R_SUBMM8H          { = 27; for arrangement of v regs on aarch64 }
+        , R_SUBMM2S          { = 28; for arrangement of v regs on aarch64 }
+        , R_SUBMM4S          { = 29; for arrangement of v regs on aarch64 }
+        , R_SUBMM1D          { = 30; for arrangement of v regs on aarch64 }
+        , R_SUBMM2D          { = 31; for arrangement of v regs on aarch64 }
+        , R_SUBMMB1          { = 32; for arrangement of v regs on aarch64; for use with ldN/stN }
+        , R_SUBMMH1          { = 33; for arrangement of v regs on aarch64; for use with ldN/stN }
+        , R_SUBMMS1          { = 34; for arrangement of v regs on aarch64; for use with ldN/stN }
+        , R_SUBMMD1          { = 35; for arrangement of v regs on aarch64; for use with ldN/stN }
+{$endif aarch64}
       );
       TSubRegisterSet = set of TSubRegister;
 
@@ -730,8 +742,30 @@ implementation
             result:=result+'my';
           R_SUBMMZ:
             result:=result+'mz';
+{$ifdef aarch64}
           R_SUBMM8B:
             result:=result+'m8b';
+          R_SUBMM16B:
+            result:=result+'m16b';
+          R_SUBMM4H:
+            result:=result+'m4h';
+          R_SUBMM8H:
+            result:=result+'m8h';
+          R_SUBMM2S:
+            result:=result+'m2s';
+          R_SUBMM4S:
+            result:=result+'m4s';
+          R_SUBMM2D:
+            result:=result+'m2d';
+          R_SUBMMB1:
+            result:=result+'mb1';
+          R_SUBMMH1:
+            result:=result+'mh1';
+          R_SUBMMS1:
+            result:=result+'ms1';
+          R_SUBMMD1:
+            result:=result+'md1';
+{$endif}
           else
             internalerror(200308252);
         end;

compiler/globals.pas

@@ -289,6 +289,9 @@ interface
        do_build,
        do_release,
        do_make       : boolean;
+
+       timestr,
+       datestr : string;
        { Path to ppc }
        exepath       : TPathStr;
        { Path to unicode charmap/collation binaries }

compiler/llvm/agllvm.pas

@@ -1004,8 +1004,8 @@ implementation
              (pd.mangledname=(target_info.cprefix+'setjmp')) then
             writer.AsmWrite(' returns_twice');
           if po_inline in pd.procoptions then
-            writer.AsmWrite(' inlinehint');
-          if (po_noinline in pd.procoptions) or
+            writer.AsmWrite(' inlinehint')
+          else if (po_noinline in pd.procoptions) or
              (pio_inline_forbidden in pd.implprocoptions) then
             writer.AsmWrite(' noinline');
           { ensure that functions that happen to have the same name as a
@@ -1019,7 +1019,9 @@ implementation
           if pio_thunk in pd.implprocoptions then
             writer.AsmWrite(' "thunk"');
           if llvmflag_null_pointer_valid in llvmversion_properties[current_settings.llvmversion] then
-            writer.AsmWrite(' "null-pointer-is-valid"="true"');
+            writer.AsmWrite(' "null-pointer-is-valid"="true"')
+          else if llvmflag_null_pointer_valid_new in llvmversion_properties[current_settings.llvmversion] then
+            writer.AsmWrite(' null_pointer_is_valid');
           if not(pio_fastmath in pd.implprocoptions) then
             writer.AsmWrite(' strictfp');
         end;

compiler/llvm/llvminfo.pas

@@ -43,16 +43,18 @@ Type
        llvmver_8_0,
        llvmver_xc_11,
        llvmver_9_0,
-       llvmver_10_0
+       llvmver_10_0,
+       llvmver_11_0
       );
 
 type
    tllvmversionflag = (
      llvmflag_memcpy_indiv_align,           { memcpy intrinsic supports separate alignment for source and dest }
-     llvmflag_null_pointer_valid,           { supports "llvmflag_null_pointer_valid" attribute, which indicates access to nil should not be optimized as undefined behaviour }
+     llvmflag_null_pointer_valid,           { supports "null-pointer-is-valid" attribute, which indicates access to nil should not be optimized as undefined behaviour }
      llvmflag_constrained_fptrunc_fpext,    { supports constrained fptrunc and fpext intrinsics }
      llvmflag_constrained_fptoi_itofp,      { supports constrained fptosi/fptoui/uitofp/sitofp instrinsics }
-     llvmflag_generic_constrained_si64tofp  { supports sitofp for 64 bit signed integers on all targets }
+     llvmflag_generic_constrained_si64tofp, { supports sitofp for 64 bit signed integers on all targets }
+     llvmflag_null_pointer_valid_new        { new syntax for the null pointer valid attribute: null_pointer_is_valid }
    );
    tllvmversionflags = set of tllvmversionflag;
 
@@ -66,7 +68,8 @@ Const
      '8.0',
      'Xcode-11.0',
      '9.0',
-     '10.0'
+     '10.0',
+     '11.0'
    );
 
    llvmversion_properties: array[tllvmversion] of tllvmversionflags =
@@ -79,7 +82,8 @@ Const
        { llvmver_8_0     } [llvmflag_memcpy_indiv_align,llvmflag_null_pointer_valid],
        { llvmver_xc_11   } [llvmflag_memcpy_indiv_align,llvmflag_null_pointer_valid],
        { llvmver_9_0     } [llvmflag_memcpy_indiv_align,llvmflag_null_pointer_valid,llvmflag_constrained_fptrunc_fpext],
-       { llvmver_10_0    } [llvmflag_memcpy_indiv_align,llvmflag_null_pointer_valid,llvmflag_constrained_fptrunc_fpext,llvmflag_constrained_fptoi_itofp]
+       { llvmver_10_0    } [llvmflag_memcpy_indiv_align,llvmflag_null_pointer_valid,llvmflag_constrained_fptrunc_fpext,llvmflag_constrained_fptoi_itofp],
+       { llvmver_11_0    } [llvmflag_memcpy_indiv_align,llvmflag_null_pointer_valid_new,llvmflag_constrained_fptrunc_fpext,llvmflag_constrained_fptoi_itofp]
      );
 
    { Supported optimizations, only used for information }

compiler/msg/errore.msg

@@ -2576,7 +2576,7 @@ cg_w_interrupt_does_not_save_registers=06062_W_The target CPU does not support p
 #
 # Assembler reader
 #
-# 07141 is the last used one
+# 07144 is the last used one
 #
 asmr_d_start_reading=07000_DL_Starting $1 styled assembler parsing
 % This informs you that an assembler block is being parsed
@@ -2916,6 +2916,8 @@ asmr_e_multiple_segment_overrides=07139_E_Cannot use multiple segment overrides
 asmr_w_multiple_segment_overrides=07140_W_Multiple segment overrides (only the last one will take effect)
 asmr_w_segment_override_ignored_in_64bit_mode=07141_W_Segment base $1 will be generated, but is ignored by the CPU in 64-bit mode
 asmr_e_mismatch_broadcasting_elements=07142_E_Mismatch broadcasting elements (expected: {$1} found: {$2})
+asmr_e_invalid_arrangement=07143_E_Invalid arrangement specifier "$1"
+asmr_e_a64_invalid_regset=07144_E_Registers in a register set must be consecutive.
 #
 # Assembler/binary writers
 #
@@ -3959,7 +3961,9 @@ A*2CV<x>_Set section threadvar model to <x>
 **2CX_Create also smartlinked library
 **1d<x>_Defines the symbol <x>
 **1D_Generate a DEF file
+**2DD<x>_Set the date string returned by %DATE% to x, it is not checked for being a valid date string
 **2Dd<x>_Set description to <x>
+**2DT<x>_Set the time string returned by %TIME% to x, it is not checked for being a valid time string
 **2Dv<x>_Set DLL version to <x>
 *O2Dw_PM application
 **1e<x>_Set path to executable

compiler/msgidx.inc

@@ -853,6 +853,8 @@ const
   asmr_w_multiple_segment_overrides=07140;
   asmr_w_segment_override_ignored_in_64bit_mode=07141;
   asmr_e_mismatch_broadcasting_elements=07142;
+  asmr_e_invalid_arrangement=07143;
+  asmr_e_a64_invalid_regset=07144;
   asmw_f_too_many_asm_files=08000;
   asmw_f_assembler_output_not_supported=08001;
   asmw_f_comp_not_supported=08002;
@@ -1131,9 +1133,9 @@ const
   option_info=11024;
   option_help_pages=11025;
 
-  MsgTxtSize = 86101;
+  MsgTxtSize = 86405;
 
   MsgIdxMax : array[1..20] of longint=(
-    28,106,360,130,99,63,143,36,223,68,
+    28,106,360,130,99,63,145,36,223,68,
     62,20,30,1,1,1,1,1,1,1
   );

compiler/ngenutil.pas

@@ -1217,9 +1217,7 @@ implementation
         exit;
       count:=0;
       tcb:=ctai_typedconstbuilder.create([tcalo_make_dead_strippable,tcalo_new_section]);
-      tcb.begin_anonymous_record('',1,sizeof(pint),
-        targetinfos[target_info.system]^.alignment.recordalignmin
-      );
+      tcb.begin_anonymous_record('',default_settings.packrecords,voidpointertype.alignment,targetinfos[target_info.system]^.alignment.recordalignmin);
       placeholder:=tcb.emit_placeholder(u32inttype);
 
       hp:=tused_unit(usedunits.first);
@@ -1293,8 +1291,7 @@ implementation
        if (tf_section_threadvars in target_info.flags) then
          exit;
        tcb:=ctai_typedconstbuilder.create([tcalo_make_dead_strippable,tcalo_new_section]);
-       tabledef:=tcb.begin_anonymous_record('',1,sizeof(pint),
-         targetinfos[target_info.system]^.alignment.recordalignmin);
+       tabledef:=tcb.begin_anonymous_record('',default_settings.packrecords,voidpointertype.alignment,targetinfos[target_info.system]^.alignment.recordalignmin);
        if assigned(current_module.globalsymtable) then
          current_module.globalsymtable.SymList.ForEachCall(@AddToThreadvarList,tcb);
        current_module.localsymtable.SymList.ForEachCall(@AddToThreadvarList,tcb);

compiler/options.pas

@@ -1586,6 +1586,16 @@ begin
                         description:=Copy(more,j+1,255);
                         break;
                       end;
+                    'D' :
+                      begin
+                        datestr:=Copy(more,j+1,255);
+                        break;
+                      end;
+                    'T' :
+                      begin
+                        timestr:=Copy(more,j+1,255);
+                        break;
+                      end;
                     'v' :
                       begin
                         dllversion:=Copy(more,j+1,255);
@@ -3946,6 +3956,7 @@ begin
   def_system_macro('FPC_DYNARRAYCOPY_FIXED');
   def_system_macro('FPC_HAS_MEMBAR');
   def_system_macro('FPC_SETBASE_USED');
+  def_system_macro('FPC_ALIGNED_THREADVARTABLES');
 
   { don't remove this, it's also for fpdoc necessary (FK) }
   def_system_macro('FPC_HAS_FEATURE_SUPPORT');

compiler/raatt.pas

@@ -319,14 +319,14 @@ unit raatt;
            end;
 {$endif ARM}
 {$ifdef aarch64}
-           { b.cond }
+           { b.cond, ldX.arrangement }
            case c of
              '.':
                begin
                  repeat
                    actasmpattern:=actasmpattern+c;
                    c:=current_scanner.asmgetchar;
-                 until not(c in ['a'..'z','A'..'Z']);
+                 until not(c in ['a'..'z','A'..'Z','0'..'9']);
                end;
            end;
 {$endif aarch64}
@@ -692,7 +692,7 @@ unit raatt;
 
              '{' :
                begin
-{$ifdef arm}
+{$if defined(arm) or defined(aarch64)}
                  // the arm assembler uses { ... } for register sets
                  // but compiler directives {$... } are still allowed
                  c:=current_scanner.asmgetchar;
@@ -703,21 +703,22 @@ unit raatt;
                      current_scanner.skipcomment(false);
                      GetToken;
                    end;
-{$else arm}
+{$else arm or aarch64}
                  current_scanner.skipcomment(true);
                  GetToken;
 {$endif arm}
                  exit;
                end;
 
-{$ifdef arm}
+{$if defined(arm) or defined(aarch64)}
              '}' :
                begin
                  actasmtoken:=AS_RSBRACKET;
                  c:=current_scanner.asmgetchar;
                  exit;
                end;
-
+{$endif arm or aarch64}
+{$ifdef arm}
              '=' :
                begin
                  actasmtoken:=AS_EQUAL;

compiler/rautils.pas

@@ -45,7 +45,7 @@ type
   TOprType=(OPR_NONE,OPR_CONSTANT,OPR_SYMBOL,OPR_LOCAL,
             OPR_REFERENCE,OPR_REGISTER,OPR_COND,OPR_REGSET,
             OPR_SHIFTEROP,OPR_MODEFLAGS,OPR_SPECIALREG,
-            OPR_REGPAIR,OPR_FENCEFLAGS);
+            OPR_REGPAIR,OPR_FENCEFLAGS,OPR_INDEXEDREG);
 
   TOprRec = record
     case typ:TOprType of
@@ -81,6 +81,8 @@ type
       OPR_SPECIALREG: (specialreg : tregister; specialregflags : tspecialregflags);
 {$endif arm}
 {$ifdef aarch64}
+      OPR_REGSET    : (basereg: tregister; nregs, regsetindex: byte);
+      OPR_INDEXEDREG: (indexedreg: tregister; regindex: byte);
       OPR_SHIFTEROP : (shifterop : tshifterop);
       OPR_COND      : (cc : tasmcond);
 {$endif aarch64}
@@ -1308,6 +1310,12 @@ end;
              OPR_COND:
                ai.loadconditioncode(i-1,cc);
 {$endif arm or aarch64}
+{$ifdef aarch64}
+              OPR_REGSET:
+                ai.loadregset(i-1,basereg,nregs,regsetindex);
+              OPR_INDEXEDREG:
+                ai.loadindexedreg(i-1,indexedreg,regindex);
+{$endif aarch64}
 {$if defined(riscv32) or defined(riscv64)}
              OPR_FENCEFLAGS:
                ai.loadfenceflags(i-1,fenceflags);

compiler/scanner.pas

@@ -2520,9 +2520,15 @@ type
            macroIsString:=true;
            case hs of
              'TIME':
-               hs:=gettimestr;
+               if timestr<>'' then
+                 hs:=timestr
+               else
+                 hs:=gettimestr;
              'DATE':
-               hs:=getdatestr;
+               if datestr<>'' then
+                 hs:=datestr
+               else
+                 hs:=getdatestr;
              'DATEYEAR':
                begin
                  hs:=tostr(startsystime.Year);

compiler/utils/gena64vfp.pp

@@ -9,8 +9,20 @@ begin
       writeln('H',i,',$04,$03,$',hexstr(i,2),',h',i,',',i+64,',',i+64);
       writeln('S',i,',$04,$09,$',hexstr(i,2),',s',i,',',i+64,',',i+64);
       writeln('D',i,',$04,$0a,$',hexstr(i,2),',d',i,',',i+64,',',i+64);
-      writeln('Q',i,',$04,$05,$',hexstr(i,2),',q',i,',',i+64,',',i+64);
-      writeln('V',i,'8B,$04,$17,$',hexstr(i,2),',v',i,'.8b,',i+64,',',i+64);
-      writeln('V',i,'16B,$04,$18,$',hexstr(i,2),',v',i,'.16b,',i+64,',',i+64);
+      writeln('Q',i,',$04,$0b,$',hexstr(i,2),',q',i,',',i+64,',',i+64);
+      // SUBNONE, to be able to parse shorthand notations like "add.4h v0, v1, v2"
+      writeln('V',i,',$04,$00,$',hexstr(i,2),',v',i,',',i+64,',',i+64);
+      writeln('V',i,'_B,$04,$20,$',hexstr(i,2),',v',i,'.b,',i+64,',',i+64);
+      writeln('V',i,'_H,$04,$21,$',hexstr(i,2),',v',i,'.h,',i+64,',',i+64);
+      writeln('V',i,'_S,$04,$22,$',hexstr(i,2),',v',i,'.s,',i+64,',',i+64);
+      writeln('V',i,'_D,$04,$23,$',hexstr(i,2),',v',i,'.d,',i+64,',',i+64);
+      writeln('V',i,'_8B,$04,$18,$',hexstr(i,2),',v',i,'.8b,',i+64,',',i+64);
+      writeln('V',i,'_16B,$04,$19,$',hexstr(i,2),',v',i,'.16b,',i+64,',',i+64);
+      writeln('V',i,'_4H,$04,$1a,$',hexstr(i,2),',v',i,'.4h,',i+64,',',i+64);
+      writeln('V',i,'_8H,$04,$1b,$',hexstr(i,2),',v',i,'.8h,',i+64,',',i+64);
+      writeln('V',i,'_2S,$04,$1c,$',hexstr(i,2),',v',i,'.2s,',i+64,',',i+64);
+      writeln('V',i,'_4S,$04,$1d,$',hexstr(i,2),',v',i,'.4s,',i+64,',',i+64);
+      writeln('V',i,'_1D,$04,$1e,$',hexstr(i,2),',v',i,'.1d,',i+64,',',i+64);
+      writeln('V',i,'_2D,$04,$1f,$',hexstr(i,2),',v',i,'.2d,',i+64,',',i+64);
     end;
 end.

compiler/x86/cpubase.pas

@@ -481,7 +481,7 @@ implementation
 
     function reg_cgsize(const reg: tregister): tcgsize;
       const subreg2cgsize:array[Tsubregister] of Tcgsize =
-            (OS_NO,OS_8,OS_8,OS_16,OS_32,OS_64,OS_NO,OS_NO,OS_NO,OS_F32,OS_F64,OS_NO,OS_M128,OS_M256,OS_M512,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO);
+            (OS_NO,OS_8,OS_8,OS_16,OS_32,OS_64,OS_NO,OS_NO,OS_NO,OS_F32,OS_F64,OS_NO,OS_M128,OS_M256,OS_M512,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO,OS_NO);
       begin
         case getregtype(reg) of
           R_INTREGISTER :
@@ -517,7 +517,7 @@ implementation
     function reg2opsize(r:Tregister):topsize;
       const
         subreg2opsize : array[tsubregister] of topsize =
-          (S_NO,S_B,S_B,S_W,S_L,S_Q,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO);
+          (S_NO,S_B,S_B,S_W,S_L,S_Q,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO);
       begin
         reg2opsize:=S_L;
         case getregtype(r) of

packages/dbus/src/dbuscomp.pp

@@ -513,7 +513,7 @@ resourcestring
    SErrCouldNotSetReplySerial = 'Could not set reply serial';
    SErrInitIter = 'Could not initialize iterator';
    SErrAppendFailed = 'Append of argument to message failed';
-   SErrNoMoreArguments = 'No more arguments availaible';
+   SErrNoMoreArguments = 'No more arguments available';
    SErrInvalidArgumentType = 'Invalid argument type. Expected %s, got %s.';
    SErrInvalidArrayElementType = 'Invalid array element type. Expected %s got %s';
    SErrInvalidVariantType = 'Invalid VARIANT type';

packages/fcl-passrc/src/pasresolver.pp

@@ -1092,7 +1092,7 @@ type
     procedure WriteIdentifiers(Prefix: string); override;
     destructor Destroy; override;
   public
-    References: TPasScopeReferences; // created by TPasAnalyzer in DeclrationProc
+    References: TPasScopeReferences; // created by TPasAnalyzer in DeclarationProc
     function AddReference(El: TPasElement; Access: TPSRefAccess): TPasScopeReference;
     function GetReferences: TFPList;
   end;
@@ -11885,7 +11885,7 @@ var
 begin
   GenTemplates:=El.GenericTemplateTypes;
   if (GenTemplates=nil) or (GenTemplates.Count=0) then
-    RaiseNotYetImplemented(20190726184902,El,'emty generic template list');
+    RaiseNotYetImplemented(20190726184902,El,'empty generic template list');
 
   // template names must differ from generic type name
   for i:=0 to GenTemplates.Count-1 do

packages/fcl-passrc/src/pasuseanalyzer.pas

@@ -180,7 +180,7 @@ type
     {$ifdef pas2js}
     constructor Create(const OnItemToName, OnKeyToName: TPASItemToNameProc); reintroduce;
     {$else}
-    constructor Create(const OnCompareMethod: TListSortCompare;
+    constructor Create(const OnCompareProc: TListSortCompare;
       const OnCompareKeyWithData: TListSortCompare);
     {$endif}
     destructor Destroy; override;
@@ -198,7 +198,7 @@ type
 
   TPasAnalyzerOption = (
     paoOnlyExports, // default: use all class members accessible from outside (protected, but not private)
-    paoImplReferences, // collect references of top lvl proc implementations, initializationa dn finalization sections
+    paoImplReferences, // collect references of top lvl proc implementations, initializationa and finalization sections
     paoSkipGenericProc // ignore generic procedure body
     );
   TPasAnalyzerOptions = set of TPasAnalyzerOption;
@@ -434,10 +434,10 @@ begin
   FItems:=TJSObject.new;
 end;
 {$else}
-constructor TPasAnalyzerKeySet.Create(const OnCompareMethod: TListSortCompare;
+constructor TPasAnalyzerKeySet.Create(const OnCompareProc: TListSortCompare;
   const OnCompareKeyWithData: TListSortCompare);
 begin
-  FTree:=TAVLTree.Create(OnCompareMethod);
+  FTree:=TAVLTree.Create(OnCompareProc);
   FCompareKeyWithData:=OnCompareKeyWithData;
 end;
 {$endif}
@@ -1009,6 +1009,8 @@ procedure TPasAnalyzer.MarkImplScopeRef(El, RefEl: TPasElement;
 
     if (RefEl.Name='') and not (RefEl is TInterfaceSection) then
       exit; // reference to anonymous type -> not needed
+    if RefEl=ElImplScope.Element then
+      exit;
     if ElImplScope is TPasProcedureScope then
       TPasProcedureScope(ElImplScope).AddReference(RefEl,Access)
     else if ElImplScope is TPasInitialFinalizationScope then

packages/fcl-stl/src/gdeque.pp

@@ -19,10 +19,10 @@ interface
 type
   generic TDeque<T>=class
   private
-  type 
+  type
     PT=^T;
     TArr=array of T;
-  var 
+  var
     FData:TArr;
     FDataSize:SizeUInt;
     FCapacity:SizeUInt;
@@ -77,7 +77,7 @@ end;
 
 procedure TDeque.PushBack(value:T);inline;
 begin
-  if(FDataSize=FCapacity) then 
+  if(FDataSize=FCapacity) then
     IncreaseCapacity;
   FData[(FStart+FDataSize)mod FCapacity]:=value;
   inc(FDataSize);
@@ -85,11 +85,11 @@ end;
 
 procedure TDeque.PopFront();inline;
 begin
-  if(FDataSize>0) then 
+  if(FDataSize>0) then
   begin
     inc(FStart);
     dec(FDataSize);
-    if(FStart=FCapacity) then 
+    if(FStart=FCapacity) then
       FStart:=0;
   end;
 end;
@@ -167,7 +167,7 @@ begin
     FCapacity:=FCapacity+FCapacity div 16;
 
   SetLength(FData, FCapacity);
-  if (FStart>0) then 
+  if (FStart>0) then
     for i:=0 to FStart-1 do
       FData[OldEnd+i]:=FData[i];
 end;
@@ -175,11 +175,11 @@ end;
 procedure TDeque.Reserve(cap:SizeUInt);inline;
 var i,OldEnd:SizeUInt;
 begin
-  if(cap<FCapacity) then 
+  if(cap<FCapacity) then
     exit
-  else if(cap<=2*FCapacity) then 
+  else if(cap<=2*FCapacity) then
     IncreaseCapacity
-  else 
+  else
   begin
     OldEnd:=FCapacity;
     FCapacity:=cap;
@@ -200,7 +200,7 @@ procedure TDeque.Insert(Position:SizeUInt; Value: T);inline;
 var i:SizeUInt;
 begin
   pushBack(Value);
-  for i:=Size-1 downto Position+1 do 
+  for i:=Size-1 downto Position+1 do
   begin
     Items[i]:=Items[i-1];
   end;
@@ -210,12 +210,13 @@ end;
 procedure TDeque.Erase(Position:SizeUInt);inline;
 var i:SizeUInt;
 begin
-  if Position <= Size then 
+  if Position <= Size then
   begin
-    for i:=Position to Size-2 do
-    begin
-      Items[i]:=Items[i+1];
-    end;
+    if Size > 1 then
+      for i:=Position to Size-2 do
+      begin
+        Items[i]:=Items[i+1];
+      end;
     popBack();
   end;
 end;

packages/fcl-web/src/base/custmicrohttpapp.pp

@@ -644,10 +644,6 @@ begin
     @DoMHDRequest, Self,
     MHD_OPTION_NOTIFY_COMPLETED, @HandleRequestCompleted,
     Nil,MHD_OPTION_END);
-  if Result=Nil then
-    Writeln('a')
-  else
-    Writeln('b');
 end;
 
 procedure TMicroHTTPHandler.Run;

packages/pastojs/src/fppas2js.pp

@@ -1144,6 +1144,18 @@ type
     function Add(const Identifier: String; El: TPasElement): TPasIdentifier; virtual;
   end;
 
+  { TPas2JSPrecompiledJS - Option coStoreImplJS }
+
+  TPas2JSPrecompiledJS = class
+  public
+    BodyJS: string;
+    EmptyJS: boolean; // true if Body.Body=nil
+    GlobalJS: TStringList;
+    ShortRefs: TFPList; // list of TPasElement needing a SectionContext.AddLocalVar
+    procedure AddShortRef(El: TPasElement);
+    destructor Destroy; override;
+  end;
+
   { TPas2JSSectionScope
     JSElement is TJSSourceElements }
 
@@ -1160,7 +1172,8 @@ type
 
   TPas2JSInitialFinalizationScope = class(TPasInitialFinalizationScope)
   public
-    JS: string; // Option coStoreProcJS
+    ImplJS: TPas2JSPrecompiledJS; // Option coStoreImplJS
+    destructor Destroy; override;
   end;
 
   TMessageIdToProc_List = TStringList;
@@ -1199,9 +1212,7 @@ type
     JSName: string;
     ResultVarName: string; // valid in implementation ProcScope, empty means use ResolverResultVar
     BodyOverloadsRenamed: boolean;
-    BodyJS: string; // Option coStoreProcJS: stored in ImplScope
-    GlobalJS: TStringList; // Option coStoreProcJS: stored in ImplScope
-    EmptyJS: boolean; // Option coStoreProcJS: stored in ImplScope, true if Body.Body=nil
+    ImplJS: TPas2JSPrecompiledJS; // Option coStoreImplJS: stored in ImplScope
     procedure AddGlobalJS(const JS: string);
     destructor Destroy; override;
   end;
@@ -1365,7 +1376,8 @@ type
     coRTLVersionCheckMain, // insert rtl version check into main
     coRTLVersionCheckSystem, // insert rtl version check into system unit init
     coRTLVersionCheckUnit, // insert rtl version check into every unit init
-    coShortRefGlobals // use short local variables for global identifiers
+    coShortRefGlobals, // use short local variables for global identifiers
+    coShortRefGenFunc // create short local vars for generic methods
     );
   TPasToJsConverterOptions = set of TPasToJsConverterOption;
 const
@@ -1925,6 +1937,8 @@ type
     Function CreateGlobalAliasForeign(El: TPasElement; JSPath: string; AContext: TConvertContext): string; virtual; // El in other module
     Function CreateGlobalAliasNull(El: TPasElement; Prefix: TPas2JSBuiltInName;
       SectionContext: TSectionContext): TFCLocalIdentifier; virtual;
+    Procedure CreateGlobalAlias_List(ElRefList: TFPList; AContext: TConvertContext); virtual;
+    Function ElNeedsGlobalAlias(El: TPasElement): boolean; virtual;
     // utility functions for creating stuff
     Function IsElementUsed(El: TPasElement): boolean; virtual;
     Function IsSystemUnit(aModule: TPasModule): boolean; virtual;
@@ -2002,13 +2016,15 @@ type
     Function CreateRangeCheckCall_TypeRange(aType: TPasType; GetExpr: TJSElement;
       AContext: TConvertContext; PosEl: TPasElement): TJSCallExpression; virtual;
     // reference
-    Function CreateReferencePath(El: TPasElement; AContext : TConvertContext;
+    Function CreateReferencePath(El: TPasElement; AContext: TConvertContext;
       Kind: TRefPathKind; Full: boolean = false; Ref: TResolvedReference = nil): string; virtual;
-    Function CreateReferencePathExpr(El: TPasElement; AContext : TConvertContext;
+    Function CreateReferencePathExpr(El: TPasElement; AContext: TConvertContext;
       Full: boolean = false; Ref: TResolvedReference = nil): TJSElement; virtual;
-    Function CreateGlobalTypePath(El: TPasType; AContext : TConvertContext): string; virtual;
-    Function CreateStaticProcPath(El: TPasProcedure; AContext : TConvertContext): string; virtual;
-    Function CreateGlobalElPath(El: TPasElement; AContext : TConvertContext): string; virtual;
+    Function CreateGlobalTypePath(El: TPasType; AContext: TConvertContext): string; virtual;
+    Function CreateStaticProcPath(El: TPasProcedure; AContext: TConvertContext): string; virtual;
+    Function CreateGlobalElPath(El: TPasElement; AContext: TConvertContext): string; virtual;
+    Function GetLocalName(El: TPasElement; const Filter: TCtxVarKinds; AContext: TConvertContext): string;
+    Procedure StoreImplJSLocal(El: TPasElement; AContext: TConvertContext); virtual;
     // section
     Function CreateImplementationSection(El: TPasModule; IntfContext: TInterfaceSectionContext): TJSFunctionDeclarationStatement; virtual;
     Procedure CreateInitSection(El: TPasModule; Src: TJSSourceElements; AContext: TConvertContext); virtual;
@@ -2394,6 +2410,14 @@ begin
   Result:='['+Result+']';
 end;
 
+{ TPas2JSInitialFinalizationScope }
+
+destructor TPas2JSInitialFinalizationScope.Destroy;
+begin
+  FreeAndNil(ImplJS);
+  inherited Destroy;
+end;
+
 { TInterfaceSectionContext }
 
 destructor TInterfaceSectionContext.Destroy;
@@ -2682,18 +2706,37 @@ begin
   ElevatedLocals.FElevatedLocals.ForEachCall(@OnWriteItem,Pointer(Prefix));
 end;
 
+{ TPas2JSPrecompiledJS }
+
+procedure TPas2JSPrecompiledJS.AddShortRef(El: TPasElement);
+begin
+  if ShortRefs=nil then
+    ShortRefs:=TFPList.Create;
+  if ShortRefs.IndexOf(El)<0 then
+    ShortRefs.Add(El);
+end;
+
+destructor TPas2JSPrecompiledJS.Destroy;
+begin
+  FreeAndNil(GlobalJS);
+  FreeAndNil(ShortRefs);
+  inherited Destroy;
+end;
+
 { TPas2JSProcedureScope }
 
 procedure TPas2JSProcedureScope.AddGlobalJS(const JS: string);
 begin
-  if GlobalJS=nil then
-    GlobalJS:=TStringList.Create;
-  GlobalJS.Add(Js);
+  if ImplJS=nil then
+    raise Exception.Create('[20201018120133] TPas2JSProcedureScope.AddGlobalJS');
+  if ImplJS.GlobalJS=nil then
+    ImplJS.GlobalJS:=TStringList.Create;
+  ImplJS.GlobalJS.Add(Js);
 end;
 
 destructor TPas2JSProcedureScope.Destroy;
 begin
-  FreeAndNil(GlobalJS);
+  FreeAndNil(ImplJS);
   inherited Destroy;
 end;
 
@@ -6886,8 +6929,8 @@ begin
   Scope:=Proc.CustomData as TPas2JSProcedureScope;
   if Scope.ImplProc<>nil then
     Scope:=Scope.ImplProc.CustomData as TPas2JSProcedureScope;
-  if Scope.BodyJS<>'' then
-    Result:=not Scope.EmptyJS;
+  if (Scope.ImplJS<>nil) and (Scope.ImplJS.BodyJS<>'') then
+    Result:=not Scope.ImplJS.EmptyJS;
 end;
 
 function TPas2JSResolver.HasAnonymousFunctions(El: TPasImplElement): boolean;
@@ -7780,6 +7823,7 @@ Var
   Prg: TPasProgram;
   Lib: TPasLibrary;
   AssignSt: TJSSimpleAssignStatement;
+  IntfSecCtx: TInterfaceSectionContext;
 begin
   Result:=Nil;
   OuterSrc:=TJSSourceElements(CreateElement(TJSSourceElements, El));
@@ -7859,6 +7903,7 @@ begin
         end
       else
         begin // unit
+        IntfSecCtx:=TInterfaceSectionContext(IntfContext);
         if Assigned(El.ImplementationSection) then
           begin
           // add var $impl = $mod.$impl
@@ -7866,16 +7911,20 @@ begin
             CreateMemberExpression([ModVarName,GetBIName(pbivnImplementation)]),El);
           AddToSourceElements(Src,ImplVarSt);
           // register local var $impl
-          IntfContext.AddLocalVar(GetBIName(pbivnImplementation),El.ImplementationSection,cvkGlobal,false);
+          IntfSecCtx.AddLocalVar(GetBIName(pbivnImplementation),El.ImplementationSection,cvkGlobal,false);
           end;
         if Assigned(El.InterfaceSection) then
-          AddToSourceElements(Src,ConvertDeclarations(El.InterfaceSection,IntfContext));
+          AddToSourceElements(Src,ConvertDeclarations(El.InterfaceSection,IntfSecCtx));
 
-        ImplFunc:=CreateImplementationSection(El,TInterfaceSectionContext(IntfContext));
+        ImplFunc:=CreateImplementationSection(El,IntfSecCtx);
         if ImplFunc=nil then
           begin
           // remove unneeded $impl from interface
           RemoveFromSourceElements(Src,ImplVarSt);
+          if IntfSecCtx.HeaderIndex>0 then
+            dec(IntfSecCtx.HeaderIndex);
+          if IntfSecCtx.ImplHeaderIndex>0 then
+            dec(IntfSecCtx.ImplHeaderIndex);
           HasImplUsesClause:=length(El.ImplementationSection.UsesClause)>0;
           end
         else
@@ -7891,7 +7940,7 @@ begin
           // add implementation uses list: [<implementation uses1>,<uses2>, ...]
           ArgArray.AddElement(CreateUsesList(El.ImplementationSection,AContext));
 
-        CreateInitSection(El,Src,IntfContext);
+        CreateInitSection(El,Src,IntfSecCtx);
 
         end;
     finally
@@ -9470,7 +9519,7 @@ var
 begin
   if AContext.IsGlobal then
     begin
-    ParentName:=AContext.GetLocalName(El.Parent,[cvkGlobal,cvkCurType,cvkInstance]);
+    ParentName:=GetLocalName(El.Parent,[cvkGlobal,cvkCurType],AContext);
     if ParentName='' then
       ParentName:='this';
     if JSName[1]='[' then
@@ -10100,7 +10149,7 @@ function TPasToJSConverter.ConvertInheritedExpr(El: TInheritedExpr;
     SelfContext:=AContext.GetSelfContext;
     if SelfContext=nil then
       RaiseInconsistency(20170418114702,El);
-    SelfName:=AContext.GetLocalName(SelfContext.ThisVar.Element,[cvkCurType,cvkInstance]);
+    SelfName:=GetLocalName(SelfContext.ThisVar.Element,[cvkCurType,cvkInstance],AContext);
 
     if Apply and (SelfContext<>AContext) then
       DoError(20170418204325,nNestedInheritedNeedsParameters,sNestedInheritedNeedsParameters,
@@ -15482,6 +15531,8 @@ begin
         JSName:=SectionContext.GetLocalName(El,[cvkGlobal]);
         if JSName='' then
           RaiseNotSupported(El,AContext,20200926232620);
+        if coStoreImplJS in Options then
+          StoreImplJSLocal(El,AContext);
         // $lt = this.TypeName = {}
         AssignSt:=TJSSimpleAssignStatement(CreateElement(TJSSimpleAssignStatement,El));
         AssignSt.LHS:=CreatePrimitiveDotExpr(JSName,El);
@@ -16259,6 +16310,7 @@ Var
   aResolver: TPas2JSResolver;
   IsClassConDestructor: Boolean;
   ThisKind: TCtxVarKind;
+  ImplJS: TPas2JSPrecompiledJS;
 begin
   Result:=nil;
 
@@ -16282,11 +16334,12 @@ begin
     ImplProc:=ProcScope.ImplProc;
   ImplProcScope:=TPas2JSProcedureScope(ImplProc.CustomData);
 
-  if ImplProcScope.BodyJS<>'' then
+  ImplJS:=ImplProcScope.ImplJS;
+  if ImplJS<>nil then
     begin
     // using precompiled code
     TPasResolver.UnmangleSourceLineNumber(El.SourceLinenumber,Line,Col);
-    if ImplProcScope.GlobalJS<>nil then
+    if ImplJS.GlobalJS<>nil then
       begin
       ConstContext:=AContext.GetGlobalFunc;
       if not (ConstContext.JSElement is TJSSourceElements) then
@@ -16297,19 +16350,29 @@ begin
         RaiseNotSupported(El,AContext,20180228231008);
         end;
       ConstSrcElems:=TJSSourceElements(ConstContext.JSElement);
-      for i:=0 to ImplProcScope.GlobalJS.Count-1 do
+      for i:=0 to ImplJS.GlobalJS.Count-1 do
         begin
         // precompiled global var or type
         Lit:=TJSLiteral.Create(Line,Col,El.SourceFilename);
-        Lit.Value.CustomValue:=StrToJSString(ImplProcScope.GlobalJS[i]);
+        Lit.Value.CustomValue:=StrToJSString(ImplJS.GlobalJS[i]);
         AddToSourceElements(ConstSrcElems,Lit);
         end;
       end;
+    if coShortRefGlobals in Options then
+      CreateGlobalAlias_List(ImplJS.ShortRefs,AContext);
     // precompiled body
     Lit:=TJSLiteral.Create(Line,Col,El.SourceFilename);
-    Lit.Value.CustomValue:=StrToJSString(ImplProcScope.BodyJS);
+    Lit.Value.CustomValue:=StrToJSString(ImplJS.BodyJS);
     Result:=Lit;
     exit;
+    end
+  else if (coStoreImplJS in Options) and (aResolver<>nil) then
+    begin
+    if aResolver.ProcCanBePrecompiled(El) then
+      begin
+      ImplJS:=TPas2JSPrecompiledJS.Create;
+      ImplProcScope.ImplJS:=ImplJS;
+      end;
     end;
 
   AssignSt:=nil;
@@ -16477,13 +16540,10 @@ begin
     end;
     end;
 
-  if (coStoreImplJS in Options) and (aResolver<>nil) then
+  if ImplJS<>nil then
     begin
-    if aResolver.ProcCanBePrecompiled(El) then
-      begin
-      ImplProcScope.BodyJS:=CreatePrecompiledJS(Result);
-      ImplProcScope.EmptyJS:=BodyPas.Body=nil;
-      end;
+    ImplJS.BodyJS:=CreatePrecompiledJS(Result);
+    ImplJS.EmptyJS:=BodyPas.Body=nil;
     end;
 end;
 
@@ -16566,6 +16626,7 @@ var
   Lit: TJSLiteral;
   Section: TInitializationSection;
   RootContext: TRootContext;
+  ImplJS: TPas2JSPrecompiledJS;
 begin
   // create: '$mod.$init=function(){}'
   Result:=nil;
@@ -16602,9 +16663,11 @@ begin
 
     // first convert main/initialization statements
     if Section<>nil then
-      if Scope.JS<>'' then
+      begin
+      ImplJS:=Scope.ImplJS;
+      if ImplJS<>nil then
         begin
-        S:=TrimRight(Scope.JS);
+        S:=TrimRight(ImplJS.BodyJS);
         if S<>'' then
           begin
           Body:=CreateBody;
@@ -16613,29 +16676,39 @@ begin
           Lit:=TJSLiteral.Create(Line,Col,El.SourceFilename);
           Lit.Value.CustomValue:=StrToJSString(S);
           Body.A:=Lit;
+          if coShortRefGlobals in Options then
+            CreateGlobalAlias_List(ImplJS.ShortRefs,AContext);
           end;
         end
-      else if Section.Elements.Count>0 then
+      else
         begin
-        Body:=CreateBody;
-        // Note: although the rtl sets 'this' as the module, the function can
-        //   simply refer to $mod, so no need to set ThisPas here
-        Body.A:=ConvertImplBlockElements(Section,FuncContext,false);
-        FuncContext.BodySt:=Body.A;
-
-        AddInterfaceReleases(FuncContext,PosEl);
-        Body.A:=FuncContext.BodySt;
-
-        // store precompiled JS
         if (coStoreImplJS in Options) and (AContext.Resolver<>nil) then
           begin
-          Scope.JS:=TrimRight(CreatePrecompiledJS(Body.A));
-          if Scope.JS='' then
-            Scope.JS:=' '; // store the information, that there is an empty initialization section
+          ImplJS:=TPas2JSPrecompiledJS.Create;
+          Scope.ImplJS:=ImplJS;
           end;
+        if Section.Elements.Count>0 then
+          begin
+          Body:=CreateBody;
+          // Note: although the rtl sets 'this' as the module, the function can
+          //   simply refer to $mod, so no need to set ThisPas here
+          Body.A:=ConvertImplBlockElements(Section,FuncContext,false);
+          FuncContext.BodySt:=Body.A;
+
+          AddInterfaceReleases(FuncContext,PosEl);
+          Body.A:=FuncContext.BodySt;
+
+          // store precompiled JS
+          if ImplJS<>nil then
+            begin
+            ImplJS.BodyJS:=TrimRight(CreatePrecompiledJS(Body.A));
+            ImplJS.EmptyJS:=ImplJS.BodyJS=''; // store the information, that there is an empty initialization section
+            end;
+          end
+        else if ImplJS<>nil then
+          ImplJS.EmptyJS:=true; // store the information, that there is an empty initialization section
         end
-      else if (coStoreImplJS in Options) and (AContext.Resolver<>nil) then
-        Scope.JS:=' '; // store the information, that there is an empty initialization section
+      end;
 
     if length(RootContext.GlobalClassMethods)>0 then
       begin
@@ -18446,7 +18519,7 @@ begin
         if SelfScope=nil then
           RaiseNotSupported(PosEl,AContext,20190205230919);
         if SelfScope.SelfArg<>nil then
-          TargetName:=AContext.GetLocalName(SelfScope.SelfArg,cvkAll)
+          TargetName:=GetLocalName(SelfScope.SelfArg,cvkAll,AContext)
         else if SelfScope.ClassRecScope<>nil then
           begin
           TargetName:=CreateReferencePath(SelfScope.ClassRecScope.Element,
@@ -20367,7 +20440,7 @@ var
       Result:=CreatePrimitiveDotExpr(WithExprScope.WithVarName,Expr)
     else if SelfScope<>nil then
       begin
-      Path:=AContext.GetLocalName(SelfScope.SelfArg,cvkAll);
+      Path:=GetLocalName(SelfScope.SelfArg,cvkAll,AContext);
       Result:=CreatePrimitiveDotExpr(Path,Expr);
       end
     else if Left=nil then
@@ -24087,15 +24160,21 @@ begin
 
     if (coShortRefGlobals in Options) and (Kind=rpkPathAndName) then
       begin
-      if (El is TPasType) then
+      ElClass:=El.ClassType;
+      if ElClass.InheritsFrom(TPasType) then
         begin
         Result:=CreateGlobalTypePath(TPasType(El),AContext);
         exit;
         end
-      else if (El is TPasProcedure) and ProcHasNoSelf(TPasProcedure(El)) then
+      else if ElClass.InheritsFrom(TPasProcedure) and ProcHasNoSelf(TPasProcedure(El)) then
         begin
         Result:=CreateStaticProcPath(TPasProcedure(El),AContext);
         exit;
+        end
+      else if (ElClass=TPasEnumValue) then
+        begin
+        Result:=CreateGlobalElPath(El,AContext);
+        exit;
         end;
       end;
 
@@ -24167,7 +24246,7 @@ begin
           if (SelfContext<>nil)
               and IsA(TPasType(SelfContext.ThisVar.Element),TPasMembersType(ParentEl)) then
             begin
-            ShortName:=AContext.GetLocalName(SelfContext.ThisVar.Element,VarKinds);
+            ShortName:=GetLocalName(SelfContext.ThisVar.Element,VarKinds,AContext);
             if ShortName='' then
               begin
               if not (cvkGlobal in VarKinds) then
@@ -24195,7 +24274,7 @@ begin
             end;
           end;
 
-        ShortName:=AContext.GetLocalName(ParentEl,VarKinds);
+        ShortName:=GetLocalName(ParentEl,VarKinds,AContext);
         //writeln('TPasToJSConverter.CreateReferencePath NOT USING SELF ',GetObjPath(El),' ShortName=',ShortName);
         if ShortName<>'' then
           begin
@@ -24221,7 +24300,7 @@ begin
       else
         begin
         // check if ParentEl has a JS var
-        ShortName:=AContext.GetLocalName(ParentEl,[cvkGlobal]);
+        ShortName:=GetLocalName(ParentEl,[cvkGlobal],AContext);
         if (ShortName<>'') then
           begin
           Prepend(Result,ShortName);
@@ -24310,39 +24389,113 @@ var
   ShortRefGlobals: Boolean;
   Parent: TPasElement;
   CurModule: TPasModule;
+  ElClass: TClass;
 begin
   Result:=AContext.GetLocalName(El,[cvkGlobal]);
   if Result<>'' then
-    exit; // already exists
+    begin
+    // already exists
+    if coStoreImplJS in Options then
+      StoreImplJSLocal(El,AContext);
+    exit;
+    end;
   ShortRefGlobals:=coShortRefGlobals in Options;
 
   Parent:=El.Parent;
-  Result:=AContext.GetLocalName(Parent,[cvkGlobal]);
-  if Result<>'' then
-  else if Parent is TPasType then
-    Result:=CreateGlobalTypePath(TPasType(Parent),AContext)
-  else if Parent is TPasSection then
+  if Parent<>nil then
     begin
-    // element is in foreign unit -> use pas.unitname
-    CurModule:=Parent.GetModule;
-    Result:=TransformModuleName(CurModule,true,AContext);
-    if (Parent.ClassType=TImplementationSection)
-        and (CurModule<>AContext.GetRootContext.PasElement.GetModule) then
+    Result:=AContext.GetLocalName(Parent,[cvkGlobal]);
+    if Result='' then
       begin
-      // element is in foreign implementation section (not program/library section)
-      // -> use pas.unitname.$impl
-      Result:=Result+'.'+GetBIName(pbivnImplementation);
+      ElClass:=Parent.ClassType;
+      if ElClass.InheritsFrom(TPasType) then
+        Result:=CreateGlobalElPath(Parent,AContext)
+      else if ElClass.InheritsFrom(TPasSection) then
+        begin
+        // element is in foreign unit -> use pas.unitname
+        CurModule:=Parent.GetModule;
+        Result:=TransformModuleName(CurModule,true,AContext);
+        if (Parent.ClassType=TImplementationSection)
+            and (CurModule<>AContext.GetRootContext.PasElement.GetModule) then
+          begin
+          // element is in foreign implementation section (not program/library section)
+          // -> use pas.unitname.$impl
+          Result:=Result+'.'+GetBIName(pbivnImplementation);
+          end;
+        end
+      else if ElClass.InheritsFrom(TPasModule) then
+        Result:=TransformModuleName(TPasModule(Parent),true,AContext)
+      else
+        RaiseNotSupported(El,AContext,20200609230526,GetObjPath(El));
       end;
+    Result:=Result+'.'+TransformElToJSName(El,AContext);
     end
-  else if Parent is TPasModule then
-    Result:=TransformModuleName(TPasModule(Parent),true,AContext)
   else
-    RaiseNotSupported(El,AContext,20200609230526,GetObjPath(El));
-  Result:=Result+'.'+TransformElToJSName(El,AContext);
+    begin
+    if El is TPasModule then
+      begin
+      Result:=TransformModuleName(TPasModule(El),true,AContext);
+      exit; // already created a shortrefglobal
+      end
+    else
+      RaiseNotSupported(El,AContext,20201010221704,GetObjPath(El));
+    end;
   if ShortRefGlobals then
     Result:=CreateGlobalAliasForeign(El,Result,AContext);
 end;
 
+function TPasToJSConverter.GetLocalName(El: TPasElement;
+  const Filter: TCtxVarKinds; AContext: TConvertContext): string;
+begin
+  if coStoreImplJS in Options then
+    begin
+    if cvkGlobal in Filter then
+      begin
+      Result:=AContext.GetLocalName(El,[cvkGlobal]);
+      if Result<>'' then
+        begin
+        StoreImplJSLocal(El,AContext);
+        exit;
+        end
+      else if Filter=[cvkGlobal] then
+        exit('');
+      end;
+    end;
+  Result:=AContext.GetLocalName(El,Filter);
+end;
+
+procedure TPasToJSConverter.StoreImplJSLocal(El: TPasElement;
+  AContext: TConvertContext);
+var
+  Ctx: TConvertContext;
+  CurEl: TPasElement;
+  Data: TObject;
+  ImplJS: TPas2JSPrecompiledJS;
+begin
+  Ctx:=AContext;
+  while Ctx<>nil do
+    begin
+    CurEl:=Ctx.PasElement;
+    if CurEl<>nil then
+      begin
+      Data:=CurEl.CustomData;
+      if Data is TPas2JSProcedureScope then
+        begin
+        ImplJS:=TPas2JSProcedureScope(Data).ImplJS;
+        if ImplJS<>nil then
+          ImplJS.AddShortRef(El);
+        end
+      else if Data is TPas2JSInitialFinalizationScope then
+        begin
+        ImplJS:=TPas2JSInitialFinalizationScope(Data).ImplJS;
+        if ImplJS<>nil then
+          ImplJS.AddShortRef(El);
+        end;
+      end;
+    Ctx:=Ctx.Parent;
+    end;
+end;
+
 procedure TPasToJSConverter.CreateProcedureCall(var Call: TJSCallExpression;
   Args: TParamsExpr; TargetProc: TPasProcedureType; AContext: TConvertContext);
 // create a call, adding call by reference and default values
@@ -25513,9 +25666,9 @@ begin
       if (El.Parent=nil)
           or ((El.Parent is TPasSection)
             and (El.Parent.ClassType<>TImplementationSection)) then
-        JSParentName:=AContext.GetLocalName(El.GetModule,[cvkGlobal])
+        JSParentName:=GetLocalName(El.GetModule,[cvkGlobal],AContext)
       else
-        JSParentName:=AContext.GetLocalName(El.Parent,[cvkGlobal]);
+        JSParentName:=GetLocalName(El.Parent,[cvkGlobal],AContext);
       if JSParentName='' then
         JSParentName:='this';
       Call.AddArg(CreatePrimitiveDotExpr(JSParentName,El));
@@ -25541,6 +25694,8 @@ begin
       JSName:=AContext.GetLocalName(El,[cvkGlobal]);
       if JSName='' then
         RaiseNotSupported(El,AContext,20200926235501);
+      if coStoreImplJS in Options then
+        StoreImplJSLocal(El,AContext);
       AssignSt:=TJSSimpleAssignStatement(CreateElement(TJSSimpleAssignStatement,El));
       AssignSt.LHS:=CreatePrimitiveDotExpr(JSName,El);
       AssignSt.Expr:=CreatePrimitiveDotExpr('this',El);
@@ -25830,8 +25985,9 @@ var
 begin
   if AddModulesPrefix then
     begin
-    Result:=AContext.GetLocalName(El,[cvkGlobal]);
-    if Result<>'' then exit;
+    Result:=GetLocalName(El,[cvkGlobal],AContext);
+    if Result<>'' then
+      exit;
     end;
   if El is TPasProgram then
     Result:='program'
@@ -26116,6 +26272,7 @@ var
   Expr: TJSElement;
   V: TJSVariableStatement;
   AssignSt: TJSSimpleAssignStatement;
+  ElClass: TClass;
 begin
   Result:=JSPath;
   if El is TPasUnresolvedSymbolRef then
@@ -26135,16 +26292,21 @@ begin
     SectionContext:=TSectionContext(AContext.GetMainSectionContext);
 
     FuncContext:=AContext.GetFunctionContext;
-    if El is TPasModule then
-      Result:=GetBIName(pbivnLocalModuleRef)
-    else if El is TPasType then
+    ElClass:=El.ClassType;
+    if ElClass.InheritsFrom(TPasType) then
       Result:=GetBIName(pbivnLocalTypeRef)
-    else if El is TPasProcedure then
+    else if ElClass.InheritsFrom(TPasProcedure) then
       Result:=GetBIName(pbivnLocalProcRef)
+    else if ElClass=TPasEnumValue then
+      Result:=GetBIName(pbivnLocalTypeRef)
+    else if ElClass.InheritsFrom(TPasModule) then
+      Result:=GetBIName(pbivnLocalModuleRef)
     else
       RaiseNotSupported(El,AContext,20200608160225);
     Result:=FuncContext.CreateLocalIdentifier(Result);
     SectionContext.AddLocalVar(Result,El,cvkGlobal,false);
+    if coStoreImplJS in Options then
+      StoreImplJSLocal(El,AContext);
 
     if aResolver.ImplementationUsesUnit(ElModule) then
       begin
@@ -26180,6 +26342,68 @@ begin
   AddHeaderStatement(V,El,SectionContext);
 end;
 
+procedure TPasToJSConverter.CreateGlobalAlias_List(ElRefList: TFPList;
+  AContext: TConvertContext);
+var
+  i: Integer;
+  SectionContext: TSectionContext;
+  El: TPasElement;
+begin
+  if ElRefList=nil then exit;
+  if ElRefList.Count=0 then exit;
+  SectionContext:=TSectionContext(AContext.GetMainSectionContext);
+  for i:=0 to ElRefList.Count-1 do
+    begin
+    El:=TPasElement(ElRefList[i]);
+    if ElNeedsGlobalAlias(El) then
+      CreateGlobalElPath(El,SectionContext);
+    end;
+end;
+
+function TPasToJSConverter.ElNeedsGlobalAlias(El: TPasElement): boolean;
+var
+  C: TClass;
+  Proc: TPasProcedure;
+  ProcScope: TPas2JSProcedureScope;
+begin
+  Result:=false;
+  if El=nil then exit;
+  if not (coShortRefGlobals in Options) then
+    exit;
+  C:=El.ClassType;
+  if El.CustomData is TResElDataBuiltInSymbol then
+    exit(false)
+  else if C.InheritsFrom(TPasType) then
+    exit(true)
+  else if (C=TPasConstructor)
+      or (C=TPasDestructor)
+      or (C=TPasClassConstructor)
+      or (C=TPasClassDestructor)
+      or (C=TPasClassProcedure)
+      or (C=TPasClassOperator)
+      or (C=TPasClassFunction) then
+    exit(true)
+  else if (C=TPasProcedure) or (C=TPasFunction) or (C=TPasOperator) then
+    begin
+    Proc:=TPasProcedure(El);
+    if Proc.IsStatic or (Proc.Parent is TPasSection) then
+      exit(true);
+    if coShortRefGenFunc in Options then
+      begin
+      ProcScope:=TPas2JSProcedureScope(Proc.CustomData);
+      if ProcScope.SpecializedFromItem<>nil then
+        exit(true);
+      end;
+    end
+  else if C=TPasEnumValue then
+    begin
+    if not (coEnumNumbers in Options) then
+      exit(true);
+    end
+  else if C.InheritsFrom(TPasModule) then
+    exit(true);
+end;
+
 function TPasToJSConverter.ConvertPasElement(El: TPasElement;
   Resolver: TPas2JSResolver): TJSElement;
 var

packages/pastojs/src/pas2jsfiler.pp

@@ -95,7 +95,7 @@ uses
 
 const
   PCUMagic = 'Pas2JSCache';
-  PCUVersion = 6;
+  PCUVersion = 7;
   { Version Changes:
     1: initial version
     2: - TPasProperty.ImplementsFunc:String -> Implements:TPasExprArray
@@ -106,6 +106,7 @@ const
        not the whole $init function (pas2js 1.5)
     5: removed modeswitch ignoreattributes
     6: default DispatchField=Msg, DispatchStrField=MsgStr
+    7: InitializationSection JS replaced with Body, Empty
   }
 
   BuiltInNodeName = 'BuiltIn';
@@ -253,7 +254,8 @@ const
     'RTLVersionCheckMain',
     'RTLVersionCheckSystem',
     'RTLVersionCheckUnit',
-    'AliasGlobals'
+    'ShortRefGlobals',
+    'ShortRefGenFuncs'
     );
 
   PCUDefaultTargetPlatform = PlatformBrowser;
@@ -813,7 +815,7 @@ type
       DefaultKind: TPasExprKind; DefaultOpCode: TExprOpCode; aContext: TPCUWriterContext); virtual;
     procedure WritePasExprArray(Obj: TJSONObject; Parent: TPasElement;
       const PropName: string; const ExprArr: TPasExprArray; aContext: TPCUWriterContext); virtual;
-    // references of a impl block which statements are not stored
+    // references of an impl block which statements are not stored
     procedure WriteScopeReferences(Obj: TJSONObject; References: TPasScopeReferences;
       const PropName: string; aContext: TPCUWriterContext); virtual;
     // extern references
@@ -872,6 +874,7 @@ type
     procedure WriteProcedure(Obj: TJSONObject; El: TPasProcedure; aContext: TPCUWriterContext); virtual;
     procedure WriteOperator(Obj: TJSONObject; El: TPasOperator; aContext: TPCUWriterContext); virtual;
     procedure WriteAttributes(Obj: TJSONObject; El: TPasAttributes; aContext: TPCUWriterContext); virtual;
+    procedure WritePrecompiledJS(Obj: TJSONObject; El: TPasElement; ImplJS: TPas2JSPrecompiledJS; aContext: TPCUWriterContext); virtual;
     procedure WriteImplCommand(Obj: TJSONObject; El: TPasImplCommand; aContext: TPCUWriterContext); virtual;
     procedure WriteImplBeginBlock(Obj: TJSONObject; El: TPasImplBeginBlock; aContext: TPCUWriterContext); virtual;
     procedure WriteImplAsmStatement(Obj: TJSONObject; El: TPasImplAsmStatement; aContext: TPCUWriterContext); virtual;
@@ -939,6 +942,14 @@ type
     AddRef: TPCUAddRef;
   end;
 
+  { TPCUReaderPendingElScopeRef }
+
+  TPCUReaderPendingElScopeRef = class(TPCUFilerPendingElRef)
+  public
+    References: TPasScopeReferences;
+    Access: TPSRefAccess;
+  end;
+
   { TPCUReaderPendingIdentifierScope }
 
   TPCUReaderPendingIdentifierScope = class
@@ -967,7 +978,7 @@ type
     GenericEl: TPasGenericType;
     Id: integer;
     Params: TFPList; // list of PCUReaderPendingSpecializedParams
-    RefEl: TPasElement; // a TInlineSpecializeExpr or TPasSpecializeType
+    RefEl: TPasElement; // a TInlineSpecializeExpr, TPasSpecializeType, TPasProcedure or TInitializationSection
     SpecName: string;
     Prev, Next: TPCUReaderPendingSpecialized;
     destructor Destroy; override;
@@ -1021,7 +1032,7 @@ type
     function CreateSpecializedElement(PendSpec: TPCUReaderPendingSpecialized): boolean; // false=param missing
     procedure DeletePendingSpecialize(PendSpec: TPCUReaderPendingSpecialized);
     procedure PromiseSpecialize(SpecId: integer; El: TPasElement; const SpecName: string); virtual;
-    procedure ResolveSpecializedElements;
+    procedure ResolveSpecializedElements(Complete: boolean);
   protected
     // json
     procedure RaiseMsg(Id: int64; const Msg: string = ''); overload; override;
@@ -1044,8 +1055,11 @@ type
       AddRef: TPCUAddRef; ErrorEl: TPasElement); virtual;
     procedure PromiseSetElArrReference(Id: integer; Arr: TPasElementArray; Index: integer;
       AddRef: TPCUAddRef; ErrorEl: TPasElement); virtual;
+    procedure PromiseSetScopeReference(Id: integer; References: TPasScopeReferences;
+      Access: TPSRefAccess; ErrorEl: TPasElement); virtual;
     procedure ResolvePendingIdentifierScopes; virtual;
-    procedure ResolvePending; virtual;
+    procedure ResolvePending(Complete: boolean); virtual;
+    function GetReferrerEl(PendingElRef: TPCUFilerPendingElRef): TPasElement;
     procedure ReadBuiltInSymbols(Obj: TJSONObject; ErrorEl: TPasElement); virtual;
     // module
     procedure ReadHeaderMagic(Obj: TJSONObject); virtual;
@@ -1177,6 +1191,7 @@ type
     procedure ReadProcedure(Obj: TJSONObject; El: TPasProcedure; aContext: TPCUReaderContext); virtual;
     procedure ReadOperator(Obj: TJSONObject; El: TPasOperator; aContext: TPCUReaderContext); virtual;
     procedure ReadAttributes(Obj: TJSONObject; El: TPasAttributes; aContext: TPCUReaderContext); virtual;
+    procedure ReadPrecompiledJS(Obj: TJSONObject; El: TPasElement; ImplJS: TPas2JSPrecompiledJS; aContext: TPCUReaderContext); virtual;
     procedure ReadImplCommand(Obj: TJSONObject; El: TPasImplCommand; aContext: TPCUReaderContext); virtual;
     procedure ReadImplBeginBlock(Obj: TJSONObject; El: TPasImplBeginBlock; aContext: TPCUReaderContext); virtual;
     procedure ReadImplAsmStatement(Obj: TJSONObject; El: TPasImplAsmStatement; aContext: TPCUReaderContext); virtual;
@@ -2569,12 +2584,16 @@ procedure TPCUWriter.WriteModule(Obj: TJSONObject; aModule: TPasModule;
   procedure WImplBlock(Block: TPasImplBlock; const PropPrefix: string);
   var
     Scope: TPas2JSInitialFinalizationScope;
+    ImplJS: TPas2JSPrecompiledJS;
+    Sub: TJSONObject;
   begin
     if Block=nil then exit;
     Scope:=Block.CustomData as TPas2JSInitialFinalizationScope;
-    if Scope.JS<>'' then
-      Obj.Add(PropPrefix+'JS',Scope.JS);
-    WriteScopeReferences(Obj,Scope.References,PropPrefix+'Refs',aContext);
+    ImplJS:=Scope.ImplJS;
+    Sub:=TJSONObject.Create;
+    Obj.Add(PropPrefix,Sub);
+    WriteScopeReferences(Sub,Scope.References,'Refs',aContext);
+    WritePrecompiledJS(Sub,Block,ImplJS,aContext);
   end;
 
   procedure RaisePending(Ref: TPCUFilerElementRef);
@@ -3301,7 +3320,8 @@ procedure TPCUWriter.WriteExtRefSignature(Ref: TPCUFilerElementRef;
         end;
       if Index<0 then
         RaiseMsg(20180309184111,Member);
-      Obj.Add('MId',Index);
+      if Index>0 then
+        Obj.Add('MId',Index);
       end;
   end;
 
@@ -4511,8 +4531,6 @@ procedure TPCUWriter.WriteProcedure(Obj: TJSONObject; El: TPasProcedure;
 var
   DefProcMods, ImplProcMods, DeclProcMods: TProcedureModifiers;
   Scope: TPas2JSProcedureScope;
-  Arr: TJSONArray;
-  i: Integer;
   DeclProc: TPasProcedure;
   DeclScope: TPas2JsProcedureScope;
   BodyObj: TJSONObject;
@@ -4527,6 +4545,8 @@ begin
     // spezialiations are generated on the fly -> cannot be stored
     RaiseMsg(20191120180305,El,GetObjPath(Scope.SpecializedFromItem.FirstSpecialize));
     end;
+  if (Scope.ImplJS<>nil) and (Scope.ImplProc<>nil) then
+    RaiseMsg(20180228142831,El);
 
   if Scope.DeclarationProc=nil then
     begin
@@ -4575,23 +4595,12 @@ begin
       WriteScopeReferences(Obj,DeclScope.References,'Refs',aContext);
 
       // precompiled body
-      if Scope.BodyJS<>'' then
-        begin
-        if Scope.GlobalJS<>nil then
-          begin
-          Arr:=TJSONArray.Create;
-          Obj.Add('Globals',Arr);
-          for i:=0 to Scope.GlobalJS.Count-1 do
-            Arr.Add(Scope.GlobalJS[i]);
-          end;
-        Obj.Add('Body',Scope.BodyJS);
-        Obj.Add('Empty',Scope.EmptyJS);
-        end;
+      WritePrecompiledJS(Obj,El,Scope.ImplJS,aContext);
       end
     else
       begin
       // generic function: store pascal elements
-      if Scope.BodyJS<>'' then
+      if Scope.ImplJS<>nil then
         RaiseMsg(20191120171941,El);
       ImplProcMods:=El.Modifiers*PCUProcedureModifiersImplProc;
       DeclProcMods:=DeclProc.Modifiers*PCUProcedureModifiersImplProc;
@@ -4606,8 +4615,6 @@ begin
       aContext.InGeneric:=OldInGeneric;
       end;
     end;
-  if (Scope.BodyJS<>'') and (Scope.ImplProc<>nil) then
-    RaiseMsg(20180228142831,El);
 end;
 
 procedure TPCUWriter.WriteOperator(Obj: TJSONObject; El: TPasOperator;
@@ -4626,6 +4633,30 @@ begin
   WritePasExprArray(Obj,El,'Calls',El.Calls,aContext);
 end;
 
+procedure TPCUWriter.WritePrecompiledJS(Obj: TJSONObject; El: TPasElement;
+  ImplJS: TPas2JSPrecompiledJS; aContext: TPCUWriterContext);
+var
+  Arr: TJSONArray;
+  i: Integer;
+begin
+  if ImplJS=nil then exit;
+  if (ImplJS.BodyJS<>'') then
+    begin
+    if ImplJS.GlobalJS<>nil then
+      begin
+      Arr:=TJSONArray.Create;
+      Obj.Add('Globals',Arr);
+      for i:=0 to ImplJS.GlobalJS.Count-1 do
+        Arr.Add(ImplJS.GlobalJS[i]);
+      end;
+    if ImplJS.ShortRefs<>nil then
+      WriteElementList(Obj,El,'ShortRefs',ImplJS.ShortRefs,aContext,true);
+    Obj.Add('Body',ImplJS.BodyJS);
+    end;
+  if ImplJS.EmptyJS then
+    Obj.Add('Empty',ImplJS.EmptyJS);
+end;
+
 procedure TPCUWriter.WriteImplCommand(Obj: TJSONObject; El: TPasImplCommand;
   aContext: TPCUWriterContext);
 begin
@@ -5405,11 +5436,12 @@ function TPCUReader.CreateSpecializedElement(
   PendSpec: TPCUReaderPendingSpecialized): boolean;
 var
   RefParams, ElParams: TFPList;
-  i: Integer;
+  i, Id: Integer;
   SpecEl: TPasElement;
   Param: TPCUReaderPendingSpecializedParam;
   Ref: TPCUFilerElementRef;
   Obj: TJSONObject;
+  GenericEl: TPasGenericType;
 begin
   Result:=false;
   if PendSpec.RefEl=nil then
@@ -5433,7 +5465,10 @@ begin
     if Param.Element<>nil then continue;
     Ref:=GetElReference(Param.Id,PendSpec.RefEl);
     if Ref=nil then
+      begin
+      //writeln('TPCUReader.CreateSpecializedElement SpecName=',PendSpec.SpecName,' Id=',PendSpec.Id,' WAITING for param ',i,': ',Param.Id);
       exit(false);
+      end;
     Param.Element:=Ref.Element;
     end;
   // all RefParams resolved -> specialize
@@ -5441,8 +5476,11 @@ begin
   try
     for i:=0 to RefParams.Count-1 do
       ElParams.Add(TPCUReaderPendingSpecializedParam(RefParams[i]).Element);
-    SpecEl:=Resolver.GetSpecializedEl(Resolver.RootElement,PendSpec.GenericEl,ElParams);
+    Id:=PendSpec.Id;
+    GenericEl:=PendSpec.GenericEl;
+    SpecEl:=Resolver.GetSpecializedEl(Resolver.RootElement,GenericEl,ElParams);
     DeletePendingSpecialize(PendSpec);
+    Ref:=AddElReference(Id,PendSpec.RefEl,SpecEl);
   finally
     ElParams.Free;
   end;
@@ -5484,10 +5522,11 @@ begin
     PendSpec.RefEl:=El;
 end;
 
-procedure TPCUReader.ResolveSpecializedElements;
+procedure TPCUReader.ResolveSpecializedElements(Complete: boolean);
 var
   PendSpec, NextPendSpec, UnresolvedSpec: TPCUReaderPendingSpecialized;
   Changed: Boolean;
+  Ref: TPCUFilerElementRef;
 begin
   repeat
     UnresolvedSpec:=nil;
@@ -5496,6 +5535,12 @@ begin
     while PendSpec<>nil do
       begin
       NextPendSpec:=PendSpec.Next;
+      if PendSpec.RefEl=nil then
+        begin
+        Ref:=GetElReference(PendSpec.Id,PendSpec.GenericEl);
+        if Ref<>nil then
+          PendSpec.RefEl:=GetReferrerEl(Ref.Pending);
+        end;
       if PendSpec.RefEl<>nil then
         begin
         if CreateSpecializedElement(PendSpec) then
@@ -5506,6 +5551,8 @@ begin
       PendSpec:=NextPendSpec;
       end;
   until not Changed;
+  if Complete then
+    UnresolvedSpec:=FPendingSpecialize;
   if UnresolvedSpec<>nil then
     // a pending specialize cannot resolve its params
     RaiseMsg(20200531101924,UnresolvedSpec.GenericEl,UnresolvedSpec.SpecName+' Id='+IntToStr(UnresolvedSpec.Id)+' RefEl='+GetObjPath(UnresolvedSpec.RefEl));
@@ -5698,6 +5745,7 @@ var
   PendingElArrRef: TPCUReaderPendingElArrRef;
   {$IF defined(VerbosePCUFiler) or defined(memcheck)}
   Node: TAVLTreeNode;
+  PendingElScopeRef: TPCUReaderPendingElScopeRef;
   {$ENDIF}
 begin
   if Id<=0 then
@@ -5772,6 +5820,11 @@ begin
           if PendingElArrRef.AddRef{$IFDEF CheckPasTreeRefCount}<>''{$ENDIF} then
             Ref.Element.AddRef{$IFDEF CheckPasTreeRefCount}(PendingElArrRef.AddRef){$ENDIF};
           end
+        else if RefItem is TPCUReaderPendingElScopeRef then
+          begin
+          PendingElScopeRef:=TPCUReaderPendingElScopeRef(RefItem);
+          PendingElScopeRef.References.Add(Ref.Element,PendingElScopeRef.Access);
+          end
         else
           RaiseMsg(20180207153056,ErrorEl,RefItem.ClassName);
         Ref.Pending:=RefItem.Next;
@@ -5860,6 +5913,29 @@ begin
     end;
 end;
 
+procedure TPCUReader.PromiseSetScopeReference(Id: integer;
+  References: TPasScopeReferences; Access: TPSRefAccess; ErrorEl: TPasElement);
+var
+  Ref: TPCUFilerElementRef;
+  PendingItem: TPCUReaderPendingElScopeRef;
+begin
+  Ref:=AddElReference(Id,ErrorEl,nil);
+  if Ref.Element<>nil then
+    begin
+    // element was already created -> add reference immediately
+    References.Add(Ref.Element,Access);
+    end
+  else
+    begin
+    // element was not yet created -> store
+    PendingItem:=TPCUReaderPendingElScopeRef.Create;
+    PendingItem.References:=References;
+    PendingItem.Access:=Access;
+    PendingItem.ErrorEl:=ErrorEl;
+    Ref.AddPending(PendingItem);
+    end;
+end;
+
 procedure TPCUReader.ResolvePendingIdentifierScopes;
 var
   i: Integer;
@@ -5873,14 +5949,13 @@ begin
   FPendingIdentifierScopes.Clear;
 end;
 
-procedure TPCUReader.ResolvePending;
+procedure TPCUReader.ResolvePending(Complete: boolean);
 var
   Node: TAVLTreeNode;
   Ref: TPCUFilerElementRef;
 begin
   ResolvePendingIdentifierScopes;
-
-  ResolveSpecializedElements;
+  ResolveSpecializedElements(Complete);
 
   // check dangling references
   Node:=FElementRefs.FindLowest;
@@ -5901,6 +5976,18 @@ begin
     end;
 end;
 
+function TPCUReader.GetReferrerEl(PendingElRef: TPCUFilerPendingElRef
+  ): TPasElement;
+begin
+  while PendingElRef<>nil do
+    begin
+    Result:=PendingElRef.ErrorEl;
+    if Result<>nil then exit;
+    PendingElRef:=PendingElRef.Next;
+    end;
+  Result:=nil;
+end;
+
 procedure TPCUReader.ReadBuiltInSymbols(Obj: TJSONObject; ErrorEl: TPasElement);
 var
   Arr: TJSONArray;
@@ -6413,7 +6500,12 @@ begin
     if not ReadString(SubObj,'Name',Name,El) then
       RaiseMsg(20180309180233,El,IntToStr(i));
     if not ReadInteger(SubObj,'MId',Index,El) then
-      RaiseMsg(20180309184629,El,IntToStr(i));
+      begin
+      if SubObj.Find('MId')=nil then
+        Index:=0
+      else
+        RaiseMsg(20180309184629,El,IntToStr(i));
+      end;
     if (Index<0) or (Index>=Members.Count) then
       RaiseMsg(20180309184718,El,IntToStr(Index)+' out of bounds 0-'+IntToStr(Members.Count));
     ChildEl:=nil;
@@ -6473,6 +6565,7 @@ var
   PendSpec: TPCUReaderPendingSpecialized;
   PendParam: TPCUReaderPendingSpecializedParam;
   SpecName: string;
+  Ref: TPCUFilerElementRef;
 begin
   ErrorEl:=GenEl;
   if ParamIDs.Count=0 then
@@ -6486,6 +6579,9 @@ begin
   PendSpec.Obj:=Obj;
   PendSpec.GenericEl:=GenEl;
 
+  Ref:=AddElReference(Id,GenEl,nil);
+  Ref.Obj:=Obj;
+
   PendSpec.Params:=TFPList.Create;
   for i:=0 to ParamIDs.Count-1 do
     begin
@@ -6724,7 +6820,7 @@ begin
   Scope.Finished:=true;
   if Section is TInterfaceSection then
     begin
-    ResolvePending;
+    ResolvePending(false);
     Resolver.NotifyPendingUsedInterfaces;
     end;
 end;
@@ -7200,7 +7296,6 @@ var
   i, Id: Integer;
   Data: TJSONData;
   SubObj: TJSONObject;
-  Ref: TPCUFilerElementRef;
   s: string;
   Found: Boolean;
   Access: TPSRefAccess;
@@ -7220,12 +7315,6 @@ begin
     Data:=SubObj.Find('Id');
     if not (Data is TJSONIntegerNumber) then
       RaiseMsg(20180221171546,El,GetObjName(Data));
-    Id:=Data.AsInteger;
-    Ref:=GetElReference(Id,El);
-    if Ref=nil then
-      RaiseMsg(20180221171940,El,IntToStr(Id));
-    if Ref.Element=nil then
-      RaiseMsg(20180221171940,El,IntToStr(Id));
     if ReadString(SubObj,'Access',s,El) then
       begin
       Found:=false;
@@ -7240,7 +7329,8 @@ begin
       end
     else
       Access:=PCUDefaultPSRefAccess;
-    References.Add(Ref.Element,Access);
+    Id:=Data.AsInteger;
+    PromiseSetScopeReference(Id,References,Access,El);
     end;
 end;
 
@@ -7799,13 +7889,23 @@ var
     const PropPrefix: string);
   var
     Scope: TPas2JSInitialFinalizationScope;
-    s: string;
+    ImplJS: TPas2JSPrecompiledJS;
+    Sub: TJSONObject;
   begin
     Scope:=TPas2JSInitialFinalizationScope(Resolver.CreateScope(Block,Resolver.ScopeClass_InitialFinalization));
     Block.CustomData:=Scope;
-    if not ReadString(Obj,PropPrefix+'JS',s,Block) then exit;
-    Scope.JS:=s;
-    ReadScopeReferences(Obj,Scope,PropPrefix+'Refs',Scope.References);
+    ImplJS:=TPas2JSPrecompiledJS.Create;
+    Scope.ImplJS:=ImplJS;
+    if FileVersion<7 then
+      begin
+      ReadScopeReferences(Obj,Scope,PropPrefix+'Refs',Scope.References);
+      ReadString(Obj,PropPrefix+'JS',ImplJS.BodyJS,Block);
+      end
+    else if ReadObject(Obj,PropPrefix,Sub,Block) then
+      begin
+      ReadScopeReferences(Sub,Scope,'Refs',Scope.References);
+      ReadPrecompiledJS(Sub,Block,ImplJS,aContext);
+      end;
   end;
 
 var
@@ -7858,12 +7958,14 @@ begin
           TImplementationSection) then
         exit; // pending uses interfaces -> pause
       end;
-    if Obj.Find('InitJS')<>nil then
+    if (Obj.Find('Init')<>nil)
+        or ((FileVersion<7) and (Obj.Find('InitJS')<>nil)) then
       begin
       aModule.InitializationSection:=TInitializationSection(CreateElement(TInitializationSection,'',aModule));
       ReadInitialFinal(Obj,aModule.InitializationSection,'Init');
       end;
-    if Obj.Find('FinalJS')<>nil then
+    if (Obj.Find('Final')<>nil)
+        or ((FileVersion<7) and (Obj.Find('FinalJS')<>nil)) then
       begin
       aModule.FinalizationSection:=TFinalizationSection(CreateElement(TFinalizationSection,'',aModule));
       ReadInitialFinal(Obj,aModule.FinalizationSection,'Final');
@@ -7873,7 +7975,7 @@ begin
     aContext.ModeSwitches:=OldModeSwitches;
   end;
 
-  ResolvePending;
+  ResolvePending(true);
   Result:=true;
 end;
 
@@ -9027,22 +9129,18 @@ procedure TPCUReader.ReadProcedureBody(Obj: TJSONObject; El: TPasProcedure;
 var
   ImplScope: TPas2JSProcedureScope;
   s: string;
-  Arr: TJSONArray;
-  i: Integer;
-  Data: TJSONData;
   DeclProc: TPasProcedure;
   BodyObj, BodyBodyObj: TJSONObject;
   ProcBody: TProcedureBody;
   ImplEl: TPasElement;
   OldInGeneric: Boolean;
+  ImplJS: TPas2JSPrecompiledJS;
 begin
   ImplScope:=TPas2JSProcedureScope(El.CustomData);
   if ImplScope.ImplProc<>nil then
     RaiseMsg(20191231152850,El);
-  if ImplScope.BodyJS<>'' then
-    RaiseMsg(20180228231510,El);
-  if ImplScope.GlobalJS<>nil then
-    RaiseMsg(20180228231511,El);
+  if ImplScope.ImplJS<>nil then
+    RaiseMsg(20201018121506,El);
   DeclProc:=ImplScope.DeclarationProc;
   if DeclProc=nil then
     DeclProc:=El;
@@ -9050,20 +9148,9 @@ begin
   if Resolver.ProcCanBePrecompiled(DeclProc) then
     begin
     // normal proc (non generic)
-    if not ReadString(Obj,'Body',s,El) then
-      RaiseMsg(20180228131232,El);
-    ReadBoolean(Obj,'Empty',ImplScope.EmptyJS,El);
-    ImplScope.BodyJS:=s;
-    if ReadArray(Obj,'Globals',Arr,El) then
-      begin
-      for i:=0 to Arr.Count-1 do
-        begin
-        Data:=Arr[i];
-        if not (Data is TJSONString) then
-          RaiseMsg(20180228231555,El,IntToStr(i)+':'+GetObjName(Data));
-        ImplScope.AddGlobalJS(Data.AsString);
-        end;
-      end;
+    ImplJS:=TPas2JSPrecompiledJS.Create;
+    ImplScope.ImplJS:=ImplJS;
+    ReadPrecompiledJS(Obj,El,ImplJS,aContext);
     end
   else
     begin
@@ -9217,6 +9304,35 @@ begin
   ReadPasExprArray(Obj,El,'Calls',El.Calls,aContext);
 end;
 
+procedure TPCUReader.ReadPrecompiledJS(Obj: TJSONObject; El: TPasElement;
+  ImplJS: TPas2JSPrecompiledJS; aContext: TPCUReaderContext);
+var
+  Arr: TJSONArray;
+  i: Integer;
+  Data: TJSONData;
+begin
+  ReadString(Obj,'Body',ImplJS.BodyJS,El);
+  ReadBoolean(Obj,'Empty',ImplJS.EmptyJS,El);
+
+  if ReadArray(Obj,'Globals',Arr,El) then
+    begin
+    for i:=0 to Arr.Count-1 do
+      begin
+      Data:=Arr[i];
+      if not (Data is TJSONString) then
+        RaiseMsg(20180228231555,El,IntToStr(i)+':'+GetObjName(Data));
+      if ImplJS.GlobalJS=nil then
+        ImplJS.GlobalJS:=TStringList.Create;
+      ImplJS.GlobalJS.Add(Data.AsString);
+      end;
+    end;
+
+  ImplJS.ShortRefs:=TFPList.Create;
+  ReadElementList(Obj,El,'ShortRefs',ImplJS.ShortRefs,false,aContext);
+  if ImplJS.ShortRefs.Count=0 then
+    FreeAndNil(ImplJS.ShortRefs);
+end;
+
 procedure TPCUReader.ReadImplCommand(Obj: TJSONObject; El: TPasImplCommand;
   aContext: TPCUReaderContext);
 // an empty statement, e.g. if expr then else ;

packages/pastojs/tests/tcfiler.pas

@@ -35,6 +35,11 @@ type
     );
   TPCCheckFlags = set of TPCCheckFlag;
 
+  TPCCheckedElementPair = class
+  public
+    Orig, Rest: TPasElement;
+  end;
+
   { TCustomTestPrecompile }
 
   TCustomTestPrecompile = Class(TCustomTestModule)
@@ -44,6 +49,7 @@ type
     FPCUReader: TPCUReader;
     FPCUWriter: TPCUWriter;
     FRestAnalyzer: TPas2JSAnalyzer;
+    FCheckedElements: TPasAnalyzerKeySet; // keyset of TPCCheckedElementPair, key is Orig
     procedure OnFilerGetSrc(Sender: TObject; aFilename: string; out p: PChar;
       out Count: integer);
     function OnConverterIsElementUsed(Sender: TObject; El: TPasElement): boolean;
@@ -78,6 +84,7 @@ type
     procedure CheckRestoredRecordScope(const Path: string; Orig, Rest: TPas2jsRecordScope; Flags: TPCCheckFlags); virtual;
     procedure CheckRestoredClassScope(const Path: string; Orig, Rest: TPas2JSClassScope; Flags: TPCCheckFlags); virtual;
     procedure CheckRestoredProcScope(const Path: string; Orig, Rest: TPas2JSProcedureScope; Flags: TPCCheckFlags); virtual;
+    procedure CheckRestoredPrecompiledJS(const Path: string; OrigEl: TPasElement; Orig: TPas2JSPrecompiledJS; RestEl: TPasElement; Rest: TPas2JSPrecompiledJS; Flags: TPCCheckFlags); virtual;
     procedure CheckRestoredScopeRefs(const Path: string; Orig, Rest: TPasScopeReferences; Flags: TPCCheckFlags); virtual;
     procedure CheckRestoredPropertyScope(const Path: string; Orig, Rest: TPasPropertyScope; Flags: TPCCheckFlags); virtual;
     procedure CheckRestoredGenericParamScope(const Path: string; Orig, Rest: TPasGenericParamsScope; Flags: TPCCheckFlags); virtual;
@@ -211,11 +218,9 @@ type
     procedure TestPC_GenericFunction_AnonymousProc;
     procedure TestPC_GenericClass;
     procedure TestPC_GenericMethod;
-    procedure TestPC_SpecializeClassSameUnit; // ToDo
-    // ToDo: specialize local generic type in unit interface
-    // ToDo: specialize local generic type in unit implementation
-    // ToDo: specialize local generic type in proc decl
-    // ToDo: specialize local generic type in proc body
+    procedure TestPC_SpecializeClassSameUnit;
+    procedure TestPC_Specialize_LocalTypeInUnit;
+    // ToDo: specialize local generic type via class forward
     // ToDo: inline specialize local generic type in unit interface
     // ToDo: inline specialize local generic type in unit implementation
     // ToDo: inline specialize local generic type in proc decl
@@ -238,6 +243,8 @@ type
   end;
 
 function CompareListOfProcScopeRef(Item1, Item2: Pointer): integer;
+function CompareCheckedElementPairs(Item1, Item2: Pointer): integer;
+function CompareElWithCheckedElementPair(Key, Item: Pointer): integer;
 
 implementation
 
@@ -251,6 +258,22 @@ begin
   Result:=ComparePointer(Ref1.Element,Ref2.Element);
 end;
 
+function CompareCheckedElementPairs(Item1, Item2: Pointer): integer;
+var
+  Pair1: TPCCheckedElementPair absolute Item1;
+  Pair2: TPCCheckedElementPair absolute Item2;
+begin
+  Result:=ComparePointer(Pair1.Orig,Pair2.Orig);
+end;
+
+function CompareElWithCheckedElementPair(Key, Item: Pointer): integer;
+var
+  El: TPasElement absolute Key;
+  Pair: TPCCheckedElementPair absolute Item;
+begin
+  Result:=ComparePointer(El,Pair.Orig);
+end;
+
 { TCustomTestPrecompile }
 
 procedure TCustomTestPrecompile.OnFilerGetSrc(Sender: TObject;
@@ -348,6 +371,7 @@ begin
   inherited SetUp;
   FInitialFlags:=TPCUInitialFlags.Create;
   FAnalyzer:=TPas2JSAnalyzer.Create;
+  FCheckedElements:=TPasAnalyzerKeySet.Create(@CompareCheckedElementPairs,@CompareElWithCheckedElementPair);
   Analyzer.Resolver:=Engine;
   Analyzer.Options:=Analyzer.Options+[paoImplReferences];
   Converter.OnIsElementUsed:=@OnConverterIsElementUsed;
@@ -356,6 +380,11 @@ end;
 
 procedure TCustomTestPrecompile.TearDown;
 begin
+  if FCheckedElements<>nil then
+    begin
+    FCheckedElements.FreeItems;
+    FreeAndNil(FCheckedElements);
+    end;
   FreeAndNil(FAnalyzer);
   FreeAndNil(FPCUWriter);
   FreeAndNil(FPCUReader);
@@ -390,6 +419,7 @@ var
 begin
   InitialParserOptions:=Parser.Options;
   Analyzer.Options:=Analyzer.Options+[paoSkipGenericProc];
+  Converter.Options:=Converter.Options+[coShortRefGlobals,coShortRefGenFunc];
   ConvertUnit;
 
   FPCUWriter:=TPCUWriter.Create;
@@ -534,13 +564,13 @@ begin
   if Orig=nil then
     begin
     if Rest<>nil then
-      Fail(Path+': Orig=nil Rest='+GetObjName(Rest));
+      Fail(Path+': Orig=nil Rest='+GetObjPath(Rest));
     exit(false);
     end
   else if Rest=nil then
-    Fail(Path+': Orig='+GetObjName(Orig)+' Rest=nil');
+    Fail(Path+': Orig='+GetObjPath(Orig)+' Rest=nil');
   if Orig.ClassType<>Rest.ClassType then
-    Fail(Path+': Orig='+GetObjName(Orig)+' Rest='+GetObjName(Rest));
+    Fail(Path+': Orig='+GetObjPath(Orig)+' Rest='+GetObjPath(Rest));
   Result:=true;
 end;
 
@@ -607,24 +637,75 @@ end;
 
 procedure TCustomTestPrecompile.CheckRestoredDeclarations(const Path: string;
   Orig, Rest: TPasDeclarations; Flags: TPCCheckFlags);
+
+  function IsSpecialization(El: TPasElement): boolean;
+  begin
+    Result:=(El.CustomData is TPasGenericScope)
+        and (TPasGenericScope(El.CustomData).SpecializedFromItem<>nil);
+  end;
+
 var
-  i: Integer;
+  OrigIndex, RestIndex: Integer;
   OrigDecl, RestDecl: TPasElement;
   SubPath: String;
 begin
-  for i:=0 to Orig.Declarations.Count-1 do
+  // check non specializations
+  RestIndex:=0;
+  for OrigIndex:=0 to Orig.Declarations.Count-1 do
     begin
-    OrigDecl:=TPasElement(Orig.Declarations[i]);
-    if i>=Rest.Declarations.Count then
-      AssertEquals(Path+'.Declarations.Count',Orig.Declarations.Count,Rest.Declarations.Count);
-    RestDecl:=TPasElement(Rest.Declarations[i]);
-    SubPath:=Path+'['+IntToStr(i)+']';
+    OrigDecl:=TPasElement(Orig.Declarations[OrigIndex]);
+    if IsSpecialization(OrigDecl) then
+      continue;
+    SubPath:=Path+'['+IntToStr(OrigIndex)+']';
+    if OrigDecl.Name<>'' then
+      SubPath:=SubPath+'"'+OrigDecl.Name+'"'
+    else
+      SubPath:=SubPath+'?noname?';
+    // skip to next non specializations in restored declarations
+    while RestIndex<Rest.Declarations.Count do
+      begin
+      RestDecl:=TPasElement(Rest.Declarations[RestIndex]);
+      if not IsSpecialization(RestDecl) then
+        break;
+      inc(RestIndex)
+      end;
+    if RestIndex=Rest.Declarations.Count then
+      Fail(SubPath+' missing in restored Declarations');
+    // check
+    CheckRestoredElement(SubPath,OrigDecl,RestDecl,Flags);
+    inc(RestIndex);
+    end;
+
+  // check specializations
+  for OrigIndex:=0 to Orig.Declarations.Count-1 do
+    begin
+    OrigDecl:=TPasElement(Orig.Declarations[OrigIndex]);
+    if not IsSpecialization(OrigDecl) then
+      continue;
+    SubPath:=Path+'['+IntToStr(OrigIndex)+']';
     if OrigDecl.Name<>'' then
       SubPath:=SubPath+'"'+OrigDecl.Name+'"'
     else
       SubPath:=SubPath+'?noname?';
+    // search specialization with same name
+    RestIndex:=0;
+    repeat
+      if RestIndex=Rest.Declarations.Count then
+        Fail(SubPath+' missing in restored Declarations');
+      RestDecl:=TPasElement(Rest.Declarations[RestIndex]);
+      if IsSpecialization(RestDecl) and (OrigDecl.Name=RestDecl.Name) then
+        break;
+      inc(RestIndex);
+    until false;
+
+    if (OrigIndex<Rest.Declarations.Count) and (OrigIndex<>RestIndex) then
+      // move restored element to original place to generate the same JS
+      Rest.Declarations.Move(RestIndex,OrigIndex);
+
+    // check
     CheckRestoredElement(SubPath,OrigDecl,RestDecl,Flags);
     end;
+
   AssertEquals(Path+'.Declarations.Count',Orig.Declarations.Count,Rest.Declarations.Count);
 end;
 
@@ -793,8 +874,7 @@ procedure TCustomTestPrecompile.CheckRestoredInitialFinalizationScope(
   Flags: TPCCheckFlags);
 begin
   CheckRestoredScopeRefs(Path+'.References',Orig.References,Rest.References,Flags);
-  if Orig.JS<>Rest.JS then
-    CheckRestoredJS(Path+'.JS',Orig.JS,Rest.JS);
+  CheckRestoredPrecompiledJS(Path+'.ImplJS',Orig.Element,Orig.ImplJS,Rest.Element,Rest.ImplJS,Flags);
 end;
 
 procedure TCustomTestPrecompile.CheckRestoredEnumTypeScope(const Path: string;
@@ -891,10 +971,7 @@ var
 begin
   CheckRestoredReference(Path+'.DeclarationProc',Orig.DeclarationProc,Rest.DeclarationProc);
   CheckRestoredReference(Path+'.ImplProc',Orig.ImplProc,Rest.ImplProc);
-  if Orig.BodyJS<>Rest.BodyJS then
-    CheckRestoredJS(Path+'.BodyJS',Orig.BodyJS,Rest.BodyJS);
-
-  CheckRestoredStringList(Path+'.GlobalJS',Orig.GlobalJS,Rest.GlobalJS);
+  CheckRestoredPrecompiledJS(Path+'.ImplJS',Orig.Element,Orig.ImplJS,Rest.Element,Rest.ImplJS,Flags);
 
   if Rest.DeclarationProc=nil then
     begin
@@ -923,18 +1000,38 @@ begin
     end;
 end;
 
+procedure TCustomTestPrecompile.CheckRestoredPrecompiledJS(const Path: string;
+  OrigEl: TPasElement; Orig: TPas2JSPrecompiledJS; RestEl: TPasElement;
+  Rest: TPas2JSPrecompiledJS; Flags: TPCCheckFlags);
+begin
+  CheckRestoredObject(Path,Orig,Rest);
+  if Orig=nil then exit;
+  if Flags=[] then ;
+
+  AssertEquals(Path+'.EmptyJS',Orig.EmptyJS,Rest.EmptyJS);
+  if Orig.BodyJS<>Rest.BodyJS then
+    CheckRestoredJS(Path+'.BodyJS',Orig.BodyJS,Rest.BodyJS);
+  if Orig.BodyJS<>'' then
+    begin
+    CheckRestoredStringList(Path+'.GlobalJS',Orig.GlobalJS,Rest.GlobalJS);
+    CheckRestoredElRefList(Path+'.ShortRefs',OrigEl,Orig.ShortRefs,RestEl,Rest.ShortRefs,false,Flags);
+    end;
+end;
+
 procedure TCustomTestPrecompile.CheckRestoredScopeRefs(const Path: string;
   Orig, Rest: TPasScopeReferences; Flags: TPCCheckFlags);
 var
   OrigList, RestList: TFPList;
   i: Integer;
   OrigRef, RestRef: TPasScopeReference;
+  ok: Boolean;
 begin
   if Flags=[] then ;
   CheckRestoredObject(Path,Orig,Rest);
   if Orig=nil then exit;
   OrigList:=nil;
   RestList:=nil;
+  ok:=false;
   try
     OrigList:=Orig.GetList;
     RestList:=Rest.GetList;
@@ -957,7 +1054,21 @@ begin
       RestRef:=TPasScopeReference(RestList[i]);
       Fail(Path+'['+IntToStr(i)+'] Too many in Rest: "'+RestRef.Element.Name+'"');
       end;
+    ok:=true;
   finally
+    if not ok then
+      begin
+      for i:=0 to OrigList.Count-1 do
+        begin
+        OrigRef:=TPasScopeReference(OrigList[i]);
+        writeln('TCustomTestPrecompile.CheckRestoredScopeRefs Orig[',i,']=',GetObjPath(OrigRef.Element));
+        end;
+      for i:=0 to RestList.Count-1 do
+        begin
+        RestRef:=TPasScopeReference(RestList[i]);
+        writeln('TCustomTestPrecompile.CheckRestoredScopeRefs Rest[',i,']=',GetObjPath(RestRef.Element));
+        end;
+      end;
     OrigList.Free;
     RestList.Free;
   end;
@@ -1167,7 +1278,14 @@ begin
     if RestUsed=nil then
       Fail(Path+': used in OrigAnalyzer, but not used in RestAnalyzer');
     if OrigUsed.Access<>RestUsed.Access then
-      AssertEquals(Path+'->Analyzer.Access',dbgs(OrigUsed.Access),dbgs(RestUsed.Access));
+      begin
+      if (OrigUsed.Access in [paiaReadWrite,paiaWriteRead])
+          and (RestUsed.Access in [paiaReadWrite,paiaWriteRead])
+          and not (Orig.Parent is TProcedureBody) then
+        // readwrite or writeread is irrelevant for globals
+      else
+        AssertEquals(Path+'->Analyzer.Access',dbgs(OrigUsed.Access),dbgs(RestUsed.Access));
+      end;
     end
   else if RestAnalyzer.IsUsed(Rest) then
     begin
@@ -1180,11 +1298,27 @@ procedure TCustomTestPrecompile.CheckRestoredElement(const Path: string; Orig,
 var
   C: TClass;
   AModule: TPasModule;
+  Pair: TPCCheckedElementPair;
 begin
   //writeln('TCustomTestPrecompile.CheckRestoredElement START Orig=',GetObjName(Orig),' Rest=',GetObjName(Rest));
   if not CheckRestoredObject(Path,Orig,Rest) then exit;
   //writeln('TCustomTestPrecompile.CheckRestoredElement CheckRestoredObject Orig=',GetObjName(Orig),' Rest=',GetObjName(Rest));
 
+  Pair:=TPCCheckedElementPair(FCheckedElements.FindKey(Orig));
+  if Pair<>nil then
+    begin
+    if Pair.Rest<>Rest then
+      Fail(Path+': Orig='+GetObjPath(Orig)+' Rest='+GetObjPath(Rest));
+    exit;
+    end
+  else
+    begin
+    Pair:=TPCCheckedElementPair.Create;
+    Pair.Orig:=Orig;
+    Pair.Rest:=Rest;
+    FCheckedElements.Add(Pair,false);
+    end;
+
   AModule:=Orig.GetModule;
   if AModule<>Module then
     begin
@@ -1779,9 +1913,9 @@ begin
   RestScope:=Rest.CustomData as TPas2JSProcedureScope;
   if OrigScope=nil then
     exit; // msIgnoreInterfaces
-  CheckRestoredReference(Path+'.CustomData[TPas2JSProcedureScope].DeclarationProc',
+  CheckRestoredReference(Path+'.CustomData[TPas2JSProcedureScope].DeclarationProc [20201018123102]',
     OrigScope.DeclarationProc,RestScope.DeclarationProc);
-  AssertEquals(Path+'.CustomData[TPas2JSProcedureScope].ResultVarName',OrigScope.ResultVarName,RestScope.ResultVarName);
+  AssertEquals(Path+'.CustomData[TPas2JSProcedureScope].ResultVarName [20201018123057]',OrigScope.ResultVarName,RestScope.ResultVarName);
   DeclProc:=RestScope.DeclarationProc;
   if DeclProc=nil then
     begin
@@ -1808,15 +1942,13 @@ begin
   // Body
   if Orig.Body<>nil then
     begin
-    if Engine.ProcCanBePrecompiled(DeclProc) then
-      begin
-      AssertEquals(Path+'.EmptyJS',OrigScope.EmptyJS,RestScope.EmptyJS);
-      CheckRestoredJS(Path+'.BodyJS',OrigScope.BodyJS,RestScope.BodyJS);
-      CheckRestoredStringList(Path+'.GlobalJS',OrigScope.GlobalJS,RestScope.GlobalJS);
-      end
-    else
+    if not Engine.ProcCanBePrecompiled(DeclProc) then
       begin
       // generic body
+      if OrigScope.ImplJS<>nil then
+        Fail(Path+'.CustomData[TPas2JSProcedureScope].ImplJS [20201018123049] OrigScope.ImplJS<>nil');
+      if RestScope.ImplJS<>nil then
+        Fail(Path+'.CustomData[TPas2JSProcedureScope].ImplJS [20201018123139] RestScope.ImplJS<>nil');
       CheckRestoredProcedureBody(Path+'.Body',Orig.Body,Rest.Body,Flags+[PCCGeneric]);
       end;
     end
@@ -3077,8 +3209,6 @@ end;
 
 procedure TTestPrecompile.TestPC_SpecializeClassSameUnit;
 begin
-  exit;
-
   StartUnit(false);
   Add([
   '{$mode delphi}',
@@ -3095,7 +3225,46 @@ begin
   'implementation',
   'begin',
   '  b.a:=1.3;',
-  'end.',
+  '']);
+  WriteReadUnit;
+end;
+
+procedure TTestPrecompile.TestPC_Specialize_LocalTypeInUnit;
+begin
+  StartUnit(false);
+  Add([
+  '{$mode delphi}',
+  'interface',
+  'type',
+  '  TObject = class',
+  '  end;',
+  '  TBird<T> = class',
+  '    a: T;',
+  '  end;',
+  //'  TDoubleBird = TBIrd<double>;',
+  //'var',
+  //'  db: TDoubleBird;',
+  'procedure Fly;',
+  'implementation',
+  'type',
+  '  TWordBird = TBird<word>;',
+  'procedure Run;',
+  //'type TShortIntBird = TBird<shortint>;',
+  'var',
+  //'  shb: TShortIntBird;',
+  '  wb: TWordBird;',
+  'begin',
+  //'  shb.a:=3;',
+  '  wb.a:=4;',
+  'end;',
+  'procedure Fly;',
+  //'type TByteBird = TBird<byte>;',
+  //'var bb: TByteBird;',
+  'begin',
+  //'  bb.a:=5;',
+  '  Run;',
+  'end;',
+  'begin',
   '']);
   WriteReadUnit;
 end;

packages/rtl-objpas/src/inc/stdconvs.pp

@@ -332,7 +332,7 @@ ResourceString  // Note, designations for FFU's are guesses.
   txttuYears               = 'Years (years)';
   txttuDecades             = 'Decades (decades)';
   txttuCenturies           = 'Centuries (centuries)';
-  txttuMillennia           = 'Millennia (millenia)';
+  txttuMillennia           = 'Millennia (millennia)';
   txttuDateTime            = 'DateTime (??)';
   txttuJulianDate          = 'JulianDate (??)';
   txttuModifiedJulianDate  = 'Modified JulianData (??)';

rtl/aarch64/aarch64.inc

@@ -384,7 +384,7 @@ function InterLockedCompareExchange64(var Target: int64; NewValue, Comperand : i
 {$define FPC_SYSTEM_HAS_MEM_BARRIER}
 procedure ReadBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
   asm
-    { dmb ishld }
+    // { dmb ishld }
     dmb #9
   end;
 
@@ -395,13 +395,13 @@ end;
 
 procedure ReadWriteBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
 asm
-  { dmb ish }
+  // { dmb ish }
   dmb #11
 end;
 
 procedure WriteBarrier;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
 asm
-  { dmb ishst }
+  // { dmb ishst }
   dmb #10
 end;
 

rtl/aarch64/math.inc

@@ -55,7 +55,7 @@
     {$define FPC_SYSTEM_HAS_INT}
     function fpc_int_real(d : ValReal) : ValReal;assembler;nostackframe;compilerproc;
       asm
-        { round as floating point towards zero }
+        // { round as floating point towards zero }
         frintz d0,d0
       end;
     {$endif FPC_SYSTEM_HAS_INT}
@@ -65,7 +65,7 @@
     {$define FPC_SYSTEM_HAS_TRUNC}
     function fpc_trunc_real(d : ValReal) : int64;assembler;nostackframe;compilerproc;
       asm
-        { round to signed integer towards zero }
+        // { round to signed integer towards zero }
         fcvtzs x0,d0
       end;
     {$endif FPC_SYSTEM_HAS_TRUNC}
@@ -75,10 +75,10 @@
     {$define FPC_SYSTEM_HAS_ROUND}
     function fpc_round_real(d : ValReal) : int64;assembler;nostackframe;compilerproc;
       asm
-        { round as floating point using current rounding mode }
+        // { round as floating point using current rounding mode }
         frintx d0,d0
-        { convert to signed integer rounding towards zero (there's no "round to
-          integer using current rounding mode") }
+        // { convert to signed integer rounding towards zero (there's no "round to
+        //   integer using current rounding mode") }
         fcvtzs x0,d0
       end;
     {$endif FPC_SYSTEM_HAS_ROUND}

rtl/inc/threadvr.inc

@@ -23,14 +23,14 @@
 type
   pltvInitEntry = ^ltvInitEntry;
   ppltvInitEntry = ^pltvInitEntry;
-  ltvInitEntry = packed record
+  ltvInitEntry = {$ifndef FPC_ALIGNED_THREADVARTABLES}packed{$endif} record
      varaddr : {$ifdef cpu16}pword{$else}pdword{$endif};
      size    : longint;
   end;
 
-  TltvInitTablesTable = packed record
+  TltvInitTablesTable = {$ifndef FPC_ALIGNED_THREADVARTABLES}packed{$endif} record
     count  : dword;
-    tables : packed array [1..{$ifdef cpu16}16{$else}32767{$endif}] of {$ifdef ver3_0}pltvInitEntry{$else}ppltvInitEntry{$endif};
+    tables : {$ifndef FPC_ALIGNED_THREADVARTABLES}packed{$endif} array [1..{$ifdef cpu16}16{$else}32767{$endif}] of {$ifdef ver3_0}pltvInitEntry{$else}ppltvInitEntry{$endif};
   end;
   PltvInitTablesTable = ^TltvInitTablesTable;
 

rtl/linux/i386/sighnd.inc

@@ -60,29 +60,32 @@ begin
                     else if (FpuState and FPU_Underflow)<>0 then
                       res:=206
                     else if (FpuState and FPU_Denormal)<>0 then
-                      res:=216
+                      res:=206
                     else
                       res:=207;  {'Coprocessor Error'}
-                  end;
-                { SSE data? }
-                if ucontext^.uc_mcontext.fpstate^.magic=0 then
+                  end
+                else
                   begin
-                    MMState:=ucontext^.uc_mcontext.fpstate^.mxcsr;
-                    if (MMState and MM_ExceptionMask)<>0 then
+                    { SSE data? }
+                    if ucontext^.uc_mcontext.fpstate^.magic=0 then
                       begin
-                        { first check the more precise options }
-                        if (MMState and MM_DivisionByZero)<>0 then
-                          res:=208
-                        else if (MMState and MM_Invalid)<>0 Then
-                          res:=207
-                        else if (MMState and MM_Overflow)<>0 then
-                          res:=205
-                        else if (MMState and MM_Underflow)<>0 then
-                          res:=206
-                        else if (MMState and MM_Denormal)<>0 then
-                          res:=216
-                        else
-                          res:=207;  {'Coprocessor Error'}
+                        MMState:=ucontext^.uc_mcontext.fpstate^.mxcsr;
+                        if (MMState and MM_ExceptionMask)<>0 then
+                          begin
+                            { first check the more precise options }
+                            if (MMState and MM_DivisionByZero)<>0 then
+                              res:=208
+                            else if (MMState and MM_Invalid)<>0 Then
+                              res:=207
+                            else if (MMState and MM_Overflow)<>0 then
+                              res:=205
+                            else if (MMState and MM_Underflow)<>0 then
+                              res:=206
+                            else if (MMState and MM_Denormal)<>0 then
+                              res:=206
+                            else
+                              res:=207;  {'Coprocessor Error'}
+                          end;
                       end;
                   end;
                end;

rtl/linux/m68k/cprt21.as

@@ -1,5 +1,4 @@
 |
-|   $Id: cprt21.as,v 1.1.2.5 2002/02/28 22:44:44 pierre Exp $
 |   This file is part of the Free Pascal run time library.
 |   Copyright (c) 1999-2000 by Michael Van Canneyt and Peter Vreman
 |   members of the Free Pascal development team.
@@ -99,46 +98,3 @@ ___fpc_ret_d1:
 ___fpc_ret_fp:
         .long   0
 
-
-|
-| $Log: cprt21.as,v $
-| Revision 1.1.2.5  2002/02/28 22:44:44  pierre
-|  + add some comments
-|
-| Revision 1.1.2.4  2001/08/02 21:23:59  pierre
-|  * fix the args to __libc_start_main
-|
-| Revision 1.1.2.3  2001/07/30 20:05:07  pierre
-|  * fix a assembler syntax eror in last commit
-|
-| Revision 1.1.2.2  2001/07/30 16:18:53  pierre
-|  * converted from i386 code
-|
-| Revision 1.1.2.2  2001/06/04 18:04:32  peter
-|   * use own dummies for _init and _fini
-|
-| Revision 1.1.2.1  2001/02/14 22:18:45  pierre
-|  * fix Sebastian's problem with HeapTrace
-|
-| Revision 1.1  2000/07/13 06:30:55  michael
-| + Initial import
-|
-| Revision 1.3  2000/01/07 16:41:42  daniel
-|   * copyright 2000
-|
-| Revision 1.2  2000/01/07 16:32:28  daniel
-|   * copyright 2000 added
-|
-| Revision 1.1  1999/05/03 21:29:36  peter
-|   + glibc 2.1 support
-|
-| Revision 1.3  1998/11/04 10:16:25  peter
-|   + xorl fp,fp to indicate end of backtrace
-|
-| Revision 1.2  1998/10/14 21:28:46  peter
-|   * initialize fpu so sigfpe is finally generated for fpu errors
-|
-| Revision 1.1  1998/08/12 19:16:09  peter
-|   + loader including libc init and exit
-|
-|

rtl/linux/m68k/gprt0.as

@@ -1,5 +1,4 @@
 |
-|   $Id: gprt0.as,v 1.1.2.3 2001/08/01 13:26:17 pierre Exp $
 |   This file is part of the Free Pascal run time library.
 |   Copyright (c) 2001 by Free Pascal Core Team
 |
@@ -75,18 +74,3 @@ _haltproc:
 |___fpc_brk_addr:
 |       .long	0
 
-
-|
-| $Log: gprt0.as,v $
-| Revision 1.1.2.3  2001/08/01 13:26:17  pierre
-|  * syntax adapted to GNU as
-|
-| Revision 1.1.2.2  2001/07/13 15:43:22  pierre
-|  assembler error corrected
-|
-| Revision 1.1.2.1  2001/07/13 15:38:54  pierre
-|  first version of gprt0.as file
-|
-|
-|
-

rtl/linux/m68k/gprt21.as

@@ -1,5 +1,4 @@
 |
-|   $Id: gprt21.as,v 1.1.2.2 2001/08/01 13:26:17 pierre Exp $
 |   This file is part of the Free Pascal run time library.
 |   Copyright (c) 2001 by Free Pascal Core Team
 |
@@ -75,21 +74,3 @@ _haltproc:
 |___fpc_brk_addr:
 |       .long	0
 
-
-|
-| $Log: gprt21.as,v $
-| Revision 1.1.2.2  2001/08/01 13:26:17  pierre
-|  * syntax adapted to GNU as
-|
-| Revision 1.1.2.1  2001/07/13 15:45:40  pierre
-|  simple copies of cprt0 and gprt0 added
-|
-| Revision 1.1.2.2  2001/07/13 15:43:22  pierre
-|  assembler error corrected
-|
-| Revision 1.1.2.1  2001/07/13 15:38:54  pierre
-|  first version of gprt0.as file
-|
-|
-|
-

rtl/linux/m68k/sighnd.inc

@@ -111,7 +111,7 @@ begin
               else if (FpuState and (Underflow or AE_Underflow))<>0 then
                 res:=206
               else if (FpuState and PSR_Denormal)<>0 then
-                res:=216
+                res:=206
               { else if (FpuState and (PSR_StackOverflow or PRS_StackUnderflow))<>0 then
                 res:=207, disabled, as there is no fpu stack }
               else if (FpuState and (OperandError or SignalingNan or BranchOnUnordered or AE_InvalidOperation))<>0 then

rtl/linux/x86_64/sighnd.inc

@@ -76,38 +76,31 @@ procedure SignalToRunerror(sig : longint; SigInfo: PSigInfo; SigContext: PSigCon
                   else if (FpuState and FPU_Underflow)<>0 then
                     res:=206
                   else if (FpuState and FPU_Denormal)<>0 then
-                    res:=216
+                    res:=206
                   else if (FpuState and (FPU_StackOverflow or FPU_StackUnderflow or FPU_Invalid))<>0 Then
                     res:=207
                   else
                     res:=207;  {'Coprocessor Error'}
-
-                  { exceptions are handled, clear all flags
-                    as we return from SignalToRunerrer, we have to clear the exception flags in the context }
-                  if assigned(SigContext^.fpstate) then
-                    SigContext^.fpstate^.swd:=SigContext^.fpstate^.swd and not($37ff);
-                end;
-              MMState:=getMMState(SigContext^);
-              if (MMState and MM_ExceptionMask)<>0 then
+                end
+              else
                 begin
-                  { first check the more precise options }
-                  if (MMState and MM_DivisionByZero)<>0 then
-                    res:=208
-                  else if (MMState and MM_Invalid)<>0 Then
-                    res:=207
-                  else if (MMState and MM_Overflow)<>0 then
-                    res:=205
-                  else if (MMState and MM_Underflow)<>0 then
-                    res:=206
-                  else if (MMState and MM_Denormal)<>0 then
-                    res:=216
-                  else
-                    res:=207;  {'Coprocessor Error'}
-
-                  { exceptions are handled, clear all flags
-                    as we return from SignalToRunerrer, we have to clear the exception flags in the context }
-                  if assigned(SigContext^.fpstate) then
-                    SigContext^.fpstate^.mxcsr:=SigContext^.fpstate^.mxcsr and not(MM_ExceptionMask);
+                  MMState:=getMMState(SigContext^);
+                  if (MMState and MM_ExceptionMask)<>0 then
+                    begin
+                      { first check the more precise options }
+                      if (MMState and MM_DivisionByZero)<>0 then
+                        res:=208
+                      else if (MMState and MM_Invalid)<>0 Then
+                        res:=207
+                      else if (MMState and MM_Overflow)<>0 then
+                        res:=205
+                      else if (MMState and MM_Underflow)<>0 then
+                        res:=206
+                      else if (MMState and MM_Denormal)<>0 then
+                        res:=206
+                      else
+                        res:=207;  {'Coprocessor Error'}
+                    end;
                 end;
               if assigned(SigContext^.fpstate) then
                 with SigContext^.fpstate^ do
@@ -115,14 +108,17 @@ procedure SignalToRunerror(sig : longint; SigInfo: PSigInfo; SigContext: PSigCon
   {$ifdef SYSTEM_DEBUG}
                     Writeln(stderr,'fpstate^.swd = ',swd);
   {$endif SYSTEM_DEBUG}
-                    { acutally, I am not sure if we should really touch the controll word }
+                    { actually, I am not sure if we should really touch the controll word }
                     cwd:=Default8087CW;
                     { found by trial and error that setting to 0 means empty }
                     twd:=$0;
                     { clear top }
                     swd:=swd and not($3700);
+                    { exceptions are handled, clear all flags
+                      as we return from SignalToRunerrer, we have to clear the exception flags in the context }
+                    mxcsr:=mxcsr and not(MM_ExceptionMask);
+                    swd:=swd and not($37ff);
                   end;
-               SysResetFPU;
             end;
         end;
       SIGILL,

rtl/qnx/dos.inc

@@ -1,5 +1,4 @@
 {
-    $Id: dos.inc,v 1.1.2.2 2002/05/01 14:09:49 carl Exp $
     This file is part of the Free Pascal run time library.
     Copyright (c) 2002 by Carl Eric Codere
 
@@ -150,13 +149,3 @@ begin
   GetTimezoneFile:='';
 end;
 
-
-{
- $Log: dos.inc,v $
- Revision 1.1.2.2  2002/05/01 14:09:49  carl
- + TZ is now taken from GetTimezoneSitrng instead of getenv
-
- Revision 1.1.2.1  2001/12/20 02:55:00  carl
- + QNX versions (still untested)
-
-}

rtl/qnx/errno.inc

@@ -1,5 +1,4 @@
 {
-    $Id: errno.inc,v 1.1.2.2 2001/12/20 02:55:00 carl Exp $
     This file is part of the Free Pascal run time library.
 
     
@@ -153,12 +152,3 @@
      Sys_ESRVRFAULT = 312;   { Server fault on msg pass                 }
      Sys_EENDIAN    = 313;   { Endian not supported                     }
 
-{
-  $Log: errno.inc,v $
-  Revision 1.1.2.2  2001/12/20 02:55:00  carl
-  + QNX versions (still untested)
-
-  Revision 1.1.2.1  2001/11/26 03:00:10  carl
-  + started qnx port
-
-}

rtl/qnx/osposix.inc

@@ -1,5 +1,4 @@
 {
-    $Id: osposix.inc,v 1.1.2.2 2002/04/17 17:16:14 carl Exp $
     Copyright (c) 2001 by Carl Eric Codere
 
     Implements POSIX 1003.1 conforming interface
@@ -343,15 +342,3 @@ const
          wifsignaled := 0;
      end;
 
-
-
-{
-
- $Log: osposix.inc,v $
- Revision 1.1.2.2  2002/04/17 17:16:14  carl
- * more fixes for QNX target
-
- Revision 1.1.2.1  2001/12/20 02:55:01  carl
- + QNX versions (still untested)
-
-}

rtl/qnx/osposixh.inc

@@ -1,5 +1,4 @@
 {
-    $Id: osposixh.inc,v 1.1.2.5 2002/05/01 14:10:36 carl Exp $
     This file is part of the Free Pascal run time library.
     Copyright (c) 2002 by Carl Eric Codere
 
@@ -172,25 +171,3 @@ CONST
     
     {$i signal.inc}
 
-
-{
-  $Log: osposixh.inc,v $
-  Revision 1.1.2.5  2002/05/01 14:10:36  carl
-  * Correct structures for stat and dirent
-  * correct some compilation problems
-  * change types according to 80x86 version
-
-  Revision 1.1.2.4  2002/04/17 17:16:14  carl
-  * more fixes for QNX target
-
-  Revision 1.1.2.3  2001/12/20 02:55:01  carl
-  + QNX versions (still untested)
-
-  Revision 1.1.2.2  2001/11/28 03:11:08  carl
-  + ustname structure max length
-
-  Revision 1.1.2.1  2001/11/26 03:00:10  carl
-  + started qnx port
-
-
-}

rtl/qnx/posix.pp

@@ -1,5 +1,4 @@
 {
-    $Id: posix.pp,v 1.1.2.2 2002/05/01 14:10:36 carl Exp $
     This file is part of the Free Pascal run time library.
     Copyright (c) 2001 by Carl Eric Codere
     development team
@@ -387,17 +386,3 @@ const
 
 end.
 
-{
-  $Log: posix.pp,v $
-  Revision 1.1.2.2  2002/05/01 14:10:36  carl
-  * Correct structures for stat and dirent
-  * correct some compilation problems
-  * change types according to 80x86 version
-
-  Revision 1.1.2.1  2001/12/20 02:55:01  carl
-  + QNX versions (still untested)
-
-  Revision 1.1.2.1  2001/12/09 03:25:17  carl
-  + reinstated
-
-}

rtl/qnx/qnx.inc

@@ -1,5 +1,4 @@
 {
-    $Id: qnx.inc,v 1.1.2.2 2002/05/01 14:10:36 carl Exp $
     Copyright (c) 2002 by Carl Eric Codere
 
 
@@ -52,16 +51,3 @@ type
   
 function sys_statvfs(const path: pchar; var buf : statvfs_t): cint; cdecl; external name 'statvfs';  
 
-
-
-{ 
- $Log: qnx.inc,v $
- Revision 1.1.2.2  2002/05/01 14:10:36  carl
- * Correct structures for stat and dirent
- * correct some compilation problems
- * change types according to 80x86 version
-
- Revision 1.1.2.1  2001/12/20 02:55:01  carl
- + QNX versions (still untested)
-
-}

rtl/qnx/signal.inc

@@ -1,5 +1,4 @@
 {
-    $Id: signal.inc,v 1.1.2.1 2001/12/20 02:55:01 carl Exp $
     This file is part of the Free Pascal run time library.
     Copyright (c) 2001 by Free Pascal development team
 
@@ -71,11 +70,4 @@ const
     SIGPROF    =29;     { profileing timer expired           }
     SIGXCPU    =30;     { exceded cpu limit                  }
     SIGXFSZ    =31;     { exceded file size limit            }
-    
-
-{
-  $Log: signal.inc,v $
-  Revision 1.1.2.1  2001/12/20 02:55:01  carl
-  + QNX versions (still untested)
 
-}

rtl/qnx/system.pp

@@ -1,5 +1,4 @@
 {
-    $Id: system.pp,v 1.1.2.2 2002/05/01 14:10:36 carl Exp $
     This file is part of the Free Pascal run time library.
     Copyright (c) 1999-2000 by the Free Pascal development team.
 
@@ -264,16 +263,3 @@ begin
   setupexecname;
 end.
 
-
-{
- $Log: system.pp,v $
- Revision 1.1.2.2  2002/05/01 14:10:36  carl
- * Correct structures for stat and dirent
- * correct some compilation problems
- * change types according to 80x86 version
-
- Revision 1.1.2.1  2001/12/20 02:55:01  carl
- + QNX versions (still untested)
-
-
-}

tests/test/traa641.pp

@@ -0,0 +1,2450 @@
+{%cpu=aarch64}
+
+{ based on the arm64-simd-ldst.s test from LLVM
+
+The LLVM Project is under the Apache License v2.0 with LLVM Exceptions
+}
+
+{$mode objfpc}
+
+type
+  tinstrdata = record
+    bytes: array[0..3] of byte;
+    str: ansistring;
+  end;
+
+
+procedure ld1st1_multiple; assembler; nostackframe;
+asm
+  ld1.8b {v0}, [x1]
+  ld1.8b {v0, v1}, [x1]
+  ld1.8b {v0, v1, v2}, [x1]
+  ld1.8b {v0, v1, v2, v3}, [x1]
+
+  ld1.8b {v3}, [x1]
+  ld1.8b {v3, v4}, [x2]
+  ld1.8b {v4, v5, v6}, [x3]
+  ld1.8b {v7, v8, v9, v10}, [x4]
+
+  ld1.16b {v0}, [x1]
+  ld1.16b {v0, v1}, [x1]
+  ld1.16b {v0, v1, v2}, [x1]
+  ld1.16b {v0, v1, v2, v3}, [x1]
+
+  ld1.4h {v0}, [x1]
+  ld1.4h {v0, v1}, [x1]
+  ld1.4h {v0, v1, v2}, [x1]
+  ld1.4h {v0, v1, v2, v3}, [x1]
+
+  ld1.8h {v0}, [x1]
+  ld1.8h {v0, v1}, [x1]
+  ld1.8h {v0, v1, v2}, [x1]
+  ld1.8h {v0, v1, v2, v3}, [x1]
+
+  ld1.2s {v0}, [x1]
+  ld1.2s {v0, v1}, [x1]
+  ld1.2s {v0, v1, v2}, [x1]
+  ld1.2s {v0, v1, v2, v3}, [x1]
+
+  ld1.4s {v0}, [x1]
+  ld1.4s {v0, v1}, [x1]
+  ld1.4s {v0, v1, v2}, [x1]
+  ld1.4s {v0, v1, v2, v3}, [x1]
+
+  ld1.1d {v0}, [x1]
+  ld1.1d {v0, v1}, [x1]
+  ld1.1d {v0, v1, v2}, [x1]
+  ld1.1d {v0, v1, v2, v3}, [x1]
+
+  ld1.2d {v0}, [x1]
+  ld1.2d {v0, v1}, [x1]
+  ld1.2d {v0, v1, v2}, [x1]
+  ld1.2d {v0, v1, v2, v3}, [x1]
+
+  st1.8b {v0}, [x1]
+  st1.8b {v0, v1}, [x1]
+  st1.8b {v0, v1, v2}, [x1]
+  st1.8b {v0, v1, v2, v3}, [x1]
+
+  st1.16b {v0}, [x1]
+  st1.16b {v0, v1}, [x1]
+  st1.16b {v0, v1, v2}, [x1]
+  st1.16b {v0, v1, v2, v3}, [x1]
+
+  st1.4h {v0}, [x1]
+  st1.4h {v0, v1}, [x1]
+  st1.4h {v0, v1, v2}, [x1]
+  st1.4h {v0, v1, v2, v3}, [x1]
+
+  st1.8h {v0}, [x1]
+  st1.8h {v0, v1}, [x1]
+  st1.8h {v0, v1, v2}, [x1]
+  st1.8h {v0, v1, v2, v3}, [x1]
+
+  st1.2s {v0}, [x1]
+  st1.2s {v0, v1}, [x1]
+  st1.2s {v0, v1, v2}, [x1]
+  st1.2s {v0, v1, v2, v3}, [x1]
+
+  st1.4s {v0}, [x1]
+  st1.4s {v0, v1}, [x1]
+  st1.4s {v0, v1, v2}, [x1]
+  st1.4s {v0, v1, v2, v3}, [x1]
+
+  st1.1d {v0}, [x1]
+  st1.1d {v0, v1}, [x1]
+  st1.1d {v0, v1, v2}, [x1]
+  st1.1d {v0, v1, v2, v3}, [x1]
+
+  st1.2d {v0}, [x1]
+  st1.2d {v0, v1}, [x1]
+  st1.2d {v0, v1, v2}, [x1]
+  st1.2d {v0, v1, v2, v3}, [x1]
+
+  st1.2d {v5}, [x1]
+  st1.2d {v7, v8}, [x10]
+  st1.2d {v11, v12, v13}, [x1]
+  st1.2d {v28, v29, v30, v31}, [x13]
+end;
+
+procedure ld2st2_multiple; assembler; nostackframe;
+asm
+  ld2.8b {v4, v5}, [x19]
+  ld2.16b {v4, v5}, [x19]
+  ld2.4h {v4, v5}, [x19]
+  ld2.8h {v4, v5}, [x19]
+  ld2.2s {v4, v5}, [x19]
+  ld2.4s {v4, v5}, [x19]
+  ld2.2d {v4, v5}, [x19]
+
+  st2.8b {v4, v5}, [x19]
+  st2.16b {v4, v5}, [x19]
+  st2.4h {v4, v5}, [x19]
+  st2.8h {v4, v5}, [x19]
+  st2.2s {v4, v5}, [x19]
+  st2.4s {v4, v5}, [x19]
+  st2.2d {v4, v5}, [x19]
+end;
+
+procedure ld3st3_multiple; assembler; nostackframe;
+asm
+    ld3.8b {v4, v5, v6}, [x19]
+    ld3.16b {v4, v5, v6}, [x19]
+    ld3.4h {v4, v5, v6}, [x19]
+    ld3.8h {v4, v5, v6}, [x19]
+    ld3.2s {v4, v5, v6}, [x19]
+    ld3.4s {v4, v5, v6}, [x19]
+    ld3.2d {v4, v5, v6}, [x19]
+
+    ld3.8b {v9, v10, v11}, [x9]
+    ld3.16b {v14, v15, v16}, [x19]
+    ld3.4h {v24, v25, v26}, [x29]
+    ld3.8h {v30, v31, v0}, [x9]
+    ld3.2s {v2, v3, v4}, [x19]
+    ld3.4s {v4, v5, v6}, [x29]
+    ld3.2d {v7, v8, v9}, [x9]
+
+    st3.8b {v4, v5, v6}, [x19]
+    st3.16b {v4, v5, v6}, [x19]
+    st3.4h {v4, v5, v6}, [x19]
+    st3.8h {v4, v5, v6}, [x19]
+    st3.2s {v4, v5, v6}, [x19]
+    st3.4s {v4, v5, v6}, [x19]
+    st3.2d {v4, v5, v6}, [x19]
+
+    st3.8b {v10, v11, v12}, [x9]
+    st3.16b {v14, v15, v16}, [x19]
+    st3.4h {v24, v25, v26}, [x29]
+    st3.8h {v30, v31, v0}, [x9]
+    st3.2s {v2, v3, v4}, [x19]
+    st3.4s {v7, v8, v9}, [x29]
+    st3.2d {v4, v5, v6}, [x9]
+end;
+
+procedure ld4st4_multiple; assembler; nostackframe;
+asm
+    ld4.8b {v4, v5, v6, v7}, [x19]
+    ld4.16b {v4, v5, v6, v7}, [x19]
+    ld4.4h {v4, v5, v6, v7}, [x19]
+    ld4.8h {v4, v5, v6, v7}, [x19]
+    ld4.2s {v4, v5, v6, v7}, [x19]
+    ld4.4s {v4, v5, v6, v7}, [x19]
+    ld4.2d {v4, v5, v6, v7}, [x19]
+
+    st4.8b {v4, v5, v6, v7}, [x19]
+    st4.16b {v4, v5, v6, v7}, [x19]
+    st4.4h {v4, v5, v6, v7}, [x19]
+    st4.8h {v4, v5, v6, v7}, [x19]
+    st4.2s {v4, v5, v6, v7}, [x19]
+    st4.4s {v4, v5, v6, v7}, [x19]
+    st4.2d {v4, v5, v6, v7}, [x19]
+end;
+
+
+//-----------------------------------------------------------------------------
+// Post-increment versions.
+//----------------------------------------------------------------------------
+
+procedure ld1st1_multiple_post; assembler; nostackframe;
+asm
+  ld1.8b {v0}, [x1], x15
+  ld1.8b {v0, v1}, [x1], x15
+  ld1.8b {v0, v1, v2}, [x1], x15
+  ld1.8b {v0, v1, v2, v3}, [x1], x15
+
+  ld1.16b {v0}, [x1], x15
+  ld1.16b {v0, v1}, [x1], x15
+  ld1.16b {v0, v1, v2}, [x1], x15
+  ld1.16b {v0, v1, v2, v3}, [x1], x15
+
+  ld1.4h {v0}, [x1], x15
+  ld1.4h {v0, v1}, [x1], x15
+  ld1.4h {v0, v1, v2}, [x1], x15
+  ld1.4h {v0, v1, v2, v3}, [x1], x15
+
+  ld1.8h {v0}, [x1], x15
+  ld1.8h {v0, v1}, [x1], x15
+  ld1.8h {v0, v1, v2}, [x1], x15
+  ld1.8h {v0, v1, v2, v3}, [x1], x15
+
+  ld1.2s {v0}, [x1], x15
+  ld1.2s {v0, v1}, [x1], x15
+  ld1.2s {v0, v1, v2}, [x1], x15
+  ld1.2s {v0, v1, v2, v3}, [x1], x15
+
+  ld1.4s {v0}, [x1], x15
+  ld1.4s {v0, v1}, [x1], x15
+  ld1.4s {v0, v1, v2}, [x1], x15
+  ld1.4s {v0, v1, v2, v3}, [x1], x15
+
+  ld1.1d {v0}, [x1], x15
+  ld1.1d {v0, v1}, [x1], x15
+  ld1.1d {v0, v1, v2}, [x1], x15
+  ld1.1d {v0, v1, v2, v3}, [x1], x15
+
+  ld1.2d {v0}, [x1], x15
+  ld1.2d {v0, v1}, [x1], x15
+  ld1.2d {v0, v1, v2}, [x1], x15
+  ld1.2d {v0, v1, v2, v3}, [x1], x15
+
+  st1.8b {v0}, [x1], x15
+  st1.8b {v0, v1}, [x1], x15
+  st1.8b {v0, v1, v2}, [x1], x15
+  st1.8b {v0, v1, v2, v3}, [x1], x15
+
+  st1.16b {v0}, [x1], x15
+  st1.16b {v0, v1}, [x1], x15
+  st1.16b {v0, v1, v2}, [x1], x15
+  st1.16b {v0, v1, v2, v3}, [x1], x15
+
+  st1.4h {v0}, [x1], x15
+  st1.4h {v0, v1}, [x1], x15
+  st1.4h {v0, v1, v2}, [x1], x15
+  st1.4h {v0, v1, v2, v3}, [x1], x15
+
+  st1.8h {v0}, [x1], x15
+  st1.8h {v0, v1}, [x1], x15
+  st1.8h {v0, v1, v2}, [x1], x15
+  st1.8h {v0, v1, v2, v3}, [x1], x15
+
+  st1.2s {v0}, [x1], x15
+  st1.2s {v0, v1}, [x1], x15
+  st1.2s {v0, v1, v2}, [x1], x15
+  st1.2s {v0, v1, v2, v3}, [x1], x15
+
+  st1.4s {v0}, [x1], x15
+  st1.4s {v0, v1}, [x1], x15
+  st1.4s {v0, v1, v2}, [x1], x15
+  st1.4s {v0, v1, v2, v3}, [x1], x15
+
+  st1.1d {v0}, [x1], x15
+  st1.1d {v0, v1}, [x1], x15
+  st1.1d {v0, v1, v2}, [x1], x15
+  st1.1d {v0, v1, v2, v3}, [x1], x15
+
+  st1.2d {v0}, [x1], x15
+  st1.2d {v0, v1}, [x1], x15
+  st1.2d {v0, v1, v2}, [x1], x15
+  st1.2d {v0, v1, v2, v3}, [x1], x15
+
+  ld1.8b {v0}, [x1], #8
+  ld1.8b {v0, v1}, [x1], #16
+  ld1.8b {v0, v1, v2}, [x1], #24
+  ld1.8b {v0, v1, v2, v3}, [x1], #32
+
+  ld1.16b {v0}, [x1], #16
+  ld1.16b {v0, v1}, [x1], #32
+  ld1.16b {v0, v1, v2}, [x1], #48
+  ld1.16b {v0, v1, v2, v3}, [x1], #64
+
+  ld1.4h {v0}, [x1], #8
+  ld1.4h {v0, v1}, [x1], #16
+  ld1.4h {v0, v1, v2}, [x1], #24
+  ld1.4h {v0, v1, v2, v3}, [x1], #32
+
+  ld1.8h {v0}, [x1], #16
+  ld1.8h {v0, v1}, [x1], #32
+  ld1.8h {v0, v1, v2}, [x1], #48
+  ld1.8h {v0, v1, v2, v3}, [x1], #64
+
+  ld1.2s {v0}, [x1], #8
+  ld1.2s {v0, v1}, [x1], #16
+  ld1.2s {v0, v1, v2}, [x1], #24
+  ld1.2s {v0, v1, v2, v3}, [x1], #32
+
+  ld1.4s {v0}, [x1], #16
+  ld1.4s {v0, v1}, [x1], #32
+  ld1.4s {v0, v1, v2}, [x1], #48
+  ld1.4s {v0, v1, v2, v3}, [x1], #64
+
+  ld1.1d {v0}, [x1], #8
+  ld1.1d {v0, v1}, [x1], #16
+  ld1.1d {v0, v1, v2}, [x1], #24
+  ld1.1d {v0, v1, v2, v3}, [x1], #32
+
+  ld1.2d {v0}, [x1], #16
+  ld1.2d {v0, v1}, [x1], #32
+  ld1.2d {v0, v1, v2}, [x1], #48
+  ld1.2d {v0, v1, v2, v3}, [x1], #64
+
+  st1.8b {v0}, [x1], #8
+  st1.8b {v0, v1}, [x1], #16
+  st1.8b {v0, v1, v2}, [x1], #24
+  st1.8b {v0, v1, v2, v3}, [x1], #32
+
+  st1.16b {v0}, [x1], #16
+  st1.16b {v0, v1}, [x1], #32
+  st1.16b {v0, v1, v2}, [x1], #48
+  st1.16b {v0, v1, v2, v3}, [x1], #64
+
+  st1.4h {v0}, [x1], #8
+  st1.4h {v0, v1}, [x1], #16
+  st1.4h {v0, v1, v2}, [x1], #24
+  st1.4h {v0, v1, v2, v3}, [x1], #32
+
+  st1.8h {v0}, [x1], #16
+  st1.8h {v0, v1}, [x1], #32
+  st1.8h {v0, v1, v2}, [x1], #48
+  st1.8h {v0, v1, v2, v3}, [x1], #64
+
+  st1.2s {v0}, [x1], #8
+  st1.2s {v0, v1}, [x1], #16
+  st1.2s {v0, v1, v2}, [x1], #24
+  st1.2s {v0, v1, v2, v3}, [x1], #32
+
+  st1.4s {v0}, [x1], #16
+  st1.4s {v0, v1}, [x1], #32
+  st1.4s {v0, v1, v2}, [x1], #48
+  st1.4s {v0, v1, v2, v3}, [x1], #64
+
+  st1.1d {v0}, [x1], #8
+  st1.1d {v0, v1}, [x1], #16
+  st1.1d {v0, v1, v2}, [x1], #24
+  st1.1d {v0, v1, v2, v3}, [x1], #32
+
+  st1.2d {v0}, [x1], #16
+  st1.2d {v0, v1}, [x1], #32
+  st1.2d {v0, v1, v2}, [x1], #48
+  st1.2d {v0, v1, v2, v3}, [x1], #64
+end;
+
+procedure ld2st2_multiple_post; assembler; nostackframe;
+asm
+  ld2.8b {v0, v1}, [x1], x15
+  ld2.16b {v0, v1}, [x1], x15
+  ld2.4h {v0, v1}, [x1], x15
+  ld2.8h {v0, v1}, [x1], x15
+  ld2.2s {v0, v1}, [x1], x15
+  ld2.4s {v0, v1}, [x1], x15
+  ld2.2d {v0, v1}, [x1], x15
+
+  st2.8b {v0, v1}, [x1], x15
+  st2.16b {v0, v1}, [x1], x15
+  st2.4h {v0, v1}, [x1], x15
+  st2.8h {v0, v1}, [x1], x15
+  st2.2s {v0, v1}, [x1], x15
+  st2.4s {v0, v1}, [x1], x15
+  st2.2d {v0, v1}, [x1], x15
+
+  ld2.8b {v0, v1}, [x1], #16
+  ld2.16b {v0, v1}, [x1], #32
+  ld2.4h {v0, v1}, [x1], #16
+  ld2.8h {v0, v1}, [x1], #32
+  ld2.2s {v0, v1}, [x1], #16
+  ld2.4s {v0, v1}, [x1], #32
+  ld2.2d {v0, v1}, [x1], #32
+
+  st2.8b {v0, v1}, [x1], #16
+  st2.16b {v0, v1}, [x1], #32
+  st2.4h {v0, v1}, [x1], #16
+  st2.8h {v0, v1}, [x1], #32
+  st2.2s {v0, v1}, [x1], #16
+  st2.4s {v0, v1}, [x1], #32
+  st2.2d {v0, v1}, [x1], #32
+end;
+
+procedure ld3st3_multiple_post; assembler; nostackframe;
+asm
+  ld3.8b {v0, v1, v2}, [x1], x15
+  ld3.16b {v0, v1, v2}, [x1], x15
+  ld3.4h {v0, v1, v2}, [x1], x15
+  ld3.8h {v0, v1, v2}, [x1], x15
+  ld3.2s {v0, v1, v2}, [x1], x15
+  ld3.4s {v0, v1, v2}, [x1], x15
+  ld3.2d {v0, v1, v2}, [x1], x15
+
+  st3.8b {v0, v1, v2}, [x1], x15
+  st3.16b {v0, v1, v2}, [x1], x15
+  st3.4h {v0, v1, v2}, [x1], x15
+  st3.8h {v0, v1, v2}, [x1], x15
+  st3.2s {v0, v1, v2}, [x1], x15
+  st3.4s {v0, v1, v2}, [x1], x15
+  st3.2d {v0, v1, v2}, [x1], x15
+
+  ld3.8b {v0, v1, v2}, [x1], #24
+  ld3.16b {v0, v1, v2}, [x1], #48
+  ld3.4h {v0, v1, v2}, [x1], #24
+  ld3.8h {v0, v1, v2}, [x1], #48
+  ld3.2s {v0, v1, v2}, [x1], #24
+  ld3.4s {v0, v1, v2}, [x1], #48
+  ld3.2d {v0, v1, v2}, [x1], #48
+
+  st3.8b {v0, v1, v2}, [x1], #24
+  st3.16b {v0, v1, v2}, [x1], #48
+  st3.4h {v0, v1, v2}, [x1], #24
+  st3.8h {v0, v1, v2}, [x1], #48
+  st3.2s {v0, v1, v2}, [x1], #24
+  st3.4s {v0, v1, v2}, [x1], #48
+  st3.2d {v0, v1, v2}, [x1], #48
+end;
+
+procedure ld4st4_multiple_post; assembler; nostackframe;
+asm
+  ld4.8b {v0, v1, v2, v3}, [x1], x15
+  ld4.16b {v0, v1, v2, v3}, [x1], x15
+  ld4.4h {v0, v1, v2, v3}, [x1], x15
+  ld4.8h {v0, v1, v2, v3}, [x1], x15
+  ld4.2s {v0, v1, v2, v3}, [x1], x15
+  ld4.4s {v0, v1, v2, v3}, [x1], x15
+  ld4.2d {v0, v1, v2, v3}, [x1], x15
+
+  st4.8b {v0, v1, v2, v3}, [x1], x15
+  st4.16b {v0, v1, v2, v3}, [x1], x15
+  st4.4h {v0, v1, v2, v3}, [x1], x15
+  st4.8h {v0, v1, v2, v3}, [x1], x15
+  st4.2s {v0, v1, v2, v3}, [x1], x15
+  st4.4s {v0, v1, v2, v3}, [x1], x15
+  st4.2d {v0, v1, v2, v3}, [x1], x15
+
+  ld4.8b {v0, v1, v2, v3}, [x1], #32
+  ld4.16b {v0, v1, v2, v3}, [x1], #64
+  ld4.4h {v0, v1, v2, v3}, [x1], #32
+  ld4.8h {v0, v1, v2, v3}, [x1], #64
+  ld4.2s {v0, v1, v2, v3}, [x1], #32
+  ld4.4s {v0, v1, v2, v3}, [x1], #64
+  ld4.2d {v0, v1, v2, v3}, [x1], #64
+
+  st4.8b {v0, v1, v2, v3}, [x1], #32
+  st4.16b {v0, v1, v2, v3}, [x1], #64
+  st4.4h {v0, v1, v2, v3}, [x1], #32
+  st4.8h {v0, v1, v2, v3}, [x1], #64
+  st4.2s {v0, v1, v2, v3}, [x1], #32
+  st4.4s {v0, v1, v2, v3}, [x1], #64
+  st4.2d {v0, v1, v2, v3}, [x1], #64
+end;
+
+
+procedure ld1r; assembler; nostackframe;
+asm
+  ld1r.8b {v4}, [x2]
+  ld1r.8b {v4}, [x2], x3
+  ld1r.16b {v4}, [x2]
+  ld1r.16b {v4}, [x2], x3
+  ld1r.4h {v4}, [x2]
+  ld1r.4h {v4}, [x2], x3
+  ld1r.8h {v4}, [x2]
+  ld1r.8h {v4}, [x2], x3
+  ld1r.2s {v4}, [x2]
+  ld1r.2s {v4}, [x2], x3
+  ld1r.4s {v4}, [x2]
+  ld1r.4s {v4}, [x2], x3
+  ld1r.1d {v4}, [x2]
+  ld1r.1d {v4}, [x2], x3
+  ld1r.2d {v4}, [x2]
+  ld1r.2d {v4}, [x2], x3
+
+  ld1r.8b {v4}, [x2], #1
+  ld1r.16b {v4}, [x2], #1
+  ld1r.4h {v4}, [x2], #2
+  ld1r.8h {v4}, [x2], #2
+  ld1r.2s {v4}, [x2], #4
+  ld1r.4s {v4}, [x2], #4
+  ld1r.1d {v4}, [x2], #8
+  ld1r.2d {v4}, [x2], #8
+end;
+
+procedure ld2r; assembler; nostackframe;
+asm
+  ld2r.8b {v4, v5}, [x2]
+  ld2r.8b {v4, v5}, [x2], x3
+  ld2r.16b {v4, v5}, [x2]
+  ld2r.16b {v4, v5}, [x2], x3
+  ld2r.4h {v4, v5}, [x2]
+  ld2r.4h {v4, v5}, [x2], x3
+  ld2r.8h {v4, v5}, [x2]
+  ld2r.8h {v4, v5}, [x2], x3
+  ld2r.2s {v4, v5}, [x2]
+  ld2r.2s {v4, v5}, [x2], x3
+  ld2r.4s {v4, v5}, [x2]
+  ld2r.4s {v4, v5}, [x2], x3
+  ld2r.1d {v4, v5}, [x2]
+  ld2r.1d {v4, v5}, [x2], x3
+  ld2r.2d {v4, v5}, [x2]
+  ld2r.2d {v4, v5}, [x2], x3
+
+  ld2r.8b {v4, v5}, [x2], #2
+  ld2r.16b {v4, v5}, [x2], #2
+  ld2r.4h {v4, v5}, [x2], #4
+  ld2r.8h {v4, v5}, [x2], #4
+  ld2r.2s {v4, v5}, [x2], #8
+  ld2r.4s {v4, v5}, [x2], #8
+  ld2r.1d {v4, v5}, [x2], #16
+  ld2r.2d {v4, v5}, [x2], #16
+end;
+
+procedure ld3r; assembler; nostackframe;
+asm
+  ld3r.8b {v4, v5, v6}, [x2]
+  ld3r.8b {v4, v5, v6}, [x2], x3
+  ld3r.16b {v4, v5, v6}, [x2]
+  ld3r.16b {v4, v5, v6}, [x2], x3
+  ld3r.4h {v4, v5, v6}, [x2]
+  ld3r.4h {v4, v5, v6}, [x2], x3
+  ld3r.8h {v4, v5, v6}, [x2]
+  ld3r.8h {v4, v5, v6}, [x2], x3
+  ld3r.2s {v4, v5, v6}, [x2]
+  ld3r.2s {v4, v5, v6}, [x2], x3
+  ld3r.4s {v4, v5, v6}, [x2]
+  ld3r.4s {v4, v5, v6}, [x2], x3
+  ld3r.1d {v4, v5, v6}, [x2]
+  ld3r.1d {v4, v5, v6}, [x2], x3
+  ld3r.2d {v4, v5, v6}, [x2]
+  ld3r.2d {v4, v5, v6}, [x2], x3
+
+  ld3r.8b {v4, v5, v6}, [x2], #3
+  ld3r.16b {v4, v5, v6}, [x2], #3
+  ld3r.4h {v4, v5, v6}, [x2], #6
+  ld3r.8h {v4, v5, v6}, [x2], #6
+  ld3r.2s {v4, v5, v6}, [x2], #12
+  ld3r.4s {v4, v5, v6}, [x2], #12
+  ld3r.1d {v4, v5, v6}, [x2], #24
+  ld3r.2d {v4, v5, v6}, [x2], #24
+end;
+
+procedure ld4r; assembler; nostackframe;
+asm
+  ld4r.8b {v4, v5, v6, v7}, [x2]
+  ld4r.8b {v4, v5, v6, v7}, [x2], x3
+  ld4r.16b {v4, v5, v6, v7}, [x2]
+  ld4r.16b {v4, v5, v6, v7}, [x2], x3
+  ld4r.4h {v4, v5, v6, v7}, [x2]
+  ld4r.4h {v4, v5, v6, v7}, [x2], x3
+  ld4r.8h {v4, v5, v6, v7}, [x2]
+  ld4r.8h {v4, v5, v6, v7}, [x2], x3
+  ld4r.2s {v4, v5, v6, v7}, [x2]
+  ld4r.2s {v4, v5, v6, v7}, [x2], x3
+  ld4r.4s {v4, v5, v6, v7}, [x2]
+  ld4r.4s {v4, v5, v6, v7}, [x2], x3
+  ld4r.1d {v4, v5, v6, v7}, [x2]
+  ld4r.1d {v4, v5, v6, v7}, [x2], x3
+  ld4r.2d {v4, v5, v6, v7}, [x2]
+  ld4r.2d {v4, v5, v6, v7}, [x2], x3
+
+  ld4r.8b {v4, v5, v6, v7}, [x2], #4
+  ld4r.16b {v5, v6, v7, v8}, [x2], #4
+  ld4r.4h {v6, v7, v8, v9}, [x2], #8
+  ld4r.8h {v1, v2, v3, v4}, [x2], #8
+  ld4r.2s {v2, v3, v4, v5}, [x2], #16
+  ld4r.4s {v3, v4, v5, v6}, [x2], #16
+  ld4r.1d {v0, v1, v2, v3}, [x2], #32
+  ld4r.2d {v4, v5, v6, v7}, [x2], #32
+end;
+
+
+procedure ld1; assembler; nostackframe;
+asm
+  ld1.b {v4}[13], [x3]
+  ld1.h {v4}[2], [x3]
+  ld1.s {v4}[2], [x3]
+  ld1.d {v4}[1], [x3]
+  ld1.b {v4}[13], [x3], x5
+  ld1.h {v4}[2], [x3], x5
+  ld1.s {v4}[2], [x3], x5
+  ld1.d {v4}[1], [x3], x5
+  ld1.b {v4}[13], [x3], #1
+  ld1.h {v4}[2], [x3], #2
+  ld1.s {v4}[2], [x3], #4
+  ld1.d {v4}[1], [x3], #8
+end;
+
+procedure ld2; assembler; nostackframe;
+asm
+  ld2.b {v4, v5}[13], [x3]
+  ld2.h {v4, v5}[2], [x3]
+  ld2.s {v4, v5}[2], [x3]
+  ld2.d {v4, v5}[1], [x3]
+  ld2.b {v4, v5}[13], [x3], x5
+  ld2.h {v4, v5}[2], [x3], x5
+  ld2.s {v4, v5}[2], [x3], x5
+  ld2.d {v4, v5}[1], [x3], x5
+  ld2.b {v4, v5}[13], [x3], #2
+  ld2.h {v4, v5}[2], [x3], #4
+  ld2.s {v4, v5}[2], [x3], #8
+  ld2.d {v4, v5}[1], [x3], #16
+end;
+
+procedure ld3; assembler; nostackframe;
+asm
+  ld3.b {v4, v5, v6}[13], [x3]
+  ld3.h {v4, v5, v6}[2], [x3]
+  ld3.s {v4, v5, v6}[2], [x3]
+  ld3.d {v4, v5, v6}[1], [x3]
+  ld3.b {v4, v5, v6}[13], [x3], x5
+  ld3.h {v4, v5, v6}[2], [x3], x5
+  ld3.s {v4, v5, v6}[2], [x3], x5
+  ld3.d {v4, v5, v6}[1], [x3], x5
+  ld3.b {v4, v5, v6}[13], [x3], #3
+  ld3.h {v4, v5, v6}[2], [x3], #6
+  ld3.s {v4, v5, v6}[2], [x3], #12
+  ld3.d {v4, v5, v6}[1], [x3], #24
+end;
+
+procedure ld4; assembler; nostackframe;
+asm
+  ld4.b {v4, v5, v6, v7}[13], [x3]
+  ld4.h {v4, v5, v6, v7}[2], [x3]
+  ld4.s {v4, v5, v6, v7}[2], [x3]
+  ld4.d {v4, v5, v6, v7}[1], [x3]
+  ld4.b {v4, v5, v6, v7}[13], [x3], x5
+  ld4.h {v4, v5, v6, v7}[2], [x3], x5
+  ld4.s {v4, v5, v6, v7}[2], [x3], x5
+  ld4.d {v4, v5, v6, v7}[1], [x3], x5
+  ld4.b {v4, v5, v6, v7}[13], [x3], #4
+  ld4.h {v4, v5, v6, v7}[2], [x3], #8
+  ld4.s {v4, v5, v6, v7}[2], [x3], #16
+  ld4.d {v4, v5, v6, v7}[1], [x3], #32
+end;
+
+procedure st1; assembler; nostackframe;
+asm
+  st1.b {v4}[13], [x3]
+  st1.h {v4}[2], [x3]
+  st1.s {v4}[2], [x3]
+  st1.d {v4}[1], [x3]
+  st1.b {v4}[13], [x3], x5
+  st1.h {v4}[2], [x3], x5
+  st1.s {v4}[2], [x3], x5
+  st1.d {v4}[1], [x3], x5
+  st1.b {v4}[13], [x3], #1
+  st1.h {v4}[2], [x3], #2
+  st1.s {v4}[2], [x3], #4
+  st1.d {v4}[1], [x3], #8
+end;
+
+procedure st2; assembler; nostackframe;
+asm
+  st2.b {v4, v5}[13], [x3]
+  st2.h {v4, v5}[2], [x3]
+  st2.s {v4, v5}[2], [x3]
+  st2.d {v4, v5}[1], [x3]
+  st2.b {v4, v5}[13], [x3], x5
+  st2.h {v4, v5}[2], [x3], x5
+  st2.s {v4, v5}[2], [x3], x5
+  st2.d {v4, v5}[1], [x3], x5
+  st2.b {v4, v5}[13], [x3], #2
+  st2.h {v4, v5}[2], [x3], #4
+  st2.s {v4, v5}[2], [x3], #8
+  st2.d {v4, v5}[1], [x3], #16
+end;
+
+procedure st3; assembler; nostackframe;
+asm
+  st3.b {v4, v5, v6}[13], [x3]
+  st3.h {v4, v5, v6}[2], [x3]
+  st3.s {v4, v5, v6}[2], [x3]
+  st3.d {v4, v5, v6}[1], [x3]
+  st3.b {v4, v5, v6}[13], [x3], x5
+  st3.h {v4, v5, v6}[2], [x3], x5
+  st3.s {v4, v5, v6}[2], [x3], x5
+  st3.d {v4, v5, v6}[1], [x3], x5
+  st3.b {v4, v5, v6}[13], [x3], #3
+  st3.h {v4, v5, v6}[2], [x3], #6
+  st3.s {v4, v5, v6}[2], [x3], #12
+  st3.d {v4, v5, v6}[1], [x3], #24
+end;
+
+procedure st4; assembler; nostackframe;
+asm
+  st4.b {v4, v5, v6, v7}[13], [x3]
+  st4.h {v4, v5, v6, v7}[2], [x3]
+  st4.s {v4, v5, v6, v7}[2], [x3]
+  st4.d {v4, v5, v6, v7}[1], [x3]
+  st4.b {v4, v5, v6, v7}[13], [x3], x5
+  st4.h {v4, v5, v6, v7}[2], [x3], x5
+  st4.s {v4, v5, v6, v7}[2], [x3], x5
+  st4.d {v4, v5, v6, v7}[1], [x3], x5
+  st4.b {v4, v5, v6, v7}[13], [x3], #4
+  st4.h {v4, v5, v6, v7}[2], [x3], #8
+  st4.s {v4, v5, v6, v7}[2], [x3], #16
+  st4.d {v4, v5, v6, v7}[1], [x3], #32
+end;
+
+
+//---------
+// ARM verbose syntax equivalents to the above.
+//---------
+procedure verbose_syntax; assembler; nostackframe;
+asm
+  ld1 { v1.8b }, [x1]
+  ld1 { v2.8b, v3.8b }, [x1]
+  ld1 { v3.8b, v4.8b, v5.8b }, [x1]
+  ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1]
+
+  ld1 { v1.16b }, [x1]
+  ld1 { v2.16b, v3.16b }, [x1]
+  ld1 { v3.16b, v4.16b, v5.16b }, [x1]
+  ld1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1]
+
+  ld1 { v1.4h }, [x1]
+  ld1 { v2.4h, v3.4h }, [x1]
+  ld1 { v3.4h, v4.4h, v5.4h }, [x1]
+  ld1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1]
+
+  ld1 { v1.8h }, [x1]
+  ld1 { v2.8h, v3.8h }, [x1]
+  ld1 { v3.8h, v4.8h, v5.8h }, [x1]
+  ld1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1]
+
+  ld1 { v1.2s }, [x1]
+  ld1 { v2.2s, v3.2s }, [x1]
+  ld1 { v3.2s, v4.2s, v5.2s }, [x1]
+  ld1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1]
+
+  ld1 { v1.4s }, [x1]
+  ld1 { v2.4s, v3.4s }, [x1]
+  ld1 { v3.4s, v4.4s, v5.4s }, [x1]
+  ld1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1]
+
+  ld1 { v1.1d }, [x1]
+  ld1 { v2.1d, v3.1d }, [x1]
+  ld1 { v3.1d, v4.1d, v5.1d }, [x1]
+  ld1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1]
+
+  ld1 { v1.2d }, [x1]
+  ld1 { v2.2d, v3.2d }, [x1]
+  ld1 { v3.2d, v4.2d, v5.2d }, [x1]
+  ld1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1]
+
+  st1 { v1.8b }, [x1]
+  st1 { v2.8b, v3.8b }, [x1]
+  st1 { v3.8b, v4.8b, v5.8b }, [x1]
+  st1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1]
+
+  st1 { v1.16b }, [x1]
+  st1 { v2.16b, v3.16b }, [x1]
+  st1 { v3.16b, v4.16b, v5.16b }, [x1]
+  st1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1]
+
+  st1 { v1.4h }, [x1]
+  st1 { v2.4h, v3.4h }, [x1]
+  st1 { v3.4h, v4.4h, v5.4h }, [x1]
+  st1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1]
+
+  st1 { v1.8h }, [x1]
+  st1 { v2.8h, v3.8h }, [x1]
+  st1 { v3.8h, v4.8h, v5.8h }, [x1]
+  st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1]
+
+  st1 { v1.2s }, [x1]
+  st1 { v2.2s, v3.2s }, [x1]
+  st1 { v3.2s, v4.2s, v5.2s }, [x1]
+  st1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1]
+
+  st1 { v1.4s }, [x1]
+  st1 { v2.4s, v3.4s }, [x1]
+  st1 { v3.4s, v4.4s, v5.4s }, [x1]
+  st1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1]
+
+  st1 { v1.1d }, [x1]
+  st1 { v2.1d, v3.1d }, [x1]
+  st1 { v3.1d, v4.1d, v5.1d }, [x1]
+  st1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1]
+
+  st1 { v1.2d }, [x1]
+  st1 { v2.2d, v3.2d }, [x1]
+  st1 { v3.2d, v4.2d, v5.2d }, [x1]
+  st1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1]
+
+  ld2 { v3.8b, v4.8b }, [x19]
+  ld2 { v3.16b, v4.16b }, [x19]
+  ld2 { v3.4h, v4.4h }, [x19]
+  ld2 { v3.8h, v4.8h }, [x19]
+  ld2 { v3.2s, v4.2s }, [x19]
+  ld2 { v3.4s, v4.4s }, [x19]
+  ld2 { v3.2d, v4.2d }, [x19]
+
+  st2 { v3.8b, v4.8b }, [x19]
+  st2 { v3.16b, v4.16b }, [x19]
+  st2 { v3.4h, v4.4h }, [x19]
+  st2 { v3.8h, v4.8h }, [x19]
+  st2 { v3.2s, v4.2s }, [x19]
+  st2 { v3.4s, v4.4s }, [x19]
+  st2 { v3.2d, v4.2d }, [x19]
+
+  ld3 { v2.8b, v3.8b, v4.8b }, [x19]
+  ld3 { v2.16b, v3.16b, v4.16b }, [x19]
+  ld3 { v2.4h, v3.4h, v4.4h }, [x19]
+  ld3 { v2.8h, v3.8h, v4.8h }, [x19]
+  ld3 { v2.2s, v3.2s, v4.2s }, [x19]
+  ld3 { v2.4s, v3.4s, v4.4s }, [x19]
+  ld3 { v2.2d, v3.2d, v4.2d }, [x19]
+
+  st3 { v2.8b, v3.8b, v4.8b }, [x19]
+  st3 { v2.16b, v3.16b, v4.16b }, [x19]
+  st3 { v2.4h, v3.4h, v4.4h }, [x19]
+  st3 { v2.8h, v3.8h, v4.8h }, [x19]
+  st3 { v2.2s, v3.2s, v4.2s }, [x19]
+  st3 { v2.4s, v3.4s, v4.4s }, [x19]
+  st3 { v2.2d, v3.2d, v4.2d }, [x19]
+
+  ld4 { v2.8b, v3.8b, v4.8b, v5.8b }, [x19]
+  ld4 { v2.16b, v3.16b, v4.16b, v5.16b }, [x19]
+  ld4 { v2.4h, v3.4h, v4.4h, v5.4h }, [x19]
+  ld4 { v2.8h, v3.8h, v4.8h, v5.8h }, [x19]
+  ld4 { v2.2s, v3.2s, v4.2s, v5.2s }, [x19]
+  ld4 { v2.4s, v3.4s, v4.4s, v5.4s }, [x19]
+  ld4 { v2.2d, v3.2d, v4.2d, v5.2d }, [x19]
+
+  st4 { v2.8b, v3.8b, v4.8b, v5.8b }, [x19]
+  st4 { v2.16b, v3.16b, v4.16b, v5.16b }, [x19]
+  st4 { v2.4h, v3.4h, v4.4h, v5.4h }, [x19]
+  st4 { v2.8h, v3.8h, v4.8h, v5.8h }, [x19]
+  st4 { v2.2s, v3.2s, v4.2s, v5.2s }, [x19]
+  st4 { v2.4s, v3.4s, v4.4s, v5.4s }, [x19]
+  st4 { v2.2d, v3.2d, v4.2d, v5.2d }, [x19]
+
+  ld1 { v1.8b }, [x1], x15
+  ld1 { v2.8b, v3.8b }, [x1], x15
+  ld1 { v3.8b, v4.8b, v5.8b }, [x1], x15
+  ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15
+
+  ld1 { v1.16b }, [x1], x15
+  ld1 { v2.16b, v3.16b }, [x1], x15
+  ld1 { v3.16b, v4.16b, v5.16b }, [x1], x15
+  ld1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15
+
+  ld1 { v1.4h }, [x1], x15
+  ld1 { v2.4h, v3.4h }, [x1], x15
+  ld1 { v3.4h, v4.4h, v5.4h }, [x1], x15
+  ld1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15
+
+  ld1 { v1.8h }, [x1], x15
+  ld1 { v2.8h, v3.8h }, [x1], x15
+  ld1 { v3.8h, v4.8h, v5.8h }, [x1], x15
+  ld1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15
+
+  ld1 { v1.2s }, [x1], x15
+  ld1 { v2.2s, v3.2s }, [x1], x15
+  ld1 { v3.2s, v4.2s, v5.2s }, [x1], x15
+  ld1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15
+
+  ld1 { v1.4s }, [x1], x15
+  ld1 { v2.4s, v3.4s }, [x1], x15
+  ld1 { v3.4s, v4.4s, v5.4s }, [x1], x15
+  ld1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15
+
+  ld1 { v1.1d }, [x1], x15
+  ld1 { v2.1d, v3.1d }, [x1], x15
+  ld1 { v3.1d, v4.1d, v5.1d }, [x1], x15
+  ld1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], x15
+
+  ld1 { v1.2d }, [x1], x15
+  ld1 { v2.2d, v3.2d }, [x1], x15
+  ld1 { v3.2d, v4.2d, v5.2d }, [x1], x15
+  ld1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15
+
+  st1 { v1.8b }, [x1], x15
+  st1 { v2.8b, v3.8b }, [x1], x15
+  st1 { v3.8b, v4.8b, v5.8b }, [x1], x15
+  st1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15
+
+  st1 { v1.16b }, [x1], x15
+  st1 { v2.16b, v3.16b }, [x1], x15
+  st1 { v3.16b, v4.16b, v5.16b }, [x1], x15
+  st1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15
+
+  st1 { v1.4h }, [x1], x15
+  st1 { v2.4h, v3.4h }, [x1], x15
+  st1 { v3.4h, v4.4h, v5.4h }, [x1], x15
+  st1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15
+
+  st1 { v1.8h }, [x1], x15
+  st1 { v2.8h, v3.8h }, [x1], x15
+  st1 { v3.8h, v4.8h, v5.8h }, [x1], x15
+  st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15
+
+  st1 { v1.2s }, [x1], x15
+  st1 { v2.2s, v3.2s }, [x1], x15
+  st1 { v3.2s, v4.2s, v5.2s }, [x1], x15
+  st1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15
+
+  st1 { v1.4s }, [x1], x15
+  st1 { v2.4s, v3.4s }, [x1], x15
+  st1 { v3.4s, v4.4s, v5.4s }, [x1], x15
+  st1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15
+
+  st1 { v1.1d }, [x1], x15
+  st1 { v2.1d, v3.1d }, [x1], x15
+  st1 { v3.1d, v4.1d, v5.1d }, [x1], x15
+  st1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], x15
+
+  st1 { v1.2d }, [x1], x15
+  st1 { v2.2d, v3.2d }, [x1], x15
+  st1 { v3.2d, v4.2d, v5.2d }, [x1], x15
+  st1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15
+
+  ld1 { v1.8b }, [x1], #8
+  ld1 { v2.8b, v3.8b }, [x1], #16
+  ld1 { v3.8b, v4.8b, v5.8b }, [x1], #24
+  ld1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32
+
+  ld1 { v1.16b }, [x1], #16
+  ld1 { v2.16b, v3.16b }, [x1], #32
+  ld1 { v3.16b, v4.16b, v5.16b }, [x1], #48
+  ld1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64
+
+  ld1 { v1.4h }, [x1], #8
+  ld1 { v2.4h, v3.4h }, [x1], #16
+  ld1 { v3.4h, v4.4h, v5.4h }, [x1], #24
+  ld1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32
+
+  ld1 { v1.8h }, [x1], #16
+  ld1 { v2.8h, v3.8h }, [x1], #32
+  ld1 { v3.8h, v4.8h, v5.8h }, [x1], #48
+  ld1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64
+
+  ld1 { v1.2s }, [x1], #8
+  ld1 { v2.2s, v3.2s }, [x1], #16
+  ld1 { v3.2s, v4.2s, v5.2s }, [x1], #24
+  ld1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32
+
+  ld1 { v1.4s }, [x1], #16
+  ld1 { v2.4s, v3.4s }, [x1], #32
+  ld1 { v3.4s, v4.4s, v5.4s }, [x1], #48
+  ld1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64
+
+  ld1 { v1.1d }, [x1], #8
+  ld1 { v2.1d, v3.1d }, [x1], #16
+  ld1 { v3.1d, v4.1d, v5.1d }, [x1], #24
+  ld1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], #32
+
+  ld1 { v1.2d }, [x1], #16
+  ld1 { v2.2d, v3.2d }, [x1], #32
+  ld1 { v3.2d, v4.2d, v5.2d }, [x1], #48
+  ld1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64
+
+  st1 { v1.8b }, [x1], #8
+  st1 { v2.8b, v3.8b }, [x1], #16
+  st1 { v3.8b, v4.8b, v5.8b }, [x1], #24
+  st1 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32
+
+  st1 { v1.16b }, [x1], #16
+  st1 { v2.16b, v3.16b }, [x1], #32
+  st1 { v3.16b, v4.16b, v5.16b }, [x1], #48
+  st1 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64
+
+  st1 { v1.4h }, [x1], #8
+  st1 { v2.4h, v3.4h }, [x1], #16
+  st1 { v3.4h, v4.4h, v5.4h }, [x1], #24
+  st1 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32
+
+  st1 { v1.8h }, [x1], #16
+  st1 { v2.8h, v3.8h }, [x1], #32
+  st1 { v3.8h, v4.8h, v5.8h }, [x1], #48
+  st1 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64
+
+  st1 { v1.2s }, [x1], #8
+  st1 { v2.2s, v3.2s }, [x1], #16
+  st1 { v3.2s, v4.2s, v5.2s }, [x1], #24
+  st1 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32
+
+  st1 { v1.4s }, [x1], #16
+  st1 { v2.4s, v3.4s }, [x1], #32
+  st1 { v3.4s, v4.4s, v5.4s }, [x1], #48
+  st1 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64
+
+  st1 { v1.1d }, [x1], #8
+  st1 { v2.1d, v3.1d }, [x1], #16
+  st1 { v3.1d, v4.1d, v5.1d }, [x1], #24
+  st1 { v7.1d, v8.1d, v9.1d, v10.1d }, [x1], #32
+
+  st1 { v1.2d }, [x1], #16
+  st1 { v2.2d, v3.2d }, [x1], #32
+  st1 { v3.2d, v4.2d, v5.2d }, [x1], #48
+  st1 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64
+
+  ld2 { v2.8b, v3.8b }, [x1], x15
+  ld2 { v2.16b, v3.16b }, [x1], x15
+  ld2 { v2.4h, v3.4h }, [x1], x15
+  ld2 { v2.8h, v3.8h }, [x1], x15
+  ld2 { v2.2s, v3.2s }, [x1], x15
+  ld2 { v2.4s, v3.4s }, [x1], x15
+  ld2 { v2.2d, v3.2d }, [x1], x15
+
+  st2 { v2.8b, v3.8b }, [x1], x15
+  st2 { v2.16b, v3.16b }, [x1], x15
+  st2 { v2.4h, v3.4h }, [x1], x15
+  st2 { v2.8h, v3.8h }, [x1], x15
+  st2 { v2.2s, v3.2s }, [x1], x15
+  st2 { v2.4s, v3.4s }, [x1], x15
+  st2 { v2.2d, v3.2d }, [x1], x15
+
+  ld2 { v2.8b, v3.8b }, [x1], #16
+  ld2 { v2.16b, v3.16b }, [x1], #32
+  ld2 { v2.4h, v3.4h }, [x1], #16
+  ld2 { v2.8h, v3.8h }, [x1], #32
+  ld2 { v2.2s, v3.2s }, [x1], #16
+  ld2 { v2.4s, v3.4s }, [x1], #32
+  ld2 { v2.2d, v3.2d }, [x1], #32
+
+  st2 { v2.8b, v3.8b }, [x1], #16
+  st2 { v2.16b, v3.16b }, [x1], #32
+  st2 { v2.4h, v3.4h }, [x1], #16
+  st2 { v2.8h, v3.8h }, [x1], #32
+  st2 { v2.2s, v3.2s }, [x1], #16
+  st2 { v2.4s, v3.4s }, [x1], #32
+  st2 { v2.2d, v3.2d }, [x1], #32
+
+  ld3 { v3.8b, v4.8b, v5.8b }, [x1], x15
+  ld3 { v3.16b, v4.16b, v5.16b }, [x1], x15
+  ld3 { v3.4h, v4.4h, v5.4h }, [x1], x15
+  ld3 { v3.8h, v4.8h, v5.8h }, [x1], x15
+  ld3 { v3.2s, v4.2s, v5.2s }, [x1], x15
+  ld3 { v3.4s, v4.4s, v5.4s }, [x1], x15
+  ld3 { v3.2d, v4.2d, v5.2d }, [x1], x15
+
+  st3 { v3.8b, v4.8b, v5.8b }, [x1], x15
+  st3 { v3.16b, v4.16b, v5.16b }, [x1], x15
+  st3 { v3.4h, v4.4h, v5.4h }, [x1], x15
+  st3 { v3.8h, v4.8h, v5.8h }, [x1], x15
+  st3 { v3.2s, v4.2s, v5.2s }, [x1], x15
+  st3 { v3.4s, v4.4s, v5.4s }, [x1], x15
+  st3 { v3.2d, v4.2d, v5.2d }, [x1], x15
+  ld3 { v3.8b, v4.8b, v5.8b }, [x1], #24
+
+  ld3 { v3.16b, v4.16b, v5.16b }, [x1], #48
+  ld3 { v3.4h, v4.4h, v5.4h }, [x1], #24
+  ld3 { v3.8h, v4.8h, v5.8h }, [x1], #48
+  ld3 { v3.2s, v4.2s, v5.2s }, [x1], #24
+  ld3 { v3.4s, v4.4s, v5.4s }, [x1], #48
+  ld3 { v3.2d, v4.2d, v5.2d }, [x1], #48
+
+  st3 { v3.8b, v4.8b, v5.8b }, [x1], #24
+  st3 { v3.16b, v4.16b, v5.16b }, [x1], #48
+  st3 { v3.4h, v4.4h, v5.4h }, [x1], #24
+  st3 { v3.8h, v4.8h, v5.8h }, [x1], #48
+  st3 { v3.2s, v4.2s, v5.2s }, [x1], #24
+  st3 { v3.4s, v4.4s, v5.4s }, [x1], #48
+  st3 { v3.2d, v4.2d, v5.2d }, [x1], #48
+
+  ld4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15
+  ld4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15
+  ld4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15
+  ld4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15
+  ld4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15
+  ld4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15
+  ld4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15
+
+  st4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], x15
+  st4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], x15
+  st4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], x15
+  st4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], x15
+  st4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], x15
+  st4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], x15
+  st4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], x15
+
+  ld4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32
+  ld4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64
+  ld4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32
+  ld4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64
+  ld4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32
+  ld4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64
+  ld4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64
+
+  st4 { v4.8b, v5.8b, v6.8b, v7.8b }, [x1], #32
+  st4 { v4.16b, v5.16b, v6.16b, v7.16b }, [x1], #64
+  st4 { v7.4h, v8.4h, v9.4h, v10.4h }, [x1], #32
+  st4 { v7.8h, v8.8h, v9.8h, v10.8h }, [x1], #64
+  st4 { v7.2s, v8.2s, v9.2s, v10.2s }, [x1], #32
+  st4 { v7.4s, v8.4s, v9.4s, v10.4s }, [x1], #64
+  st4 { v7.2d, v8.2d, v9.2d, v10.2d }, [x1], #64
+
+
+  ld1r { v12.8b }, [x2]
+  ld1r { v12.8b }, [x2], x3
+  ld1r { v12.16b }, [x2]
+  ld1r { v12.16b }, [x2], x3
+  ld1r { v12.4h }, [x2]
+  ld1r { v12.4h }, [x2], x3
+  ld1r { v12.8h }, [x2]
+  ld1r { v12.8h }, [x2], x3
+  ld1r { v12.2s }, [x2]
+  ld1r { v12.2s }, [x2], x3
+  ld1r { v12.4s }, [x2]
+  ld1r { v12.4s }, [x2], x3
+  ld1r { v12.1d }, [x2]
+  ld1r { v12.1d }, [x2], x3
+  ld1r { v12.2d }, [x2]
+  ld1r { v12.2d }, [x2], x3
+
+  ld1r { v12.8b }, [x2], #1
+  ld1r { v12.16b }, [x2], #1
+  ld1r { v12.4h }, [x2], #2
+  ld1r { v12.8h }, [x2], #2
+  ld1r { v12.2s }, [x2], #4
+  ld1r { v12.4s }, [x2], #4
+  ld1r { v12.1d }, [x2], #8
+  ld1r { v12.2d }, [x2], #8
+  ld2r { v3.8b, v4.8b }, [x2]
+  ld2r { v3.8b, v4.8b }, [x2], x3
+  ld2r { v3.16b, v4.16b }, [x2]
+  ld2r { v3.16b, v4.16b }, [x2], x3
+  ld2r { v3.4h, v4.4h }, [x2]
+  ld2r { v3.4h, v4.4h }, [x2], x3
+  ld2r { v3.8h, v4.8h }, [x2]
+  ld2r { v3.8h, v4.8h }, [x2], x3
+  ld2r { v3.2s, v4.2s }, [x2]
+  ld2r { v3.2s, v4.2s }, [x2], x3
+  ld2r { v3.4s, v4.4s }, [x2]
+  ld2r { v3.4s, v4.4s }, [x2], x3
+  ld2r { v3.1d, v4.1d }, [x2]
+  ld2r { v3.1d, v4.1d }, [x2], x3
+  ld2r { v3.2d, v4.2d }, [x2]
+  ld2r { v3.2d, v4.2d }, [x2], x3
+
+  ld2r { v3.8b, v4.8b }, [x2], #2
+  ld2r { v3.16b, v4.16b }, [x2], #2
+  ld2r { v3.4h, v4.4h }, [x2], #4
+  ld2r { v3.8h, v4.8h }, [x2], #4
+  ld2r { v3.2s, v4.2s }, [x2], #8
+  ld2r { v3.4s, v4.4s }, [x2], #8
+  ld2r { v3.1d, v4.1d }, [x2], #16
+  ld2r { v3.2d, v4.2d }, [x2], #16
+
+  ld3r { v2.8b, v3.8b, v4.8b }, [x2]
+  ld3r { v2.8b, v3.8b, v4.8b }, [x2], x3
+  ld3r { v2.16b, v3.16b, v4.16b }, [x2]
+  ld3r { v2.16b, v3.16b, v4.16b }, [x2], x3
+  ld3r { v2.4h, v3.4h, v4.4h }, [x2]
+  ld3r { v2.4h, v3.4h, v4.4h }, [x2], x3
+  ld3r { v2.8h, v3.8h, v4.8h }, [x2]
+  ld3r { v2.8h, v3.8h, v4.8h }, [x2], x3
+  ld3r { v2.2s, v3.2s, v4.2s }, [x2]
+  ld3r { v2.2s, v3.2s, v4.2s }, [x2], x3
+  ld3r { v2.4s, v3.4s, v4.4s }, [x2]
+  ld3r { v2.4s, v3.4s, v4.4s }, [x2], x3
+  ld3r { v2.1d, v3.1d, v4.1d }, [x2]
+  ld3r { v2.1d, v3.1d, v4.1d }, [x2], x3
+  ld3r { v2.2d, v3.2d, v4.2d }, [x2]
+  ld3r { v2.2d, v3.2d, v4.2d }, [x2], x3
+
+  ld3r { v2.8b, v3.8b, v4.8b }, [x2], #3
+  ld3r { v2.16b, v3.16b, v4.16b }, [x2], #3
+  ld3r { v2.4h, v3.4h, v4.4h }, [x2], #6
+  ld3r { v2.8h, v3.8h, v4.8h }, [x2], #6
+  ld3r { v2.2s, v3.2s, v4.2s }, [x2], #12
+  ld3r { v2.4s, v3.4s, v4.4s }, [x2], #12
+  ld3r { v2.1d, v3.1d, v4.1d }, [x2], #24
+  ld3r { v2.2d, v3.2d, v4.2d }, [x2], #24
+
+  ld4r { v2.8b, v3.8b, v4.8b, v5.8b }, [x2]
+  ld4r { v2.8b, v3.8b, v4.8b, v5.8b }, [x2], x3
+  ld4r { v2.16b, v3.16b, v4.16b, v5.16b }, [x2]
+  ld4r { v2.16b, v3.16b, v4.16b, v5.16b }, [x2], x3
+  ld4r { v2.4h, v3.4h, v4.4h, v5.4h }, [x2]
+  ld4r { v2.4h, v3.4h, v4.4h, v5.4h }, [x2], x3
+  ld4r { v2.8h, v3.8h, v4.8h, v5.8h }, [x2]
+  ld4r { v2.8h, v3.8h, v4.8h, v5.8h }, [x2], x3
+  ld4r { v2.2s, v3.2s, v4.2s, v5.2s }, [x2]
+  ld4r { v2.2s, v3.2s, v4.2s, v5.2s }, [x2], x3
+  ld4r { v2.4s, v3.4s, v4.4s, v5.4s }, [x2]
+  ld4r { v2.4s, v3.4s, v4.4s, v5.4s }, [x2], x3
+  ld4r { v2.1d, v3.1d, v4.1d, v5.1d }, [x2]
+  ld4r { v2.1d, v3.1d, v4.1d, v5.1d }, [x2], x3
+  ld4r { v2.2d, v3.2d, v4.2d, v5.2d }, [x2]
+  ld4r { v2.2d, v3.2d, v4.2d, v5.2d }, [x2], x3
+
+  ld4r { v2.8b, v3.8b, v4.8b, v5.8b }, [x2], #4
+  ld4r { v2.16b, v3.16b, v4.16b, v5.16b }, [x2], #4
+  ld4r { v2.4h, v3.4h, v4.4h, v5.4h }, [x2], #8
+  ld4r { v2.8h, v3.8h, v4.8h, v5.8h }, [x2], #8
+  ld4r { v2.2s, v3.2s, v4.2s, v5.2s }, [x2], #16
+  ld4r { v2.4s, v3.4s, v4.4s, v5.4s }, [x2], #16
+  ld4r { v2.1d, v3.1d, v4.1d, v5.1d }, [x2], #32
+  ld4r { v2.2d, v3.2d, v4.2d, v5.2d }, [x2], #32
+
+  ld1 { v6.b }[13], [x3]
+  ld1 { v6.h }[2], [x3]
+  ld1 { v6.s }[2], [x3]
+  ld1 { v6.d }[1], [x3]
+  ld1 { v6.b }[13], [x3], x5
+  ld1 { v6.h }[2], [x3], x5
+  ld1 { v6.s }[2], [x3], x5
+  ld1 { v6.d }[1], [x3], x5
+  ld1 { v6.b }[13], [x3], #1
+  ld1 { v6.h }[2], [x3], #2
+  ld1 { v6.s }[2], [x3], #4
+  ld1 { v6.d }[1], [x3], #8
+
+  ld2 { v5.b, v6.b }[13], [x3]
+  ld2 { v5.h, v6.h }[2], [x3]
+  ld2 { v5.s, v6.s }[2], [x3]
+  ld2 { v5.d, v6.d }[1], [x3]
+  ld2 { v5.b, v6.b }[13], [x3], x5
+  ld2 { v5.h, v6.h }[2], [x3], x5
+  ld2 { v5.s, v6.s }[2], [x3], x5
+  ld2 { v5.d, v6.d }[1], [x3], x5
+  ld2 { v5.b, v6.b }[13], [x3], #2
+  ld2 { v5.h, v6.h }[2], [x3], #4
+  ld2 { v5.s, v6.s }[2], [x3], #8
+  ld2 { v5.d, v6.d }[1], [x3], #16
+
+  ld3 { v7.b, v8.b, v9.b }[13], [x3]
+  ld3 { v7.h, v8.h, v9.h }[2], [x3]
+  ld3 { v7.s, v8.s, v9.s }[2], [x3]
+  ld3 { v7.d, v8.d, v9.d }[1], [x3]
+  ld3 { v7.b, v8.b, v9.b }[13], [x3], x5
+  ld3 { v7.h, v8.h, v9.h }[2], [x3], x5
+  ld3 { v7.s, v8.s, v9.s }[2], [x3], x5
+  ld3 { v7.d, v8.d, v9.d }[1], [x3], x5
+  ld3 { v7.b, v8.b, v9.b }[13], [x3], #3
+  ld3 { v7.h, v8.h, v9.h }[2], [x3], #6
+  ld3 { v7.s, v8.s, v9.s }[2], [x3], #12
+  ld3 { v7.d, v8.d, v9.d }[1], [x3], #24
+
+  ld4 { v7.b, v8.b, v9.b, v10.b }[13], [x3]
+  ld4 { v7.h, v8.h, v9.h, v10.h }[2], [x3]
+  ld4 { v7.s, v8.s, v9.s, v10.s }[2], [x3]
+  ld4 { v7.d, v8.d, v9.d, v10.d }[1], [x3]
+  ld4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], x5
+  ld4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], x5
+  ld4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], x5
+  ld4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], x5
+  ld4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], #4
+  ld4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], #8
+  ld4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], #16
+  ld4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], #32
+
+  st1 { v6.b }[13], [x3]
+  st1 { v6.h }[2], [x3]
+  st1 { v6.s }[2], [x3]
+  st1 { v6.d }[1], [x3]
+  st1 { v6.b }[13], [x3], x5
+  st1 { v6.h }[2], [x3], x5
+  st1 { v6.s }[2], [x3], x5
+  st1 { v6.d }[1], [x3], x5
+  st1 { v6.b }[13], [x3], #1
+  st1 { v6.h }[2], [x3], #2
+  st1 { v6.s }[2], [x3], #4
+  st1 { v6.d }[1], [x3], #8
+
+
+  st2 { v5.b, v6.b }[13], [x3]
+  st2 { v5.h, v6.h }[2], [x3]
+  st2 { v5.s, v6.s }[2], [x3]
+  st2 { v5.d, v6.d }[1], [x3]
+  st2 { v5.b, v6.b }[13], [x3], x5
+  st2 { v5.h, v6.h }[2], [x3], x5
+  st2 { v5.s, v6.s }[2], [x3], x5
+  st2 { v5.d, v6.d }[1], [x3], x5
+  st2 { v5.b, v6.b }[13], [x3], #2
+  st2 { v5.h, v6.h }[2], [x3], #4
+  st2 { v5.s, v6.s }[2], [x3], #8
+  st2 { v5.d, v6.d }[1], [x3], #16
+
+  st3 { v7.b, v8.b, v9.b }[13], [x3]
+  st3 { v7.h, v8.h, v9.h }[2], [x3]
+  st3 { v7.s, v8.s, v9.s }[2], [x3]
+  st3 { v7.d, v8.d, v9.d }[1], [x3]
+  st3 { v7.b, v8.b, v9.b }[13], [x3], x5
+  st3 { v7.h, v8.h, v9.h }[2], [x3], x5
+  st3 { v7.s, v8.s, v9.s }[2], [x3], x5
+  st3 { v7.d, v8.d, v9.d }[1], [x3], x5
+  st3 { v7.b, v8.b, v9.b }[13], [x3], #3
+  st3 { v7.h, v8.h, v9.h }[2], [x3], #6
+  st3 { v7.s, v8.s, v9.s }[2], [x3], #12
+  st3 { v7.d, v8.d, v9.d }[1], [x3], #24
+
+  st4 { v7.b, v8.b, v9.b, v10.b }[13], [x3]
+  st4 { v7.h, v8.h, v9.h, v10.h }[2], [x3]
+  st4 { v7.s, v8.s, v9.s, v10.s }[2], [x3]
+  st4 { v7.d, v8.d, v9.d, v10.d }[1], [x3]
+  st4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], x5
+  st4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], x5
+  st4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], x5
+  st4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], x5
+  st4 { v7.b, v8.b, v9.b, v10.b }[13], [x3], #4
+  st4 { v7.h, v8.h, v9.h, v10.h }[2], [x3], #8
+  st4 { v7.s, v8.s, v9.s, v10.s }[2], [x3], #16
+  st4 { v7.d, v8.d, v9.d, v10.d }[1], [x3], #32
+end;
+
+{$j-}
+const
+  ld1st1_multiple_data: array[1..72] of tinstrdata = (
+    (bytes: ($20,$70,$40,$0c); str: 'ld1.8b	{ v0 }, [x1]'),
+    (bytes: ($20,$a0,$40,$0c); str: 'ld1.8b	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$60,$40,$0c); str: 'ld1.8b	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$20,$40,$0c); str: 'ld1.8b	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($23,$70,$40,$0c); str: 'ld1.8b { v3 }, [x1]'),
+    (bytes: ($43,$a0,$40,$0c); str: 'ld1.8b { v3, v4 }, [x2]'),
+    (bytes: ($64,$60,$40,$0c); str: 'ld1.8b { v4, v5, v6 }, [x3]'),
+    (bytes: ($87,$20,$40,$0c); str: 'ld1.8b { v7, v8, v9, v10 }, [x4]'),
+    (bytes: ($20,$70,$40,$4c); str: 'ld1.16b	{ v0 }, [x1]'),
+    (bytes: ($20,$a0,$40,$4c); str: 'ld1.16b	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$60,$40,$4c); str: 'ld1.16b	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$20,$40,$4c); str: 'ld1.16b	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$74,$40,$0c); str: 'ld1.4h	{ v0 }, [x1]'),
+    (bytes: ($20,$a4,$40,$0c); str: 'ld1.4h	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$64,$40,$0c); str: 'ld1.4h	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$24,$40,$0c); str: 'ld1.4h	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$74,$40,$4c); str: 'ld1.8h	{ v0 }, [x1]'),
+    (bytes: ($20,$a4,$40,$4c); str: 'ld1.8h	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$64,$40,$4c); str: 'ld1.8h	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$24,$40,$4c); str: 'ld1.8h	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$78,$40,$0c); str: 'ld1.2s	{ v0 }, [x1]'),
+    (bytes: ($20,$a8,$40,$0c); str: 'ld1.2s	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$68,$40,$0c); str: 'ld1.2s	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$28,$40,$0c); str: 'ld1.2s	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$78,$40,$4c); str: 'ld1.4s	{ v0 }, [x1]'),
+    (bytes: ($20,$a8,$40,$4c); str: 'ld1.4s	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$68,$40,$4c); str: 'ld1.4s	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$28,$40,$4c); str: 'ld1.4s	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$7c,$40,$0c); str: 'ld1.1d	{ v0 }, [x1]'),
+    (bytes: ($20,$ac,$40,$0c); str: 'ld1.1d	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$6c,$40,$0c); str: 'ld1.1d	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$2c,$40,$0c); str: 'ld1.1d	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$7c,$40,$4c); str: 'ld1.2d	{ v0 }, [x1]'),
+    (bytes: ($20,$ac,$40,$4c); str: 'ld1.2d	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$6c,$40,$4c); str: 'ld1.2d	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$2c,$40,$4c); str: 'ld1.2d	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$70,$00,$0c); str: 'st1.8b	{ v0 }, [x1]'),
+    (bytes: ($20,$a0,$00,$0c); str: 'st1.8b	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$60,$00,$0c); str: 'st1.8b	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$20,$00,$0c); str: 'st1.8b	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$70,$00,$4c); str: 'st1.16b	{ v0 }, [x1]'),
+    (bytes: ($20,$a0,$00,$4c); str: 'st1.16b	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$60,$00,$4c); str: 'st1.16b	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$20,$00,$4c); str: 'st1.16b	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$74,$00,$0c); str: 'st1.4h	{ v0 }, [x1]'),
+    (bytes: ($20,$a4,$00,$0c); str: 'st1.4h	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$64,$00,$0c); str: 'st1.4h	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$24,$00,$0c); str: 'st1.4h	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$74,$00,$4c); str: 'st1.8h	{ v0 }, [x1]'),
+    (bytes: ($20,$a4,$00,$4c); str: 'st1.8h	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$64,$00,$4c); str: 'st1.8h	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$24,$00,$4c); str: 'st1.8h	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$78,$00,$0c); str: 'st1.2s	{ v0 }, [x1]'),
+    (bytes: ($20,$a8,$00,$0c); str: 'st1.2s	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$68,$00,$0c); str: 'st1.2s	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$28,$00,$0c); str: 'st1.2s	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$78,$00,$4c); str: 'st1.4s	{ v0 }, [x1]'),
+    (bytes: ($20,$a8,$00,$4c); str: 'st1.4s	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$68,$00,$4c); str: 'st1.4s	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$28,$00,$4c); str: 'st1.4s	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$7c,$00,$0c); str: 'st1.1d	{ v0 }, [x1]'),
+    (bytes: ($20,$ac,$00,$0c); str: 'st1.1d	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$6c,$00,$0c); str: 'st1.1d	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$2c,$00,$0c); str: 'st1.1d	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($20,$7c,$00,$4c); str: 'st1.2d	{ v0 }, [x1]'),
+    (bytes: ($20,$ac,$00,$4c); str: 'st1.2d	{ v0, v1 }, [x1]'),
+    (bytes: ($20,$6c,$00,$4c); str: 'st1.2d	{ v0, v1, v2 }, [x1]'),
+    (bytes: ($20,$2c,$00,$4c); str: 'st1.2d	{ v0, v1, v2, v3 }, [x1]'),
+    (bytes: ($25,$7c,$00,$4c); str: 'st1.2d { v5 }, [x1]'),
+    (bytes: ($47,$ad,$00,$4c); str: 'st1.2d { v7, v8 }, [x10]'),
+    (bytes: ($2b,$6c,$00,$4c); str: 'st1.2d { v11, v12, v13 }, [x1]'),
+    (bytes: ($bc,$2d,$00,$4c); str: 'st1.2d { v28, v29, v30, v31 }, [x13]')
+  );
+
+  ld2st2_multiple_data: array[1..14] of tinstrdata = (
+    (bytes: ($64,$82,$40,$0c); str: 'ld2.8b { v4, v5 }, [x19]'),
+    (bytes: ($64,$82,$40,$4c); str: 'ld2.16b { v4, v5 }, [x19]'),
+    (bytes: ($64,$86,$40,$0c); str: 'ld2.4h { v4, v5 }, [x19]'),
+    (bytes: ($64,$86,$40,$4c); str: 'ld2.8h { v4, v5 }, [x19]'),
+    (bytes: ($64,$8a,$40,$0c); str: 'ld2.2s { v4, v5 }, [x19]'),
+    (bytes: ($64,$8a,$40,$4c); str: 'ld2.4s { v4, v5 }, [x19]'),
+    (bytes: ($64,$8e,$40,$4c); str: 'ld2.2d { v4, v5 }, [x19]'),
+    (bytes: ($64,$82,$00,$0c); str: 'st2.8b { v4, v5 }, [x19]'),
+    (bytes: ($64,$82,$00,$4c); str: 'st2.16b { v4, v5 }, [x19]'),
+    (bytes: ($64,$86,$00,$0c); str: 'st2.4h { v4, v5 }, [x19]'),
+    (bytes: ($64,$86,$00,$4c); str: 'st2.8h { v4, v5 }, [x19]'),
+    (bytes: ($64,$8a,$00,$0c); str: 'st2.2s { v4, v5 }, [x19]'),
+    (bytes: ($64,$8a,$00,$4c); str: 'st2.4s { v4, v5 }, [x19]'),
+    (bytes: ($64,$8e,$00,$4c); str: 'st2.2d { v4, v5 }, [x19]')
+  );
+
+  ld3st3_multiple_data: array[1..28] of tinstrdata = (
+    (bytes: ($64,$42,$40,$0c); str: 'ld3.8b { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$42,$40,$4c); str: 'ld3.16b { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$46,$40,$0c); str: 'ld3.4h { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$46,$40,$4c); str: 'ld3.8h { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$4a,$40,$0c); str: 'ld3.2s { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$4a,$40,$4c); str: 'ld3.4s { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$4e,$40,$4c); str: 'ld3.2d { v4, v5, v6 }, [x19]'),
+    (bytes: ($29,$41,$40,$0c); str: 'ld3.8b { v9, v10, v11 }, [x9]'),
+    (bytes: ($6e,$42,$40,$4c); str: 'ld3.16b { v14, v15, v16 }, [x19]'),
+    (bytes: ($b8,$47,$40,$0c); str: 'ld3.4h { v24, v25, v26 }, [x29]'),
+    (bytes: ($3e,$45,$40,$4c); str: 'ld3.8h { v30, v31, v0 }, [x9]'),
+    (bytes: ($62,$4a,$40,$0c); str: 'ld3.2s { v2, v3, v4 }, [x19]'),
+    (bytes: ($a4,$4b,$40,$4c); str: 'ld3.4s { v4, v5, v6 }, [x29]'),
+    (bytes: ($27,$4d,$40,$4c); str: 'ld3.2d { v7, v8, v9 }, [x9]'),
+    (bytes: ($64,$42,$00,$0c); str: 'st3.8b { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$42,$00,$4c); str: 'st3.16b { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$46,$00,$0c); str: 'st3.4h { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$46,$00,$4c); str: 'st3.8h { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$4a,$00,$0c); str: 'st3.2s { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$4a,$00,$4c); str: 'st3.4s { v4, v5, v6 }, [x19]'),
+    (bytes: ($64,$4e,$00,$4c); str: 'st3.2d { v4, v5, v6 }, [x19]'),
+    (bytes: ($2a,$41,$00,$0c); str: 'st3.8b { v10, v11, v12 }, [x9]'),
+    (bytes: ($6e,$42,$00,$4c); str: 'st3.16b { v14, v15, v16 }, [x19]'),
+    (bytes: ($b8,$47,$00,$0c); str: 'st3.4h { v24, v25, v26 }, [x29]'),
+    (bytes: ($3e,$45,$00,$4c); str: 'st3.8h { v30, v31, v0 }, [x9]'),
+    (bytes: ($62,$4a,$00,$0c); str: 'st3.2s { v2, v3, v4 }, [x19]'),
+    (bytes: ($a7,$4b,$00,$4c); str: 'st3.4s { v7, v8, v9 }, [x29]'),
+    (bytes: ($24,$4d,$00,$4c); str: 'st3.2d { v4, v5, v6 }, [x9]')
+  );
+
+  ld4st4_multiple_data: array[1..14] of tinstrdata = (
+    (bytes: ($64,$02,$40,$0c); str: 'ld4.8b { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$02,$40,$4c); str: 'ld4.16b { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$06,$40,$0c); str: 'ld4.4h { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$06,$40,$4c); str: 'ld4.8h { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$0a,$40,$0c); str: 'ld4.2s { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$0a,$40,$4c); str: 'ld4.4s { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$0e,$40,$4c); str: 'ld4.2d { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$02,$00,$0c); str: 'st4.8b { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$02,$00,$4c); str: 'st4.16b { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$06,$00,$0c); str: 'st4.4h { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$06,$00,$4c); str: 'st4.8h { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$0a,$00,$0c); str: 'st4.2s { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$0a,$00,$4c); str: 'st4.4s { v4, v5, v6, v7 }, [x19]'),
+    (bytes: ($64,$0e,$00,$4c); str: 'st4.2d { v4, v5, v6, v7 }, [x19]')
+  );
+
+  ld1st1_multiple_post_data: array[1..128] of tinstrdata = (
+    (bytes: ($20,$70,$cf,$0c); str: 'ld1.8b { v0 }, [x1], x15'),
+    (bytes: ($20,$a0,$cf,$0c); str: 'ld1.8b { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$60,$cf,$0c); str: 'ld1.8b { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$20,$cf,$0c); str: 'ld1.8b { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$70,$cf,$4c); str: 'ld1.16b { v0 }, [x1], x15'),
+    (bytes: ($20,$a0,$cf,$4c); str: 'ld1.16b { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$60,$cf,$4c); str: 'ld1.16b { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$20,$cf,$4c); str: 'ld1.16b { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$74,$cf,$0c); str: 'ld1.4h { v0 }, [x1], x15'),
+    (bytes: ($20,$a4,$cf,$0c); str: 'ld1.4h { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$64,$cf,$0c); str: 'ld1.4h { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$24,$cf,$0c); str: 'ld1.4h { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$74,$cf,$4c); str: 'ld1.8h { v0 }, [x1], x15'),
+    (bytes: ($20,$a4,$cf,$4c); str: 'ld1.8h { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$64,$cf,$4c); str: 'ld1.8h { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$24,$cf,$4c); str: 'ld1.8h { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$78,$cf,$0c); str: 'ld1.2s { v0 }, [x1], x15'),
+    (bytes: ($20,$a8,$cf,$0c); str: 'ld1.2s { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$68,$cf,$0c); str: 'ld1.2s { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$28,$cf,$0c); str: 'ld1.2s { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$78,$cf,$4c); str: 'ld1.4s { v0 }, [x1], x15'),
+    (bytes: ($20,$a8,$cf,$4c); str: 'ld1.4s { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$68,$cf,$4c); str: 'ld1.4s { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$28,$cf,$4c); str: 'ld1.4s { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$7c,$cf,$0c); str: 'ld1.1d { v0 }, [x1], x15'),
+    (bytes: ($20,$ac,$cf,$0c); str: 'ld1.1d { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$6c,$cf,$0c); str: 'ld1.1d { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$2c,$cf,$0c); str: 'ld1.1d { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$7c,$cf,$4c); str: 'ld1.2d { v0 }, [x1], x15'),
+    (bytes: ($20,$ac,$cf,$4c); str: 'ld1.2d { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$6c,$cf,$4c); str: 'ld1.2d { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$2c,$cf,$4c); str: 'ld1.2d { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$70,$8f,$0c); str: 'st1.8b { v0 }, [x1], x15'),
+    (bytes: ($20,$a0,$8f,$0c); str: 'st1.8b { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$60,$8f,$0c); str: 'st1.8b { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$20,$8f,$0c); str: 'st1.8b { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$70,$8f,$4c); str: 'st1.16b { v0 }, [x1], x15'),
+    (bytes: ($20,$a0,$8f,$4c); str: 'st1.16b { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$60,$8f,$4c); str: 'st1.16b { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$20,$8f,$4c); str: 'st1.16b { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$74,$8f,$0c); str: 'st1.4h { v0 }, [x1], x15'),
+    (bytes: ($20,$a4,$8f,$0c); str: 'st1.4h { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$64,$8f,$0c); str: 'st1.4h { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$24,$8f,$0c); str: 'st1.4h { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$74,$8f,$4c); str: 'st1.8h { v0 }, [x1], x15'),
+    (bytes: ($20,$a4,$8f,$4c); str: 'st1.8h { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$64,$8f,$4c); str: 'st1.8h { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$24,$8f,$4c); str: 'st1.8h { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$78,$8f,$0c); str: 'st1.2s { v0 }, [x1], x15'),
+    (bytes: ($20,$a8,$8f,$0c); str: 'st1.2s { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$68,$8f,$0c); str: 'st1.2s { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$28,$8f,$0c); str: 'st1.2s { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$78,$8f,$4c); str: 'st1.4s { v0 }, [x1], x15'),
+    (bytes: ($20,$a8,$8f,$4c); str: 'st1.4s { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$68,$8f,$4c); str: 'st1.4s { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$28,$8f,$4c); str: 'st1.4s { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$7c,$8f,$0c); str: 'st1.1d { v0 }, [x1], x15'),
+    (bytes: ($20,$ac,$8f,$0c); str: 'st1.1d { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$6c,$8f,$0c); str: 'st1.1d { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$2c,$8f,$0c); str: 'st1.1d { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$7c,$8f,$4c); str: 'st1.2d { v0 }, [x1], x15'),
+    (bytes: ($20,$ac,$8f,$4c); str: 'st1.2d { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$6c,$8f,$4c); str: 'st1.2d { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$2c,$8f,$4c); str: 'st1.2d { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$70,$df,$0c); str: 'ld1.8b { v0 }, [x1], #8'),
+    (bytes: ($20,$a0,$df,$0c); str: 'ld1.8b { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$60,$df,$0c); str: 'ld1.8b { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$20,$df,$0c); str: 'ld1.8b { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$70,$df,$4c); str: 'ld1.16b { v0 }, [x1], #16'),
+    (bytes: ($20,$a0,$df,$4c); str: 'ld1.16b { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$60,$df,$4c); str: 'ld1.16b { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$20,$df,$4c); str: 'ld1.16b { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$74,$df,$0c); str: 'ld1.4h { v0 }, [x1], #8'),
+    (bytes: ($20,$a4,$df,$0c); str: 'ld1.4h { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$64,$df,$0c); str: 'ld1.4h { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$24,$df,$0c); str: 'ld1.4h { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$74,$df,$4c); str: 'ld1.8h { v0 }, [x1], #16'),
+    (bytes: ($20,$a4,$df,$4c); str: 'ld1.8h { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$64,$df,$4c); str: 'ld1.8h { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$24,$df,$4c); str: 'ld1.8h { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$78,$df,$0c); str: 'ld1.2s { v0 }, [x1], #8'),
+    (bytes: ($20,$a8,$df,$0c); str: 'ld1.2s { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$68,$df,$0c); str: 'ld1.2s { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$28,$df,$0c); str: 'ld1.2s { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$78,$df,$4c); str: 'ld1.4s { v0 }, [x1], #16'),
+    (bytes: ($20,$a8,$df,$4c); str: 'ld1.4s { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$68,$df,$4c); str: 'ld1.4s { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$28,$df,$4c); str: 'ld1.4s { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$7c,$df,$0c); str: 'ld1.1d { v0 }, [x1], #8'),
+    (bytes: ($20,$ac,$df,$0c); str: 'ld1.1d { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$6c,$df,$0c); str: 'ld1.1d { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$2c,$df,$0c); str: 'ld1.1d { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$7c,$df,$4c); str: 'ld1.2d { v0 }, [x1], #16'),
+    (bytes: ($20,$ac,$df,$4c); str: 'ld1.2d { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$6c,$df,$4c); str: 'ld1.2d { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$2c,$df,$4c); str: 'ld1.2d { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$70,$9f,$0c); str: 'st1.8b { v0 }, [x1], #8'),
+    (bytes: ($20,$a0,$9f,$0c); str: 'st1.8b { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$60,$9f,$0c); str: 'st1.8b { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$20,$9f,$0c); str: 'st1.8b { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$70,$9f,$4c); str: 'st1.16b { v0 }, [x1], #16'),
+    (bytes: ($20,$a0,$9f,$4c); str: 'st1.16b { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$60,$9f,$4c); str: 'st1.16b { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$20,$9f,$4c); str: 'st1.16b { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$74,$9f,$0c); str: 'st1.4h { v0 }, [x1], #8'),
+    (bytes: ($20,$a4,$9f,$0c); str: 'st1.4h { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$64,$9f,$0c); str: 'st1.4h { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$24,$9f,$0c); str: 'st1.4h { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$74,$9f,$4c); str: 'st1.8h { v0 }, [x1], #16'),
+    (bytes: ($20,$a4,$9f,$4c); str: 'st1.8h { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$64,$9f,$4c); str: 'st1.8h { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$24,$9f,$4c); str: 'st1.8h { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$78,$9f,$0c); str: 'st1.2s { v0 }, [x1], #8'),
+    (bytes: ($20,$a8,$9f,$0c); str: 'st1.2s { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$68,$9f,$0c); str: 'st1.2s { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$28,$9f,$0c); str: 'st1.2s { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$78,$9f,$4c); str: 'st1.4s { v0 }, [x1], #16'),
+    (bytes: ($20,$a8,$9f,$4c); str: 'st1.4s { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$68,$9f,$4c); str: 'st1.4s { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$28,$9f,$4c); str: 'st1.4s { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$7c,$9f,$0c); str: 'st1.1d { v0 }, [x1], #8'),
+    (bytes: ($20,$ac,$9f,$0c); str: 'st1.1d { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$6c,$9f,$0c); str: 'st1.1d { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$2c,$9f,$0c); str: 'st1.1d { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$7c,$9f,$4c); str: 'st1.2d { v0 }, [x1], #16'),
+    (bytes: ($20,$ac,$9f,$4c); str: 'st1.2d { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$6c,$9f,$4c); str: 'st1.2d { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$2c,$9f,$4c); str: 'st1.2d { v0, v1, v2, v3 }, [x1], #64')
+  );
+
+  ld2st2_multiple_post_data: array[1..28] of tinstrdata = (
+    (bytes: ($20,$80,$cf,$0c); str: 'ld2.8b { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$80,$cf,$4c); str: 'ld2.16b { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$84,$cf,$0c); str: 'ld2.4h { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$84,$cf,$4c); str: 'ld2.8h { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$88,$cf,$0c); str: 'ld2.2s { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$88,$cf,$4c); str: 'ld2.4s { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$8c,$cf,$4c); str: 'ld2.2d { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$80,$8f,$0c); str: 'st2.8b { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$80,$8f,$4c); str: 'st2.16b { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$84,$8f,$0c); str: 'st2.4h { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$84,$8f,$4c); str: 'st2.8h { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$88,$8f,$0c); str: 'st2.2s { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$88,$8f,$4c); str: 'st2.4s { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$8c,$8f,$4c); str: 'st2.2d { v0, v1 }, [x1], x15'),
+    (bytes: ($20,$80,$df,$0c); str: 'ld2.8b { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$80,$df,$4c); str: 'ld2.16b { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$84,$df,$0c); str: 'ld2.4h { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$84,$df,$4c); str: 'ld2.8h { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$88,$df,$0c); str: 'ld2.2s { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$88,$df,$4c); str: 'ld2.4s { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$8c,$df,$4c); str: 'ld2.2d { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$80,$9f,$0c); str: 'st2.8b { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$80,$9f,$4c); str: 'st2.16b { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$84,$9f,$0c); str: 'st2.4h { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$84,$9f,$4c); str: 'st2.8h { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$88,$9f,$0c); str: 'st2.2s { v0, v1 }, [x1], #16'),
+    (bytes: ($20,$88,$9f,$4c); str: 'st2.4s { v0, v1 }, [x1], #32'),
+    (bytes: ($20,$8c,$9f,$4c); str: 'st2.2d { v0, v1 }, [x1], #32')
+  );
+
+  ld3st3_multiple_post_data: array[1..28] of tinstrdata = (
+    (bytes: ($20,$40,$cf,$0c); str: 'ld3.8b { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$40,$cf,$4c); str: 'ld3.16b { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$44,$cf,$0c); str: 'ld3.4h { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$44,$cf,$4c); str: 'ld3.8h { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$48,$cf,$0c); str: 'ld3.2s { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$48,$cf,$4c); str: 'ld3.4s { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$4c,$cf,$4c); str: 'ld3.2d { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$40,$8f,$0c); str: 'st3.8b { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$40,$8f,$4c); str: 'st3.16b { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$44,$8f,$0c); str: 'st3.4h { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$44,$8f,$4c); str: 'st3.8h { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$48,$8f,$0c); str: 'st3.2s { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$48,$8f,$4c); str: 'st3.4s { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$4c,$8f,$4c); str: 'st3.2d { v0, v1, v2 }, [x1], x15'),
+    (bytes: ($20,$40,$df,$0c); str: 'ld3.8b { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$40,$df,$4c); str: 'ld3.16b { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$44,$df,$0c); str: 'ld3.4h { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$44,$df,$4c); str: 'ld3.8h { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$48,$df,$0c); str: 'ld3.2s { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$48,$df,$4c); str: 'ld3.4s { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$4c,$df,$4c); str: 'ld3.2d { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$40,$9f,$0c); str: 'st3.8b { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$40,$9f,$4c); str: 'st3.16b { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$44,$9f,$0c); str: 'st3.4h { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$44,$9f,$4c); str: 'st3.8h { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$48,$9f,$0c); str: 'st3.2s { v0, v1, v2 }, [x1], #24'),
+    (bytes: ($20,$48,$9f,$4c); str: 'st3.4s { v0, v1, v2 }, [x1], #48'),
+    (bytes: ($20,$4c,$9f,$4c); str: 'st3.2d { v0, v1, v2 }, [x1], #48')
+  );
+
+  ld4st4_multiple_post_data: array[1..28] of tinstrdata = (
+    (bytes: ($20,$00,$cf,$0c); str: 'ld4.8b { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$00,$cf,$4c); str: 'ld4.16b { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$04,$cf,$0c); str: 'ld4.4h { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$04,$cf,$4c); str: 'ld4.8h { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$08,$cf,$0c); str: 'ld4.2s { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$08,$cf,$4c); str: 'ld4.4s { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$0c,$cf,$4c); str: 'ld4.2d { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$00,$8f,$0c); str: 'st4.8b { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$00,$8f,$4c); str: 'st4.16b { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$04,$8f,$0c); str: 'st4.4h { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$04,$8f,$4c); str: 'st4.8h { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$08,$8f,$0c); str: 'st4.2s { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$08,$8f,$4c); str: 'st4.4s { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$0c,$8f,$4c); str: 'st4.2d { v0, v1, v2, v3 }, [x1], x15'),
+    (bytes: ($20,$00,$df,$0c); str: 'ld4.8b { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$00,$df,$4c); str: 'ld4.16b { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$04,$df,$0c); str: 'ld4.4h { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$04,$df,$4c); str: 'ld4.8h { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$08,$df,$0c); str: 'ld4.2s { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$08,$df,$4c); str: 'ld4.4s { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$0c,$df,$4c); str: 'ld4.2d { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$00,$9f,$0c); str: 'st4.8b { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$00,$9f,$4c); str: 'st4.16b { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$04,$9f,$0c); str: 'st4.4h { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$04,$9f,$4c); str: 'st4.8h { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$08,$9f,$0c); str: 'st4.2s { v0, v1, v2, v3 }, [x1], #32'),
+    (bytes: ($20,$08,$9f,$4c); str: 'st4.4s { v0, v1, v2, v3 }, [x1], #64'),
+    (bytes: ($20,$0c,$9f,$4c); str: 'st4.2d { v0, v1, v2, v3 }, [x1], #64')
+  );
+
+  ld1r_data: array[1..24] of tinstrdata = (
+    (bytes: ($44,$c0,$40,$0d); str: 'ld1r.8b { v4 }, [x2]'),
+    (bytes: ($44,$c0,$c3,$0d); str: 'ld1r.8b { v4 }, [x2], x3'),
+    (bytes: ($44,$c0,$40,$4d); str: 'ld1r.16b { v4 }, [x2]'),
+    (bytes: ($44,$c0,$c3,$4d); str: 'ld1r.16b { v4 }, [x2], x3'),
+    (bytes: ($44,$c4,$40,$0d); str: 'ld1r.4h { v4 }, [x2]'),
+    (bytes: ($44,$c4,$c3,$0d); str: 'ld1r.4h { v4 }, [x2], x3'),
+    (bytes: ($44,$c4,$40,$4d); str: 'ld1r.8h { v4 }, [x2]'),
+    (bytes: ($44,$c4,$c3,$4d); str: 'ld1r.8h { v4 }, [x2], x3'),
+    (bytes: ($44,$c8,$40,$0d); str: 'ld1r.2s { v4 }, [x2]'),
+    (bytes: ($44,$c8,$c3,$0d); str: 'ld1r.2s { v4 }, [x2], x3'),
+    (bytes: ($44,$c8,$40,$4d); str: 'ld1r.4s { v4 }, [x2]'),
+    (bytes: ($44,$c8,$c3,$4d); str: 'ld1r.4s { v4 }, [x2], x3'),
+    (bytes: ($44,$cc,$40,$0d); str: 'ld1r.1d { v4 }, [x2]'),
+    (bytes: ($44,$cc,$c3,$0d); str: 'ld1r.1d { v4 }, [x2], x3'),
+    (bytes: ($44,$cc,$40,$4d); str: 'ld1r.2d { v4 }, [x2]'),
+    (bytes: ($44,$cc,$c3,$4d); str: 'ld1r.2d { v4 }, [x2], x3'),
+    (bytes: ($44,$c0,$df,$0d); str: 'ld1r.8b { v4 }, [x2], #1'),
+    (bytes: ($44,$c0,$df,$4d); str: 'ld1r.16b { v4 }, [x2], #1'),
+    (bytes: ($44,$c4,$df,$0d); str: 'ld1r.4h { v4 }, [x2], #2'),
+    (bytes: ($44,$c4,$df,$4d); str: 'ld1r.8h { v4 }, [x2], #2'),
+    (bytes: ($44,$c8,$df,$0d); str: 'ld1r.2s { v4 }, [x2], #4'),
+    (bytes: ($44,$c8,$df,$4d); str: 'ld1r.4s { v4 }, [x2], #4'),
+    (bytes: ($44,$cc,$df,$0d); str: 'ld1r.1d { v4 }, [x2], #8'),
+    (bytes: ($44,$cc,$df,$4d); str: 'ld1r.2d { v4 }, [x2], #8')
+  );
+
+  ld2r_data: array[1..24] of tinstrdata = (
+    (bytes: ($44,$c0,$60,$0d); str: 'ld2r.8b { v4, v5 }, [x2]'),
+    (bytes: ($44,$c0,$e3,$0d); str: 'ld2r.8b { v4, v5 }, [x2], x3'),
+    (bytes: ($44,$c0,$60,$4d); str: 'ld2r.16b { v4, v5 }, [x2]'),
+    (bytes: ($44,$c0,$e3,$4d); str: 'ld2r.16b { v4, v5 }, [x2], x3'),
+    (bytes: ($44,$c4,$60,$0d); str: 'ld2r.4h { v4, v5 }, [x2]'),
+    (bytes: ($44,$c4,$e3,$0d); str: 'ld2r.4h { v4, v5 }, [x2], x3'),
+    (bytes: ($44,$c4,$60,$4d); str: 'ld2r.8h { v4, v5 }, [x2]'),
+    (bytes: ($44,$c4,$e3,$4d); str: 'ld2r.8h { v4, v5 }, [x2], x3'),
+    (bytes: ($44,$c8,$60,$0d); str: 'ld2r.2s { v4, v5 }, [x2]'),
+    (bytes: ($44,$c8,$e3,$0d); str: 'ld2r.2s { v4, v5 }, [x2], x3'),
+    (bytes: ($44,$c8,$60,$4d); str: 'ld2r.4s { v4, v5 }, [x2]'),
+    (bytes: ($44,$c8,$e3,$4d); str: 'ld2r.4s { v4, v5 }, [x2], x3'),
+    (bytes: ($44,$cc,$60,$0d); str: 'ld2r.1d { v4, v5 }, [x2]'),
+    (bytes: ($44,$cc,$e3,$0d); str: 'ld2r.1d { v4, v5 }, [x2], x3'),
+    (bytes: ($44,$cc,$60,$4d); str: 'ld2r.2d { v4, v5 }, [x2]'),
+    (bytes: ($44,$cc,$e3,$4d); str: 'ld2r.2d { v4, v5 }, [x2], x3'),
+    (bytes: ($44,$c0,$ff,$0d); str: 'ld2r.8b { v4, v5 }, [x2], #2'),
+    (bytes: ($44,$c0,$ff,$4d); str: 'ld2r.16b { v4, v5 }, [x2], #2'),
+    (bytes: ($44,$c4,$ff,$0d); str: 'ld2r.4h { v4, v5 }, [x2], #4'),
+    (bytes: ($44,$c4,$ff,$4d); str: 'ld2r.8h { v4, v5 }, [x2], #4'),
+    (bytes: ($44,$c8,$ff,$0d); str: 'ld2r.2s { v4, v5 }, [x2], #8'),
+    (bytes: ($44,$c8,$ff,$4d); str: 'ld2r.4s { v4, v5 }, [x2], #8'),
+    (bytes: ($44,$cc,$ff,$0d); str: 'ld2r.1d { v4, v5 }, [x2], #16'),
+    (bytes: ($44,$cc,$ff,$4d); str: 'ld2r.2d { v4, v5 }, [x2], #16')
+  );
+
+  ld3r_data: array[1..24] of tinstrdata = (
+    (bytes: ($44,$e0,$40,$0d); str: 'ld3r.8b { v4, v5, v6 }, [x2]'),
+    (bytes: ($44,$e0,$c3,$0d); str: 'ld3r.8b { v4, v5, v6 }, [x2], x3'),
+    (bytes: ($44,$e0,$40,$4d); str: 'ld3r.16b { v4, v5, v6 }, [x2]'),
+    (bytes: ($44,$e0,$c3,$4d); str: 'ld3r.16b { v4, v5, v6 }, [x2], x3'),
+    (bytes: ($44,$e4,$40,$0d); str: 'ld3r.4h { v4, v5, v6 }, [x2]'),
+    (bytes: ($44,$e4,$c3,$0d); str: 'ld3r.4h { v4, v5, v6 }, [x2], x3'),
+    (bytes: ($44,$e4,$40,$4d); str: 'ld3r.8h { v4, v5, v6 }, [x2]'),
+    (bytes: ($44,$e4,$c3,$4d); str: 'ld3r.8h { v4, v5, v6 }, [x2], x3'),
+    (bytes: ($44,$e8,$40,$0d); str: 'ld3r.2s { v4, v5, v6 }, [x2]'),
+    (bytes: ($44,$e8,$c3,$0d); str: 'ld3r.2s { v4, v5, v6 }, [x2], x3'),
+    (bytes: ($44,$e8,$40,$4d); str: 'ld3r.4s { v4, v5, v6 }, [x2]'),
+    (bytes: ($44,$e8,$c3,$4d); str: 'ld3r.4s { v4, v5, v6 }, [x2], x3'),
+    (bytes: ($44,$ec,$40,$0d); str: 'ld3r.1d { v4, v5, v6 }, [x2]'),
+    (bytes: ($44,$ec,$c3,$0d); str: 'ld3r.1d { v4, v5, v6 }, [x2], x3'),
+    (bytes: ($44,$ec,$40,$4d); str: 'ld3r.2d { v4, v5, v6 }, [x2]'),
+    (bytes: ($44,$ec,$c3,$4d); str: 'ld3r.2d { v4, v5, v6 }, [x2], x3'),
+    (bytes: ($44,$e0,$df,$0d); str: 'ld3r.8b { v4, v5, v6 }, [x2], #3'),
+    (bytes: ($44,$e0,$df,$4d); str: 'ld3r.16b { v4, v5, v6 }, [x2], #3'),
+    (bytes: ($44,$e4,$df,$0d); str: 'ld3r.4h { v4, v5, v6 }, [x2], #6'),
+    (bytes: ($44,$e4,$df,$4d); str: 'ld3r.8h { v4, v5, v6 }, [x2], #6'),
+    (bytes: ($44,$e8,$df,$0d); str: 'ld3r.2s { v4, v5, v6 }, [x2], #12'),
+    (bytes: ($44,$e8,$df,$4d); str: 'ld3r.4s { v4, v5, v6 }, [x2], #12'),
+    (bytes: ($44,$ec,$df,$0d); str: 'ld3r.1d { v4, v5, v6 }, [x2], #24'),
+    (bytes: ($44,$ec,$df,$4d); str: 'ld3r.2d { v4, v5, v6 }, [x2], #24')
+  );
+
+  ld4r_data: array[1..24] of tinstrdata = (
+    (bytes: ($44,$e0,$60,$0d); str: 'ld4r.8b { v4, v5, v6, v7 }, [x2]'),
+    (bytes: ($44,$e0,$e3,$0d); str: 'ld4r.8b { v4, v5, v6, v7 }, [x2], x3'),
+    (bytes: ($44,$e0,$60,$4d); str: 'ld4r.16b { v4, v5, v6, v7 }, [x2]'),
+    (bytes: ($44,$e0,$e3,$4d); str: 'ld4r.16b { v4, v5, v6, v7 }, [x2], x3'),
+    (bytes: ($44,$e4,$60,$0d); str: 'ld4r.4h { v4, v5, v6, v7 }, [x2]'),
+    (bytes: ($44,$e4,$e3,$0d); str: 'ld4r.4h { v4, v5, v6, v7 }, [x2], x3'),
+    (bytes: ($44,$e4,$60,$4d); str: 'ld4r.8h { v4, v5, v6, v7 }, [x2]'),
+    (bytes: ($44,$e4,$e3,$4d); str: 'ld4r.8h { v4, v5, v6, v7 }, [x2], x3'),
+    (bytes: ($44,$e8,$60,$0d); str: 'ld4r.2s { v4, v5, v6, v7 }, [x2]'),
+    (bytes: ($44,$e8,$e3,$0d); str: 'ld4r.2s { v4, v5, v6, v7 }, [x2], x3'),
+    (bytes: ($44,$e8,$60,$4d); str: 'ld4r.4s { v4, v5, v6, v7 }, [x2]'),
+    (bytes: ($44,$e8,$e3,$4d); str: 'ld4r.4s { v4, v5, v6, v7 }, [x2], x3'),
+    (bytes: ($44,$ec,$60,$0d); str: 'ld4r.1d { v4, v5, v6, v7 }, [x2]'),
+    (bytes: ($44,$ec,$e3,$0d); str: 'ld4r.1d { v4, v5, v6, v7 }, [x2], x3'),
+    (bytes: ($44,$ec,$60,$4d); str: 'ld4r.2d { v4, v5, v6, v7 }, [x2]'),
+    (bytes: ($44,$ec,$e3,$4d); str: 'ld4r.2d { v4, v5, v6, v7 }, [x2], x3'),
+    (bytes: ($44,$e0,$ff,$0d); str: 'ld4r.8b { v4, v5, v6, v7 }, [x2], #4'),
+    (bytes: ($45,$e0,$ff,$4d); str: 'ld4r.16b { v5, v6, v7, v8 }, [x2], #4'),
+    (bytes: ($46,$e4,$ff,$0d); str: 'ld4r.4h { v6, v7, v8, v9 }, [x2], #8'),
+    (bytes: ($41,$e4,$ff,$4d); str: 'ld4r.8h { v1, v2, v3, v4 }, [x2], #8'),
+    (bytes: ($42,$e8,$ff,$0d); str: 'ld4r.2s { v2, v3, v4, v5 }, [x2], #16'),
+    (bytes: ($43,$e8,$ff,$4d); str: 'ld4r.4s { v3, v4, v5, v6 }, [x2], #16'),
+    (bytes: ($40,$ec,$ff,$0d); str: 'ld4r.1d { v0, v1, v2, v3 }, [x2], #32'),
+    (bytes: ($44,$ec,$ff,$4d); str: 'ld4r.2d { v4, v5, v6, v7 }, [x2], #32')
+  );
+
+  ld1_data: array[1..12] of tinstrdata = (
+    (bytes: ($64,$14,$40,$4d); str: 'ld1.b { v4 }[13], [x3]'),
+    (bytes: ($64,$50,$40,$0d); str: 'ld1.h { v4 }[2], [x3]'),
+    (bytes: ($64,$80,$40,$4d); str: 'ld1.s { v4 }[2], [x3]'),
+    (bytes: ($64,$84,$40,$4d); str: 'ld1.d { v4 }[1], [x3]'),
+    (bytes: ($64,$14,$c5,$4d); str: 'ld1.b { v4 }[13], [x3], x5'),
+    (bytes: ($64,$50,$c5,$0d); str: 'ld1.h { v4 }[2], [x3], x5'),
+    (bytes: ($64,$80,$c5,$4d); str: 'ld1.s { v4 }[2], [x3], x5'),
+    (bytes: ($64,$84,$c5,$4d); str: 'ld1.d { v4 }[1], [x3], x5'),
+    (bytes: ($64,$14,$df,$4d); str: 'ld1.b { v4 }[13], [x3], #1'),
+    (bytes: ($64,$50,$df,$0d); str: 'ld1.h { v4 }[2], [x3], #2'),
+    (bytes: ($64,$80,$df,$4d); str: 'ld1.s { v4 }[2], [x3], #4'),
+    (bytes: ($64,$84,$df,$4d); str: 'ld1.d { v4 }[1], [x3], #8')
+  );
+
+  ld2_data: array[1..12] of tinstrdata = (
+    (bytes: ($64,$14,$60,$4d); str: 'ld2.b { v4, v5 }[13], [x3]'),
+    (bytes: ($64,$50,$60,$0d); str: 'ld2.h { v4, v5 }[2], [x3]'),
+    (bytes: ($64,$80,$60,$4d); str: 'ld2.s { v4, v5 }[2], [x3]'),
+    (bytes: ($64,$84,$60,$4d); str: 'ld2.d { v4, v5 }[1], [x3]'),
+    (bytes: ($64,$14,$e5,$4d); str: 'ld2.b { v4, v5 }[13], [x3], x5'),
+    (bytes: ($64,$50,$e5,$0d); str: 'ld2.h { v4, v5 }[2], [x3], x5'),
+    (bytes: ($64,$80,$e5,$4d); str: 'ld2.s { v4, v5 }[2], [x3], x5'),
+    (bytes: ($64,$84,$e5,$4d); str: 'ld2.d { v4, v5 }[1], [x3], x5'),
+    (bytes: ($64,$14,$ff,$4d); str: 'ld2.b { v4, v5 }[13], [x3], #2'),
+    (bytes: ($64,$50,$ff,$0d); str: 'ld2.h { v4, v5 }[2], [x3], #4'),
+    (bytes: ($64,$80,$ff,$4d); str: 'ld2.s { v4, v5 }[2], [x3], #8'),
+    (bytes: ($64,$84,$ff,$4d); str: 'ld2.d { v4, v5 }[1], [x3], #16')
+  );
+
+  ld3_data: array[1..12] of tinstrdata = (
+    (bytes: ($64,$34,$40,$4d); str: 'ld3.b { v4, v5, v6 }[13], [x3]'),
+    (bytes: ($64,$70,$40,$0d); str: 'ld3.h { v4, v5, v6 }[2], [x3]'),
+    (bytes: ($64,$a0,$40,$4d); str: 'ld3.s { v4, v5, v6 }[2], [x3]'),
+    (bytes: ($64,$a4,$40,$4d); str: 'ld3.d { v4, v5, v6 }[1], [x3]'),
+    (bytes: ($64,$34,$c5,$4d); str: 'ld3.b { v4, v5, v6 }[13], [x3], x5'),
+    (bytes: ($64,$70,$c5,$0d); str: 'ld3.h { v4, v5, v6 }[2], [x3], x5'),
+    (bytes: ($64,$a0,$c5,$4d); str: 'ld3.s { v4, v5, v6 }[2], [x3], x5'),
+    (bytes: ($64,$a4,$c5,$4d); str: 'ld3.d { v4, v5, v6 }[1], [x3], x5'),
+    (bytes: ($64,$34,$df,$4d); str: 'ld3.b { v4, v5, v6 }[13], [x3], #3'),
+    (bytes: ($64,$70,$df,$0d); str: 'ld3.h { v4, v5, v6 }[2], [x3], #6'),
+    (bytes: ($64,$a0,$df,$4d); str: 'ld3.s { v4, v5, v6 }[2], [x3], #12'),
+    (bytes: ($64,$a4,$df,$4d); str: 'ld3.d { v4, v5, v6 }[1], [x3], #24')
+  );
+
+  ld4_data: array[1..12] of tinstrdata = (
+    (bytes: ($64,$34,$60,$4d); str: 'ld4.b { v4, v5, v6, v7 }[13], [x3]'),
+    (bytes: ($64,$70,$60,$0d); str: 'ld4.h { v4, v5, v6, v7 }[2], [x3]'),
+    (bytes: ($64,$a0,$60,$4d); str: 'ld4.s { v4, v5, v6, v7 }[2], [x3]'),
+    (bytes: ($64,$a4,$60,$4d); str: 'ld4.d { v4, v5, v6, v7 }[1], [x3]'),
+    (bytes: ($64,$34,$e5,$4d); str: 'ld4.b { v4, v5, v6, v7 }[13], [x3], x5'),
+    (bytes: ($64,$70,$e5,$0d); str: 'ld4.h { v4, v5, v6, v7 }[2], [x3], x5'),
+    (bytes: ($64,$a0,$e5,$4d); str: 'ld4.s { v4, v5, v6, v7 }[2], [x3], x5'),
+    (bytes: ($64,$a4,$e5,$4d); str: 'ld4.d { v4, v5, v6, v7 }[1], [x3], x5'),
+    (bytes: ($64,$34,$ff,$4d); str: 'ld4.b { v4, v5, v6, v7 }[13], [x3], #4'),
+    (bytes: ($64,$70,$ff,$0d); str: 'ld4.h { v4, v5, v6, v7 }[2], [x3], #8'),
+    (bytes: ($64,$a0,$ff,$4d); str: 'ld4.s { v4, v5, v6, v7 }[2], [x3], #16'),
+    (bytes: ($64,$a4,$ff,$4d); str: 'ld4.d { v4, v5, v6, v7 }[1], [x3], #32')
+  );
+
+  st1_data: array[1..12] of tinstrdata = (
+    (bytes: ($64,$14,$00,$4d); str: 'st1.b { v4 }[13], [x3]'),
+    (bytes: ($64,$50,$00,$0d); str: 'st1.h { v4 }[2], [x3]'),
+    (bytes: ($64,$80,$00,$4d); str: 'st1.s { v4 }[2], [x3]'),
+    (bytes: ($64,$84,$00,$4d); str: 'st1.d { v4 }[1], [x3]'),
+    (bytes: ($64,$14,$85,$4d); str: 'st1.b { v4 }[13], [x3], x5'),
+    (bytes: ($64,$50,$85,$0d); str: 'st1.h { v4 }[2], [x3], x5'),
+    (bytes: ($64,$80,$85,$4d); str: 'st1.s { v4 }[2], [x3], x5'),
+    (bytes: ($64,$84,$85,$4d); str: 'st1.d { v4 }[1], [x3], x5'),
+    (bytes: ($64,$14,$9f,$4d); str: 'st1.b { v4 }[13], [x3], #1'),
+    (bytes: ($64,$50,$9f,$0d); str: 'st1.h { v4 }[2], [x3], #2'),
+    (bytes: ($64,$80,$9f,$4d); str: 'st1.s { v4 }[2], [x3], #4'),
+    (bytes: ($64,$84,$9f,$4d); str: 'st1.d { v4 }[1], [x3], #8')
+  );
+
+  st2_data: array[1..12] of tinstrdata = (
+    (bytes: ($64,$14,$20,$4d); str: 'st2.b { v4, v5 }[13], [x3]'),
+    (bytes: ($64,$50,$20,$0d); str: 'st2.h { v4, v5 }[2], [x3]'),
+    (bytes: ($64,$80,$20,$4d); str: 'st2.s { v4, v5 }[2], [x3]'),
+    (bytes: ($64,$84,$20,$4d); str: 'st2.d { v4, v5 }[1], [x3]'),
+    (bytes: ($64,$14,$a5,$4d); str: 'st2.b { v4, v5 }[13], [x3], x5'),
+    (bytes: ($64,$50,$a5,$0d); str: 'st2.h { v4, v5 }[2], [x3], x5'),
+    (bytes: ($64,$80,$a5,$4d); str: 'st2.s { v4, v5 }[2], [x3], x5'),
+    (bytes: ($64,$84,$a5,$4d); str: 'st2.d { v4, v5 }[1], [x3], x5'),
+    (bytes: ($64,$14,$bf,$4d); str: 'st2.b { v4, v5 }[13], [x3], #2'),
+    (bytes: ($64,$50,$bf,$0d); str: 'st2.h { v4, v5 }[2], [x3], #4'),
+    (bytes: ($64,$80,$bf,$4d); str: 'st2.s { v4, v5 }[2], [x3], #8'),
+    (bytes: ($64,$84,$bf,$4d); str: 'st2.d { v4, v5 }[1], [x3], #16')
+  );
+
+  st3_data: array[1..12] of tinstrdata = (
+    (bytes: ($64,$34,$00,$4d); str: 'st3.b { v4, v5, v6 }[13], [x3]'),
+    (bytes: ($64,$70,$00,$0d); str: 'st3.h { v4, v5, v6 }[2], [x3]'),
+    (bytes: ($64,$a0,$00,$4d); str: 'st3.s { v4, v5, v6 }[2], [x3]'),
+    (bytes: ($64,$a4,$00,$4d); str: 'st3.d { v4, v5, v6 }[1], [x3]'),
+    (bytes: ($64,$34,$85,$4d); str: 'st3.b { v4, v5, v6 }[13], [x3], x5'),
+    (bytes: ($64,$70,$85,$0d); str: 'st3.h { v4, v5, v6 }[2], [x3], x5'),
+    (bytes: ($64,$a0,$85,$4d); str: 'st3.s { v4, v5, v6 }[2], [x3], x5'),
+    (bytes: ($64,$a4,$85,$4d); str: 'st3.d { v4, v5, v6 }[1], [x3], x5'),
+    (bytes: ($64,$34,$9f,$4d); str: 'st3.b { v4, v5, v6 }[13], [x3], #3'),
+    (bytes: ($64,$70,$9f,$0d); str: 'st3.h { v4, v5, v6 }[2], [x3], #6'),
+    (bytes: ($64,$a0,$9f,$4d); str: 'st3.s { v4, v5, v6 }[2], [x3], #12'),
+    (bytes: ($64,$a4,$9f,$4d); str: 'st3.d { v4, v5, v6 }[1], [x3], #24')
+  );
+
+  st4_data: array[1..12] of tinstrdata = (
+    (bytes: ($64,$34,$20,$4d); str: 'st4.b { v4, v5, v6, v7 }[13], [x3]'),
+    (bytes: ($64,$70,$20,$0d); str: 'st4.h { v4, v5, v6, v7 }[2], [x3]'),
+    (bytes: ($64,$a0,$20,$4d); str: 'st4.s { v4, v5, v6, v7 }[2], [x3]'),
+    (bytes: ($64,$a4,$20,$4d); str: 'st4.d { v4, v5, v6, v7 }[1], [x3]'),
+    (bytes: ($64,$34,$a5,$4d); str: 'st4.b { v4, v5, v6, v7 }[13], [x3], x5'),
+    (bytes: ($64,$70,$a5,$0d); str: 'st4.h { v4, v5, v6, v7 }[2], [x3], x5'),
+    (bytes: ($64,$a0,$a5,$4d); str: 'st4.s { v4, v5, v6, v7 }[2], [x3], x5'),
+    (bytes: ($64,$a4,$a5,$4d); str: 'st4.d { v4, v5, v6, v7 }[1], [x3], x5'),
+    (bytes: ($64,$34,$bf,$4d); str: 'st4.b { v4, v5, v6, v7 }[13], [x3], #4'),
+    (bytes: ($64,$70,$bf,$0d); str: 'st4.h { v4, v5, v6, v7 }[2], [x3], #8'),
+    (bytes: ($64,$a0,$bf,$4d); str: 'st4.s { v4, v5, v6, v7 }[2], [x3], #16'),
+    (bytes: ($64,$a4,$bf,$4d); str: 'st4.d { v4, v5, v6, v7 }[1], [x3], #32')
+  );
+
+  verbose_syntax_data: array[1..510] of tinstrdata = (
+    (bytes: ($21,$70,$40,$0c); str: 'ld1.8b	{ v1 }, [x1]'),
+    (bytes: ($22,$a0,$40,$0c); str: 'ld1.8b	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$60,$40,$0c); str: 'ld1.8b	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($24,$20,$40,$0c); str: 'ld1.8b	{ v4, v5, v6, v7 }, [x1]'),
+    (bytes: ($21,$70,$40,$4c); str: 'ld1.16b	{ v1 }, [x1]'),
+    (bytes: ($22,$a0,$40,$4c); str: 'ld1.16b	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$60,$40,$4c); str: 'ld1.16b	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($24,$20,$40,$4c); str: 'ld1.16b	{ v4, v5, v6, v7 }, [x1]'),
+    (bytes: ($21,$74,$40,$0c); str: 'ld1.4h	{ v1 }, [x1]'),
+    (bytes: ($22,$a4,$40,$0c); str: 'ld1.4h	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$64,$40,$0c); str: 'ld1.4h	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$24,$40,$0c); str: 'ld1.4h	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$74,$40,$4c); str: 'ld1.8h	{ v1 }, [x1]'),
+    (bytes: ($22,$a4,$40,$4c); str: 'ld1.8h	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$64,$40,$4c); str: 'ld1.8h	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$24,$40,$4c); str: 'ld1.8h	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$78,$40,$0c); str: 'ld1.2s	{ v1 }, [x1]'),
+    (bytes: ($22,$a8,$40,$0c); str: 'ld1.2s	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$68,$40,$0c); str: 'ld1.2s	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$28,$40,$0c); str: 'ld1.2s	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$78,$40,$4c); str: 'ld1.4s	{ v1 }, [x1]'),
+    (bytes: ($22,$a8,$40,$4c); str: 'ld1.4s	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$68,$40,$4c); str: 'ld1.4s	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$28,$40,$4c); str: 'ld1.4s	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$7c,$40,$0c); str: 'ld1.1d	{ v1 }, [x1]'),
+    (bytes: ($22,$ac,$40,$0c); str: 'ld1.1d	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$6c,$40,$0c); str: 'ld1.1d	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$2c,$40,$0c); str: 'ld1.1d	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$7c,$40,$4c); str: 'ld1.2d	{ v1 }, [x1]'),
+    (bytes: ($22,$ac,$40,$4c); str: 'ld1.2d	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$6c,$40,$4c); str: 'ld1.2d	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$2c,$40,$4c); str: 'ld1.2d	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$70,$00,$0c); str: 'st1.8b	{ v1 }, [x1]'),
+    (bytes: ($22,$a0,$00,$0c); str: 'st1.8b	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$60,$00,$0c); str: 'st1.8b	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($24,$20,$00,$0c); str: 'st1.8b	{ v4, v5, v6, v7 }, [x1]'),
+    (bytes: ($21,$70,$00,$4c); str: 'st1.16b	{ v1 }, [x1]'),
+    (bytes: ($22,$a0,$00,$4c); str: 'st1.16b	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$60,$00,$4c); str: 'st1.16b	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($24,$20,$00,$4c); str: 'st1.16b	{ v4, v5, v6, v7 }, [x1]'),
+    (bytes: ($21,$74,$00,$0c); str: 'st1.4h	{ v1 }, [x1]'),
+    (bytes: ($22,$a4,$00,$0c); str: 'st1.4h	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$64,$00,$0c); str: 'st1.4h	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$24,$00,$0c); str: 'st1.4h	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$74,$00,$4c); str: 'st1.8h	{ v1 }, [x1]'),
+    (bytes: ($22,$a4,$00,$4c); str: 'st1.8h	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$64,$00,$4c); str: 'st1.8h	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$24,$00,$4c); str: 'st1.8h	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$78,$00,$0c); str: 'st1.2s	{ v1 }, [x1]'),
+    (bytes: ($22,$a8,$00,$0c); str: 'st1.2s	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$68,$00,$0c); str: 'st1.2s	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$28,$00,$0c); str: 'st1.2s	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$78,$00,$4c); str: 'st1.4s	{ v1 }, [x1]'),
+    (bytes: ($22,$a8,$00,$4c); str: 'st1.4s	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$68,$00,$4c); str: 'st1.4s	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$28,$00,$4c); str: 'st1.4s	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$7c,$00,$0c); str: 'st1.1d	{ v1 }, [x1]'),
+    (bytes: ($22,$ac,$00,$0c); str: 'st1.1d	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$6c,$00,$0c); str: 'st1.1d	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$2c,$00,$0c); str: 'st1.1d	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($21,$7c,$00,$4c); str: 'st1.2d	{ v1 }, [x1]'),
+    (bytes: ($22,$ac,$00,$4c); str: 'st1.2d	{ v2, v3 }, [x1]'),
+    (bytes: ($23,$6c,$00,$4c); str: 'st1.2d	{ v3, v4, v5 }, [x1]'),
+    (bytes: ($27,$2c,$00,$4c); str: 'st1.2d	{ v7, v8, v9, v10 }, [x1]'),
+    (bytes: ($63,$82,$40,$0c); str: 'ld2.8b	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$82,$40,$4c); str: 'ld2.16b	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$86,$40,$0c); str: 'ld2.4h	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$86,$40,$4c); str: 'ld2.8h	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$8a,$40,$0c); str: 'ld2.2s	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$8a,$40,$4c); str: 'ld2.4s	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$8e,$40,$4c); str: 'ld2.2d	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$82,$00,$0c); str: 'st2.8b	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$82,$00,$4c); str: 'st2.16b { v3, v4 }, [x19]'),
+    (bytes: ($63,$86,$00,$0c); str: 'st2.4h	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$86,$00,$4c); str: 'st2.8h	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$8a,$00,$0c); str: 'st2.2s	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$8a,$00,$4c); str: 'st2.4s	{ v3, v4 }, [x19]'),
+    (bytes: ($63,$8e,$00,$4c); str: 'st2.2d	{ v3, v4 }, [x19]'),
+    (bytes: ($62,$42,$40,$0c); str: 'ld3.8b	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$42,$40,$4c); str: 'ld3.16b	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$46,$40,$0c); str: 'ld3.4h	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$46,$40,$4c); str: 'ld3.8h	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$4a,$40,$0c); str: 'ld3.2s	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$4a,$40,$4c); str: 'ld3.4s	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$4e,$40,$4c); str: 'ld3.2d	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$42,$00,$0c); str: 'st3.8b	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$42,$00,$4c); str: 'st3.16b	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$46,$00,$0c); str: 'st3.4h	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$46,$00,$4c); str: 'st3.8h	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$4a,$00,$0c); str: 'st3.2s	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$4a,$00,$4c); str: 'st3.4s	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$4e,$00,$4c); str: 'st3.2d	{ v2, v3, v4 }, [x19]'),
+    (bytes: ($62,$02,$40,$0c); str: 'ld4.8b	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$02,$40,$4c); str: 'ld4.16b	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$06,$40,$0c); str: 'ld4.4h	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$06,$40,$4c); str: 'ld4.8h	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$0a,$40,$0c); str: 'ld4.2s	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$0a,$40,$4c); str: 'ld4.4s	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$0e,$40,$4c); str: 'ld4.2d	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$02,$00,$0c); str: 'st4.8b	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$02,$00,$4c); str: 'st4.16b	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$06,$00,$0c); str: 'st4.4h	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$06,$00,$4c); str: 'st4.8h	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$0a,$00,$0c); str: 'st4.2s	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$0a,$00,$4c); str: 'st4.4s	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($62,$0e,$00,$4c); str: 'st4.2d	{ v2, v3, v4, v5 }, [x19]'),
+    (bytes: ($21,$70,$cf,$0c); str: 'ld1.8b	{ v1 }, [x1], x15'),
+    (bytes: ($22,$a0,$cf,$0c); str: 'ld1.8b	{ v2, v3 }, [x1], x15'),
+    (bytes: ($23,$60,$cf,$0c); str: 'ld1.8b	{ v3, v4, v5 }, [x1], x15'),
+    (bytes: ($24,$20,$cf,$0c); str: 'ld1.8b	{ v4, v5, v6, v7 }, [x1], x15'),
+    (bytes: ($21,$70,$cf,$4c); str: 'ld1.16b	{ v1 }, [x1], x15'),
+    (bytes: ($22,$a0,$cf,$4c); str: 'ld1.16b	{ v2, v3 }, [x1], x15'),
+    (bytes: ($23,$60,$cf,$4c); str: 'ld1.16b	{ v3, v4, v5 }, [x1], x15'),
+    (bytes: ($24,$20,$cf,$4c); str: 'ld1.16b	{ v4, v5, v6, v7 }, [x1], x15'),
+    (bytes: ($21,$74,$cf,$0c); str: 'ld1.4h	{ v1 }, [x1], x15'),
+    (bytes: ($22,$a4,$cf,$0c); str: 'ld1.4h	{ v2, v3 }, [x1], x15'),
+    (bytes: ($23,$64,$cf,$0c); str: 'ld1.4h	{ v3, v4, v5 }, [x1], x15'),
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+    (bytes: ($21,$78,$cf,$4c); str: 'ld1.4s	{ v1 }, [x1], x15'),
+    (bytes: ($22,$a8,$cf,$4c); str: 'ld1.4s	{ v2, v3 }, [x1], x15'),
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+    (bytes: ($21,$7c,$cf,$0c); str: 'ld1.1d	{ v1 }, [x1], x15'),
+    (bytes: ($22,$ac,$cf,$0c); str: 'ld1.1d	{ v2, v3 }, [x1], x15'),
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+    (bytes: ($21,$78,$8f,$4c); str: 'st1.4s	{ v1 }, [x1], x15'),
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+    (bytes: ($42,$ec,$c3,$4d); str: 'ld3r.2d	{ v2, v3, v4 }, [x2], x3'),
+    (bytes: ($42,$e0,$df,$0d); str: 'ld3r.8b	{ v2, v3, v4 }, [x2], #3'),
+    (bytes: ($42,$e0,$df,$4d); str: 'ld3r.16b	{ v2, v3, v4 }, [x2], #3'),
+    (bytes: ($42,$e4,$df,$0d); str: 'ld3r.4h	{ v2, v3, v4 }, [x2], #6'),
+    (bytes: ($42,$e4,$df,$4d); str: 'ld3r.8h	{ v2, v3, v4 }, [x2], #6'),
+    (bytes: ($42,$e8,$df,$0d); str: 'ld3r.2s	{ v2, v3, v4 }, [x2], #12'),
+    (bytes: ($42,$e8,$df,$4d); str: 'ld3r.4s	{ v2, v3, v4 }, [x2], #12'),
+    (bytes: ($42,$ec,$df,$0d); str: 'ld3r.1d	{ v2, v3, v4 }, [x2], #24'),
+    (bytes: ($42,$ec,$df,$4d); str: 'ld3r.2d	{ v2, v3, v4 }, [x2], #24'),
+    (bytes: ($42,$e0,$60,$0d); str: 'ld4r.8b	{ v2, v3, v4, v5 }, [x2]'),
+    (bytes: ($42,$e0,$e3,$0d); str: 'ld4r.8b	{ v2, v3, v4, v5 }, [x2], x3'),
+    (bytes: ($42,$e0,$60,$4d); str: 'ld4r.16b	{ v2, v3, v4, v5 }, [x2]'),
+    (bytes: ($42,$e0,$e3,$4d); str: 'ld4r.16b	{ v2, v3, v4, v5 }, [x2], x3'),
+    (bytes: ($42,$e4,$60,$0d); str: 'ld4r.4h	{ v2, v3, v4, v5 }, [x2]'),
+    (bytes: ($42,$e4,$e3,$0d); str: 'ld4r.4h	{ v2, v3, v4, v5 }, [x2], x3'),
+    (bytes: ($42,$e4,$60,$4d); str: 'ld4r.8h	{ v2, v3, v4, v5 }, [x2]'),
+    (bytes: ($42,$e4,$e3,$4d); str: 'ld4r.8h	{ v2, v3, v4, v5 }, [x2], x3'),
+    (bytes: ($42,$e8,$60,$0d); str: 'ld4r.2s	{ v2, v3, v4, v5 }, [x2]'),
+    (bytes: ($42,$e8,$e3,$0d); str: 'ld4r.2s	{ v2, v3, v4, v5 }, [x2], x3'),
+    (bytes: ($42,$e8,$60,$4d); str: 'ld4r.4s	{ v2, v3, v4, v5 }, [x2]'),
+    (bytes: ($42,$e8,$e3,$4d); str: 'ld4r.4s	{ v2, v3, v4, v5 }, [x2], x3'),
+    (bytes: ($42,$ec,$60,$0d); str: 'ld4r.1d	{ v2, v3, v4, v5 }, [x2]'),
+    (bytes: ($42,$ec,$e3,$0d); str: 'ld4r.1d	{ v2, v3, v4, v5 }, [x2], x3'),
+    (bytes: ($42,$ec,$60,$4d); str: 'ld4r.2d	{ v2, v3, v4, v5 }, [x2]'),
+    (bytes: ($42,$ec,$e3,$4d); str: 'ld4r.2d	{ v2, v3, v4, v5 }, [x2], x3'),
+    (bytes: ($42,$e0,$ff,$0d); str: 'ld4r.8b	{ v2, v3, v4, v5 }, [x2], #4'),
+    (bytes: ($42,$e0,$ff,$4d); str: 'ld4r.16b	{ v2, v3, v4, v5 }, [x2], #4'),
+    (bytes: ($42,$e4,$ff,$0d); str: 'ld4r.4h	{ v2, v3, v4, v5 }, [x2], #8'),
+    (bytes: ($42,$e4,$ff,$4d); str: 'ld4r.8h	{ v2, v3, v4, v5 }, [x2], #8'),
+    (bytes: ($42,$e8,$ff,$0d); str: 'ld4r.2s	{ v2, v3, v4, v5 }, [x2], #16'),
+    (bytes: ($42,$e8,$ff,$4d); str: 'ld4r.4s	{ v2, v3, v4, v5 }, [x2], #16'),
+    (bytes: ($42,$ec,$ff,$0d); str: 'ld4r.1d	{ v2, v3, v4, v5 }, [x2], #32'),
+    (bytes: ($42,$ec,$ff,$4d); str: 'ld4r.2d	{ v2, v3, v4, v5 }, [x2], #32'),
+    (bytes: ($66,$14,$40,$4d); str: 'ld1.b	{ v6 }[13], [x3]'),
+    (bytes: ($66,$50,$40,$0d); str: 'ld1.h	{ v6 }[2], [x3]'),
+    (bytes: ($66,$80,$40,$4d); str: 'ld1.s	{ v6 }[2], [x3]'),
+    (bytes: ($66,$84,$40,$4d); str: 'ld1.d	{ v6 }[1], [x3]'),
+    (bytes: ($66,$14,$c5,$4d); str: 'ld1.b	{ v6 }[13], [x3], x5'),
+    (bytes: ($66,$50,$c5,$0d); str: 'ld1.h	{ v6 }[2], [x3], x5'),
+    (bytes: ($66,$80,$c5,$4d); str: 'ld1.s	{ v6 }[2], [x3], x5'),
+    (bytes: ($66,$84,$c5,$4d); str: 'ld1.d	{ v6 }[1], [x3], x5'),
+    (bytes: ($66,$14,$df,$4d); str: 'ld1.b	{ v6 }[13], [x3], #1'),
+    (bytes: ($66,$50,$df,$0d); str: 'ld1.h	{ v6 }[2], [x3], #2'),
+    (bytes: ($66,$80,$df,$4d); str: 'ld1.s	{ v6 }[2], [x3], #4'),
+    (bytes: ($66,$84,$df,$4d); str: 'ld1.d	{ v6 }[1], [x3], #8'),
+    (bytes: ($65,$14,$60,$4d); str: 'ld2.b	{ v5, v6 }[13], [x3]'),
+    (bytes: ($65,$50,$60,$0d); str: 'ld2.h	{ v5, v6 }[2], [x3]'),
+    (bytes: ($65,$80,$60,$4d); str: 'ld2.s	{ v5, v6 }[2], [x3]'),
+    (bytes: ($65,$84,$60,$4d); str: 'ld2.d	{ v5, v6 }[1], [x3]'),
+    (bytes: ($65,$14,$e5,$4d); str: 'ld2.b	{ v5, v6 }[13], [x3], x5'),
+    (bytes: ($65,$50,$e5,$0d); str: 'ld2.h	{ v5, v6 }[2], [x3], x5'),
+    (bytes: ($65,$80,$e5,$4d); str: 'ld2.s	{ v5, v6 }[2], [x3], x5'),
+    (bytes: ($65,$84,$e5,$4d); str: 'ld2.d	{ v5, v6 }[1], [x3], x5'),
+    (bytes: ($65,$14,$ff,$4d); str: 'ld2.b	{ v5, v6 }[13], [x3], #2'),
+    (bytes: ($65,$50,$ff,$0d); str: 'ld2.h	{ v5, v6 }[2], [x3], #4'),
+    (bytes: ($65,$80,$ff,$4d); str: 'ld2.s	{ v5, v6 }[2], [x3], #8'),
+    (bytes: ($65,$84,$ff,$4d); str: 'ld2.d	{ v5, v6 }[1], [x3], #16'),
+    (bytes: ($67,$34,$40,$4d); str: 'ld3.b	{ v7, v8, v9 }[13], [x3]'),
+    (bytes: ($67,$70,$40,$0d); str: 'ld3.h	{ v7, v8, v9 }[2], [x3]'),
+    (bytes: ($67,$a0,$40,$4d); str: 'ld3.s	{ v7, v8, v9 }[2], [x3]'),
+    (bytes: ($67,$a4,$40,$4d); str: 'ld3.d	{ v7, v8, v9 }[1], [x3]'),
+    (bytes: ($67,$34,$c5,$4d); str: 'ld3.b	{ v7, v8, v9 }[13], [x3], x5'),
+    (bytes: ($67,$70,$c5,$0d); str: 'ld3.h	{ v7, v8, v9 }[2], [x3], x5'),
+    (bytes: ($67,$a0,$c5,$4d); str: 'ld3.s	{ v7, v8, v9 }[2], [x3], x5'),
+    (bytes: ($67,$a4,$c5,$4d); str: 'ld3.d	{ v7, v8, v9 }[1], [x3], x5'),
+    (bytes: ($67,$34,$df,$4d); str: 'ld3.b	{ v7, v8, v9 }[13], [x3], #3'),
+    (bytes: ($67,$70,$df,$0d); str: 'ld3.h	{ v7, v8, v9 }[2], [x3], #6'),
+    (bytes: ($67,$a0,$df,$4d); str: 'ld3.s	{ v7, v8, v9 }[2], [x3], #12'),
+    (bytes: ($67,$a4,$df,$4d); str: 'ld3.d	{ v7, v8, v9 }[1], [x3], #24'),
+    (bytes: ($67,$34,$60,$4d); str: 'ld4.b	{ v7, v8, v9, v10 }[13], [x3]'),
+    (bytes: ($67,$70,$60,$0d); str: 'ld4.h	{ v7, v8, v9, v10 }[2], [x3]'),
+    (bytes: ($67,$a0,$60,$4d); str: 'ld4.s	{ v7, v8, v9, v10 }[2], [x3]'),
+    (bytes: ($67,$a4,$60,$4d); str: 'ld4.d	{ v7, v8, v9, v10 }[1], [x3]'),
+    (bytes: ($67,$34,$e5,$4d); str: 'ld4.b	{ v7, v8, v9, v10 }[13], [x3], x5'),
+    (bytes: ($67,$70,$e5,$0d); str: 'ld4.h	{ v7, v8, v9, v10 }[2], [x3], x5'),
+    (bytes: ($67,$a0,$e5,$4d); str: 'ld4.s	{ v7, v8, v9, v10 }[2], [x3], x5'),
+    (bytes: ($67,$a4,$e5,$4d); str: 'ld4.d	{ v7, v8, v9, v10 }[1], [x3], x5'),
+    (bytes: ($67,$34,$ff,$4d); str: 'ld4.b	{ v7, v8, v9, v10 }[13], [x3], #4'),
+    (bytes: ($67,$70,$ff,$0d); str: 'ld4.h	{ v7, v8, v9, v10 }[2], [x3], #8'),
+    (bytes: ($67,$a0,$ff,$4d); str: 'ld4.s	{ v7, v8, v9, v10 }[2], [x3], #16'),
+    (bytes: ($67,$a4,$ff,$4d); str: 'ld4.d	{ v7, v8, v9, v10 }[1], [x3], #32'),
+    (bytes: ($66,$14,$00,$4d); str: 'st1.b	{ v6 }[13], [x3]'),
+    (bytes: ($66,$50,$00,$0d); str: 'st1.h	{ v6 }[2], [x3]'),
+    (bytes: ($66,$80,$00,$4d); str: 'st1.s	{ v6 }[2], [x3]'),
+    (bytes: ($66,$84,$00,$4d); str: 'st1.d	{ v6 }[1], [x3]'),
+    (bytes: ($66,$14,$85,$4d); str: 'st1.b	{ v6 }[13], [x3], x5'),
+    (bytes: ($66,$50,$85,$0d); str: 'st1.h	{ v6 }[2], [x3], x5'),
+    (bytes: ($66,$80,$85,$4d); str: 'st1.s	{ v6 }[2], [x3], x5'),
+    (bytes: ($66,$84,$85,$4d); str: 'st1.d	{ v6 }[1], [x3], x5'),
+    (bytes: ($66,$14,$9f,$4d); str: 'st1.b	{ v6 }[13], [x3], #1'),
+    (bytes: ($66,$50,$9f,$0d); str: 'st1.h	{ v6 }[2], [x3], #2'),
+    (bytes: ($66,$80,$9f,$4d); str: 'st1.s	{ v6 }[2], [x3], #4'),
+    (bytes: ($66,$84,$9f,$4d); str: 'st1.d	{ v6 }[1], [x3], #8'),
+    (bytes: ($65,$14,$20,$4d); str: 'st2.b	{ v5, v6 }[13], [x3]'),
+    (bytes: ($65,$50,$20,$0d); str: 'st2.h	{ v5, v6 }[2], [x3]'),
+    (bytes: ($65,$80,$20,$4d); str: 'st2.s	{ v5, v6 }[2], [x3]'),
+    (bytes: ($65,$84,$20,$4d); str: 'st2.d	{ v5, v6 }[1], [x3]'),
+    (bytes: ($65,$14,$a5,$4d); str: 'st2.b	{ v5, v6 }[13], [x3], x5'),
+    (bytes: ($65,$50,$a5,$0d); str: 'st2.h	{ v5, v6 }[2], [x3], x5'),
+    (bytes: ($65,$80,$a5,$4d); str: 'st2.s	{ v5, v6 }[2], [x3], x5'),
+    (bytes: ($65,$84,$a5,$4d); str: 'st2.d	{ v5, v6 }[1], [x3], x5'),
+    (bytes: ($65,$14,$bf,$4d); str: 'st2.b	{ v5, v6 }[13], [x3], #2'),
+    (bytes: ($65,$50,$bf,$0d); str: 'st2.h	{ v5, v6 }[2], [x3], #4'),
+    (bytes: ($65,$80,$bf,$4d); str: 'st2.s	{ v5, v6 }[2], [x3], #8'),
+    (bytes: ($65,$84,$bf,$4d); str: 'st2.d	{ v5, v6 }[1], [x3], #16'),
+    (bytes: ($67,$34,$00,$4d); str: 'st3.b	{ v7, v8, v9 }[13], [x3]'),
+    (bytes: ($67,$70,$00,$0d); str: 'st3.h	{ v7, v8, v9 }[2], [x3]'),
+    (bytes: ($67,$a0,$00,$4d); str: 'st3.s	{ v7, v8, v9 }[2], [x3]'),
+    (bytes: ($67,$a4,$00,$4d); str: 'st3.d	{ v7, v8, v9 }[1], [x3]'),
+    (bytes: ($67,$34,$85,$4d); str: 'st3.b	{ v7, v8, v9 }[13], [x3], x5'),
+    (bytes: ($67,$70,$85,$0d); str: 'st3.h	{ v7, v8, v9 }[2], [x3], x5'),
+    (bytes: ($67,$a0,$85,$4d); str: 'st3.s	{ v7, v8, v9 }[2], [x3], x5'),
+    (bytes: ($67,$a4,$85,$4d); str: 'st3.d	{ v7, v8, v9 }[1], [x3], x5'),
+    (bytes: ($67,$34,$9f,$4d); str: 'st3.b	{ v7, v8, v9 }[13], [x3], #3'),
+    (bytes: ($67,$70,$9f,$0d); str: 'st3.h	{ v7, v8, v9 }[2], [x3], #6'),
+    (bytes: ($67,$a0,$9f,$4d); str: 'st3.s	{ v7, v8, v9 }[2], [x3], #12'),
+    (bytes: ($67,$a4,$9f,$4d); str: 'st3.d	{ v7, v8, v9 }[1], [x3], #24'),
+    (bytes: ($67,$34,$20,$4d); str: 'st4.b	{ v7, v8, v9, v10 }[13], [x3]'),
+    (bytes: ($67,$70,$20,$0d); str: 'st4.h	{ v7, v8, v9, v10 }[2], [x3]'),
+    (bytes: ($67,$a0,$20,$4d); str: 'st4.s	{ v7, v8, v9, v10 }[2], [x3]'),
+    (bytes: ($67,$a4,$20,$4d); str: 'st4.d	{ v7, v8, v9, v10 }[1], [x3]'),
+    (bytes: ($67,$34,$a5,$4d); str: 'st4.b	{ v7, v8, v9, v10 }[13], [x3], x5'),
+    (bytes: ($67,$70,$a5,$0d); str: 'st4.h	{ v7, v8, v9, v10 }[2], [x3], x5'),
+    (bytes: ($67,$a0,$a5,$4d); str: 'st4.s	{ v7, v8, v9, v10 }[2], [x3], x5'),
+    (bytes: ($67,$a4,$a5,$4d); str: 'st4.d	{ v7, v8, v9, v10 }[1], [x3], x5'),
+    (bytes: ($67,$34,$bf,$4d); str: 'st4.b	{ v7, v8, v9, v10 }[13], [x3], #4'),
+    (bytes: ($67,$70,$bf,$0d); str: 'st4.h	{ v7, v8, v9, v10 }[2], [x3], #8'),
+    (bytes: ($67,$a0,$bf,$4d); str: 'st4.s	{ v7, v8, v9, v10 }[2], [x3], #16'),
+    (bytes: ($67,$a4,$bf,$4d); str: 'st4.d	{ v7, v8, v9, v10 }[1], [x3], #32')
+  );
+
+function check(const name: string; proc: codepointer; const checkdata: array of tinstrdata): boolean;
+  var
+    i, j: longint;
+  begin
+    result:=true;
+    for i:=low(checkdata) to high(checkdata) do
+      begin
+        for j:=low(checkdata[i].bytes) to high(checkdata[i].bytes) do
+          if byte((proc+i*4+j)^) <> checkdata[i].bytes[j] then
+            begin
+              writeln('Mismatch in procedure ', name, ' for instruction ', i, ': ', checkdata[i].str);
+              result:=false;
+            end;
+      end;
+  end;
+
+var
+  error: boolean;
+begin
+  error:=not check('ld1st1_multiple', @ld1st1_multiple, ld1st1_multiple_data);
+  error:=not check('ld2st2_multiple', @ld2st2_multiple, ld2st2_multiple_data) or error;
+  error:=not check('ld3st3_multiple', @ld3st3_multiple, ld3st3_multiple_data) or error;
+  error:=not check('ld4st4_multiple', @ld4st4_multiple, ld4st4_multiple_data) or error;
+  error:=not check('ld1st1_multiple_post', @ld1st1_multiple_post, ld1st1_multiple_post_data) or error;
+  error:=not check('ld2st2_multiple_post', @ld2st2_multiple_post, ld2st2_multiple_post_data) or error;
+  error:=not check('ld3st3_multiple_post', @ld3st3_multiple_post, ld3st3_multiple_post_data) or error;
+  error:=not check('ld4st4_multiple_post', @ld4st4_multiple_post, ld4st4_multiple_post_data) or error;
+  error:=not check('ld1', @ld1, ld1_data) or error;
+  error:=not check('ld2', @ld2, ld2_data) or error;
+  error:=not check('ld3', @ld3, ld3_data) or error;
+  error:=not check('ld4', @ld4, ld4_data) or error;
+  error:=not check('ld1r', @ld1r, ld1r_data) or error;
+  error:=not check('ld2r', @ld2r, ld2r_data) or error;
+  error:=not check('ld3r', @ld3r, ld3r_data) or error;
+  error:=not check('ld4r', @ld4r, ld4r_data) or error;
+  error:=not check('st1', @st1, st1_data) or error;
+  error:=not check('st2', @st2, st2_data) or error;
+  error:=not check('st3', @st3, st3_data) or error;
+  error:=not check('st4', @st4, st4_data) or error;
+  error:=not check('verbose_syntax', @verbose_syntax, verbose_syntax_data) or error;
+  halt(ord(error));
+end.

tests/webtbs/tw37382.pp

@@ -0,0 +1,20 @@
+{$mode objfpc}
+{$h+}
+
+uses
+  GDeque;
+
+type
+  TIntQueue = specialize TDeque<Integer>;
+
+var
+  Q: TIntQueue;
+
+begin
+  Q := TIntQueue.Create;
+  Q.Insert(0, 12345);
+  writeln('Size=',Q.Size);
+  Q.Erase(0);
+  writeln('Size=',Q.Size);
+  Q.Free;
+end.

tests/webtbs/tw37926.pp

@@ -0,0 +1,24 @@
+{$mode objfpc}
+uses
+  sysutils,math;
+procedure test(const s: single);
+var
+  tempcode: integer;
+  sr: single;
+begin
+  Val('8.077936E-28', sr, tempcode);
+  if sr <> s then
+end;
+
+var s, sr: single;
+  i, j, tempcode: Integer;
+begin
+  for i := 1 to 5000 do begin
+    s := 0;
+    try
+      for j := 0 to Random(5) do s := s + Random(2) * power(2, Random(256) - 127);
+    except
+      on e: EMathError do s := 0; //continue;
+    end;
+  end;
+end.