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@@ -1192,13 +1192,12 @@ unit cgcpu;
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end
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else
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{ Fallback branch, plain 68000 for now }
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- { FIX ME: this is slow as hell, but original 68000 doesn't have 32x32 -> 32bit MUL (KB) }
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- { TODO: verify mul to shift+sub/add results and enable this }
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- // if not optimize_const_mul_to_shift_sub_add(list, 5, a, size, reg) then
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- if op = OP_MUL then
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- call_rtl_mul_const_reg(list, size, a, reg,'fpc_mul_dword')
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- else
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- call_rtl_mul_const_reg(list, size, a, reg,'fpc_mul_longint');
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+ if not optimize_const_mul_to_shift_sub_add(list, 5, a, size, reg) then
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+ { FIX ME: this is slow as hell, but original 68000 doesn't have 32x32 -> 32bit MUL (KB) }
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+ if op = OP_MUL then
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+ call_rtl_mul_const_reg(list, size, a, reg,'fpc_mul_dword')
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+ else
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+ call_rtl_mul_const_reg(list, size, a, reg,'fpc_mul_longint');
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end;
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end;
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OP_ROL,
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