+ register definitions for AArch64 aka ARM64

+ Lazarus project for AArch64

Since AArch64 is very different from 32 Bit ARM, both won't share code in the compiler

git-svn-id: trunk@22894 -

.gitattributes

@@ -6,6 +6,16 @@ compiler/MPWMake -text
 compiler/Makefile svneol=native#text/plain
 compiler/Makefile.fpc svneol=native#text/plain
 compiler/README.txt svneol=native#text/plain
+compiler/aarch64/a64reg.dat svneol=native#text/plain
+compiler/aarch64/ra64con.inc svneol=native#text/plain
+compiler/aarch64/ra64dwa.inc svneol=native#text/plain
+compiler/aarch64/ra64nor.inc svneol=native#text/plain
+compiler/aarch64/ra64num.inc svneol=native#text/plain
+compiler/aarch64/ra64rni.inc svneol=native#text/plain
+compiler/aarch64/ra64sri.inc svneol=native#text/plain
+compiler/aarch64/ra64sta.inc svneol=native#text/plain
+compiler/aarch64/ra64std.inc svneol=native#text/plain
+compiler/aarch64/ra64sup.inc svneol=native#text/plain
 compiler/aasmbase.pas svneol=native#text/plain
 compiler/aasmdata.pas svneol=native#text/plain
 compiler/aasmsym.pas svneol=native#text/plain
@@ -651,6 +661,7 @@ compiler/utils/fpimpdef.pp svneol=native#text/plain
 compiler/utils/gia64reg.pp svneol=native#text/plain
 compiler/utils/gppc386.pp svneol=native#text/plain
 compiler/utils/mk68kreg.pp svneol=native#text/plain
+compiler/utils/mka64reg.pp svneol=native#text/plain
 compiler/utils/mkarmins.pp svneol=native#text/plain
 compiler/utils/mkarmreg.pp svneol=native#text/plain
 compiler/utils/mkavrreg.pp svneol=native#text/plain

compiler/Makefile

@@ -1,5 +1,5 @@
 #
-# Don't edit, this file is generated by FPCMake Version 2.0.0 [2012/10/21]
+# Don't edit, this file is generated by FPCMake Version 2.0.0 [2012/10/31]
 #
 default: all
 MAKEFILETARGETS=i386-linux i386-go32v2 i386-win32 i386-os2 i386-freebsd i386-beos i386-haiku i386-netbsd i386-solaris i386-qnx i386-netware i386-openbsd i386-wdosx i386-darwin i386-emx i386-watcom i386-netwlibc i386-wince i386-embedded i386-symbian i386-nativent i386-iphonesim m68k-linux m68k-freebsd m68k-netbsd m68k-amiga m68k-atari m68k-openbsd m68k-palmos m68k-embedded powerpc-linux powerpc-netbsd powerpc-amiga powerpc-macos powerpc-darwin powerpc-morphos powerpc-embedded powerpc-wii powerpc-aix sparc-linux sparc-netbsd sparc-solaris sparc-embedded x86_64-linux x86_64-freebsd x86_64-netbsd x86_64-solaris x86_64-openbsd x86_64-darwin x86_64-win64 x86_64-embedded arm-linux arm-palmos arm-darwin arm-wince arm-gba arm-nds arm-embedded arm-symbian powerpc64-linux powerpc64-darwin powerpc64-embedded powerpc64-aix avr-embedded armeb-linux armeb-embedded mips-linux mipsel-linux jvm-java jvm-android
@@ -3422,51 +3422,6 @@ endif
 ifeq ($(FULL_TARGET),jvm-android)
 TARGET_DIRS_UTILS=1
 endif
-ifdef TARGET_DIRS_TARGET_DIRS
-TARGET_DIRS_all:
-	$(MAKE) -C TARGET_DIRS all
-TARGET_DIRS_debug:
-	$(MAKE) -C TARGET_DIRS debug
-TARGET_DIRS_smart:
-	$(MAKE) -C TARGET_DIRS smart
-TARGET_DIRS_release:
-	$(MAKE) -C TARGET_DIRS release
-TARGET_DIRS_units:
-	$(MAKE) -C TARGET_DIRS units
-TARGET_DIRS_examples:
-	$(MAKE) -C TARGET_DIRS examples
-TARGET_DIRS_shared:
-	$(MAKE) -C TARGET_DIRS shared
-TARGET_DIRS_install:
-	$(MAKE) -C TARGET_DIRS install
-TARGET_DIRS_sourceinstall:
-	$(MAKE) -C TARGET_DIRS sourceinstall
-TARGET_DIRS_exampleinstall:
-	$(MAKE) -C TARGET_DIRS exampleinstall
-TARGET_DIRS_distinstall:
-	$(MAKE) -C TARGET_DIRS distinstall
-TARGET_DIRS_zipinstall:
-	$(MAKE) -C TARGET_DIRS zipinstall
-TARGET_DIRS_zipsourceinstall:
-	$(MAKE) -C TARGET_DIRS zipsourceinstall
-TARGET_DIRS_zipexampleinstall:
-	$(MAKE) -C TARGET_DIRS zipexampleinstall
-TARGET_DIRS_zipdistinstall:
-	$(MAKE) -C TARGET_DIRS zipdistinstall
-TARGET_DIRS_clean:
-	$(MAKE) -C TARGET_DIRS clean
-TARGET_DIRS_distclean:
-	$(MAKE) -C TARGET_DIRS distclean
-TARGET_DIRS_cleanall:
-	$(MAKE) -C TARGET_DIRS cleanall
-TARGET_DIRS_info:
-	$(MAKE) -C TARGET_DIRS info
-TARGET_DIRS_makefiles:
-	$(MAKE) -C TARGET_DIRS makefiles
-TARGET_DIRS:
-	$(MAKE) -C TARGET_DIRS all
-.PHONY: TARGET_DIRS_all TARGET_DIRS_debug TARGET_DIRS_smart TARGET_DIRS_release TARGET_DIRS_units TARGET_DIRS_examples TARGET_DIRS_shared TARGET_DIRS_install TARGET_DIRS_sourceinstall TARGET_DIRS_exampleinstall TARGET_DIRS_distinstall TARGET_DIRS_zipinstall TARGET_DIRS_zipsourceinstall TARGET_DIRS_zipexampleinstall TARGET_DIRS_zipdistinstall TARGET_DIRS_clean TARGET_DIRS_distclean TARGET_DIRS_cleanall TARGET_DIRS_info TARGET_DIRS_makefiles TARGET_DIRS
-endif
 ifdef TARGET_DIRS_UTILS
 utils_all:
 	$(MAKE) -C utils all
@@ -3512,51 +3467,6 @@ utils:
 	$(MAKE) -C utils all
 .PHONY: utils_all utils_debug utils_smart utils_release utils_units utils_examples utils_shared utils_install utils_sourceinstall utils_exampleinstall utils_distinstall utils_zipinstall utils_zipsourceinstall utils_zipexampleinstall utils_zipdistinstall utils_clean utils_distclean utils_cleanall utils_info utils_makefiles utils
 endif
-ifdef TARGET_EXAMPLEDIRS_TARGET_EXAMPLEDIRS
-TARGET_EXAMPLEDIRS_all:
-	$(MAKE) -C TARGET_EXAMPLEDIRS all
-TARGET_EXAMPLEDIRS_debug:
-	$(MAKE) -C TARGET_EXAMPLEDIRS debug
-TARGET_EXAMPLEDIRS_smart:
-	$(MAKE) -C TARGET_EXAMPLEDIRS smart
-TARGET_EXAMPLEDIRS_release:
-	$(MAKE) -C TARGET_EXAMPLEDIRS release
-TARGET_EXAMPLEDIRS_units:
-	$(MAKE) -C TARGET_EXAMPLEDIRS units
-TARGET_EXAMPLEDIRS_examples:
-	$(MAKE) -C TARGET_EXAMPLEDIRS examples
-TARGET_EXAMPLEDIRS_shared:
-	$(MAKE) -C TARGET_EXAMPLEDIRS shared
-TARGET_EXAMPLEDIRS_install:
-	$(MAKE) -C TARGET_EXAMPLEDIRS install
-TARGET_EXAMPLEDIRS_sourceinstall:
-	$(MAKE) -C TARGET_EXAMPLEDIRS sourceinstall
-TARGET_EXAMPLEDIRS_exampleinstall:
-	$(MAKE) -C TARGET_EXAMPLEDIRS exampleinstall
-TARGET_EXAMPLEDIRS_distinstall:
-	$(MAKE) -C TARGET_EXAMPLEDIRS distinstall
-TARGET_EXAMPLEDIRS_zipinstall:
-	$(MAKE) -C TARGET_EXAMPLEDIRS zipinstall
-TARGET_EXAMPLEDIRS_zipsourceinstall:
-	$(MAKE) -C TARGET_EXAMPLEDIRS zipsourceinstall
-TARGET_EXAMPLEDIRS_zipexampleinstall:
-	$(MAKE) -C TARGET_EXAMPLEDIRS zipexampleinstall
-TARGET_EXAMPLEDIRS_zipdistinstall:
-	$(MAKE) -C TARGET_EXAMPLEDIRS zipdistinstall
-TARGET_EXAMPLEDIRS_clean:
-	$(MAKE) -C TARGET_EXAMPLEDIRS clean
-TARGET_EXAMPLEDIRS_distclean:
-	$(MAKE) -C TARGET_EXAMPLEDIRS distclean
-TARGET_EXAMPLEDIRS_cleanall:
-	$(MAKE) -C TARGET_EXAMPLEDIRS cleanall
-TARGET_EXAMPLEDIRS_info:
-	$(MAKE) -C TARGET_EXAMPLEDIRS info
-TARGET_EXAMPLEDIRS_makefiles:
-	$(MAKE) -C TARGET_EXAMPLEDIRS makefiles
-TARGET_EXAMPLEDIRS:
-	$(MAKE) -C TARGET_EXAMPLEDIRS all
-.PHONY: TARGET_EXAMPLEDIRS_all TARGET_EXAMPLEDIRS_debug TARGET_EXAMPLEDIRS_smart TARGET_EXAMPLEDIRS_release TARGET_EXAMPLEDIRS_units TARGET_EXAMPLEDIRS_examples TARGET_EXAMPLEDIRS_shared TARGET_EXAMPLEDIRS_install TARGET_EXAMPLEDIRS_sourceinstall TARGET_EXAMPLEDIRS_exampleinstall TARGET_EXAMPLEDIRS_distinstall TARGET_EXAMPLEDIRS_zipinstall TARGET_EXAMPLEDIRS_zipsourceinstall TARGET_EXAMPLEDIRS_zipexampleinstall TARGET_EXAMPLEDIRS_zipdistinstall TARGET_EXAMPLEDIRS_clean TARGET_EXAMPLEDIRS_distclean TARGET_EXAMPLEDIRS_cleanall TARGET_EXAMPLEDIRS_info TARGET_EXAMPLEDIRS_makefiles TARGET_EXAMPLEDIRS
-endif
 ifndef DIFF
 DIFF:=$(strip $(wildcard $(addsuffix /diff$(SRCEXEEXT),$(SEARCHPATH))))
 ifeq ($(DIFF),)
@@ -3715,6 +3625,9 @@ regdatsp : sparc/spreg.dat
 regdatavr : avr/avrreg.dat
 	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkavrreg.pp
 	cd avr && ..$(PATHSEP)utils$(PATHSEP)mkavrreg$(SRCEXEEXT)
+regdataarch64 : aarch64/a64reg.dat
+	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mka64reg.pp
+	cd aarch64 && ..$(PATHSEP)utils$(PATHSEP)mka64reg$(SRCEXEEXT)
 revision.inc :
 ifneq ($(REVSTR),)
 ifdef USEZIPWRAPPER

compiler/Makefile.fpc

@@ -494,7 +494,9 @@ regdatavr : avr/avrreg.dat
             $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkavrreg.pp
         cd avr && ..$(PATHSEP)utils$(PATHSEP)mkavrreg$(SRCEXEEXT)
 
-
+regdataarch64 : aarch64/a64reg.dat
+	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mka64reg.pp
+        cd aarch64 && ..$(PATHSEP)utils$(PATHSEP)mka64reg$(SRCEXEEXT)
 
 # revision.inc rule
 revision.inc :

compiler/aarch64/a64reg.dat

@@ -0,0 +1,235 @@
+;
+; AArch64 registers
+;
+; layout
+; <name>,<type>,<subtype>,<value>,<stdname>,<stab idx>,<dwarf idx>
+;
+NO,$00,$00,$00,INVALID,-1,-1
+; Integer registers
+W0,$01,$04,$00,w0,0,0
+X0,$01,$05,$00,x0,0,0
+W1,$01,$04,$01,w1,1,1
+X1,$01,$05,$01,x1,1,1
+W2,$01,$04,$02,w2,2,2
+X2,$01,$05,$02,x2,2,2
+W3,$01,$04,$03,w3,3,3
+X3,$01,$05,$03,x3,3,3
+W4,$01,$04,$04,w4,4,4
+X4,$01,$05,$04,x4,4,4
+W5,$01,$04,$05,w5,5,5
+X5,$01,$05,$05,x5,5,5
+W6,$01,$04,$06,w6,6,6
+X6,$01,$05,$06,x6,6,6
+W7,$01,$04,$07,w7,7,7
+X7,$01,$05,$07,x7,7,7
+W8,$01,$04,$08,w8,8,8
+X8,$01,$05,$08,x8,8,8
+W9,$01,$04,$09,w9,9,9
+X9,$01,$05,$09,x9,9,9
+W10,$01,$04,$0A,w10,10,10
+X10,$01,$05,$0A,x10,10,10
+W11,$01,$04,$0B,w11,11,11
+X11,$01,$05,$0B,x11,11,11
+W12,$01,$04,$0C,w12,12,12
+X12,$01,$05,$0C,x12,12,12
+W13,$01,$04,$0D,w13,13,13
+X13,$01,$05,$0D,x13,13,13
+W14,$01,$04,$0E,w14,14,14
+X14,$01,$05,$0E,x14,14,14
+W15,$01,$04,$0F,w15,15,15
+X15,$01,$05,$0F,x15,15,15
+W16,$01,$04,$10,w16,16,16
+X16,$01,$05,$10,x16,16,16
+W17,$01,$04,$11,w17,17,17
+X17,$01,$05,$11,x17,17,17
+W18,$01,$04,$12,w18,18,18
+X18,$01,$05,$12,x18,18,18
+W19,$01,$04,$13,w19,19,19
+X19,$01,$05,$13,x19,19,19
+W20,$01,$04,$14,w20,20,20
+X20,$01,$05,$14,x20,20,20
+W21,$01,$04,$15,w21,21,21
+X21,$01,$05,$15,x21,21,21
+W22,$01,$04,$16,w22,22,22
+X22,$01,$05,$16,x22,22,22
+W23,$01,$04,$17,w23,23,23
+X23,$01,$05,$17,x23,23,23
+W24,$01,$04,$18,w24,24,24
+X24,$01,$05,$18,x24,24,24
+W25,$01,$04,$19,w25,25,25
+X25,$01,$05,$19,x25,25,25
+W26,$01,$04,$1A,w26,26,26
+X26,$01,$05,$1A,x26,26,26
+W27,$01,$04,$1B,w27,27,27
+X27,$01,$05,$1B,x27,27,27
+W28,$01,$04,$1C,w28,28,28
+X28,$01,$05,$1C,x28,28,28
+W29,$01,$04,$1D,w29,29,29
+X29,$01,$05,$1D,x29,29,29
+W30,$01,$04,$1E,w30,30,30
+X30,$01,$05,$1E,x30,30,30
+WZR,$01,$04,$1F,wzr,31,31
+XZR,$01,$05,$1F,xzr,31,31
+
+
+; vfp registers
+B0,$04,$01,$00,b0,0,0
+H0,$04,$03,$00,h0,0,0
+S0,$04,$09,$00,s0,0,0
+D0,$04,$0a,$00,d0,0,0
+Q0,$04,$05,$00,q0,0,0
+B1,$04,$01,$01,b1,1,1
+H1,$04,$03,$01,h1,1,1
+S1,$04,$09,$01,s1,1,1
+D1,$04,$0a,$01,d1,1,1
+Q1,$04,$05,$01,q1,1,1
+B2,$04,$01,$02,b2,2,2
+H2,$04,$03,$02,h2,2,2
+S2,$04,$09,$02,s2,2,2
+D2,$04,$0a,$02,d2,2,2
+Q2,$04,$05,$02,q2,2,2
+B3,$04,$01,$03,b3,3,3
+H3,$04,$03,$03,h3,3,3
+S3,$04,$09,$03,s3,3,3
+D3,$04,$0a,$03,d3,3,3
+Q3,$04,$05,$03,q3,3,3
+B4,$04,$01,$04,b4,4,4
+H4,$04,$03,$04,h4,4,4
+S4,$04,$09,$04,s4,4,4
+D4,$04,$0a,$04,d4,4,4
+Q4,$04,$05,$04,q4,4,4
+B5,$04,$01,$05,b5,5,5
+H5,$04,$03,$05,h5,5,5
+S5,$04,$09,$05,s5,5,5
+D5,$04,$0a,$05,d5,5,5
+Q5,$04,$05,$05,q5,5,5
+B6,$04,$01,$06,b6,6,6
+H6,$04,$03,$06,h6,6,6
+S6,$04,$09,$06,s6,6,6
+D6,$04,$0a,$06,d6,6,6
+Q6,$04,$05,$06,q6,6,6
+B7,$04,$01,$07,b7,7,7
+H7,$04,$03,$07,h7,7,7
+S7,$04,$09,$07,s7,7,7
+D7,$04,$0a,$07,d7,7,7
+Q7,$04,$05,$07,q7,7,7
+B8,$04,$01,$08,b8,8,8
+H8,$04,$03,$08,h8,8,8
+S8,$04,$09,$08,s8,8,8
+D8,$04,$0a,$08,d8,8,8
+Q8,$04,$05,$08,q8,8,8
+B9,$04,$01,$09,b9,9,9
+H9,$04,$03,$09,h9,9,9
+S9,$04,$09,$09,s9,9,9
+D9,$04,$0a,$09,d9,9,9
+Q9,$04,$05,$09,q9,9,9
+B10,$04,$01,$0A,b10,10,10
+H10,$04,$03,$0A,h10,10,10
+S10,$04,$09,$0A,s10,10,10
+D10,$04,$0a,$0A,d10,10,10
+Q10,$04,$05,$0A,q10,10,10
+B11,$04,$01,$0B,b11,11,11
+H11,$04,$03,$0B,h11,11,11
+S11,$04,$09,$0B,s11,11,11
+D11,$04,$0a,$0B,d11,11,11
+Q11,$04,$05,$0B,q11,11,11
+B12,$04,$01,$0C,b12,12,12
+H12,$04,$03,$0C,h12,12,12
+S12,$04,$09,$0C,s12,12,12
+D12,$04,$0a,$0C,d12,12,12
+Q12,$04,$05,$0C,q12,12,12
+B13,$04,$01,$0D,b13,13,13
+H13,$04,$03,$0D,h13,13,13
+S13,$04,$09,$0D,s13,13,13
+D13,$04,$0a,$0D,d13,13,13
+Q13,$04,$05,$0D,q13,13,13
+B14,$04,$01,$0E,b14,14,14
+H14,$04,$03,$0E,h14,14,14
+S14,$04,$09,$0E,s14,14,14
+D14,$04,$0a,$0E,d14,14,14
+Q14,$04,$05,$0E,q14,14,14
+B15,$04,$01,$0F,b15,15,15
+H15,$04,$03,$0F,h15,15,15
+S15,$04,$09,$0F,s15,15,15
+D15,$04,$0a,$0F,d15,15,15
+Q15,$04,$05,$0F,q15,15,15
+B16,$04,$01,$10,b16,16,16
+H16,$04,$03,$10,h16,16,16
+S16,$04,$09,$10,s16,16,16
+D16,$04,$0a,$10,d16,16,16
+Q16,$04,$05,$10,q16,16,16
+B17,$04,$01,$11,b17,17,17
+H17,$04,$03,$11,h17,17,17
+S17,$04,$09,$11,s17,17,17
+D17,$04,$0a,$11,d17,17,17
+Q17,$04,$05,$11,q17,17,17
+B18,$04,$01,$12,b18,18,18
+H18,$04,$03,$12,h18,18,18
+S18,$04,$09,$12,s18,18,18
+D18,$04,$0a,$12,d18,18,18
+Q18,$04,$05,$12,q18,18,18
+B19,$04,$01,$13,b19,19,19
+H19,$04,$03,$13,h19,19,19
+S19,$04,$09,$13,s19,19,19
+D19,$04,$0a,$13,d19,19,19
+Q19,$04,$05,$13,q19,19,19
+B20,$04,$01,$14,b20,20,20
+H20,$04,$03,$14,h20,20,20
+S20,$04,$09,$14,s20,20,20
+D20,$04,$0a,$14,d20,20,20
+Q20,$04,$05,$14,q20,20,20
+B21,$04,$01,$15,b21,21,21
+H21,$04,$03,$15,h21,21,21
+S21,$04,$09,$15,s21,21,21
+D21,$04,$0a,$15,d21,21,21
+Q21,$04,$05,$15,q21,21,21
+B22,$04,$01,$16,b22,22,22
+H22,$04,$03,$16,h22,22,22
+S22,$04,$09,$16,s22,22,22
+D22,$04,$0a,$16,d22,22,22
+Q22,$04,$05,$16,q22,22,22
+B23,$04,$01,$17,b23,23,23
+H23,$04,$03,$17,h23,23,23
+S23,$04,$09,$17,s23,23,23
+D23,$04,$0a,$17,d23,23,23
+Q23,$04,$05,$17,q23,23,23
+B24,$04,$01,$18,b24,24,24
+H24,$04,$03,$18,h24,24,24
+S24,$04,$09,$18,s24,24,24
+D24,$04,$0a,$18,d24,24,24
+Q24,$04,$05,$18,q24,24,24
+B25,$04,$01,$19,b25,25,25
+H25,$04,$03,$19,h25,25,25
+S25,$04,$09,$19,s25,25,25
+D25,$04,$0a,$19,d25,25,25
+Q25,$04,$05,$19,q25,25,25
+B26,$04,$01,$1A,b26,26,26
+H26,$04,$03,$1A,h26,26,26
+S26,$04,$09,$1A,s26,26,26
+D26,$04,$0a,$1A,d26,26,26
+Q26,$04,$05,$1A,q26,26,26
+B27,$04,$01,$1B,b27,27,27
+H27,$04,$03,$1B,h27,27,27
+S27,$04,$09,$1B,s27,27,27
+D27,$04,$0a,$1B,d27,27,27
+Q27,$04,$05,$1B,q27,27,27
+B28,$04,$01,$1C,b28,28,28
+H28,$04,$03,$1C,h28,28,28
+S28,$04,$09,$1C,s28,28,28
+D28,$04,$0a,$1C,d28,28,28
+Q28,$04,$05,$1C,q28,28,28
+B29,$04,$01,$1D,b29,29,29
+H29,$04,$03,$1D,h29,29,29
+S29,$04,$09,$1D,s29,29,29
+D29,$04,$0a,$1D,d29,29,29
+Q29,$04,$05,$1D,q29,29,29
+B30,$04,$01,$1E,b30,30,30
+H30,$04,$03,$1E,h30,30,30
+S30,$04,$09,$1E,s30,30,30
+D30,$04,$0a,$1E,d30,30,30
+Q30,$04,$05,$1E,q30,30,30
+B31,$04,$01,$1F,b31,31,31
+H31,$04,$03,$1F,h31,31,31
+S31,$04,$09,$1F,s31,31,31
+D31,$04,$0a,$1F,d31,31,31
+Q31,$04,$05,$1F,q31,31,31

compiler/aarch64/ra64con.inc

@@ -0,0 +1,226 @@
+{ don't edit, this file is generated from a64reg.dat }
+NR_NO = tregister($00000000);
+NR_W0 = tregister($01040000);
+NR_X0 = tregister($01050000);
+NR_W1 = tregister($01040001);
+NR_X1 = tregister($01050001);
+NR_W2 = tregister($01040002);
+NR_X2 = tregister($01050002);
+NR_W3 = tregister($01040003);
+NR_X3 = tregister($01050003);
+NR_W4 = tregister($01040004);
+NR_X4 = tregister($01050004);
+NR_W5 = tregister($01040005);
+NR_X5 = tregister($01050005);
+NR_W6 = tregister($01040006);
+NR_X6 = tregister($01050006);
+NR_W7 = tregister($01040007);
+NR_X7 = tregister($01050007);
+NR_W8 = tregister($01040008);
+NR_X8 = tregister($01050008);
+NR_W9 = tregister($01040009);
+NR_X9 = tregister($01050009);
+NR_W10 = tregister($0104000A);
+NR_X10 = tregister($0105000A);
+NR_W11 = tregister($0104000B);
+NR_X11 = tregister($0105000B);
+NR_W12 = tregister($0104000C);
+NR_X12 = tregister($0105000C);
+NR_W13 = tregister($0104000D);
+NR_X13 = tregister($0105000D);
+NR_W14 = tregister($0104000E);
+NR_X14 = tregister($0105000E);
+NR_W15 = tregister($0104000F);
+NR_X15 = tregister($0105000F);
+NR_W16 = tregister($01040010);
+NR_X16 = tregister($01050010);
+NR_W17 = tregister($01040011);
+NR_X17 = tregister($01050011);
+NR_W18 = tregister($01040012);
+NR_X18 = tregister($01050012);
+NR_W19 = tregister($01040013);
+NR_X19 = tregister($01050013);
+NR_W20 = tregister($01040014);
+NR_X20 = tregister($01050014);
+NR_W21 = tregister($01040015);
+NR_X21 = tregister($01050015);
+NR_W22 = tregister($01040016);
+NR_X22 = tregister($01050016);
+NR_W23 = tregister($01040017);
+NR_X23 = tregister($01050017);
+NR_W24 = tregister($01040018);
+NR_X24 = tregister($01050018);
+NR_W25 = tregister($01040019);
+NR_X25 = tregister($01050019);
+NR_W26 = tregister($0104001A);
+NR_X26 = tregister($0105001A);
+NR_W27 = tregister($0104001B);
+NR_X27 = tregister($0105001B);
+NR_W28 = tregister($0104001C);
+NR_X28 = tregister($0105001C);
+NR_W29 = tregister($0104001D);
+NR_X29 = tregister($0105001D);
+NR_W30 = tregister($0104001E);
+NR_X30 = tregister($0105001E);
+NR_WZR = tregister($0104001F);
+NR_XZR = tregister($0105001F);
+NR_B0 = tregister($04010000);
+NR_H0 = tregister($04030000);
+NR_S0 = tregister($04090000);
+NR_D0 = tregister($040a0000);
+NR_Q0 = tregister($04050000);
+NR_B1 = tregister($04010001);
+NR_H1 = tregister($04030001);
+NR_S1 = tregister($04090001);
+NR_D1 = tregister($040a0001);
+NR_Q1 = tregister($04050001);
+NR_B2 = tregister($04010002);
+NR_H2 = tregister($04030002);
+NR_S2 = tregister($04090002);
+NR_D2 = tregister($040a0002);
+NR_Q2 = tregister($04050002);
+NR_B3 = tregister($04010003);
+NR_H3 = tregister($04030003);
+NR_S3 = tregister($04090003);
+NR_D3 = tregister($040a0003);
+NR_Q3 = tregister($04050003);
+NR_B4 = tregister($04010004);
+NR_H4 = tregister($04030004);
+NR_S4 = tregister($04090004);
+NR_D4 = tregister($040a0004);
+NR_Q4 = tregister($04050004);
+NR_B5 = tregister($04010005);
+NR_H5 = tregister($04030005);
+NR_S5 = tregister($04090005);
+NR_D5 = tregister($040a0005);
+NR_Q5 = tregister($04050005);
+NR_B6 = tregister($04010006);
+NR_H6 = tregister($04030006);
+NR_S6 = tregister($04090006);
+NR_D6 = tregister($040a0006);
+NR_Q6 = tregister($04050006);
+NR_B7 = tregister($04010007);
+NR_H7 = tregister($04030007);
+NR_S7 = tregister($04090007);
+NR_D7 = tregister($040a0007);
+NR_Q7 = tregister($04050007);
+NR_B8 = tregister($04010008);
+NR_H8 = tregister($04030008);
+NR_S8 = tregister($04090008);
+NR_D8 = tregister($040a0008);
+NR_Q8 = tregister($04050008);
+NR_B9 = tregister($04010009);
+NR_H9 = tregister($04030009);
+NR_S9 = tregister($04090009);
+NR_D9 = tregister($040a0009);
+NR_Q9 = tregister($04050009);
+NR_B10 = tregister($0401000A);
+NR_H10 = tregister($0403000A);
+NR_S10 = tregister($0409000A);
+NR_D10 = tregister($040a000A);
+NR_Q10 = tregister($0405000A);
+NR_B11 = tregister($0401000B);
+NR_H11 = tregister($0403000B);
+NR_S11 = tregister($0409000B);
+NR_D11 = tregister($040a000B);
+NR_Q11 = tregister($0405000B);
+NR_B12 = tregister($0401000C);
+NR_H12 = tregister($0403000C);
+NR_S12 = tregister($0409000C);
+NR_D12 = tregister($040a000C);
+NR_Q12 = tregister($0405000C);
+NR_B13 = tregister($0401000D);
+NR_H13 = tregister($0403000D);
+NR_S13 = tregister($0409000D);
+NR_D13 = tregister($040a000D);
+NR_Q13 = tregister($0405000D);
+NR_B14 = tregister($0401000E);
+NR_H14 = tregister($0403000E);
+NR_S14 = tregister($0409000E);
+NR_D14 = tregister($040a000E);
+NR_Q14 = tregister($0405000E);
+NR_B15 = tregister($0401000F);
+NR_H15 = tregister($0403000F);
+NR_S15 = tregister($0409000F);
+NR_D15 = tregister($040a000F);
+NR_Q15 = tregister($0405000F);
+NR_B16 = tregister($04010010);
+NR_H16 = tregister($04030010);
+NR_S16 = tregister($04090010);
+NR_D16 = tregister($040a0010);
+NR_Q16 = tregister($04050010);
+NR_B17 = tregister($04010011);
+NR_H17 = tregister($04030011);
+NR_S17 = tregister($04090011);
+NR_D17 = tregister($040a0011);
+NR_Q17 = tregister($04050011);
+NR_B18 = tregister($04010012);
+NR_H18 = tregister($04030012);
+NR_S18 = tregister($04090012);
+NR_D18 = tregister($040a0012);
+NR_Q18 = tregister($04050012);
+NR_B19 = tregister($04010013);
+NR_H19 = tregister($04030013);
+NR_S19 = tregister($04090013);
+NR_D19 = tregister($040a0013);
+NR_Q19 = tregister($04050013);
+NR_B20 = tregister($04010014);
+NR_H20 = tregister($04030014);
+NR_S20 = tregister($04090014);
+NR_D20 = tregister($040a0014);
+NR_Q20 = tregister($04050014);
+NR_B21 = tregister($04010015);
+NR_H21 = tregister($04030015);
+NR_S21 = tregister($04090015);
+NR_D21 = tregister($040a0015);
+NR_Q21 = tregister($04050015);
+NR_B22 = tregister($04010016);
+NR_H22 = tregister($04030016);
+NR_S22 = tregister($04090016);
+NR_D22 = tregister($040a0016);
+NR_Q22 = tregister($04050016);
+NR_B23 = tregister($04010017);
+NR_H23 = tregister($04030017);
+NR_S23 = tregister($04090017);
+NR_D23 = tregister($040a0017);
+NR_Q23 = tregister($04050017);
+NR_B24 = tregister($04010018);
+NR_H24 = tregister($04030018);
+NR_S24 = tregister($04090018);
+NR_D24 = tregister($040a0018);
+NR_Q24 = tregister($04050018);
+NR_B25 = tregister($04010019);
+NR_H25 = tregister($04030019);
+NR_S25 = tregister($04090019);
+NR_D25 = tregister($040a0019);
+NR_Q25 = tregister($04050019);
+NR_B26 = tregister($0401001A);
+NR_H26 = tregister($0403001A);
+NR_S26 = tregister($0409001A);
+NR_D26 = tregister($040a001A);
+NR_Q26 = tregister($0405001A);
+NR_B27 = tregister($0401001B);
+NR_H27 = tregister($0403001B);
+NR_S27 = tregister($0409001B);
+NR_D27 = tregister($040a001B);
+NR_Q27 = tregister($0405001B);
+NR_B28 = tregister($0401001C);
+NR_H28 = tregister($0403001C);
+NR_S28 = tregister($0409001C);
+NR_D28 = tregister($040a001C);
+NR_Q28 = tregister($0405001C);
+NR_B29 = tregister($0401001D);
+NR_H29 = tregister($0403001D);
+NR_S29 = tregister($0409001D);
+NR_D29 = tregister($040a001D);
+NR_Q29 = tregister($0405001D);
+NR_B30 = tregister($0401001E);
+NR_H30 = tregister($0403001E);
+NR_S30 = tregister($0409001E);
+NR_D30 = tregister($040a001E);
+NR_Q30 = tregister($0405001E);
+NR_B31 = tregister($0401001F);
+NR_H31 = tregister($0403001F);
+NR_S31 = tregister($0409001F);
+NR_D31 = tregister($040a001F);
+NR_Q31 = tregister($0405001F);

compiler/aarch64/ra64dwa.inc

@@ -0,0 +1,226 @@
+{ don't edit, this file is generated from a64reg.dat }
+-1,
+0,
+0,
+1,
+1,
+2,
+2,
+3,
+3,
+4,
+4,
+5,
+5,
+6,
+6,
+7,
+7,
+8,
+8,
+9,
+9,
+10,
+10,
+11,
+11,
+12,
+12,
+13,
+13,
+14,
+14,
+15,
+15,
+16,
+16,
+17,
+17,
+18,
+18,
+19,
+19,
+20,
+20,
+21,
+21,
+22,
+22,
+23,
+23,
+24,
+24,
+25,
+25,
+26,
+26,
+27,
+27,
+28,
+28,
+29,
+29,
+30,
+30,
+31,
+31,
+0,
+0,
+0,
+0,
+0,
+1,
+1,
+1,
+1,
+1,
+2,
+2,
+2,
+2,
+2,
+3,
+3,
+3,
+3,
+3,
+4,
+4,
+4,
+4,
+4,
+5,
+5,
+5,
+5,
+5,
+6,
+6,
+6,
+6,
+6,
+7,
+7,
+7,
+7,
+7,
+8,
+8,
+8,
+8,
+8,
+9,
+9,
+9,
+9,
+9,
+10,
+10,
+10,
+10,
+10,
+11,
+11,
+11,
+11,
+11,
+12,
+12,
+12,
+12,
+12,
+13,
+13,
+13,
+13,
+13,
+14,
+14,
+14,
+14,
+14,
+15,
+15,
+15,
+15,
+15,
+16,
+16,
+16,
+16,
+16,
+17,
+17,
+17,
+17,
+17,
+18,
+18,
+18,
+18,
+18,
+19,
+19,
+19,
+19,
+19,
+20,
+20,
+20,
+20,
+20,
+21,
+21,
+21,
+21,
+21,
+22,
+22,
+22,
+22,
+22,
+23,
+23,
+23,
+23,
+23,
+24,
+24,
+24,
+24,
+24,
+25,
+25,
+25,
+25,
+25,
+26,
+26,
+26,
+26,
+26,
+27,
+27,
+27,
+27,
+27,
+28,
+28,
+28,
+28,
+28,
+29,
+29,
+29,
+29,
+29,
+30,
+30,
+30,
+30,
+30,
+31,
+31,
+31,
+31,
+31

compiler/aarch64/ra64nor.inc

@@ -0,0 +1,2 @@
+{ don't edit, this file is generated from a64reg.dat }
+225

compiler/aarch64/ra64num.inc

@@ -0,0 +1,226 @@
+{ don't edit, this file is generated from a64reg.dat }
+tregister($00000000),
+tregister($01040000),
+tregister($01050000),
+tregister($01040001),
+tregister($01050001),
+tregister($01040002),
+tregister($01050002),
+tregister($01040003),
+tregister($01050003),
+tregister($01040004),
+tregister($01050004),
+tregister($01040005),
+tregister($01050005),
+tregister($01040006),
+tregister($01050006),
+tregister($01040007),
+tregister($01050007),
+tregister($01040008),
+tregister($01050008),
+tregister($01040009),
+tregister($01050009),
+tregister($0104000A),
+tregister($0105000A),
+tregister($0104000B),
+tregister($0105000B),
+tregister($0104000C),
+tregister($0105000C),
+tregister($0104000D),
+tregister($0105000D),
+tregister($0104000E),
+tregister($0105000E),
+tregister($0104000F),
+tregister($0105000F),
+tregister($01040010),
+tregister($01050010),
+tregister($01040011),
+tregister($01050011),
+tregister($01040012),
+tregister($01050012),
+tregister($01040013),
+tregister($01050013),
+tregister($01040014),
+tregister($01050014),
+tregister($01040015),
+tregister($01050015),
+tregister($01040016),
+tregister($01050016),
+tregister($01040017),
+tregister($01050017),
+tregister($01040018),
+tregister($01050018),
+tregister($01040019),
+tregister($01050019),
+tregister($0104001A),
+tregister($0105001A),
+tregister($0104001B),
+tregister($0105001B),
+tregister($0104001C),
+tregister($0105001C),
+tregister($0104001D),
+tregister($0105001D),
+tregister($0104001E),
+tregister($0105001E),
+tregister($0104001F),
+tregister($0105001F),
+tregister($04010000),
+tregister($04030000),
+tregister($04090000),
+tregister($040a0000),
+tregister($04050000),
+tregister($04010001),
+tregister($04030001),
+tregister($04090001),
+tregister($040a0001),
+tregister($04050001),
+tregister($04010002),
+tregister($04030002),
+tregister($04090002),
+tregister($040a0002),
+tregister($04050002),
+tregister($04010003),
+tregister($04030003),
+tregister($04090003),
+tregister($040a0003),
+tregister($04050003),
+tregister($04010004),
+tregister($04030004),
+tregister($04090004),
+tregister($040a0004),
+tregister($04050004),
+tregister($04010005),
+tregister($04030005),
+tregister($04090005),
+tregister($040a0005),
+tregister($04050005),
+tregister($04010006),
+tregister($04030006),
+tregister($04090006),
+tregister($040a0006),
+tregister($04050006),
+tregister($04010007),
+tregister($04030007),
+tregister($04090007),
+tregister($040a0007),
+tregister($04050007),
+tregister($04010008),
+tregister($04030008),
+tregister($04090008),
+tregister($040a0008),
+tregister($04050008),
+tregister($04010009),
+tregister($04030009),
+tregister($04090009),
+tregister($040a0009),
+tregister($04050009),
+tregister($0401000A),
+tregister($0403000A),
+tregister($0409000A),
+tregister($040a000A),
+tregister($0405000A),
+tregister($0401000B),
+tregister($0403000B),
+tregister($0409000B),
+tregister($040a000B),
+tregister($0405000B),
+tregister($0401000C),
+tregister($0403000C),
+tregister($0409000C),
+tregister($040a000C),
+tregister($0405000C),
+tregister($0401000D),
+tregister($0403000D),
+tregister($0409000D),
+tregister($040a000D),
+tregister($0405000D),
+tregister($0401000E),
+tregister($0403000E),
+tregister($0409000E),
+tregister($040a000E),
+tregister($0405000E),
+tregister($0401000F),
+tregister($0403000F),
+tregister($0409000F),
+tregister($040a000F),
+tregister($0405000F),
+tregister($04010010),
+tregister($04030010),
+tregister($04090010),
+tregister($040a0010),
+tregister($04050010),
+tregister($04010011),
+tregister($04030011),
+tregister($04090011),
+tregister($040a0011),
+tregister($04050011),
+tregister($04010012),
+tregister($04030012),
+tregister($04090012),
+tregister($040a0012),
+tregister($04050012),
+tregister($04010013),
+tregister($04030013),
+tregister($04090013),
+tregister($040a0013),
+tregister($04050013),
+tregister($04010014),
+tregister($04030014),
+tregister($04090014),
+tregister($040a0014),
+tregister($04050014),
+tregister($04010015),
+tregister($04030015),
+tregister($04090015),
+tregister($040a0015),
+tregister($04050015),
+tregister($04010016),
+tregister($04030016),
+tregister($04090016),
+tregister($040a0016),
+tregister($04050016),
+tregister($04010017),
+tregister($04030017),
+tregister($04090017),
+tregister($040a0017),
+tregister($04050017),
+tregister($04010018),
+tregister($04030018),
+tregister($04090018),
+tregister($040a0018),
+tregister($04050018),
+tregister($04010019),
+tregister($04030019),
+tregister($04090019),
+tregister($040a0019),
+tregister($04050019),
+tregister($0401001A),
+tregister($0403001A),
+tregister($0409001A),
+tregister($040a001A),
+tregister($0405001A),
+tregister($0401001B),
+tregister($0403001B),
+tregister($0409001B),
+tregister($040a001B),
+tregister($0405001B),
+tregister($0401001C),
+tregister($0403001C),
+tregister($0409001C),
+tregister($040a001C),
+tregister($0405001C),
+tregister($0401001D),
+tregister($0403001D),
+tregister($0409001D),
+tregister($040a001D),
+tregister($0405001D),
+tregister($0401001E),
+tregister($0403001E),
+tregister($0409001E),
+tregister($040a001E),
+tregister($0405001E),
+tregister($0401001F),
+tregister($0403001F),
+tregister($0409001F),
+tregister($040a001F),
+tregister($0405001F)

compiler/aarch64/ra64rni.inc

@@ -0,0 +1,226 @@
+{ don't edit, this file is generated from a64reg.dat }
+0,
+1,
+3,
+5,
+7,
+9,
+11,
+13,
+15,
+17,
+19,
+21,
+23,
+25,
+27,
+29,
+31,
+33,
+35,
+37,
+39,
+41,
+43,
+45,
+47,
+49,
+51,
+53,
+55,
+57,
+59,
+61,
+63,
+2,
+4,
+6,
+8,
+10,
+12,
+14,
+16,
+18,
+20,
+22,
+24,
+26,
+28,
+30,
+32,
+34,
+36,
+38,
+40,
+42,
+44,
+46,
+48,
+50,
+52,
+54,
+56,
+58,
+60,
+62,
+64,
+65,
+70,
+75,
+80,
+85,
+90,
+95,
+100,
+105,
+110,
+115,
+120,
+125,
+130,
+135,
+140,
+145,
+150,
+155,
+160,
+165,
+170,
+175,
+180,
+185,
+190,
+195,
+200,
+205,
+210,
+215,
+220,
+66,
+71,
+76,
+81,
+86,
+91,
+96,
+101,
+106,
+111,
+116,
+121,
+126,
+131,
+136,
+141,
+146,
+151,
+156,
+161,
+166,
+171,
+176,
+181,
+186,
+191,
+196,
+201,
+206,
+211,
+216,
+221,
+69,
+74,
+79,
+84,
+89,
+94,
+99,
+104,
+109,
+114,
+119,
+124,
+129,
+134,
+139,
+144,
+149,
+154,
+159,
+164,
+169,
+174,
+179,
+184,
+189,
+194,
+199,
+204,
+209,
+214,
+219,
+224,
+67,
+72,
+77,
+82,
+87,
+92,
+97,
+102,
+107,
+112,
+117,
+122,
+127,
+132,
+137,
+142,
+147,
+152,
+157,
+162,
+167,
+172,
+177,
+182,
+187,
+192,
+197,
+202,
+207,
+212,
+217,
+222,
+68,
+73,
+78,
+83,
+88,
+93,
+98,
+103,
+108,
+113,
+118,
+123,
+128,
+133,
+138,
+143,
+148,
+153,
+158,
+163,
+168,
+173,
+178,
+183,
+188,
+193,
+198,
+203,
+208,
+213,
+218,
+223

compiler/aarch64/ra64sri.inc

@@ -0,0 +1,226 @@
+{ don't edit, this file is generated from a64reg.dat }
+0,
+65,
+70,
+115,
+120,
+125,
+130,
+135,
+140,
+145,
+150,
+155,
+160,
+75,
+165,
+170,
+175,
+180,
+185,
+190,
+195,
+200,
+205,
+210,
+80,
+215,
+220,
+85,
+90,
+95,
+100,
+105,
+110,
+68,
+73,
+118,
+123,
+128,
+133,
+138,
+143,
+148,
+153,
+158,
+163,
+78,
+168,
+173,
+178,
+183,
+188,
+193,
+198,
+203,
+208,
+213,
+83,
+218,
+223,
+88,
+93,
+98,
+103,
+108,
+113,
+66,
+71,
+116,
+121,
+126,
+131,
+136,
+141,
+146,
+151,
+156,
+161,
+76,
+166,
+171,
+176,
+181,
+186,
+191,
+196,
+201,
+206,
+211,
+81,
+216,
+221,
+86,
+91,
+96,
+101,
+106,
+111,
+69,
+74,
+119,
+124,
+129,
+134,
+139,
+144,
+149,
+154,
+159,
+164,
+79,
+169,
+174,
+179,
+184,
+189,
+194,
+199,
+204,
+209,
+214,
+84,
+219,
+224,
+89,
+94,
+99,
+104,
+109,
+114,
+67,
+72,
+117,
+122,
+127,
+132,
+137,
+142,
+147,
+152,
+157,
+162,
+77,
+167,
+172,
+177,
+182,
+187,
+192,
+197,
+202,
+207,
+212,
+82,
+217,
+222,
+87,
+92,
+97,
+102,
+107,
+112,
+1,
+3,
+21,
+23,
+25,
+27,
+29,
+31,
+33,
+35,
+37,
+39,
+5,
+41,
+43,
+45,
+47,
+49,
+51,
+53,
+55,
+57,
+59,
+7,
+61,
+9,
+11,
+13,
+15,
+17,
+19,
+63,
+2,
+4,
+22,
+24,
+26,
+28,
+30,
+32,
+34,
+36,
+38,
+40,
+6,
+42,
+44,
+46,
+48,
+50,
+52,
+54,
+56,
+58,
+60,
+8,
+62,
+10,
+12,
+14,
+16,
+18,
+20,
+64

compiler/aarch64/ra64sta.inc

@@ -0,0 +1,226 @@
+{ don't edit, this file is generated from a64reg.dat }
+-1,
+0,
+0,
+1,
+1,
+2,
+2,
+3,
+3,
+4,
+4,
+5,
+5,
+6,
+6,
+7,
+7,
+8,
+8,
+9,
+9,
+10,
+10,
+11,
+11,
+12,
+12,
+13,
+13,
+14,
+14,
+15,
+15,
+16,
+16,
+17,
+17,
+18,
+18,
+19,
+19,
+20,
+20,
+21,
+21,
+22,
+22,
+23,
+23,
+24,
+24,
+25,
+25,
+26,
+26,
+27,
+27,
+28,
+28,
+29,
+29,
+30,
+30,
+31,
+31,
+0,
+0,
+0,
+0,
+0,
+1,
+1,
+1,
+1,
+1,
+2,
+2,
+2,
+2,
+2,
+3,
+3,
+3,
+3,
+3,
+4,
+4,
+4,
+4,
+4,
+5,
+5,
+5,
+5,
+5,
+6,
+6,
+6,
+6,
+6,
+7,
+7,
+7,
+7,
+7,
+8,
+8,
+8,
+8,
+8,
+9,
+9,
+9,
+9,
+9,
+10,
+10,
+10,
+10,
+10,
+11,
+11,
+11,
+11,
+11,
+12,
+12,
+12,
+12,
+12,
+13,
+13,
+13,
+13,
+13,
+14,
+14,
+14,
+14,
+14,
+15,
+15,
+15,
+15,
+15,
+16,
+16,
+16,
+16,
+16,
+17,
+17,
+17,
+17,
+17,
+18,
+18,
+18,
+18,
+18,
+19,
+19,
+19,
+19,
+19,
+20,
+20,
+20,
+20,
+20,
+21,
+21,
+21,
+21,
+21,
+22,
+22,
+22,
+22,
+22,
+23,
+23,
+23,
+23,
+23,
+24,
+24,
+24,
+24,
+24,
+25,
+25,
+25,
+25,
+25,
+26,
+26,
+26,
+26,
+26,
+27,
+27,
+27,
+27,
+27,
+28,
+28,
+28,
+28,
+28,
+29,
+29,
+29,
+29,
+29,
+30,
+30,
+30,
+30,
+30,
+31,
+31,
+31,
+31,
+31

compiler/aarch64/ra64std.inc

@@ -0,0 +1,226 @@
+{ don't edit, this file is generated from a64reg.dat }
+'INVALID',
+'w0',
+'x0',
+'w1',
+'x1',
+'w2',
+'x2',
+'w3',
+'x3',
+'w4',
+'x4',
+'w5',
+'x5',
+'w6',
+'x6',
+'w7',
+'x7',
+'w8',
+'x8',
+'w9',
+'x9',
+'w10',
+'x10',
+'w11',
+'x11',
+'w12',
+'x12',
+'w13',
+'x13',
+'w14',
+'x14',
+'w15',
+'x15',
+'w16',
+'x16',
+'w17',
+'x17',
+'w18',
+'x18',
+'w19',
+'x19',
+'w20',
+'x20',
+'w21',
+'x21',
+'w22',
+'x22',
+'w23',
+'x23',
+'w24',
+'x24',
+'w25',
+'x25',
+'w26',
+'x26',
+'w27',
+'x27',
+'w28',
+'x28',
+'w29',
+'x29',
+'w30',
+'x30',
+'wzr',
+'xzr',
+'b0',
+'h0',
+'s0',
+'d0',
+'q0',
+'b1',
+'h1',
+'s1',
+'d1',
+'q1',
+'b2',
+'h2',
+'s2',
+'d2',
+'q2',
+'b3',
+'h3',
+'s3',
+'d3',
+'q3',
+'b4',
+'h4',
+'s4',
+'d4',
+'q4',
+'b5',
+'h5',
+'s5',
+'d5',
+'q5',
+'b6',
+'h6',
+'s6',
+'d6',
+'q6',
+'b7',
+'h7',
+'s7',
+'d7',
+'q7',
+'b8',
+'h8',
+'s8',
+'d8',
+'q8',
+'b9',
+'h9',
+'s9',
+'d9',
+'q9',
+'b10',
+'h10',
+'s10',
+'d10',
+'q10',
+'b11',
+'h11',
+'s11',
+'d11',
+'q11',
+'b12',
+'h12',
+'s12',
+'d12',
+'q12',
+'b13',
+'h13',
+'s13',
+'d13',
+'q13',
+'b14',
+'h14',
+'s14',
+'d14',
+'q14',
+'b15',
+'h15',
+'s15',
+'d15',
+'q15',
+'b16',
+'h16',
+'s16',
+'d16',
+'q16',
+'b17',
+'h17',
+'s17',
+'d17',
+'q17',
+'b18',
+'h18',
+'s18',
+'d18',
+'q18',
+'b19',
+'h19',
+'s19',
+'d19',
+'q19',
+'b20',
+'h20',
+'s20',
+'d20',
+'q20',
+'b21',
+'h21',
+'s21',
+'d21',
+'q21',
+'b22',
+'h22',
+'s22',
+'d22',
+'q22',
+'b23',
+'h23',
+'s23',
+'d23',
+'q23',
+'b24',
+'h24',
+'s24',
+'d24',
+'q24',
+'b25',
+'h25',
+'s25',
+'d25',
+'q25',
+'b26',
+'h26',
+'s26',
+'d26',
+'q26',
+'b27',
+'h27',
+'s27',
+'d27',
+'q27',
+'b28',
+'h28',
+'s28',
+'d28',
+'q28',
+'b29',
+'h29',
+'s29',
+'d29',
+'q29',
+'b30',
+'h30',
+'s30',
+'d30',
+'q30',
+'b31',
+'h31',
+'s31',
+'d31',
+'q31'

compiler/aarch64/ra64sup.inc

@@ -0,0 +1,226 @@
+{ don't edit, this file is generated from a64reg.dat }
+RS_NO = $00;
+RS_W0 = $00;
+RS_X0 = $00;
+RS_W1 = $01;
+RS_X1 = $01;
+RS_W2 = $02;
+RS_X2 = $02;
+RS_W3 = $03;
+RS_X3 = $03;
+RS_W4 = $04;
+RS_X4 = $04;
+RS_W5 = $05;
+RS_X5 = $05;
+RS_W6 = $06;
+RS_X6 = $06;
+RS_W7 = $07;
+RS_X7 = $07;
+RS_W8 = $08;
+RS_X8 = $08;
+RS_W9 = $09;
+RS_X9 = $09;
+RS_W10 = $0A;
+RS_X10 = $0A;
+RS_W11 = $0B;
+RS_X11 = $0B;
+RS_W12 = $0C;
+RS_X12 = $0C;
+RS_W13 = $0D;
+RS_X13 = $0D;
+RS_W14 = $0E;
+RS_X14 = $0E;
+RS_W15 = $0F;
+RS_X15 = $0F;
+RS_W16 = $10;
+RS_X16 = $10;
+RS_W17 = $11;
+RS_X17 = $11;
+RS_W18 = $12;
+RS_X18 = $12;
+RS_W19 = $13;
+RS_X19 = $13;
+RS_W20 = $14;
+RS_X20 = $14;
+RS_W21 = $15;
+RS_X21 = $15;
+RS_W22 = $16;
+RS_X22 = $16;
+RS_W23 = $17;
+RS_X23 = $17;
+RS_W24 = $18;
+RS_X24 = $18;
+RS_W25 = $19;
+RS_X25 = $19;
+RS_W26 = $1A;
+RS_X26 = $1A;
+RS_W27 = $1B;
+RS_X27 = $1B;
+RS_W28 = $1C;
+RS_X28 = $1C;
+RS_W29 = $1D;
+RS_X29 = $1D;
+RS_W30 = $1E;
+RS_X30 = $1E;
+RS_WZR = $1F;
+RS_XZR = $1F;
+RS_B0 = $00;
+RS_H0 = $00;
+RS_S0 = $00;
+RS_D0 = $00;
+RS_Q0 = $00;
+RS_B1 = $01;
+RS_H1 = $01;
+RS_S1 = $01;
+RS_D1 = $01;
+RS_Q1 = $01;
+RS_B2 = $02;
+RS_H2 = $02;
+RS_S2 = $02;
+RS_D2 = $02;
+RS_Q2 = $02;
+RS_B3 = $03;
+RS_H3 = $03;
+RS_S3 = $03;
+RS_D3 = $03;
+RS_Q3 = $03;
+RS_B4 = $04;
+RS_H4 = $04;
+RS_S4 = $04;
+RS_D4 = $04;
+RS_Q4 = $04;
+RS_B5 = $05;
+RS_H5 = $05;
+RS_S5 = $05;
+RS_D5 = $05;
+RS_Q5 = $05;
+RS_B6 = $06;
+RS_H6 = $06;
+RS_S6 = $06;
+RS_D6 = $06;
+RS_Q6 = $06;
+RS_B7 = $07;
+RS_H7 = $07;
+RS_S7 = $07;
+RS_D7 = $07;
+RS_Q7 = $07;
+RS_B8 = $08;
+RS_H8 = $08;
+RS_S8 = $08;
+RS_D8 = $08;
+RS_Q8 = $08;
+RS_B9 = $09;
+RS_H9 = $09;
+RS_S9 = $09;
+RS_D9 = $09;
+RS_Q9 = $09;
+RS_B10 = $0A;
+RS_H10 = $0A;
+RS_S10 = $0A;
+RS_D10 = $0A;
+RS_Q10 = $0A;
+RS_B11 = $0B;
+RS_H11 = $0B;
+RS_S11 = $0B;
+RS_D11 = $0B;
+RS_Q11 = $0B;
+RS_B12 = $0C;
+RS_H12 = $0C;
+RS_S12 = $0C;
+RS_D12 = $0C;
+RS_Q12 = $0C;
+RS_B13 = $0D;
+RS_H13 = $0D;
+RS_S13 = $0D;
+RS_D13 = $0D;
+RS_Q13 = $0D;
+RS_B14 = $0E;
+RS_H14 = $0E;
+RS_S14 = $0E;
+RS_D14 = $0E;
+RS_Q14 = $0E;
+RS_B15 = $0F;
+RS_H15 = $0F;
+RS_S15 = $0F;
+RS_D15 = $0F;
+RS_Q15 = $0F;
+RS_B16 = $10;
+RS_H16 = $10;
+RS_S16 = $10;
+RS_D16 = $10;
+RS_Q16 = $10;
+RS_B17 = $11;
+RS_H17 = $11;
+RS_S17 = $11;
+RS_D17 = $11;
+RS_Q17 = $11;
+RS_B18 = $12;
+RS_H18 = $12;
+RS_S18 = $12;
+RS_D18 = $12;
+RS_Q18 = $12;
+RS_B19 = $13;
+RS_H19 = $13;
+RS_S19 = $13;
+RS_D19 = $13;
+RS_Q19 = $13;
+RS_B20 = $14;
+RS_H20 = $14;
+RS_S20 = $14;
+RS_D20 = $14;
+RS_Q20 = $14;
+RS_B21 = $15;
+RS_H21 = $15;
+RS_S21 = $15;
+RS_D21 = $15;
+RS_Q21 = $15;
+RS_B22 = $16;
+RS_H22 = $16;
+RS_S22 = $16;
+RS_D22 = $16;
+RS_Q22 = $16;
+RS_B23 = $17;
+RS_H23 = $17;
+RS_S23 = $17;
+RS_D23 = $17;
+RS_Q23 = $17;
+RS_B24 = $18;
+RS_H24 = $18;
+RS_S24 = $18;
+RS_D24 = $18;
+RS_Q24 = $18;
+RS_B25 = $19;
+RS_H25 = $19;
+RS_S25 = $19;
+RS_D25 = $19;
+RS_Q25 = $19;
+RS_B26 = $1A;
+RS_H26 = $1A;
+RS_S26 = $1A;
+RS_D26 = $1A;
+RS_Q26 = $1A;
+RS_B27 = $1B;
+RS_H27 = $1B;
+RS_S27 = $1B;
+RS_D27 = $1B;
+RS_Q27 = $1B;
+RS_B28 = $1C;
+RS_H28 = $1C;
+RS_S28 = $1C;
+RS_D28 = $1C;
+RS_Q28 = $1C;
+RS_B29 = $1D;
+RS_H29 = $1D;
+RS_S29 = $1D;
+RS_D29 = $1D;
+RS_Q29 = $1D;
+RS_B30 = $1E;
+RS_H30 = $1E;
+RS_S30 = $1E;
+RS_D30 = $1E;
+RS_Q30 = $1E;
+RS_B31 = $1F;
+RS_H31 = $1F;
+RS_S31 = $1F;
+RS_D31 = $1F;
+RS_Q31 = $1F;

compiler/utils/mka64reg.pp

@@ -0,0 +1,276 @@
+{
+    Copyright (c) 1998-2002 by Peter Vreman and Florian Klaempfl
+
+    Convert spreg.dat to several .inc files for usage with
+    the Free pascal compiler
+
+    See the file COPYING.FPC, included in this distribution,
+    for details about the copyright.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+ **********************************************************************}
+{$mode objfpc}
+
+program mkspreg;
+
+const Version = '1.00';
+      max_regcount = 254;
+
+var s : string;
+    i : longint;
+    line : longint;
+    regcount:byte;
+    regcount_bsstart:byte;
+    names,
+    regtypes,
+    subtypes,
+    supregs,
+    numbers,
+    stdnames,
+    stabs,dwarf : array[0..max_regcount-1] of string[63];
+    regnumber_index,
+    std_regname_index : array[0..max_regcount-1] of byte;
+
+function tostr(l : longint) : string;
+
+begin
+  str(l,tostr);
+end;
+
+function readstr : string;
+
+  begin
+     result:='';
+     while (s[i]<>',') and (i<=length(s)) do
+       begin
+          result:=result+s[i];
+          inc(i);
+       end;
+  end;
+
+
+procedure readcomma;
+  begin
+     if s[i]<>',' then
+       begin
+         writeln('Missing "," at line ',line);
+         writeln('Line: "',s,'"');
+         halt(1);
+       end;
+     inc(i);
+  end;
+
+
+procedure skipspace;
+
+  begin
+     while (s[i] in [' ',#9]) do
+       inc(i);
+  end;
+
+procedure openinc(out f:text;const fn:string);
+begin
+  writeln('creating ',fn);
+  assign(f,fn);
+  rewrite(f);
+  writeln(f,'{ don''t edit, this file is generated from a64reg.dat }');
+end;
+
+
+procedure closeinc(var f:text);
+begin
+  writeln(f);
+  close(f);
+end;
+
+procedure build_regnum_index;
+
+var h,i,j,p,t:byte;
+
+begin
+  {Build the registernumber2regindex index.
+   Step 1: Fill.}
+  for i:=0 to regcount-1 do
+    regnumber_index[i]:=i;
+  {Step 2: Sort. We use a Shell-Metzner sort.}
+  p:=regcount_bsstart;
+  repeat
+    for h:=0 to regcount-p-1 do
+      begin
+        i:=h;
+        repeat
+          j:=i+p;
+          if numbers[regnumber_index[j]]>=numbers[regnumber_index[i]] then
+            break;
+          t:=regnumber_index[i];
+          regnumber_index[i]:=regnumber_index[j];
+          regnumber_index[j]:=t;
+          if i<p then
+            break;
+          dec(i,p);
+        until false;
+      end;
+    p:=p shr 1;
+  until p=0;
+end;
+
+procedure build_std_regname_index;
+
+var h,i,j,p,t:byte;
+
+begin
+  {Build the registernumber2regindex index.
+   Step 1: Fill.}
+  for i:=0 to regcount-1 do
+    std_regname_index[i]:=i;
+  {Step 2: Sort. We use a Shell-Metzner sort.}
+  p:=regcount_bsstart;
+  repeat
+    for h:=0 to regcount-p-1 do
+      begin
+        i:=h;
+        repeat
+          j:=i+p;
+          if stdnames[std_regname_index[j]]>=stdnames[std_regname_index[i]] then
+            break;
+          t:=std_regname_index[i];
+          std_regname_index[i]:=std_regname_index[j];
+          std_regname_index[j]:=t;
+          if i<p then
+            break;
+          dec(i,p);
+        until false;
+      end;
+    p:=p shr 1;
+  until p=0;
+end;
+
+
+procedure read_spreg_file;
+
+var infile:text;
+
+begin
+   { open dat file }
+   assign(infile,'a64reg.dat');
+   reset(infile);
+   while not(eof(infile)) do
+     begin
+        { handle comment }
+        readln(infile,s);
+        inc(line);
+        while (s[1]=' ') do
+         delete(s,1,1);
+        if (s='') or (s[1]=';') then
+          continue;
+
+        i:=1;
+        names[regcount]:=readstr;
+        readcomma;
+        regtypes[regcount]:=readstr;
+        readcomma;
+        subtypes[regcount]:=readstr;
+        readcomma;
+        supregs[regcount]:=readstr;
+        readcomma;
+        stdnames[regcount]:=readstr;
+        readcomma;
+        stabs[regcount]:=readstr;
+        readcomma;
+        dwarf[regcount]:=readstr;
+        { Create register number }
+        if supregs[regcount][1]<>'$' then
+          begin
+            writeln('Missing $ before number, at line ',line);
+            writeln('Line: "',s,'"');
+            halt(1);
+          end;
+        numbers[regcount]:=regtypes[regcount]+copy(subtypes[regcount],2,255)+'00'+copy(supregs[regcount],2,255);
+        if i<length(s) then
+          begin
+            writeln('Extra chars at end of line, at line ',line);
+            writeln('Line: "',s,'"');
+            halt(1);
+          end;
+        inc(regcount);
+        if regcount>max_regcount then
+          begin
+            writeln('Error: Too much registers, please increase maxregcount in source');
+            halt(2);
+          end;
+     end;
+   close(infile);
+end;
+
+procedure write_inc_files;
+
+var
+    norfile,stdfile,supfile,
+    numfile,stabfile,dwarffile,confile,
+    rnifile,srifile:text;
+    first:boolean;
+
+begin
+  { create inc files }
+  openinc(confile,'ra64con.inc');
+  openinc(supfile,'ra64sup.inc');
+  openinc(numfile,'ra64num.inc');
+  openinc(stdfile,'ra64std.inc');
+  openinc(stabfile,'ra64sta.inc');
+  openinc(dwarffile,'ra64dwa.inc');
+  openinc(norfile,'ra64nor.inc');
+  openinc(rnifile,'ra64rni.inc');
+  openinc(srifile,'ra64sri.inc');
+  first:=true;
+  for i:=0 to regcount-1 do
+    begin
+      if not first then
+        begin
+          writeln(numfile,',');
+          writeln(stdfile,',');
+          writeln(stabfile,',');
+          writeln(dwarffile,',');
+          writeln(rnifile,',');
+          writeln(srifile,',');
+        end
+      else
+        first:=false;
+      writeln(supfile,'RS_',names[i],' = ',supregs[i],';');
+      writeln(confile,'NR_'+names[i],' = ','tregister(',numbers[i],')',';');
+      write(numfile,'tregister(',numbers[i],')');
+      write(stdfile,'''',stdnames[i],'''');
+      write(stabfile,stabs[i]);
+      write(dwarffile,dwarf[i]);
+      write(rnifile,regnumber_index[i]);
+      write(srifile,std_regname_index[i]);
+    end;
+  write(norfile,regcount);
+  close(confile);
+  close(supfile);
+  closeinc(numfile);
+  closeinc(stdfile);
+  closeinc(stabfile);
+  closeinc(dwarffile);
+  closeinc(norfile);
+  closeinc(rnifile);
+  closeinc(srifile);
+  writeln('Done!');
+  writeln(regcount,' registers processed');
+end;
+
+
+begin
+   writeln('Register Table Converter Version ',Version);
+   line:=0;
+   regcount:=0;
+   read_spreg_file;
+   regcount_bsstart:=1;
+   while 2*regcount_bsstart<regcount do
+     regcount_bsstart:=regcount_bsstart*2;
+   build_regnum_index;
+   build_std_regname_index;
+   write_inc_files;
+end.