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@@ -83,6 +83,8 @@ implementation
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[0],first_int_imreg,[]);
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rg[R_FPUREGISTER]:=Trgllvm.create(R_FPUREGISTER,R_SUBWHOLE,
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[0],first_fpu_imreg,[]);
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+ rg[R_MMREGISTER]:=Trgllvm.create(R_MMREGISTER,R_SUBWHOLE,
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+ [0],first_mm_imreg,[]);
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{ every temp gets its own "base register" to uniquely identify it }
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rg[R_TEMPREGISTER]:=trgllvm.Create(R_TEMPREGISTER,R_SUBWHOLE,
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[0],1,[]);
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