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Fixed passing of 32bit arguments on 8-bit architectures.
Added initial RTL startup code for AVR.

git-svn-id: trunk@26931 -

Jeppe Johansen 11 vuotta sitten
vanhempi
commit
66f5b71fe9
3 muutettua tiedostoa jossa 42 lisäystä ja 22 poistoa
  1. 15 0
      compiler/ncgutil.pas
  2. 2 2
      rtl/embedded/avr/atmega128.pp
  3. 25 20
      rtl/embedded/avr/start.inc

+ 15 - 0
compiler/ncgutil.pas

@@ -1083,6 +1083,21 @@ implementation
                             cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,destloc.registerhi,sizeof(aint));
                           {$endif}
                         end
+{$if defined(cpu8bitalu)}
+                      else if (destloc.size in [OS_32,OS_S32]) and
+                        (para.Size in [OS_32,OS_S32]) then
+                        begin
+                          unget_para(paraloc^);
+                          gen_alloc_regloc(list,destloc);
+                          cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^,destloc.register,sizeof(aint));
+                          unget_para(paraloc^.Next^);
+                          cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,GetNextReg(destloc.register),sizeof(aint));
+                          unget_para(paraloc^.Next^.Next^);
+                          cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^.Next^,GetNextReg(GetNextReg(destloc.register)),sizeof(aint));
+                          unget_para(paraloc^.Next^.Next^.Next^);
+                          cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^.Next^.Next^,GetNextReg(GetNextReg(GetNextReg(destloc.register))),sizeof(aint));
+                        end
+{$endif defined(cpu8bitalu)}
                       else
                         internalerror(200410105);
                     end

+ 2 - 2
rtl/embedded/avr/atmega128.pp

@@ -527,8 +527,8 @@ unit atmega128;
       end;
 
     var
-      _data: record end; external name '_data';
-      _edata: record end; external name '_edata';
+      _data: record end; external name '__data_start';
+      _edata: record end; external name '__data_end';
       _etext: record end; external name '_etext';
       _bss_start: record end; external name '_bss_start';
       _bss_end: record end; external name '_bss_end';

+ 25 - 20
rtl/embedded/avr/start.inc

@@ -6,26 +6,31 @@
         out 0x3d,r30
         ldi r30,hi8(_stack_top)
         out 0x3e,r30
-{
-        // copy initialized data from flash to ram
-        ldr r1,.L_etext
-        ldr r2,.L_data
-        ldr r3,.L_edata
-.Lcopyloop:
-        cmp r2,r3
-        ldrls r0,[r1],#4
-        strls r0,[r2],#4
-        bls .Lcopyloop
-
-        // clear onboard ram
-        ldr r1,.L_bss_start
-        ldr r2,.L_bss_end
-        mov r0,#0
-.Lzeroloop:
-        cmp r1,r2
-        strls r0,[r1],#4
-        bls .Lzeroloop
- }
+        
+        // Initialize .data section
+        ldi XL,lo8(_data)
+        ldi XH,hi8(_data)
+        ldi YH,hi8(_edata)
+        ldi ZL,lo8(_etext)
+        ldi ZH,hi8(_etext)
+.LCopyDataLoop:
+        lpm r0, Z+
+        st X+, r0
+        
+        cpi XL, lo8(_edata)
+        cpc XH, YH
+        brne .LCopyDataLoop
+        
+        // Zero .bss section
+        ldi XL,lo8(_bss_start)
+        ldi XH,hi8(_bss_start)
+        ldi YH,hi8(_bss_end)
+.LZeroBssLoop:
+        st X+, r1
+        
+        cpi XL, lo8(_bss_end)
+        cpc XH, YH
+        brne .LZeroBssLoop
 
         call PASCALMAIN
         call _FPC_haltproc